| /drivers/net/ethernet/microchip/sparx5/ |
| D | sparx5_sdlb.c | 26 u64 clk_hz; in sparx5_sdlb_clk_hz_get() local
33 clk_hz = (10 * 1000 * 1000) / clk_per_100ps; in sparx5_sdlb_clk_hz_get()
34 return clk_hz *= 1000; in sparx5_sdlb_clk_hz_get()
40 u64 clk_hz; in sparx5_sdlb_pup_interval_get() local
42 clk_hz = sparx5_sdlb_clk_hz_get(sparx5); in sparx5_sdlb_pup_interval_get()
44 return div64_u64((8 * clk_hz * max_token), max_rate); in sparx5_sdlb_pup_interval_get()
49 u64 clk_hz; in sparx5_sdlb_pup_token_get() local
54 clk_hz = sparx5_sdlb_clk_hz_get(sparx5); in sparx5_sdlb_pup_token_get()
56 return DIV64_U64_ROUND_UP((rate * pup_interval), (clk_hz * 8)); in sparx5_sdlb_pup_token_get()
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| /drivers/spi/ |
| D | spi-bcm2835aux.c | 345 unsigned long spi_hz, clk_hz, speed; in bcm2835aux_spi_transfer_one() local
358 clk_hz = clk_get_rate(bs->clk); in bcm2835aux_spi_transfer_one()
360 if (spi_hz >= clk_hz / 2) { in bcm2835aux_spi_transfer_one()
363 speed = DIV_ROUND_UP(clk_hz, 2 * spi_hz) - 1; in bcm2835aux_spi_transfer_one()
374 tfr->effective_speed_hz = clk_hz / (2 * (speed + 1)); in bcm2835aux_spi_transfer_one()
478 unsigned long clk_hz; in bcm2835aux_spi_probe() local
534 clk_hz = clk_get_rate(bs->clk); in bcm2835aux_spi_probe()
535 if (!clk_hz) { in bcm2835aux_spi_probe()
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| D | spi-microchip-core.c | 294 unsigned long clk_hz; in mchp_corespi_init() local
319 clk_hz = clk_get_rate(spi->clk); in mchp_corespi_init()
320 host->max_speed_hz = clk_hz; in mchp_corespi_init()
440 unsigned long clk_hz, spi_hz, clk_gen; in mchp_corespi_calculate_clkgen() local
442 clk_hz = clk_get_rate(spi->clk); in mchp_corespi_calculate_clkgen()
443 if (!clk_hz) in mchp_corespi_calculate_clkgen()
445 spi_hz = min(target_hz, clk_hz); in mchp_corespi_calculate_clkgen()
457 clk_gen = DIV_ROUND_UP(clk_hz, 2 * spi_hz) - 1; in mchp_corespi_calculate_clkgen()
459 clk_gen = DIV_ROUND_UP(clk_hz, spi_hz); in mchp_corespi_calculate_clkgen()
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| D | spi-npcm-pspi.c | 344 unsigned long clk_hz; in npcm_pspi_probe() local
399 clk_hz = clk_get_rate(priv->clk); in npcm_pspi_probe()
401 master->max_speed_hz = DIV_ROUND_UP(clk_hz, NPCM_PSPI_MIN_CLK_DIVIDER); in npcm_pspi_probe()
402 master->min_speed_hz = DIV_ROUND_UP(clk_hz, NPCM_PSPI_MAX_CLK_DIVIDER); in npcm_pspi_probe()
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| D | spi-microchip-core-qspi.c | 270 unsigned long clk_hz; in mchp_coreqspi_setup_clock() local
273 clk_hz = clk_get_rate(qspi->clk); in mchp_coreqspi_setup_clock()
274 if (!clk_hz) in mchp_coreqspi_setup_clock()
277 baud_rate_val = DIV_ROUND_UP(clk_hz, 2 * spi->max_speed_hz); in mchp_coreqspi_setup_clock()
281 spi->max_speed_hz, clk_hz); in mchp_coreqspi_setup_clock()
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| D | spi-bcm2835.c | 120 unsigned long clk_hz; member
1061 if (spi_hz >= bs->clk_hz / 2) { in bcm2835_spi_transfer_one()
1065 cdiv = DIV_ROUND_UP(bs->clk_hz, spi_hz); in bcm2835_spi_transfer_one()
1073 tfr->effective_speed_hz = cdiv ? (bs->clk_hz / cdiv) : (bs->clk_hz / 65536); in bcm2835_spi_transfer_one()
1369 bs->clk_hz = clk_get_rate(bs->clk); in bcm2835_spi_probe()
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| D | spi-geni-qcom.c | 359 unsigned long clk_hz) in geni_spi_set_clock_and_bw() argument
365 if (clk_hz == mas->cur_speed_hz) in geni_spi_set_clock_and_bw()
368 ret = get_spi_clk_cfg(clk_hz, mas, &idx, &div); in geni_spi_set_clock_and_bw()
370 dev_err(mas->dev, "Err setting clk to %lu: %d\n", clk_hz, ret); in geni_spi_set_clock_and_bw()
381 mas->cur_speed_hz = clk_hz; in geni_spi_set_clock_and_bw()
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| D | spi-ingenic.c | 103 unsigned long clk_hz = clk_get_rate(priv->clk); in spi_ingenic_prepare_transfer() local
107 cdiv = clk_hz / (speed_hz * 2); in spi_ingenic_prepare_transfer()
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| /drivers/media/rc/img-ir/ |
| D | img-ir-hw.c | 608 img_ir_decoder_convert(decoder, &hw->reg_timings, hw->clk_hz); in img_ir_set_decoder()
908 if (hw->clk_hz == change->new_rate) in img_ir_change_frequency()
910 hw->clk_hz = change->new_rate; in img_ir_change_frequency()
914 hw->clk_hz); in img_ir_change_frequency()
1059 hw->clk_hz = clk_get_rate(priv->clk); in img_ir_probe_hw()
1068 hw->clk_hz = 32768; in img_ir_probe_hw()
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| D | img-ir-hw.h | 240 unsigned long clk_hz; member
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| /drivers/i2c/busses/ |
| D | i2c-xlp9xx.c | 96 u32 clk_hz; member
312 prescale = DIV_ROUND_UP(priv->ip_clk_hz, priv->clk_hz); in xlp9xx_i2c_init()
484 priv->clk_hz = freq; in xlp9xx_i2c_get_frequency()
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| /drivers/net/ethernet/marvell/mvpp2/ |
| D | mvpp2_main.c | 2757 static u32 mvpp2_usec_to_cycles(u32 usec, unsigned long clk_hz) in mvpp2_usec_to_cycles() argument
2759 u64 tmp = (u64)clk_hz * usec; in mvpp2_usec_to_cycles()
2766 static u32 mvpp2_cycles_to_usec(u32 cycles, unsigned long clk_hz) in mvpp2_cycles_to_usec() argument
2770 do_div(tmp, clk_hz); in mvpp2_cycles_to_usec()
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| /drivers/gpu/drm/i915/ |
| D | i915_reg.h | 5299 #define TRANS_DP2_VFREQ_PIXEL_CLOCK(clk_hz) REG_FIELD_PREP(TRANS_DP2_VFREQ_PIXEL_CLOCK_MASK, (clk_… argument
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