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Searched refs:ctx (Results 1 – 25 of 1842) sorted by relevance

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/drivers/gpu/drm/nouveau/nvkm/engine/gr/
Dctxnv50.c170 static void nv50_gr_construct_mmio(struct nvkm_grctx *ctx);
171 static void nv50_gr_construct_xfer1(struct nvkm_grctx *ctx);
172 static void nv50_gr_construct_xfer2(struct nvkm_grctx *ctx);
177 nv50_grctx_generate(struct nvkm_grctx *ctx) in nv50_grctx_generate() argument
179 cp_set (ctx, STATE, RUNNING); in nv50_grctx_generate()
180 cp_set (ctx, XFER_SWITCH, ENABLE); in nv50_grctx_generate()
182 cp_bra (ctx, AUTO_SAVE, PENDING, cp_setup_save); in nv50_grctx_generate()
183 cp_bra (ctx, USER_SAVE, PENDING, cp_setup_save); in nv50_grctx_generate()
185 cp_name(ctx, cp_check_load); in nv50_grctx_generate()
186 cp_bra (ctx, AUTO_LOAD, PENDING, cp_setup_auto_load); in nv50_grctx_generate()
[all …]
Dctxnv40.c159 nv40_gr_construct_general(struct nvkm_grctx *ctx) in nv40_gr_construct_general() argument
161 struct nvkm_device *device = ctx->device; in nv40_gr_construct_general()
164 cp_ctx(ctx, 0x4000a4, 1); in nv40_gr_construct_general()
165 gr_def(ctx, 0x4000a4, 0x00000008); in nv40_gr_construct_general()
166 cp_ctx(ctx, 0x400144, 58); in nv40_gr_construct_general()
167 gr_def(ctx, 0x400144, 0x00000001); in nv40_gr_construct_general()
168 cp_ctx(ctx, 0x400314, 1); in nv40_gr_construct_general()
169 gr_def(ctx, 0x400314, 0x00000000); in nv40_gr_construct_general()
170 cp_ctx(ctx, 0x400400, 10); in nv40_gr_construct_general()
171 cp_ctx(ctx, 0x400480, 10); in nv40_gr_construct_general()
[all …]
/drivers/gpu/drm/bridge/
Dsii9234.c194 static int sii9234_writeb(struct sii9234 *ctx, int id, int offset, in sii9234_writeb() argument
198 struct i2c_client *client = ctx->client[id]; in sii9234_writeb()
200 if (ctx->i2c_error) in sii9234_writeb()
201 return ctx->i2c_error; in sii9234_writeb()
205 dev_err(ctx->dev, "writeb: %4s[0x%02x] <- 0x%02x\n", in sii9234_writeb()
207 ctx->i2c_error = ret; in sii9234_writeb()
212 static int sii9234_writebm(struct sii9234 *ctx, int id, int offset, in sii9234_writebm() argument
216 struct i2c_client *client = ctx->client[id]; in sii9234_writebm()
218 if (ctx->i2c_error) in sii9234_writebm()
219 return ctx->i2c_error; in sii9234_writebm()
[all …]
Dsil-sii8620.c106 typedef void (*sii8620_mt_msg_cb)(struct sii8620 *ctx,
109 typedef void (*sii8620_cb)(struct sii8620 *ctx, int ret);
131 static void sii8620_fetch_edid(struct sii8620 *ctx);
132 static void sii8620_set_upstream_edid(struct sii8620 *ctx);
133 static void sii8620_enable_hpd(struct sii8620 *ctx);
134 static void sii8620_mhl_disconnected(struct sii8620 *ctx);
135 static void sii8620_disconnect(struct sii8620 *ctx);
137 static int sii8620_clear_error(struct sii8620 *ctx) in sii8620_clear_error() argument
139 int ret = ctx->error; in sii8620_clear_error()
141 ctx->error = 0; in sii8620_clear_error()
[all …]
/drivers/misc/cxl/
Dcontext.c35 int cxl_context_init(struct cxl_context *ctx, struct cxl_afu *afu, bool master) in cxl_context_init() argument
39 ctx->afu = afu; in cxl_context_init()
40 ctx->master = master; in cxl_context_init()
41 ctx->pid = NULL; /* Set in start work ioctl */ in cxl_context_init()
42 mutex_init(&ctx->mapping_lock); in cxl_context_init()
43 ctx->mapping = NULL; in cxl_context_init()
44 ctx->tidr = 0; in cxl_context_init()
45 ctx->assign_tidr = false; in cxl_context_init()
48 spin_lock_init(&ctx->sste_lock); in cxl_context_init()
57 i = cxl_alloc_sst(ctx); in cxl_context_init()
[all …]
/drivers/media/i2c/
Dmax2175.c30 #define mxm_dbg(ctx, fmt, arg...) dev_dbg(&ctx->client->dev, fmt, ## arg) argument
31 #define mxm_err(ctx, fmt, arg...) dev_err(&ctx->client->dev, fmt, ## arg) argument
316 static int max2175_read(struct max2175 *ctx, u8 idx, u8 *val) in max2175_read() argument
321 ret = regmap_read(ctx->regmap, idx, &regval); in max2175_read()
323 mxm_err(ctx, "read ret(%d): idx 0x%02x\n", ret, idx); in max2175_read()
330 static int max2175_write(struct max2175 *ctx, u8 idx, u8 val) in max2175_write() argument
334 ret = regmap_write(ctx->regmap, idx, val); in max2175_write()
336 mxm_err(ctx, "write ret(%d): idx 0x%02x val 0x%02x\n", in max2175_write()
342 static u8 max2175_read_bits(struct max2175 *ctx, u8 idx, u8 msb, u8 lsb) in max2175_read_bits() argument
346 if (max2175_read(ctx, idx, &val)) in max2175_read_bits()
[all …]
/drivers/base/regmap/
Dregmap-mmio.c25 void (*reg_write)(struct regmap_mmio_context *ctx,
27 unsigned int (*reg_read)(struct regmap_mmio_context *ctx,
65 static void regmap_mmio_write8(struct regmap_mmio_context *ctx, in regmap_mmio_write8() argument
69 writeb(val, ctx->regs + reg); in regmap_mmio_write8()
72 static void regmap_mmio_write8_relaxed(struct regmap_mmio_context *ctx, in regmap_mmio_write8_relaxed() argument
76 writeb_relaxed(val, ctx->regs + reg); in regmap_mmio_write8_relaxed()
79 static void regmap_mmio_iowrite8(struct regmap_mmio_context *ctx, in regmap_mmio_iowrite8() argument
82 iowrite8(val, ctx->regs + reg); in regmap_mmio_iowrite8()
85 static void regmap_mmio_write16le(struct regmap_mmio_context *ctx, in regmap_mmio_write16le() argument
89 writew(val, ctx->regs + reg); in regmap_mmio_write16le()
[all …]
/drivers/media/dvb-core/
Ddvb_vb2.c33 struct dvb_vb2_ctx *ctx = vb2_get_drv_priv(vq); in _queue_setup() local
35 ctx->buf_cnt = *nbuffers; in _queue_setup()
37 sizes[0] = ctx->buf_siz; in _queue_setup()
44 dprintk(3, "[%s] count=%d, size=%d\n", ctx->name, in _queue_setup()
52 struct dvb_vb2_ctx *ctx = vb2_get_drv_priv(vb->vb2_queue); in _buffer_prepare() local
53 unsigned long size = ctx->buf_siz; in _buffer_prepare()
57 ctx->name, vb2_plane_size(vb, 0), size); in _buffer_prepare()
62 dprintk(3, "[%s]\n", ctx->name); in _buffer_prepare()
69 struct dvb_vb2_ctx *ctx = vb2_get_drv_priv(vb->vb2_queue); in _buffer_queue() local
73 spin_lock_irqsave(&ctx->slock, flags); in _buffer_queue()
[all …]
/drivers/media/platform/mediatek/vcodec/decoder/
Dmtk_vcodec_dec_stateful.c55 static struct vb2_buffer *get_display_buffer(struct mtk_vcodec_dec_ctx *ctx) in get_display_buffer() argument
61 mtk_v4l2_vdec_dbg(3, ctx, "[%d]", ctx->id); in get_display_buffer()
62 if (vdec_if_get_param(ctx, GET_PARAM_DISP_FRAME_BUFFER, in get_display_buffer()
64 mtk_v4l2_vdec_err(ctx, "[%d]Cannot get param : GET_PARAM_DISP_FRAME_BUFFER", in get_display_buffer()
65 ctx->id); in get_display_buffer()
70 mtk_v4l2_vdec_dbg(3, ctx, "No display frame buffer"); in get_display_buffer()
77 mutex_lock(&ctx->lock); in get_display_buffer()
79 mtk_v4l2_vdec_dbg(2, ctx, "[%d]status=%x queue id=%d to done_list %d", in get_display_buffer()
80 ctx->id, disp_frame_buffer->status, in get_display_buffer()
84 ctx->decoded_frame_cnt++; in get_display_buffer()
[all …]
Dvdec_drv_if.c17 int vdec_if_init(struct mtk_vcodec_dec_ctx *ctx, unsigned int fourcc) in vdec_if_init() argument
19 enum mtk_vdec_hw_arch hw_arch = ctx->dev->vdec_pdata->hw_arch; in vdec_if_init()
24 if (!ctx->dev->vdec_pdata->is_subdev_supported) { in vdec_if_init()
25 ctx->dec_if = &vdec_h264_slice_if; in vdec_if_init()
26 ctx->hw_id = MTK_VDEC_CORE; in vdec_if_init()
28 ctx->dec_if = &vdec_h264_slice_multi_if; in vdec_if_init()
29 ctx->hw_id = IS_VDEC_LAT_ARCH(hw_arch) ? MTK_VDEC_LAT0 : MTK_VDEC_CORE; in vdec_if_init()
33 ctx->dec_if = &vdec_h264_if; in vdec_if_init()
34 ctx->hw_id = MTK_VDEC_CORE; in vdec_if_init()
37 ctx->dec_if = &vdec_vp8_slice_if; in vdec_if_init()
[all …]
/drivers/gpu/drm/panel/
Dpanel-samsung-s6e3ha2.c244 static int s6e3ha2_dcs_write(struct s6e3ha2 *ctx, const void *data, size_t len) in s6e3ha2_dcs_write() argument
246 struct mipi_dsi_device *dsi = to_mipi_dsi_device(ctx->dev); in s6e3ha2_dcs_write()
251 #define s6e3ha2_dcs_write_seq_static(ctx, seq...) do { \ argument
254 ret = s6e3ha2_dcs_write(ctx, d, ARRAY_SIZE(d)); \
265 static int s6e3ha2_test_key_on_f0(struct s6e3ha2 *ctx) in s6e3ha2_test_key_on_f0() argument
267 s6e3ha2_dcs_write_seq_static(ctx, 0xf0, 0x5a, 0x5a); in s6e3ha2_test_key_on_f0()
271 static int s6e3ha2_test_key_off_f0(struct s6e3ha2 *ctx) in s6e3ha2_test_key_off_f0() argument
273 s6e3ha2_dcs_write_seq_static(ctx, 0xf0, 0xa5, 0xa5); in s6e3ha2_test_key_off_f0()
277 static int s6e3ha2_test_key_on_fc(struct s6e3ha2 *ctx) in s6e3ha2_test_key_on_fc() argument
279 s6e3ha2_dcs_write_seq_static(ctx, 0xfc, 0x5a, 0x5a); in s6e3ha2_test_key_on_fc()
[all …]
Dpanel-samsung-s6e8aa0.c128 static int s6e8aa0_clear_error(struct s6e8aa0 *ctx) in s6e8aa0_clear_error() argument
130 int ret = ctx->error; in s6e8aa0_clear_error()
132 ctx->error = 0; in s6e8aa0_clear_error()
136 static void s6e8aa0_dcs_write(struct s6e8aa0 *ctx, const void *data, size_t len) in s6e8aa0_dcs_write() argument
138 struct mipi_dsi_device *dsi = to_mipi_dsi_device(ctx->dev); in s6e8aa0_dcs_write()
141 if (ctx->error < 0) in s6e8aa0_dcs_write()
146 dev_err(ctx->dev, "error %zd writing dcs seq: %*ph\n", ret, in s6e8aa0_dcs_write()
148 ctx->error = ret; in s6e8aa0_dcs_write()
152 static int s6e8aa0_dcs_read(struct s6e8aa0 *ctx, u8 cmd, void *data, size_t len) in s6e8aa0_dcs_read() argument
154 struct mipi_dsi_device *dsi = to_mipi_dsi_device(ctx->dev); in s6e8aa0_dcs_read()
[all …]
Dpanel-raydium-rm68200.c104 static void rm68200_dcs_write_buf(struct rm68200 *ctx, const void *data, in rm68200_dcs_write_buf() argument
107 struct mipi_dsi_device *dsi = to_mipi_dsi_device(ctx->dev); in rm68200_dcs_write_buf()
112 dev_err_ratelimited(ctx->dev, "MIPI DSI DCS write buffer failed: %d\n", err); in rm68200_dcs_write_buf()
115 static void rm68200_dcs_write_cmd(struct rm68200 *ctx, u8 cmd, u8 value) in rm68200_dcs_write_cmd() argument
117 struct mipi_dsi_device *dsi = to_mipi_dsi_device(ctx->dev); in rm68200_dcs_write_cmd()
122 dev_err_ratelimited(ctx->dev, "MIPI DSI DCS write failed: %d\n", err); in rm68200_dcs_write_cmd()
125 #define dcs_write_seq(ctx, seq...) \ argument
129 rm68200_dcs_write_buf(ctx, d, ARRAY_SIZE(d)); \
136 #define dcs_write_cmd_seq(ctx, cmd, seq...) \ argument
142 rm68200_dcs_write_cmd(ctx, cmd + i, d[i]); \
[all …]
Dpanel-samsung-s6e63m0.c306 static int s6e63m0_clear_error(struct s6e63m0 *ctx) in s6e63m0_clear_error() argument
308 int ret = ctx->error; in s6e63m0_clear_error()
310 ctx->error = 0; in s6e63m0_clear_error()
314 static void s6e63m0_dcs_read(struct s6e63m0 *ctx, const u8 cmd, u8 *data) in s6e63m0_dcs_read() argument
316 if (ctx->error < 0) in s6e63m0_dcs_read()
319 ctx->error = ctx->dcs_read(ctx->dev, ctx->transport_data, cmd, data); in s6e63m0_dcs_read()
322 static void s6e63m0_dcs_write(struct s6e63m0 *ctx, const u8 *data, size_t len) in s6e63m0_dcs_write() argument
324 if (ctx->error < 0 || len == 0) in s6e63m0_dcs_write()
327 ctx->error = ctx->dcs_write(ctx->dev, ctx->transport_data, data, len); in s6e63m0_dcs_write()
330 #define s6e63m0_dcs_write_seq_static(ctx, seq ...) \ argument
[all …]
Dpanel-orisetech-otm8009a.c112 static void otm8009a_dcs_write_buf(struct otm8009a *ctx, const void *data, in otm8009a_dcs_write_buf() argument
115 struct mipi_dsi_device *dsi = to_mipi_dsi_device(ctx->dev); in otm8009a_dcs_write_buf()
118 dev_warn(ctx->dev, "mipi dsi dcs write buffer failed\n"); in otm8009a_dcs_write_buf()
121 #define dcs_write_seq(ctx, seq...) \ argument
124 otm8009a_dcs_write_buf(ctx, d, ARRAY_SIZE(d)); \
127 #define dcs_write_cmd_at(ctx, cmd, seq...) \ argument
129 dcs_write_seq(ctx, MCS_ADRSFT, (cmd) & 0xFF); \
130 dcs_write_seq(ctx, (cmd) >> 8, seq); \
133 static int otm8009a_init_sequence(struct otm8009a *ctx) in otm8009a_init_sequence() argument
135 struct mipi_dsi_device *dsi = to_mipi_dsi_device(ctx->dev); in otm8009a_init_sequence()
[all …]
/drivers/gpu/drm/bridge/analogix/
Danx7625.c46 static int i2c_access_workaround(struct anx7625_data *ctx, in i2c_access_workaround() argument
53 if (client == ctx->last_client) in i2c_access_workaround()
56 ctx->last_client = client; in i2c_access_workaround()
58 if (client == ctx->i2c.tcpc_client) in i2c_access_workaround()
60 else if (client == ctx->i2c.tx_p0_client) in i2c_access_workaround()
62 else if (client == ctx->i2c.tx_p1_client) in i2c_access_workaround()
64 else if (client == ctx->i2c.rx_p0_client) in i2c_access_workaround()
66 else if (client == ctx->i2c.rx_p1_client) in i2c_access_workaround()
80 static int anx7625_reg_read(struct anx7625_data *ctx, in anx7625_reg_read() argument
86 i2c_access_workaround(ctx, client); in anx7625_reg_read()
[all …]
/drivers/media/platform/chips-media/
Dcoda-bit.c41 static void coda_free_bitstream_buffer(struct coda_ctx *ctx);
64 static void coda_command_async(struct coda_ctx *ctx, int cmd) in coda_command_async() argument
66 struct coda_dev *dev = ctx->dev; in coda_command_async()
72 coda_write(dev, ctx->bit_stream_param, in coda_command_async()
74 coda_write(dev, ctx->frm_dis_flg, in coda_command_async()
75 CODA_REG_BIT_FRM_DIS_FLG(ctx->reg_idx)); in coda_command_async()
76 coda_write(dev, ctx->frame_mem_ctrl, in coda_command_async()
78 coda_write(dev, ctx->workbuf.paddr, CODA_REG_BIT_WORK_BUF_ADDR); in coda_command_async()
88 coda_write(dev, ctx->idx, CODA_REG_BIT_RUN_INDEX); in coda_command_async()
89 coda_write(dev, ctx->params.codec_mode, CODA_REG_BIT_RUN_COD_STD); in coda_command_async()
[all …]
/drivers/gpu/drm/exynos/
Dexynos7_drm_decon.c86 struct decon_context *ctx = crtc->ctx; in decon_wait_for_vblank() local
88 if (ctx->suspended) in decon_wait_for_vblank()
91 atomic_set(&ctx->wait_vsync_event, 1); in decon_wait_for_vblank()
97 if (!wait_event_timeout(ctx->wait_vsync_queue, in decon_wait_for_vblank()
98 !atomic_read(&ctx->wait_vsync_event), in decon_wait_for_vblank()
100 DRM_DEV_DEBUG_KMS(ctx->dev, "vblank wait timed out.\n"); in decon_wait_for_vblank()
105 struct decon_context *ctx = crtc->ctx; in decon_clear_channels() local
110 u32 val = readl(ctx->regs + WINCON(win)); in decon_clear_channels()
114 writel(val, ctx->regs + WINCON(win)); in decon_clear_channels()
121 decon_wait_for_vblank(ctx->crtc); in decon_clear_channels()
[all …]
Dexynos5433_drm_decon.c96 static inline void decon_set_bits(struct decon_context *ctx, u32 reg, u32 mask, in decon_set_bits() argument
99 val = (val & mask) | (readl(ctx->addr + reg) & ~mask); in decon_set_bits()
100 writel(val, ctx->addr + reg); in decon_set_bits()
105 struct decon_context *ctx = crtc->ctx; in decon_enable_vblank() local
114 writel(val, ctx->addr + DECON_VIDINTCON0); in decon_enable_vblank()
116 enable_irq(ctx->irq); in decon_enable_vblank()
117 if (!(ctx->out_type & I80_HW_TRG)) in decon_enable_vblank()
118 enable_irq(ctx->te_irq); in decon_enable_vblank()
125 struct decon_context *ctx = crtc->ctx; in decon_disable_vblank() local
127 if (!(ctx->out_type & I80_HW_TRG)) in decon_disable_vblank()
[all …]
Dexynos_drm_fimd.c254 static inline void fimd_set_bits(struct fimd_context *ctx, u32 reg, u32 mask, in fimd_set_bits() argument
257 val = (val & mask) | (readl(ctx->regs + reg) & ~mask); in fimd_set_bits()
258 writel(val, ctx->regs + reg); in fimd_set_bits()
263 struct fimd_context *ctx = crtc->ctx; in fimd_enable_vblank() local
266 if (ctx->suspended) in fimd_enable_vblank()
269 if (!test_and_set_bit(0, &ctx->irq_flags)) { in fimd_enable_vblank()
270 val = readl(ctx->regs + VIDINTCON0); in fimd_enable_vblank()
274 if (ctx->i80_if) { in fimd_enable_vblank()
287 writel(val, ctx->regs + VIDINTCON0); in fimd_enable_vblank()
295 struct fimd_context *ctx = crtc->ctx; in fimd_disable_vblank() local
[all …]
/drivers/hwmon/
Dpwm-fan.c76 struct pwm_fan_ctx *ctx = from_timer(ctx, t, rpm_timer); in sample_timer() local
77 unsigned int delta = ktime_ms_delta(ktime_get(), ctx->sample_start); in sample_timer()
81 for (i = 0; i < ctx->tach_count; i++) { in sample_timer()
82 struct pwm_fan_tach *tach = &ctx->tachs[i]; in sample_timer()
91 ctx->sample_start = ktime_get(); in sample_timer()
94 mod_timer(&ctx->rpm_timer, jiffies + HZ); in sample_timer()
120 static int pwm_fan_switch_power(struct pwm_fan_ctx *ctx, bool on) in pwm_fan_switch_power() argument
124 if (!ctx->reg_en) in pwm_fan_switch_power()
127 if (!ctx->regulator_enabled && on) { in pwm_fan_switch_power()
128 ret = regulator_enable(ctx->reg_en); in pwm_fan_switch_power()
[all …]
/drivers/media/platform/samsung/s5p-mfc/
Ds5p_mfc_opr_v5.c34 static int s5p_mfc_alloc_dec_temp_buffers_v5(struct s5p_mfc_ctx *ctx) in s5p_mfc_alloc_dec_temp_buffers_v5() argument
36 struct s5p_mfc_dev *dev = ctx->dev; in s5p_mfc_alloc_dec_temp_buffers_v5()
40 ctx->dsc.size = buf_size->dsc; in s5p_mfc_alloc_dec_temp_buffers_v5()
41 ret = s5p_mfc_alloc_priv_buf(dev, BANK_L_CTX, &ctx->dsc); in s5p_mfc_alloc_dec_temp_buffers_v5()
47 BUG_ON(ctx->dsc.dma & ((1 << MFC_BANK1_ALIGN_ORDER) - 1)); in s5p_mfc_alloc_dec_temp_buffers_v5()
48 memset(ctx->dsc.virt, 0, ctx->dsc.size); in s5p_mfc_alloc_dec_temp_buffers_v5()
55 static void s5p_mfc_release_dec_desc_buffer_v5(struct s5p_mfc_ctx *ctx) in s5p_mfc_release_dec_desc_buffer_v5() argument
57 s5p_mfc_release_priv_buf(ctx->dev, &ctx->dsc); in s5p_mfc_release_dec_desc_buffer_v5()
61 static int s5p_mfc_alloc_codec_buffers_v5(struct s5p_mfc_ctx *ctx) in s5p_mfc_alloc_codec_buffers_v5() argument
63 struct s5p_mfc_dev *dev = ctx->dev; in s5p_mfc_alloc_codec_buffers_v5()
[all …]
/drivers/misc/ocxl/
Dcontext.c11 struct ocxl_context *ctx; in ocxl_context_alloc() local
13 ctx = kzalloc(sizeof(*ctx), GFP_KERNEL); in ocxl_context_alloc()
14 if (!ctx) in ocxl_context_alloc()
17 ctx->afu = afu; in ocxl_context_alloc()
19 pasid = idr_alloc(&afu->contexts_idr, ctx, afu->pasid_base, in ocxl_context_alloc()
23 kfree(ctx); in ocxl_context_alloc()
29 ctx->pasid = pasid; in ocxl_context_alloc()
30 ctx->status = OPENED; in ocxl_context_alloc()
31 mutex_init(&ctx->status_mutex); in ocxl_context_alloc()
32 ctx->mapping = mapping; in ocxl_context_alloc()
[all …]
/drivers/accel/habanalabs/common/
Dcontext.c15 struct hl_encaps_signals_mgr *mgr = &handle->ctx->sig_mgr; in encaps_handle_do_release()
25 hl_ctx_put(handle->ctx); in encaps_handle_do_release()
81 static void hl_ctx_fini(struct hl_ctx *ctx) in hl_ctx_fini() argument
83 struct hl_device *hdev = ctx->hdev; in hl_ctx_fini()
89 hl_hw_block_mem_fini(ctx); in hl_ctx_fini()
100 hl_fence_put(ctx->cs_pending[i]); in hl_ctx_fini()
102 kfree(ctx->cs_pending); in hl_ctx_fini()
104 if (ctx->asid != HL_KERNEL_ASID_ID) { in hl_ctx_fini()
105 dev_dbg(hdev->dev, "closing user context %d\n", ctx->asid); in hl_ctx_fini()
112 hl_device_set_debug_mode(hdev, ctx, false); in hl_ctx_fini()
[all …]
/drivers/net/usb/
Dcdc_ncm.c66 static void cdc_ncm_tx_timeout_start(struct cdc_ncm_ctx *ctx);
110 struct cdc_ncm_ctx *ctx = (struct cdc_ncm_ctx *)dev->data[0]; in cdc_ncm_get_ethtool_stats() local
115 p = (char *)ctx + cdc_ncm_gstrings_stats[i].stat_offset; in cdc_ncm_get_ethtool_stats()
152 struct cdc_ncm_ctx *ctx = (struct cdc_ncm_ctx *)dev->data[0]; in cdc_ncm_check_rx_max() local
157 max = min_t(u32, CDC_NCM_NTB_MAX_SIZE_RX, le32_to_cpu(ctx->ncm_parm.dwNtbInMaxSize)); in cdc_ncm_check_rx_max()
162 le32_to_cpu(ctx->ncm_parm.dwNtbInMaxSize), min); in cdc_ncm_check_rx_max()
175 struct cdc_ncm_ctx *ctx = (struct cdc_ncm_ctx *)dev->data[0]; in cdc_ncm_check_tx_max() local
179 if (ctx->is_ndp16) in cdc_ncm_check_tx_max()
180 min = ctx->max_datagram_size + ctx->max_ndp_size + sizeof(struct usb_cdc_ncm_nth16); in cdc_ncm_check_tx_max()
182 min = ctx->max_datagram_size + ctx->max_ndp_size + sizeof(struct usb_cdc_ncm_nth32); in cdc_ncm_check_tx_max()
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