1 // SPDX-License-Identifier: GPL-2.0-only
2 /*
3 * Copyright 2008-2010 Cisco Systems, Inc. All rights reserved.
4 * Copyright 2007 Nuova Systems, Inc. All rights reserved.
5 */
6
7 #include <linux/kernel.h>
8 #include <linux/errno.h>
9 #include <linux/types.h>
10 #include <linux/pci.h>
11
12 #include "vnic_dev.h"
13 #include "vnic_cq.h"
14 #include "enic.h"
15
vnic_cq_free(struct vnic_cq * cq)16 void vnic_cq_free(struct vnic_cq *cq)
17 {
18 vnic_dev_free_desc_ring(cq->vdev, &cq->ring);
19
20 cq->ctrl = NULL;
21 }
22
vnic_cq_alloc(struct vnic_dev * vdev,struct vnic_cq * cq,unsigned int index,unsigned int desc_count,unsigned int desc_size)23 int vnic_cq_alloc(struct vnic_dev *vdev, struct vnic_cq *cq, unsigned int index,
24 unsigned int desc_count, unsigned int desc_size)
25 {
26 cq->index = index;
27 cq->vdev = vdev;
28
29 cq->ctrl = vnic_dev_get_res(vdev, RES_TYPE_CQ, index);
30 if (!cq->ctrl) {
31 vdev_err(vdev, "Failed to hook CQ[%d] resource\n", index);
32 return -EINVAL;
33 }
34
35 return vnic_dev_alloc_desc_ring(vdev, &cq->ring, desc_count, desc_size);
36 }
37
vnic_cq_init(struct vnic_cq * cq,unsigned int flow_control_enable,unsigned int color_enable,unsigned int cq_head,unsigned int cq_tail,unsigned int cq_tail_color,unsigned int interrupt_enable,unsigned int cq_entry_enable,unsigned int cq_message_enable,unsigned int interrupt_offset,u64 cq_message_addr)38 void vnic_cq_init(struct vnic_cq *cq, unsigned int flow_control_enable,
39 unsigned int color_enable, unsigned int cq_head, unsigned int cq_tail,
40 unsigned int cq_tail_color, unsigned int interrupt_enable,
41 unsigned int cq_entry_enable, unsigned int cq_message_enable,
42 unsigned int interrupt_offset, u64 cq_message_addr)
43 {
44 u64 paddr;
45
46 paddr = (u64)cq->ring.base_addr | VNIC_PADDR_TARGET;
47 writeq(paddr, &cq->ctrl->ring_base);
48 iowrite32(cq->ring.desc_count, &cq->ctrl->ring_size);
49 iowrite32(flow_control_enable, &cq->ctrl->flow_control_enable);
50 iowrite32(color_enable, &cq->ctrl->color_enable);
51 iowrite32(cq_head, &cq->ctrl->cq_head);
52 iowrite32(cq_tail, &cq->ctrl->cq_tail);
53 iowrite32(cq_tail_color, &cq->ctrl->cq_tail_color);
54 iowrite32(interrupt_enable, &cq->ctrl->interrupt_enable);
55 iowrite32(cq_entry_enable, &cq->ctrl->cq_entry_enable);
56 iowrite32(cq_message_enable, &cq->ctrl->cq_message_enable);
57 iowrite32(interrupt_offset, &cq->ctrl->interrupt_offset);
58 writeq(cq_message_addr, &cq->ctrl->cq_message_addr);
59
60 cq->interrupt_offset = interrupt_offset;
61 }
62
vnic_cq_clean(struct vnic_cq * cq)63 void vnic_cq_clean(struct vnic_cq *cq)
64 {
65 cq->to_clean = 0;
66 cq->last_color = 0;
67
68 iowrite32(0, &cq->ctrl->cq_head);
69 iowrite32(0, &cq->ctrl->cq_tail);
70 iowrite32(1, &cq->ctrl->cq_tail_color);
71
72 vnic_dev_clear_desc_ring(&cq->ring);
73 }
74