1 /* SPDX-License-Identifier: GPL-2.0 */
2 /* Copyright (c) 2018, Intel Corporation. */
3
4 #ifndef _ICE_H_
5 #define _ICE_H_
6
7 #include <linux/types.h>
8 #include <linux/errno.h>
9 #include <linux/kernel.h>
10 #include <linux/module.h>
11 #include <linux/firmware.h>
12 #include <linux/netdevice.h>
13 #include <linux/compiler.h>
14 #include <linux/etherdevice.h>
15 #include <linux/skbuff.h>
16 #include <linux/cpumask.h>
17 #include <linux/rtnetlink.h>
18 #include <linux/if_vlan.h>
19 #include <linux/dma-mapping.h>
20 #include <linux/pci.h>
21 #include <linux/workqueue.h>
22 #include <linux/wait.h>
23 #include <linux/interrupt.h>
24 #include <linux/ethtool.h>
25 #include <linux/timer.h>
26 #include <linux/delay.h>
27 #include <linux/bitmap.h>
28 #include <linux/log2.h>
29 #include <linux/ip.h>
30 #include <linux/sctp.h>
31 #include <linux/ipv6.h>
32 #include <linux/pkt_sched.h>
33 #include <linux/if_bridge.h>
34 #include <linux/ctype.h>
35 #include <linux/linkmode.h>
36 #include <linux/bpf.h>
37 #include <linux/btf.h>
38 #include <linux/auxiliary_bus.h>
39 #include <linux/avf/virtchnl.h>
40 #include <linux/cpu_rmap.h>
41 #include <linux/dim.h>
42 #include <linux/gnss.h>
43 #include <net/pkt_cls.h>
44 #include <net/pkt_sched.h>
45 #include <net/tc_act/tc_mirred.h>
46 #include <net/tc_act/tc_gact.h>
47 #include <net/ip.h>
48 #include <net/devlink.h>
49 #include <net/ipv6.h>
50 #include <net/xdp_sock.h>
51 #include <net/xdp_sock_drv.h>
52 #include <net/geneve.h>
53 #include <net/gre.h>
54 #include <net/udp_tunnel.h>
55 #include <net/vxlan.h>
56 #include <net/gtp.h>
57 #include <linux/ppp_defs.h>
58 #include "ice_devids.h"
59 #include "ice_type.h"
60 #include "ice_txrx.h"
61 #include "ice_dcb.h"
62 #include "ice_switch.h"
63 #include "ice_common.h"
64 #include "ice_flow.h"
65 #include "ice_sched.h"
66 #include "ice_idc_int.h"
67 #include "ice_sriov.h"
68 #include "ice_vf_mbx.h"
69 #include "ice_ptp.h"
70 #include "ice_fdir.h"
71 #include "ice_xsk.h"
72 #include "ice_arfs.h"
73 #include "ice_repr.h"
74 #include "ice_eswitch.h"
75 #include "ice_lag.h"
76 #include "ice_vsi_vlan_ops.h"
77 #include "ice_gnss.h"
78 #include "ice_irq.h"
79
80 #define ICE_BAR0 0
81 #define ICE_REQ_DESC_MULTIPLE 32
82 #define ICE_MIN_NUM_DESC 64
83 #define ICE_MAX_NUM_DESC 8160
84 #define ICE_DFLT_MIN_RX_DESC 512
85 #define ICE_DFLT_NUM_TX_DESC 256
86 #define ICE_DFLT_NUM_RX_DESC 2048
87
88 #define ICE_DFLT_TRAFFIC_CLASS BIT(0)
89 #define ICE_INT_NAME_STR_LEN (IFNAMSIZ + 16)
90 #define ICE_AQ_LEN 192
91 #define ICE_MBXSQ_LEN 64
92 #define ICE_SBQ_LEN 64
93 #define ICE_MIN_LAN_TXRX_MSIX 1
94 #define ICE_MIN_LAN_OICR_MSIX 1
95 #define ICE_MIN_MSIX (ICE_MIN_LAN_TXRX_MSIX + ICE_MIN_LAN_OICR_MSIX)
96 #define ICE_FDIR_MSIX 2
97 #define ICE_RDMA_NUM_AEQ_MSIX 4
98 #define ICE_MIN_RDMA_MSIX 2
99 #define ICE_ESWITCH_MSIX 1
100 #define ICE_NO_VSI 0xffff
101 #define ICE_VSI_MAP_CONTIG 0
102 #define ICE_VSI_MAP_SCATTER 1
103 #define ICE_MAX_SCATTER_TXQS 16
104 #define ICE_MAX_SCATTER_RXQS 16
105 #define ICE_Q_WAIT_RETRY_LIMIT 10
106 #define ICE_Q_WAIT_MAX_RETRY (5 * ICE_Q_WAIT_RETRY_LIMIT)
107 #define ICE_MAX_LG_RSS_QS 256
108 #define ICE_INVAL_Q_INDEX 0xffff
109
110 #define ICE_MAX_RXQS_PER_TC 256 /* Used when setting VSI context per TC Rx queues */
111
112 #define ICE_CHNL_START_TC 1
113
114 #define ICE_MAX_RESET_WAIT 20
115
116 #define ICE_VSIQF_HKEY_ARRAY_SIZE ((VSIQF_HKEY_MAX_INDEX + 1) * 4)
117
118 #define ICE_DFLT_NETIF_M (NETIF_MSG_DRV | NETIF_MSG_PROBE | NETIF_MSG_LINK)
119
120 #define ICE_MAX_MTU (ICE_AQ_SET_MAC_FRAME_SIZE_MAX - ICE_ETH_PKT_HDR_PAD)
121
122 #define ICE_MAX_TSO_SIZE 131072
123
124 #define ICE_UP_TABLE_TRANSLATE(val, i) \
125 (((val) << ICE_AQ_VSI_UP_TABLE_UP##i##_S) & \
126 ICE_AQ_VSI_UP_TABLE_UP##i##_M)
127
128 #define ICE_TX_DESC(R, i) (&(((struct ice_tx_desc *)((R)->desc))[i]))
129 #define ICE_RX_DESC(R, i) (&(((union ice_32b_rx_flex_desc *)((R)->desc))[i]))
130 #define ICE_TX_CTX_DESC(R, i) (&(((struct ice_tx_ctx_desc *)((R)->desc))[i]))
131 #define ICE_TX_FDIRDESC(R, i) (&(((struct ice_fltr_desc *)((R)->desc))[i]))
132
133 /* Minimum BW limit is 500 Kbps for any scheduler node */
134 #define ICE_MIN_BW_LIMIT 500
135 /* User can specify BW in either Kbit/Mbit/Gbit and OS converts it in bytes.
136 * use it to convert user specified BW limit into Kbps
137 */
138 #define ICE_BW_KBPS_DIVISOR 125
139
140 /* Default recipes have priority 4 and below, hence priority values between 5..7
141 * can be used as filter priority for advanced switch filter (advanced switch
142 * filters need new recipe to be created for specified extraction sequence
143 * because default recipe extraction sequence does not represent custom
144 * extraction)
145 */
146 #define ICE_SWITCH_FLTR_PRIO_QUEUE 7
147 /* prio 6 is reserved for future use (e.g. switch filter with L3 fields +
148 * (Optional: IP TOS/TTL) + L4 fields + (optionally: TCP fields such as
149 * SYN/FIN/RST))
150 */
151 #define ICE_SWITCH_FLTR_PRIO_RSVD 6
152 #define ICE_SWITCH_FLTR_PRIO_VSI 5
153 #define ICE_SWITCH_FLTR_PRIO_QGRP ICE_SWITCH_FLTR_PRIO_VSI
154
155 /* Macro for each VSI in a PF */
156 #define ice_for_each_vsi(pf, i) \
157 for ((i) = 0; (i) < (pf)->num_alloc_vsi; (i)++)
158
159 /* Macros for each Tx/Xdp/Rx ring in a VSI */
160 #define ice_for_each_txq(vsi, i) \
161 for ((i) = 0; (i) < (vsi)->num_txq; (i)++)
162
163 #define ice_for_each_xdp_txq(vsi, i) \
164 for ((i) = 0; (i) < (vsi)->num_xdp_txq; (i)++)
165
166 #define ice_for_each_rxq(vsi, i) \
167 for ((i) = 0; (i) < (vsi)->num_rxq; (i)++)
168
169 /* Macros for each allocated Tx/Rx ring whether used or not in a VSI */
170 #define ice_for_each_alloc_txq(vsi, i) \
171 for ((i) = 0; (i) < (vsi)->alloc_txq; (i)++)
172
173 #define ice_for_each_alloc_rxq(vsi, i) \
174 for ((i) = 0; (i) < (vsi)->alloc_rxq; (i)++)
175
176 #define ice_for_each_q_vector(vsi, i) \
177 for ((i) = 0; (i) < (vsi)->num_q_vectors; (i)++)
178
179 #define ice_for_each_chnl_tc(i) \
180 for ((i) = ICE_CHNL_START_TC; (i) < ICE_CHNL_MAX_TC; (i)++)
181
182 #define ICE_UCAST_PROMISC_BITS (ICE_PROMISC_UCAST_TX | ICE_PROMISC_UCAST_RX)
183
184 #define ICE_UCAST_VLAN_PROMISC_BITS (ICE_PROMISC_UCAST_TX | \
185 ICE_PROMISC_UCAST_RX | \
186 ICE_PROMISC_VLAN_TX | \
187 ICE_PROMISC_VLAN_RX)
188
189 #define ICE_MCAST_PROMISC_BITS (ICE_PROMISC_MCAST_TX | ICE_PROMISC_MCAST_RX)
190
191 #define ICE_MCAST_VLAN_PROMISC_BITS (ICE_PROMISC_MCAST_TX | \
192 ICE_PROMISC_MCAST_RX | \
193 ICE_PROMISC_VLAN_TX | \
194 ICE_PROMISC_VLAN_RX)
195
196 #define ice_pf_to_dev(pf) (&((pf)->pdev->dev))
197
198 enum ice_feature {
199 ICE_F_DSCP,
200 ICE_F_PTP_EXTTS,
201 ICE_F_SMA_CTRL,
202 ICE_F_GNSS,
203 ICE_F_ROCE_LAG,
204 ICE_F_SRIOV_LAG,
205 ICE_F_MAX
206 };
207
208 DECLARE_STATIC_KEY_FALSE(ice_xdp_locking_key);
209
210 struct ice_channel {
211 struct list_head list;
212 u8 type;
213 u16 sw_id;
214 u16 base_q;
215 u16 num_rxq;
216 u16 num_txq;
217 u16 vsi_num;
218 u8 ena_tc;
219 struct ice_aqc_vsi_props info;
220 u64 max_tx_rate;
221 u64 min_tx_rate;
222 atomic_t num_sb_fltr;
223 struct ice_vsi *ch_vsi;
224 };
225
226 struct ice_txq_meta {
227 u32 q_teid; /* Tx-scheduler element identifier */
228 u16 q_id; /* Entry in VSI's txq_map bitmap */
229 u16 q_handle; /* Relative index of Tx queue within TC */
230 u16 vsi_idx; /* VSI index that Tx queue belongs to */
231 u8 tc; /* TC number that Tx queue belongs to */
232 };
233
234 struct ice_tc_info {
235 u16 qoffset;
236 u16 qcount_tx;
237 u16 qcount_rx;
238 u8 netdev_tc;
239 };
240
241 struct ice_tc_cfg {
242 u8 numtc; /* Total number of enabled TCs */
243 u16 ena_tc; /* Tx map */
244 struct ice_tc_info tc_info[ICE_MAX_TRAFFIC_CLASS];
245 };
246
247 struct ice_qs_cfg {
248 struct mutex *qs_mutex; /* will be assigned to &pf->avail_q_mutex */
249 unsigned long *pf_map;
250 unsigned long pf_map_size;
251 unsigned int q_count;
252 unsigned int scatter_count;
253 u16 *vsi_map;
254 u16 vsi_map_offset;
255 u8 mapping_mode;
256 };
257
258 struct ice_sw {
259 struct ice_pf *pf;
260 u16 sw_id; /* switch ID for this switch */
261 u16 bridge_mode; /* VEB/VEPA/Port Virtualizer */
262 };
263
264 enum ice_pf_state {
265 ICE_TESTING,
266 ICE_DOWN,
267 ICE_NEEDS_RESTART,
268 ICE_PREPARED_FOR_RESET, /* set by driver when prepared */
269 ICE_RESET_OICR_RECV, /* set by driver after rcv reset OICR */
270 ICE_PFR_REQ, /* set by driver */
271 ICE_CORER_REQ, /* set by driver */
272 ICE_GLOBR_REQ, /* set by driver */
273 ICE_CORER_RECV, /* set by OICR handler */
274 ICE_GLOBR_RECV, /* set by OICR handler */
275 ICE_EMPR_RECV, /* set by OICR handler */
276 ICE_SUSPENDED, /* set on module remove path */
277 ICE_RESET_FAILED, /* set by reset/rebuild */
278 /* When checking for the PF to be in a nominal operating state, the
279 * bits that are grouped at the beginning of the list need to be
280 * checked. Bits occurring before ICE_STATE_NOMINAL_CHECK_BITS will
281 * be checked. If you need to add a bit into consideration for nominal
282 * operating state, it must be added before
283 * ICE_STATE_NOMINAL_CHECK_BITS. Do not move this entry's position
284 * without appropriate consideration.
285 */
286 ICE_STATE_NOMINAL_CHECK_BITS,
287 ICE_ADMINQ_EVENT_PENDING,
288 ICE_MAILBOXQ_EVENT_PENDING,
289 ICE_SIDEBANDQ_EVENT_PENDING,
290 ICE_MDD_EVENT_PENDING,
291 ICE_VFLR_EVENT_PENDING,
292 ICE_FLTR_OVERFLOW_PROMISC,
293 ICE_VF_DIS,
294 ICE_CFG_BUSY,
295 ICE_SERVICE_SCHED,
296 ICE_SERVICE_DIS,
297 ICE_FD_FLUSH_REQ,
298 ICE_OICR_INTR_DIS, /* Global OICR interrupt disabled */
299 ICE_MDD_VF_PRINT_PENDING, /* set when MDD event handle */
300 ICE_VF_RESETS_DISABLED, /* disable resets during ice_remove */
301 ICE_LINK_DEFAULT_OVERRIDE_PENDING,
302 ICE_PHY_INIT_COMPLETE,
303 ICE_FD_VF_FLUSH_CTX, /* set at FD Rx IRQ or timeout */
304 ICE_AUX_ERR_PENDING,
305 ICE_STATE_NBITS /* must be last */
306 };
307
308 enum ice_vsi_state {
309 ICE_VSI_DOWN,
310 ICE_VSI_NEEDS_RESTART,
311 ICE_VSI_NETDEV_ALLOCD,
312 ICE_VSI_NETDEV_REGISTERED,
313 ICE_VSI_UMAC_FLTR_CHANGED,
314 ICE_VSI_MMAC_FLTR_CHANGED,
315 ICE_VSI_PROMISC_CHANGED,
316 ICE_VSI_STATE_NBITS /* must be last */
317 };
318
319 struct ice_vsi_stats {
320 struct ice_ring_stats **tx_ring_stats; /* Tx ring stats array */
321 struct ice_ring_stats **rx_ring_stats; /* Rx ring stats array */
322 };
323
324 /* struct that defines a VSI, associated with a dev */
325 struct ice_vsi {
326 struct net_device *netdev;
327 struct ice_sw *vsw; /* switch this VSI is on */
328 struct ice_pf *back; /* back pointer to PF */
329 struct ice_port_info *port_info; /* back pointer to port_info */
330 struct ice_rx_ring **rx_rings; /* Rx ring array */
331 struct ice_tx_ring **tx_rings; /* Tx ring array */
332 struct ice_q_vector **q_vectors; /* q_vector array */
333
334 irqreturn_t (*irq_handler)(int irq, void *data);
335
336 u64 tx_linearize;
337 DECLARE_BITMAP(state, ICE_VSI_STATE_NBITS);
338 unsigned int current_netdev_flags;
339 u32 tx_restart;
340 u32 tx_busy;
341 u32 rx_buf_failed;
342 u32 rx_page_failed;
343 u16 num_q_vectors;
344 /* tell if only dynamic irq allocation is allowed */
345 bool irq_dyn_alloc;
346
347 enum ice_vsi_type type;
348 u16 vsi_num; /* HW (absolute) index of this VSI */
349 u16 idx; /* software index in pf->vsi[] */
350
351 struct ice_vf *vf; /* VF associated with this VSI */
352
353 u16 num_gfltr;
354 u16 num_bfltr;
355
356 /* RSS config */
357 u16 rss_table_size; /* HW RSS table size */
358 u16 rss_size; /* Allocated RSS queues */
359 u8 *rss_hkey_user; /* User configured hash keys */
360 u8 *rss_lut_user; /* User configured lookup table entries */
361 u8 rss_lut_type; /* used to configure Get/Set RSS LUT AQ call */
362
363 /* aRFS members only allocated for the PF VSI */
364 #define ICE_MAX_ARFS_LIST 1024
365 #define ICE_ARFS_LST_MASK (ICE_MAX_ARFS_LIST - 1)
366 struct hlist_head *arfs_fltr_list;
367 struct ice_arfs_active_fltr_cntrs *arfs_fltr_cntrs;
368 spinlock_t arfs_lock; /* protects aRFS hash table and filter state */
369 atomic_t *arfs_last_fltr_id;
370
371 u16 max_frame;
372 u16 rx_buf_len;
373
374 struct ice_aqc_vsi_props info; /* VSI properties */
375 struct ice_vsi_vlan_info vlan_info; /* vlan config to be restored */
376
377 /* VSI stats */
378 struct rtnl_link_stats64 net_stats;
379 struct rtnl_link_stats64 net_stats_prev;
380 struct ice_eth_stats eth_stats;
381 struct ice_eth_stats eth_stats_prev;
382
383 struct list_head tmp_sync_list; /* MAC filters to be synced */
384 struct list_head tmp_unsync_list; /* MAC filters to be unsynced */
385
386 u8 irqs_ready:1;
387 u8 current_isup:1; /* Sync 'link up' logging */
388 u8 stat_offsets_loaded:1;
389 struct ice_vsi_vlan_ops inner_vlan_ops;
390 struct ice_vsi_vlan_ops outer_vlan_ops;
391 u16 num_vlan;
392
393 /* queue information */
394 u8 tx_mapping_mode; /* ICE_MAP_MODE_[CONTIG|SCATTER] */
395 u8 rx_mapping_mode; /* ICE_MAP_MODE_[CONTIG|SCATTER] */
396 u16 *txq_map; /* index in pf->avail_txqs */
397 u16 *rxq_map; /* index in pf->avail_rxqs */
398 u16 alloc_txq; /* Allocated Tx queues */
399 u16 num_txq; /* Used Tx queues */
400 u16 alloc_rxq; /* Allocated Rx queues */
401 u16 num_rxq; /* Used Rx queues */
402 u16 req_txq; /* User requested Tx queues */
403 u16 req_rxq; /* User requested Rx queues */
404 u16 num_rx_desc;
405 u16 num_tx_desc;
406 u16 qset_handle[ICE_MAX_TRAFFIC_CLASS];
407 struct ice_tc_cfg tc_cfg;
408 struct bpf_prog *xdp_prog;
409 struct ice_tx_ring **xdp_rings; /* XDP ring array */
410 u16 num_xdp_txq; /* Used XDP queues */
411 u8 xdp_mapping_mode; /* ICE_MAP_MODE_[CONTIG|SCATTER] */
412
413 struct net_device **target_netdevs;
414
415 struct tc_mqprio_qopt_offload mqprio_qopt; /* queue parameters */
416
417 /* Channel Specific Fields */
418 struct ice_vsi *tc_map_vsi[ICE_CHNL_MAX_TC];
419 u16 cnt_q_avail;
420 u16 next_base_q; /* next queue to be used for channel setup */
421 struct list_head ch_list;
422 u16 num_chnl_rxq;
423 u16 num_chnl_txq;
424 u16 ch_rss_size;
425 u16 num_chnl_fltr;
426 /* store away rss size info before configuring ADQ channels so that,
427 * it can be used after tc-qdisc delete, to get back RSS setting as
428 * they were before
429 */
430 u16 orig_rss_size;
431 /* this keeps tracks of all enabled TC with and without DCB
432 * and inclusive of ADQ, vsi->mqprio_opt keeps track of queue
433 * information
434 */
435 u8 all_numtc;
436 u16 all_enatc;
437
438 /* store away TC info, to be used for rebuild logic */
439 u8 old_numtc;
440 u16 old_ena_tc;
441
442 struct ice_channel *ch;
443
444 /* setup back reference, to which aggregator node this VSI
445 * corresponds to
446 */
447 struct ice_agg_node *agg_node;
448 } ____cacheline_internodealigned_in_smp;
449
450 /* struct that defines an interrupt vector */
451 struct ice_q_vector {
452 struct ice_vsi *vsi;
453
454 u16 v_idx; /* index in the vsi->q_vector array. */
455 u16 reg_idx;
456 u8 num_ring_rx; /* total number of Rx rings in vector */
457 u8 num_ring_tx; /* total number of Tx rings in vector */
458 u8 wb_on_itr:1; /* if true, WB on ITR is enabled */
459 /* in usecs, need to use ice_intrl_to_usecs_reg() before writing this
460 * value to the device
461 */
462 u8 intrl;
463
464 struct napi_struct napi;
465
466 struct ice_ring_container rx;
467 struct ice_ring_container tx;
468
469 cpumask_t affinity_mask;
470 struct irq_affinity_notify affinity_notify;
471
472 struct ice_channel *ch;
473
474 char name[ICE_INT_NAME_STR_LEN];
475
476 u16 total_events; /* net_dim(): number of interrupts processed */
477 struct msi_map irq;
478 } ____cacheline_internodealigned_in_smp;
479
480 enum ice_pf_flags {
481 ICE_FLAG_FLTR_SYNC,
482 ICE_FLAG_RDMA_ENA,
483 ICE_FLAG_RSS_ENA,
484 ICE_FLAG_SRIOV_ENA,
485 ICE_FLAG_SRIOV_CAPABLE,
486 ICE_FLAG_DCB_CAPABLE,
487 ICE_FLAG_DCB_ENA,
488 ICE_FLAG_FD_ENA,
489 ICE_FLAG_PTP_SUPPORTED, /* PTP is supported by NVM */
490 ICE_FLAG_PTP, /* PTP is enabled by software */
491 ICE_FLAG_ADV_FEATURES,
492 ICE_FLAG_TC_MQPRIO, /* support for Multi queue TC */
493 ICE_FLAG_CLS_FLOWER,
494 ICE_FLAG_LINK_DOWN_ON_CLOSE_ENA,
495 ICE_FLAG_TOTAL_PORT_SHUTDOWN_ENA,
496 ICE_FLAG_NO_MEDIA,
497 ICE_FLAG_FW_LLDP_AGENT,
498 ICE_FLAG_MOD_POWER_UNSUPPORTED,
499 ICE_FLAG_PHY_FW_LOAD_FAILED,
500 ICE_FLAG_ETHTOOL_CTXT, /* set when ethtool holds RTNL lock */
501 ICE_FLAG_LEGACY_RX,
502 ICE_FLAG_VF_TRUE_PROMISC_ENA,
503 ICE_FLAG_MDD_AUTO_RESET_VF,
504 ICE_FLAG_VF_VLAN_PRUNING,
505 ICE_FLAG_LINK_LENIENT_MODE_ENA,
506 ICE_FLAG_PLUG_AUX_DEV,
507 ICE_FLAG_UNPLUG_AUX_DEV,
508 ICE_FLAG_MTU_CHANGED,
509 ICE_FLAG_GNSS, /* GNSS successfully initialized */
510 ICE_PF_FLAGS_NBITS /* must be last */
511 };
512
513 enum ice_misc_thread_tasks {
514 ICE_MISC_THREAD_EXTTS_EVENT,
515 ICE_MISC_THREAD_TX_TSTAMP,
516 ICE_MISC_THREAD_NBITS /* must be last */
517 };
518
519 struct ice_switchdev_info {
520 struct ice_vsi *control_vsi;
521 struct ice_vsi *uplink_vsi;
522 struct ice_esw_br_offloads *br_offloads;
523 bool is_running;
524 };
525
526 struct ice_agg_node {
527 u32 agg_id;
528 #define ICE_MAX_VSIS_IN_AGG_NODE 64
529 u32 num_vsis;
530 u8 valid;
531 };
532
533 struct ice_pf {
534 struct pci_dev *pdev;
535
536 struct devlink_region *nvm_region;
537 struct devlink_region *sram_region;
538 struct devlink_region *devcaps_region;
539
540 /* devlink port data */
541 struct devlink_port devlink_port;
542
543 /* OS reserved IRQ details */
544 struct msix_entry *msix_entries;
545 struct ice_irq_tracker irq_tracker;
546 /* First MSIX vector used by SR-IOV VFs. Calculated by subtracting the
547 * number of MSIX vectors needed for all SR-IOV VFs from the number of
548 * MSIX vectors allowed on this PF.
549 */
550 u16 sriov_base_vector;
551
552 u16 ctrl_vsi_idx; /* control VSI index in pf->vsi array */
553
554 struct ice_vsi **vsi; /* VSIs created by the driver */
555 struct ice_vsi_stats **vsi_stats;
556 struct ice_sw *first_sw; /* first switch created by firmware */
557 u16 eswitch_mode; /* current mode of eswitch */
558 struct ice_vfs vfs;
559 DECLARE_BITMAP(features, ICE_F_MAX);
560 DECLARE_BITMAP(state, ICE_STATE_NBITS);
561 DECLARE_BITMAP(flags, ICE_PF_FLAGS_NBITS);
562 DECLARE_BITMAP(misc_thread, ICE_MISC_THREAD_NBITS);
563 unsigned long *avail_txqs; /* bitmap to track PF Tx queue usage */
564 unsigned long *avail_rxqs; /* bitmap to track PF Rx queue usage */
565 unsigned long serv_tmr_period;
566 unsigned long serv_tmr_prev;
567 struct timer_list serv_tmr;
568 struct work_struct serv_task;
569 struct mutex avail_q_mutex; /* protects access to avail_[rx|tx]qs */
570 struct mutex sw_mutex; /* lock for protecting VSI alloc flow */
571 struct mutex tc_mutex; /* lock to protect TC changes */
572 struct mutex adev_mutex; /* lock to protect aux device access */
573 struct mutex lag_mutex; /* protect ice_lag struct in PF */
574 u32 msg_enable;
575 struct ice_ptp ptp;
576 struct gnss_serial *gnss_serial;
577 struct gnss_device *gnss_dev;
578 u16 num_rdma_msix; /* Total MSIX vectors for RDMA driver */
579 u16 rdma_base_vector;
580
581 /* spinlock to protect the AdminQ wait list */
582 spinlock_t aq_wait_lock;
583 struct hlist_head aq_wait_list;
584 wait_queue_head_t aq_wait_queue;
585 bool fw_emp_reset_disabled;
586
587 wait_queue_head_t reset_wait_queue;
588
589 u32 hw_csum_rx_error;
590 u32 oicr_err_reg;
591 struct msi_map oicr_irq; /* Other interrupt cause MSIX vector */
592 u16 max_pf_txqs; /* Total Tx queues PF wide */
593 u16 max_pf_rxqs; /* Total Rx queues PF wide */
594 u16 num_lan_msix; /* Total MSIX vectors for base driver */
595 u16 num_lan_tx; /* num LAN Tx queues setup */
596 u16 num_lan_rx; /* num LAN Rx queues setup */
597 u16 next_vsi; /* Next free slot in pf->vsi[] - 0-based! */
598 u16 num_alloc_vsi;
599 u16 corer_count; /* Core reset count */
600 u16 globr_count; /* Global reset count */
601 u16 empr_count; /* EMP reset count */
602 u16 pfr_count; /* PF reset count */
603
604 u8 wol_ena : 1; /* software state of WoL */
605 u32 wakeup_reason; /* last wakeup reason */
606 struct ice_hw_port_stats stats;
607 struct ice_hw_port_stats stats_prev;
608 struct ice_hw hw;
609 u8 stat_prev_loaded:1; /* has previous stats been loaded */
610 u8 rdma_mode;
611 u16 dcbx_cap;
612 u32 tx_timeout_count;
613 unsigned long tx_timeout_last_recovery;
614 u32 tx_timeout_recovery_level;
615 char int_name[ICE_INT_NAME_STR_LEN];
616 struct auxiliary_device *adev;
617 int aux_idx;
618 u32 sw_int_count;
619 /* count of tc_flower filters specific to channel (aka where filter
620 * action is "hw_tc <tc_num>")
621 */
622 u16 num_dmac_chnl_fltrs;
623 struct hlist_head tc_flower_fltr_list;
624
625 u64 supported_rxdids;
626
627 __le64 nvm_phy_type_lo; /* NVM PHY type low */
628 __le64 nvm_phy_type_hi; /* NVM PHY type high */
629 struct ice_link_default_override_tlv link_dflt_override;
630 struct ice_lag *lag; /* Link Aggregation information */
631
632 struct ice_switchdev_info switchdev;
633 struct ice_esw_br_port *br_port;
634
635 #define ICE_INVALID_AGG_NODE_ID 0
636 #define ICE_PF_AGG_NODE_ID_START 1
637 #define ICE_MAX_PF_AGG_NODES 32
638 struct ice_agg_node pf_agg_node[ICE_MAX_PF_AGG_NODES];
639 #define ICE_VF_AGG_NODE_ID_START 65
640 #define ICE_MAX_VF_AGG_NODES 32
641 struct ice_agg_node vf_agg_node[ICE_MAX_VF_AGG_NODES];
642 };
643
644 extern struct workqueue_struct *ice_lag_wq;
645
646 struct ice_netdev_priv {
647 struct ice_vsi *vsi;
648 struct ice_repr *repr;
649 /* indirect block callbacks on registered higher level devices
650 * (e.g. tunnel devices)
651 *
652 * tc_indr_block_cb_priv_list is used to look up indirect callback
653 * private data
654 */
655 struct list_head tc_indr_block_priv_list;
656 };
657
658 /**
659 * ice_vector_ch_enabled
660 * @qv: pointer to q_vector, can be NULL
661 *
662 * This function returns true if vector is channel enabled otherwise false
663 */
ice_vector_ch_enabled(struct ice_q_vector * qv)664 static inline bool ice_vector_ch_enabled(struct ice_q_vector *qv)
665 {
666 return !!qv->ch; /* Enable it to run with TC */
667 }
668
669 /**
670 * ice_irq_dynamic_ena - Enable default interrupt generation settings
671 * @hw: pointer to HW struct
672 * @vsi: pointer to VSI struct, can be NULL
673 * @q_vector: pointer to q_vector, can be NULL
674 */
675 static inline void
ice_irq_dynamic_ena(struct ice_hw * hw,struct ice_vsi * vsi,struct ice_q_vector * q_vector)676 ice_irq_dynamic_ena(struct ice_hw *hw, struct ice_vsi *vsi,
677 struct ice_q_vector *q_vector)
678 {
679 u32 vector = (vsi && q_vector) ? q_vector->reg_idx :
680 ((struct ice_pf *)hw->back)->oicr_irq.index;
681 int itr = ICE_ITR_NONE;
682 u32 val;
683
684 /* clear the PBA here, as this function is meant to clean out all
685 * previous interrupts and enable the interrupt
686 */
687 val = GLINT_DYN_CTL_INTENA_M | GLINT_DYN_CTL_CLEARPBA_M |
688 (itr << GLINT_DYN_CTL_ITR_INDX_S);
689 if (vsi)
690 if (test_bit(ICE_VSI_DOWN, vsi->state))
691 return;
692 wr32(hw, GLINT_DYN_CTL(vector), val);
693 }
694
695 /**
696 * ice_netdev_to_pf - Retrieve the PF struct associated with a netdev
697 * @netdev: pointer to the netdev struct
698 */
ice_netdev_to_pf(struct net_device * netdev)699 static inline struct ice_pf *ice_netdev_to_pf(struct net_device *netdev)
700 {
701 struct ice_netdev_priv *np = netdev_priv(netdev);
702
703 return np->vsi->back;
704 }
705
ice_is_xdp_ena_vsi(struct ice_vsi * vsi)706 static inline bool ice_is_xdp_ena_vsi(struct ice_vsi *vsi)
707 {
708 return !!READ_ONCE(vsi->xdp_prog);
709 }
710
ice_set_ring_xdp(struct ice_tx_ring * ring)711 static inline void ice_set_ring_xdp(struct ice_tx_ring *ring)
712 {
713 ring->flags |= ICE_TX_FLAGS_RING_XDP;
714 }
715
716 /**
717 * ice_get_xp_from_qid - get ZC XSK buffer pool bound to a queue ID
718 * @vsi: pointer to VSI
719 * @qid: index of a queue to look at XSK buff pool presence
720 *
721 * Return: A pointer to xsk_buff_pool structure if there is a buffer pool
722 * attached and configured as zero-copy, NULL otherwise.
723 */
ice_get_xp_from_qid(struct ice_vsi * vsi,u16 qid)724 static inline struct xsk_buff_pool *ice_get_xp_from_qid(struct ice_vsi *vsi,
725 u16 qid)
726 {
727 struct xsk_buff_pool *pool = xsk_get_pool_from_qid(vsi->netdev, qid);
728
729 if (!ice_is_xdp_ena_vsi(vsi))
730 return NULL;
731
732 return (pool && pool->dev) ? pool : NULL;
733 }
734
735 /**
736 * ice_xsk_pool - get XSK buffer pool bound to a ring
737 * @ring: Rx ring to use
738 *
739 * Returns a pointer to xsk_buff_pool structure if there is a buffer pool
740 * present, NULL otherwise.
741 */
ice_xsk_pool(struct ice_rx_ring * ring)742 static inline struct xsk_buff_pool *ice_xsk_pool(struct ice_rx_ring *ring)
743 {
744 struct ice_vsi *vsi = ring->vsi;
745 u16 qid = ring->q_index;
746
747 return ice_get_xp_from_qid(vsi, qid);
748 }
749
750 /**
751 * ice_tx_xsk_pool - assign XSK buff pool to XDP ring
752 * @vsi: pointer to VSI
753 * @qid: index of a queue to look at XSK buff pool presence
754 *
755 * Sets XSK buff pool pointer on XDP ring.
756 *
757 * XDP ring is picked from Rx ring, whereas Rx ring is picked based on provided
758 * queue id. Reason for doing so is that queue vectors might have assigned more
759 * than one XDP ring, e.g. when user reduced the queue count on netdev; Rx ring
760 * carries a pointer to one of these XDP rings for its own purposes, such as
761 * handling XDP_TX action, therefore we can piggyback here on the
762 * rx_ring->xdp_ring assignment that was done during XDP rings initialization.
763 */
ice_tx_xsk_pool(struct ice_vsi * vsi,u16 qid)764 static inline void ice_tx_xsk_pool(struct ice_vsi *vsi, u16 qid)
765 {
766 struct ice_tx_ring *ring;
767
768 ring = vsi->rx_rings[qid]->xdp_ring;
769 if (!ring)
770 return;
771
772 ring->xsk_pool = ice_get_xp_from_qid(vsi, qid);
773 }
774
775 /**
776 * ice_get_main_vsi - Get the PF VSI
777 * @pf: PF instance
778 *
779 * returns pf->vsi[0], which by definition is the PF VSI
780 */
ice_get_main_vsi(struct ice_pf * pf)781 static inline struct ice_vsi *ice_get_main_vsi(struct ice_pf *pf)
782 {
783 if (pf->vsi)
784 return pf->vsi[0];
785
786 return NULL;
787 }
788
789 /**
790 * ice_get_netdev_priv_vsi - return VSI associated with netdev priv.
791 * @np: private netdev structure
792 */
ice_get_netdev_priv_vsi(struct ice_netdev_priv * np)793 static inline struct ice_vsi *ice_get_netdev_priv_vsi(struct ice_netdev_priv *np)
794 {
795 /* In case of port representor return source port VSI. */
796 if (np->repr)
797 return np->repr->src_vsi;
798 else
799 return np->vsi;
800 }
801
802 /**
803 * ice_get_ctrl_vsi - Get the control VSI
804 * @pf: PF instance
805 */
ice_get_ctrl_vsi(struct ice_pf * pf)806 static inline struct ice_vsi *ice_get_ctrl_vsi(struct ice_pf *pf)
807 {
808 /* if pf->ctrl_vsi_idx is ICE_NO_VSI, control VSI was not set up */
809 if (!pf->vsi || pf->ctrl_vsi_idx == ICE_NO_VSI)
810 return NULL;
811
812 return pf->vsi[pf->ctrl_vsi_idx];
813 }
814
815 /**
816 * ice_find_vsi - Find the VSI from VSI ID
817 * @pf: The PF pointer to search in
818 * @vsi_num: The VSI ID to search for
819 */
ice_find_vsi(struct ice_pf * pf,u16 vsi_num)820 static inline struct ice_vsi *ice_find_vsi(struct ice_pf *pf, u16 vsi_num)
821 {
822 int i;
823
824 ice_for_each_vsi(pf, i)
825 if (pf->vsi[i] && pf->vsi[i]->vsi_num == vsi_num)
826 return pf->vsi[i];
827 return NULL;
828 }
829
830 /**
831 * ice_is_switchdev_running - check if switchdev is configured
832 * @pf: pointer to PF structure
833 *
834 * Returns true if eswitch mode is set to DEVLINK_ESWITCH_MODE_SWITCHDEV
835 * and switchdev is configured, false otherwise.
836 */
ice_is_switchdev_running(struct ice_pf * pf)837 static inline bool ice_is_switchdev_running(struct ice_pf *pf)
838 {
839 return pf->switchdev.is_running;
840 }
841
842 #define ICE_FD_STAT_CTR_BLOCK_COUNT 256
843 #define ICE_FD_STAT_PF_IDX(base_idx) \
844 ((base_idx) * ICE_FD_STAT_CTR_BLOCK_COUNT)
845 #define ICE_FD_SB_STAT_IDX(base_idx) ICE_FD_STAT_PF_IDX(base_idx)
846 #define ICE_FD_STAT_CH 1
847 #define ICE_FD_CH_STAT_IDX(base_idx) \
848 (ICE_FD_STAT_PF_IDX(base_idx) + ICE_FD_STAT_CH)
849
850 /**
851 * ice_is_adq_active - any active ADQs
852 * @pf: pointer to PF
853 *
854 * This function returns true if there are any ADQs configured (which is
855 * determined by looking at VSI type (which should be VSI_PF), numtc, and
856 * TC_MQPRIO flag) otherwise return false
857 */
ice_is_adq_active(struct ice_pf * pf)858 static inline bool ice_is_adq_active(struct ice_pf *pf)
859 {
860 struct ice_vsi *vsi;
861
862 vsi = ice_get_main_vsi(pf);
863 if (!vsi)
864 return false;
865
866 /* is ADQ configured */
867 if (vsi->tc_cfg.numtc > ICE_CHNL_START_TC &&
868 test_bit(ICE_FLAG_TC_MQPRIO, pf->flags))
869 return true;
870
871 return false;
872 }
873
874 bool netif_is_ice(const struct net_device *dev);
875 int ice_vsi_setup_tx_rings(struct ice_vsi *vsi);
876 int ice_vsi_setup_rx_rings(struct ice_vsi *vsi);
877 int ice_vsi_open_ctrl(struct ice_vsi *vsi);
878 int ice_vsi_open(struct ice_vsi *vsi);
879 void ice_set_ethtool_ops(struct net_device *netdev);
880 void ice_set_ethtool_repr_ops(struct net_device *netdev);
881 void ice_set_ethtool_safe_mode_ops(struct net_device *netdev);
882 u16 ice_get_avail_txq_count(struct ice_pf *pf);
883 u16 ice_get_avail_rxq_count(struct ice_pf *pf);
884 int ice_vsi_recfg_qs(struct ice_vsi *vsi, int new_rx, int new_tx, bool locked);
885 void ice_update_vsi_stats(struct ice_vsi *vsi);
886 void ice_update_pf_stats(struct ice_pf *pf);
887 void
888 ice_fetch_u64_stats_per_ring(struct u64_stats_sync *syncp,
889 struct ice_q_stats stats, u64 *pkts, u64 *bytes);
890 int ice_up(struct ice_vsi *vsi);
891 int ice_down(struct ice_vsi *vsi);
892 int ice_down_up(struct ice_vsi *vsi);
893 int ice_vsi_cfg_lan(struct ice_vsi *vsi);
894 struct ice_vsi *ice_lb_vsi_setup(struct ice_pf *pf, struct ice_port_info *pi);
895
896 enum ice_xdp_cfg {
897 ICE_XDP_CFG_FULL, /* Fully apply new config in .ndo_bpf() */
898 ICE_XDP_CFG_PART, /* Save/use part of config in VSI rebuild */
899 };
900
901 int ice_vsi_determine_xdp_res(struct ice_vsi *vsi);
902 int ice_prepare_xdp_rings(struct ice_vsi *vsi, struct bpf_prog *prog,
903 enum ice_xdp_cfg cfg_type);
904 int ice_destroy_xdp_rings(struct ice_vsi *vsi, enum ice_xdp_cfg cfg_type);
905 int
906 ice_xdp_xmit(struct net_device *dev, int n, struct xdp_frame **frames,
907 u32 flags);
908 int ice_set_rss_lut(struct ice_vsi *vsi, u8 *lut, u16 lut_size);
909 int ice_get_rss_lut(struct ice_vsi *vsi, u8 *lut, u16 lut_size);
910 int ice_set_rss_key(struct ice_vsi *vsi, u8 *seed);
911 int ice_get_rss_key(struct ice_vsi *vsi, u8 *seed);
912 void ice_fill_rss_lut(u8 *lut, u16 rss_table_size, u16 rss_size);
913 int ice_schedule_reset(struct ice_pf *pf, enum ice_reset_req reset);
914 void ice_print_link_msg(struct ice_vsi *vsi, bool isup);
915 int ice_plug_aux_dev(struct ice_pf *pf);
916 void ice_unplug_aux_dev(struct ice_pf *pf);
917 int ice_init_rdma(struct ice_pf *pf);
918 void ice_deinit_rdma(struct ice_pf *pf);
919 const char *ice_aq_str(enum ice_aq_err aq_err);
920 bool ice_is_wol_supported(struct ice_hw *hw);
921 void ice_fdir_del_all_fltrs(struct ice_vsi *vsi);
922 int
923 ice_fdir_write_fltr(struct ice_pf *pf, struct ice_fdir_fltr *input, bool add,
924 bool is_tun);
925 void ice_vsi_manage_fdir(struct ice_vsi *vsi, bool ena);
926 int ice_add_fdir_ethtool(struct ice_vsi *vsi, struct ethtool_rxnfc *cmd);
927 int ice_del_fdir_ethtool(struct ice_vsi *vsi, struct ethtool_rxnfc *cmd);
928 int ice_get_ethtool_fdir_entry(struct ice_hw *hw, struct ethtool_rxnfc *cmd);
929 int
930 ice_get_fdir_fltr_ids(struct ice_hw *hw, struct ethtool_rxnfc *cmd,
931 u32 *rule_locs);
932 void ice_fdir_rem_adq_chnl(struct ice_hw *hw, u16 vsi_idx);
933 void ice_fdir_release_flows(struct ice_hw *hw);
934 void ice_fdir_replay_flows(struct ice_hw *hw);
935 void ice_fdir_replay_fltrs(struct ice_pf *pf);
936 int ice_fdir_create_dflt_rules(struct ice_pf *pf);
937
938 enum ice_aq_task_state {
939 ICE_AQ_TASK_NOT_PREPARED,
940 ICE_AQ_TASK_WAITING,
941 ICE_AQ_TASK_COMPLETE,
942 ICE_AQ_TASK_CANCELED,
943 };
944
945 struct ice_aq_task {
946 struct hlist_node entry;
947 struct ice_rq_event_info event;
948 enum ice_aq_task_state state;
949 u16 opcode;
950 };
951
952 void ice_aq_prep_for_event(struct ice_pf *pf, struct ice_aq_task *task,
953 u16 opcode);
954 int ice_aq_wait_for_event(struct ice_pf *pf, struct ice_aq_task *task,
955 unsigned long timeout);
956 int ice_open(struct net_device *netdev);
957 int ice_open_internal(struct net_device *netdev);
958 int ice_stop(struct net_device *netdev);
959 void ice_service_task_schedule(struct ice_pf *pf);
960 int ice_load(struct ice_pf *pf);
961 void ice_unload(struct ice_pf *pf);
962
963 /**
964 * ice_set_rdma_cap - enable RDMA support
965 * @pf: PF struct
966 */
ice_set_rdma_cap(struct ice_pf * pf)967 static inline void ice_set_rdma_cap(struct ice_pf *pf)
968 {
969 if (pf->hw.func_caps.common_cap.rdma && pf->num_rdma_msix) {
970 set_bit(ICE_FLAG_RDMA_ENA, pf->flags);
971 set_bit(ICE_FLAG_PLUG_AUX_DEV, pf->flags);
972 }
973 }
974
975 /**
976 * ice_clear_rdma_cap - disable RDMA support
977 * @pf: PF struct
978 */
ice_clear_rdma_cap(struct ice_pf * pf)979 static inline void ice_clear_rdma_cap(struct ice_pf *pf)
980 {
981 /* defer unplug to service task to avoid RTNL lock and
982 * clear PLUG bit so that pending plugs don't interfere
983 */
984 clear_bit(ICE_FLAG_PLUG_AUX_DEV, pf->flags);
985 set_bit(ICE_FLAG_UNPLUG_AUX_DEV, pf->flags);
986 clear_bit(ICE_FLAG_RDMA_ENA, pf->flags);
987 }
988 #endif /* _ICE_H_ */
989