1 // SPDX-License-Identifier: GPL-2.0
2 //
3 // Copyright (c) 2019 MediaTek Inc.
4
5 #include <asm/barrier.h>
6 #include <linux/clk.h>
7 #include <linux/dma-mapping.h>
8 #include <linux/err.h>
9 #include <linux/interrupt.h>
10 #include <linux/kernel.h>
11 #include <linux/module.h>
12 #include <linux/of_address.h>
13 #include <linux/of_platform.h>
14 #include <linux/of_reserved_mem.h>
15 #include <linux/platform_device.h>
16 #include <linux/remoteproc.h>
17 #include <linux/remoteproc/mtk_scp.h>
18 #include <linux/rpmsg/mtk_rpmsg.h>
19
20 #include "mtk_common.h"
21 #include "remoteproc_internal.h"
22
23 #define MAX_CODE_SIZE 0x500000
24 #define SECTION_NAME_IPI_BUFFER ".ipi_buffer"
25
26 /**
27 * scp_get() - get a reference to SCP.
28 *
29 * @pdev: the platform device of the module requesting SCP platform
30 * device for using SCP API.
31 *
32 * Return: Return NULL if failed. otherwise reference to SCP.
33 **/
scp_get(struct platform_device * pdev)34 struct mtk_scp *scp_get(struct platform_device *pdev)
35 {
36 struct device *dev = &pdev->dev;
37 struct device_node *scp_node;
38 struct platform_device *scp_pdev;
39
40 scp_node = of_parse_phandle(dev->of_node, "mediatek,scp", 0);
41 if (!scp_node) {
42 dev_err(dev, "can't get SCP node\n");
43 return NULL;
44 }
45
46 scp_pdev = of_find_device_by_node(scp_node);
47 of_node_put(scp_node);
48
49 if (WARN_ON(!scp_pdev)) {
50 dev_err(dev, "SCP pdev failed\n");
51 return NULL;
52 }
53
54 return platform_get_drvdata(scp_pdev);
55 }
56 EXPORT_SYMBOL_GPL(scp_get);
57
58 /**
59 * scp_put() - "free" the SCP
60 *
61 * @scp: mtk_scp structure from scp_get().
62 **/
scp_put(struct mtk_scp * scp)63 void scp_put(struct mtk_scp *scp)
64 {
65 put_device(scp->dev);
66 }
67 EXPORT_SYMBOL_GPL(scp_put);
68
scp_wdt_handler(struct mtk_scp * scp,u32 scp_to_host)69 static void scp_wdt_handler(struct mtk_scp *scp, u32 scp_to_host)
70 {
71 dev_err(scp->dev, "SCP watchdog timeout! 0x%x", scp_to_host);
72 rproc_report_crash(scp->rproc, RPROC_WATCHDOG);
73 }
74
scp_init_ipi_handler(void * data,unsigned int len,void * priv)75 static void scp_init_ipi_handler(void *data, unsigned int len, void *priv)
76 {
77 struct mtk_scp *scp = priv;
78 struct scp_run *run = data;
79
80 scp->run.signaled = run->signaled;
81 strscpy(scp->run.fw_ver, run->fw_ver, SCP_FW_VER_LEN);
82 scp->run.dec_capability = run->dec_capability;
83 scp->run.enc_capability = run->enc_capability;
84 wake_up_interruptible(&scp->run.wq);
85 }
86
scp_ipi_handler(struct mtk_scp * scp)87 static void scp_ipi_handler(struct mtk_scp *scp)
88 {
89 struct mtk_share_obj __iomem *rcv_obj = scp->recv_buf;
90 struct scp_ipi_desc *ipi_desc = scp->ipi_desc;
91 u8 tmp_data[SCP_SHARE_BUFFER_SIZE];
92 scp_ipi_handler_t handler;
93 u32 id = readl(&rcv_obj->id);
94 u32 len = readl(&rcv_obj->len);
95
96 if (len > SCP_SHARE_BUFFER_SIZE) {
97 dev_err(scp->dev, "ipi message too long (len %d, max %d)", len,
98 SCP_SHARE_BUFFER_SIZE);
99 return;
100 }
101 if (id >= SCP_IPI_MAX) {
102 dev_err(scp->dev, "No such ipi id = %d\n", id);
103 return;
104 }
105
106 scp_ipi_lock(scp, id);
107 handler = ipi_desc[id].handler;
108 if (!handler) {
109 dev_err(scp->dev, "No such ipi id = %d\n", id);
110 scp_ipi_unlock(scp, id);
111 return;
112 }
113
114 memcpy_fromio(tmp_data, &rcv_obj->share_buf, len);
115 handler(tmp_data, len, ipi_desc[id].priv);
116 scp_ipi_unlock(scp, id);
117
118 scp->ipi_id_ack[id] = true;
119 wake_up(&scp->ack_wq);
120 }
121
122 static int scp_elf_read_ipi_buf_addr(struct mtk_scp *scp,
123 const struct firmware *fw,
124 size_t *offset);
125
scp_ipi_init(struct mtk_scp * scp,const struct firmware * fw)126 static int scp_ipi_init(struct mtk_scp *scp, const struct firmware *fw)
127 {
128 int ret;
129 size_t buf_sz, offset;
130
131 /* read the ipi buf addr from FW itself first */
132 ret = scp_elf_read_ipi_buf_addr(scp, fw, &offset);
133 if (ret) {
134 /* use default ipi buf addr if the FW doesn't have it */
135 offset = scp->data->ipi_buf_offset;
136 if (!offset)
137 return ret;
138 }
139 dev_info(scp->dev, "IPI buf addr %#010zx\n", offset);
140
141 /* Make sure IPI buffer fits in the L2TCM range assigned to this core */
142 buf_sz = sizeof(*scp->recv_buf) + sizeof(*scp->send_buf);
143
144 if (scp->sram_size < buf_sz + offset) {
145 dev_err(scp->dev, "IPI buffer does not fit in SRAM.\n");
146 return -EOVERFLOW;
147 }
148
149 scp->recv_buf = (struct mtk_share_obj __iomem *)
150 (scp->sram_base + offset);
151 scp->send_buf = (struct mtk_share_obj __iomem *)
152 (scp->sram_base + offset + sizeof(*scp->recv_buf));
153 memset_io(scp->recv_buf, 0, sizeof(*scp->recv_buf));
154 memset_io(scp->send_buf, 0, sizeof(*scp->send_buf));
155
156 return 0;
157 }
158
mt8183_scp_reset_assert(struct mtk_scp * scp)159 static void mt8183_scp_reset_assert(struct mtk_scp *scp)
160 {
161 u32 val;
162
163 val = readl(scp->reg_base + MT8183_SW_RSTN);
164 val &= ~MT8183_SW_RSTN_BIT;
165 writel(val, scp->reg_base + MT8183_SW_RSTN);
166 }
167
mt8183_scp_reset_deassert(struct mtk_scp * scp)168 static void mt8183_scp_reset_deassert(struct mtk_scp *scp)
169 {
170 u32 val;
171
172 val = readl(scp->reg_base + MT8183_SW_RSTN);
173 val |= MT8183_SW_RSTN_BIT;
174 writel(val, scp->reg_base + MT8183_SW_RSTN);
175 }
176
mt8192_scp_reset_assert(struct mtk_scp * scp)177 static void mt8192_scp_reset_assert(struct mtk_scp *scp)
178 {
179 writel(1, scp->reg_base + MT8192_CORE0_SW_RSTN_SET);
180 }
181
mt8192_scp_reset_deassert(struct mtk_scp * scp)182 static void mt8192_scp_reset_deassert(struct mtk_scp *scp)
183 {
184 writel(1, scp->reg_base + MT8192_CORE0_SW_RSTN_CLR);
185 }
186
mt8183_scp_irq_handler(struct mtk_scp * scp)187 static void mt8183_scp_irq_handler(struct mtk_scp *scp)
188 {
189 u32 scp_to_host;
190
191 scp_to_host = readl(scp->reg_base + MT8183_SCP_TO_HOST);
192 if (scp_to_host & MT8183_SCP_IPC_INT_BIT)
193 scp_ipi_handler(scp);
194 else
195 scp_wdt_handler(scp, scp_to_host);
196
197 /* SCP won't send another interrupt until we set SCP_TO_HOST to 0. */
198 writel(MT8183_SCP_IPC_INT_BIT | MT8183_SCP_WDT_INT_BIT,
199 scp->reg_base + MT8183_SCP_TO_HOST);
200 }
201
mt8192_scp_irq_handler(struct mtk_scp * scp)202 static void mt8192_scp_irq_handler(struct mtk_scp *scp)
203 {
204 u32 scp_to_host;
205
206 scp_to_host = readl(scp->reg_base + MT8192_SCP2APMCU_IPC_SET);
207
208 if (scp_to_host & MT8192_SCP_IPC_INT_BIT) {
209 scp_ipi_handler(scp);
210
211 /*
212 * SCP won't send another interrupt until we clear
213 * MT8192_SCP2APMCU_IPC.
214 */
215 writel(MT8192_SCP_IPC_INT_BIT,
216 scp->reg_base + MT8192_SCP2APMCU_IPC_CLR);
217 } else {
218 scp_wdt_handler(scp, scp_to_host);
219 writel(1, scp->reg_base + MT8192_CORE0_WDT_IRQ);
220 }
221 }
222
scp_irq_handler(int irq,void * priv)223 static irqreturn_t scp_irq_handler(int irq, void *priv)
224 {
225 struct mtk_scp *scp = priv;
226 int ret;
227
228 ret = clk_prepare_enable(scp->clk);
229 if (ret) {
230 dev_err(scp->dev, "failed to enable clocks\n");
231 return IRQ_NONE;
232 }
233
234 scp->data->scp_irq_handler(scp);
235
236 clk_disable_unprepare(scp->clk);
237
238 return IRQ_HANDLED;
239 }
240
scp_elf_load_segments(struct rproc * rproc,const struct firmware * fw)241 static int scp_elf_load_segments(struct rproc *rproc, const struct firmware *fw)
242 {
243 struct device *dev = &rproc->dev;
244 struct elf32_hdr *ehdr;
245 struct elf32_phdr *phdr;
246 int i, ret = 0;
247 const u8 *elf_data = fw->data;
248
249 ehdr = (struct elf32_hdr *)elf_data;
250 phdr = (struct elf32_phdr *)(elf_data + ehdr->e_phoff);
251
252 /* go through the available ELF segments */
253 for (i = 0; i < ehdr->e_phnum; i++, phdr++) {
254 u32 da = phdr->p_paddr;
255 u32 memsz = phdr->p_memsz;
256 u32 filesz = phdr->p_filesz;
257 u32 offset = phdr->p_offset;
258 void __iomem *ptr;
259
260 dev_dbg(dev, "phdr: type %d da 0x%x memsz 0x%x filesz 0x%x\n",
261 phdr->p_type, da, memsz, filesz);
262
263 if (phdr->p_type != PT_LOAD)
264 continue;
265 if (!filesz)
266 continue;
267
268 if (filesz > memsz) {
269 dev_err(dev, "bad phdr filesz 0x%x memsz 0x%x\n",
270 filesz, memsz);
271 ret = -EINVAL;
272 break;
273 }
274
275 if (offset + filesz > fw->size) {
276 dev_err(dev, "truncated fw: need 0x%x avail 0x%zx\n",
277 offset + filesz, fw->size);
278 ret = -EINVAL;
279 break;
280 }
281
282 /* grab the kernel address for this device address */
283 ptr = (void __iomem *)rproc_da_to_va(rproc, da, memsz, NULL);
284 if (!ptr) {
285 dev_err(dev, "bad phdr da 0x%x mem 0x%x\n", da, memsz);
286 ret = -EINVAL;
287 break;
288 }
289
290 /* put the segment where the remote processor expects it */
291 scp_memcpy_aligned(ptr, elf_data + phdr->p_offset, filesz);
292 }
293
294 return ret;
295 }
296
scp_elf_read_ipi_buf_addr(struct mtk_scp * scp,const struct firmware * fw,size_t * offset)297 static int scp_elf_read_ipi_buf_addr(struct mtk_scp *scp,
298 const struct firmware *fw,
299 size_t *offset)
300 {
301 struct elf32_hdr *ehdr;
302 struct elf32_shdr *shdr, *shdr_strtab;
303 int i;
304 const u8 *elf_data = fw->data;
305 const char *strtab;
306
307 ehdr = (struct elf32_hdr *)elf_data;
308 shdr = (struct elf32_shdr *)(elf_data + ehdr->e_shoff);
309 shdr_strtab = shdr + ehdr->e_shstrndx;
310 strtab = (const char *)(elf_data + shdr_strtab->sh_offset);
311
312 for (i = 0; i < ehdr->e_shnum; i++, shdr++) {
313 if (strcmp(strtab + shdr->sh_name,
314 SECTION_NAME_IPI_BUFFER) == 0) {
315 *offset = shdr->sh_addr;
316 return 0;
317 }
318 }
319
320 return -ENOENT;
321 }
322
mt8183_scp_clk_get(struct mtk_scp * scp)323 static int mt8183_scp_clk_get(struct mtk_scp *scp)
324 {
325 struct device *dev = scp->dev;
326 int ret = 0;
327
328 scp->clk = devm_clk_get(dev, "main");
329 if (IS_ERR(scp->clk)) {
330 dev_err(dev, "Failed to get clock\n");
331 ret = PTR_ERR(scp->clk);
332 }
333
334 return ret;
335 }
336
mt8192_scp_clk_get(struct mtk_scp * scp)337 static int mt8192_scp_clk_get(struct mtk_scp *scp)
338 {
339 return mt8183_scp_clk_get(scp);
340 }
341
mt8195_scp_clk_get(struct mtk_scp * scp)342 static int mt8195_scp_clk_get(struct mtk_scp *scp)
343 {
344 scp->clk = NULL;
345
346 return 0;
347 }
348
mt8183_scp_before_load(struct mtk_scp * scp)349 static int mt8183_scp_before_load(struct mtk_scp *scp)
350 {
351 /* Clear SCP to host interrupt */
352 writel(MT8183_SCP_IPC_INT_BIT, scp->reg_base + MT8183_SCP_TO_HOST);
353
354 /* Reset clocks before loading FW */
355 writel(0x0, scp->reg_base + MT8183_SCP_CLK_SW_SEL);
356 writel(0x0, scp->reg_base + MT8183_SCP_CLK_DIV_SEL);
357
358 /* Initialize TCM before loading FW. */
359 writel(0x0, scp->reg_base + MT8183_SCP_L1_SRAM_PD);
360 writel(0x0, scp->reg_base + MT8183_SCP_TCM_TAIL_SRAM_PD);
361
362 /* Turn on the power of SCP's SRAM before using it. */
363 writel(0x0, scp->reg_base + MT8183_SCP_SRAM_PDN);
364
365 /*
366 * Set I-cache and D-cache size before loading SCP FW.
367 * SCP SRAM logical address may change when cache size setting differs.
368 */
369 writel(MT8183_SCP_CACHE_CON_WAYEN | MT8183_SCP_CACHESIZE_8KB,
370 scp->reg_base + MT8183_SCP_CACHE_CON);
371 writel(MT8183_SCP_CACHESIZE_8KB, scp->reg_base + MT8183_SCP_DCACHE_CON);
372
373 return 0;
374 }
375
scp_sram_power_on(void __iomem * addr,u32 reserved_mask)376 static void scp_sram_power_on(void __iomem *addr, u32 reserved_mask)
377 {
378 int i;
379
380 for (i = 31; i >= 0; i--)
381 writel(GENMASK(i, 0) & ~reserved_mask, addr);
382 writel(0, addr);
383 }
384
scp_sram_power_off(void __iomem * addr,u32 reserved_mask)385 static void scp_sram_power_off(void __iomem *addr, u32 reserved_mask)
386 {
387 int i;
388
389 writel(0, addr);
390 for (i = 0; i < 32; i++)
391 writel(GENMASK(i, 0) & ~reserved_mask, addr);
392 }
393
mt8186_scp_before_load(struct mtk_scp * scp)394 static int mt8186_scp_before_load(struct mtk_scp *scp)
395 {
396 /* Clear SCP to host interrupt */
397 writel(MT8183_SCP_IPC_INT_BIT, scp->reg_base + MT8183_SCP_TO_HOST);
398
399 /* Reset clocks before loading FW */
400 writel(0x0, scp->reg_base + MT8183_SCP_CLK_SW_SEL);
401 writel(0x0, scp->reg_base + MT8183_SCP_CLK_DIV_SEL);
402
403 /* Turn on the power of SCP's SRAM before using it. Enable 1 block per time*/
404 scp_sram_power_on(scp->reg_base + MT8183_SCP_SRAM_PDN, 0);
405
406 /* Initialize TCM before loading FW. */
407 writel(0x0, scp->reg_base + MT8183_SCP_L1_SRAM_PD);
408 writel(0x0, scp->reg_base + MT8183_SCP_TCM_TAIL_SRAM_PD);
409 writel(0x0, scp->reg_base + MT8186_SCP_L1_SRAM_PD_P1);
410 writel(0x0, scp->reg_base + MT8186_SCP_L1_SRAM_PD_p2);
411
412 /*
413 * Set I-cache and D-cache size before loading SCP FW.
414 * SCP SRAM logical address may change when cache size setting differs.
415 */
416 writel(MT8183_SCP_CACHE_CON_WAYEN | MT8183_SCP_CACHESIZE_8KB,
417 scp->reg_base + MT8183_SCP_CACHE_CON);
418 writel(MT8183_SCP_CACHESIZE_8KB, scp->reg_base + MT8183_SCP_DCACHE_CON);
419
420 return 0;
421 }
422
mt8192_scp_before_load(struct mtk_scp * scp)423 static int mt8192_scp_before_load(struct mtk_scp *scp)
424 {
425 /* clear SPM interrupt, SCP2SPM_IPC_CLR */
426 writel(0xff, scp->reg_base + MT8192_SCP2SPM_IPC_CLR);
427
428 writel(1, scp->reg_base + MT8192_CORE0_SW_RSTN_SET);
429
430 /* enable SRAM clock */
431 scp_sram_power_on(scp->reg_base + MT8192_L2TCM_SRAM_PD_0, 0);
432 scp_sram_power_on(scp->reg_base + MT8192_L2TCM_SRAM_PD_1, 0);
433 scp_sram_power_on(scp->reg_base + MT8192_L2TCM_SRAM_PD_2, 0);
434 scp_sram_power_on(scp->reg_base + MT8192_L1TCM_SRAM_PDN, 0);
435 scp_sram_power_on(scp->reg_base + MT8192_CPU0_SRAM_PD, 0);
436
437 /* enable MPU for all memory regions */
438 writel(0xff, scp->reg_base + MT8192_CORE0_MEM_ATT_PREDEF);
439
440 return 0;
441 }
442
mt8195_scp_before_load(struct mtk_scp * scp)443 static int mt8195_scp_before_load(struct mtk_scp *scp)
444 {
445 /* clear SPM interrupt, SCP2SPM_IPC_CLR */
446 writel(0xff, scp->reg_base + MT8192_SCP2SPM_IPC_CLR);
447
448 writel(1, scp->reg_base + MT8192_CORE0_SW_RSTN_SET);
449
450 /* enable SRAM clock */
451 scp_sram_power_on(scp->reg_base + MT8192_L2TCM_SRAM_PD_0, 0);
452 scp_sram_power_on(scp->reg_base + MT8192_L2TCM_SRAM_PD_1, 0);
453 scp_sram_power_on(scp->reg_base + MT8192_L2TCM_SRAM_PD_2, 0);
454 scp_sram_power_on(scp->reg_base + MT8192_L1TCM_SRAM_PDN,
455 MT8195_L1TCM_SRAM_PDN_RESERVED_RSI_BITS);
456 scp_sram_power_on(scp->reg_base + MT8192_CPU0_SRAM_PD, 0);
457
458 /* enable MPU for all memory regions */
459 writel(0xff, scp->reg_base + MT8192_CORE0_MEM_ATT_PREDEF);
460
461 return 0;
462 }
463
scp_load(struct rproc * rproc,const struct firmware * fw)464 static int scp_load(struct rproc *rproc, const struct firmware *fw)
465 {
466 struct mtk_scp *scp = rproc->priv;
467 struct device *dev = scp->dev;
468 int ret;
469
470 ret = clk_prepare_enable(scp->clk);
471 if (ret) {
472 dev_err(dev, "failed to enable clocks\n");
473 return ret;
474 }
475
476 /* Hold SCP in reset while loading FW. */
477 scp->data->scp_reset_assert(scp);
478
479 ret = scp->data->scp_before_load(scp);
480 if (ret < 0)
481 goto leave;
482
483 ret = scp_elf_load_segments(rproc, fw);
484 leave:
485 clk_disable_unprepare(scp->clk);
486
487 return ret;
488 }
489
scp_parse_fw(struct rproc * rproc,const struct firmware * fw)490 static int scp_parse_fw(struct rproc *rproc, const struct firmware *fw)
491 {
492 struct mtk_scp *scp = rproc->priv;
493 struct device *dev = scp->dev;
494 int ret;
495
496 ret = clk_prepare_enable(scp->clk);
497 if (ret) {
498 dev_err(dev, "failed to enable clocks\n");
499 return ret;
500 }
501
502 ret = scp_ipi_init(scp, fw);
503 clk_disable_unprepare(scp->clk);
504 return ret;
505 }
506
scp_start(struct rproc * rproc)507 static int scp_start(struct rproc *rproc)
508 {
509 struct mtk_scp *scp = rproc->priv;
510 struct device *dev = scp->dev;
511 struct scp_run *run = &scp->run;
512 int ret;
513
514 ret = clk_prepare_enable(scp->clk);
515 if (ret) {
516 dev_err(dev, "failed to enable clocks\n");
517 return ret;
518 }
519
520 run->signaled = false;
521
522 scp->data->scp_reset_deassert(scp);
523
524 ret = wait_event_interruptible_timeout(
525 run->wq,
526 run->signaled,
527 msecs_to_jiffies(2000));
528
529 if (ret == 0) {
530 dev_err(dev, "wait SCP initialization timeout!\n");
531 ret = -ETIME;
532 goto stop;
533 }
534 if (ret == -ERESTARTSYS) {
535 dev_err(dev, "wait SCP interrupted by a signal!\n");
536 goto stop;
537 }
538
539 clk_disable_unprepare(scp->clk);
540 dev_info(dev, "SCP is ready. FW version %s\n", run->fw_ver);
541
542 return 0;
543
544 stop:
545 scp->data->scp_reset_assert(scp);
546 clk_disable_unprepare(scp->clk);
547 return ret;
548 }
549
mt8183_scp_da_to_va(struct mtk_scp * scp,u64 da,size_t len)550 static void *mt8183_scp_da_to_va(struct mtk_scp *scp, u64 da, size_t len)
551 {
552 int offset;
553
554 if (da < scp->sram_size) {
555 offset = da;
556 if (offset >= 0 && (offset + len) <= scp->sram_size)
557 return (void __force *)scp->sram_base + offset;
558 } else if (scp->dram_size) {
559 offset = da - scp->dma_addr;
560 if (offset >= 0 && (offset + len) <= scp->dram_size)
561 return scp->cpu_addr + offset;
562 }
563
564 return NULL;
565 }
566
mt8192_scp_da_to_va(struct mtk_scp * scp,u64 da,size_t len)567 static void *mt8192_scp_da_to_va(struct mtk_scp *scp, u64 da, size_t len)
568 {
569 int offset;
570
571 if (da >= scp->sram_phys &&
572 (da + len) <= scp->sram_phys + scp->sram_size) {
573 offset = da - scp->sram_phys;
574 return (void __force *)scp->sram_base + offset;
575 }
576
577 /* optional memory region */
578 if (scp->l1tcm_size &&
579 da >= scp->l1tcm_phys &&
580 (da + len) <= scp->l1tcm_phys + scp->l1tcm_size) {
581 offset = da - scp->l1tcm_phys;
582 return (void __force *)scp->l1tcm_base + offset;
583 }
584
585 /* optional memory region */
586 if (scp->dram_size &&
587 da >= scp->dma_addr &&
588 (da + len) <= scp->dma_addr + scp->dram_size) {
589 offset = da - scp->dma_addr;
590 return scp->cpu_addr + offset;
591 }
592
593 return NULL;
594 }
595
scp_da_to_va(struct rproc * rproc,u64 da,size_t len,bool * is_iomem)596 static void *scp_da_to_va(struct rproc *rproc, u64 da, size_t len, bool *is_iomem)
597 {
598 struct mtk_scp *scp = rproc->priv;
599
600 return scp->data->scp_da_to_va(scp, da, len);
601 }
602
mt8183_scp_stop(struct mtk_scp * scp)603 static void mt8183_scp_stop(struct mtk_scp *scp)
604 {
605 /* Disable SCP watchdog */
606 writel(0, scp->reg_base + MT8183_WDT_CFG);
607 }
608
mt8192_scp_stop(struct mtk_scp * scp)609 static void mt8192_scp_stop(struct mtk_scp *scp)
610 {
611 /* Disable SRAM clock */
612 scp_sram_power_off(scp->reg_base + MT8192_L2TCM_SRAM_PD_0, 0);
613 scp_sram_power_off(scp->reg_base + MT8192_L2TCM_SRAM_PD_1, 0);
614 scp_sram_power_off(scp->reg_base + MT8192_L2TCM_SRAM_PD_2, 0);
615 scp_sram_power_off(scp->reg_base + MT8192_L1TCM_SRAM_PDN, 0);
616 scp_sram_power_off(scp->reg_base + MT8192_CPU0_SRAM_PD, 0);
617
618 /* Disable SCP watchdog */
619 writel(0, scp->reg_base + MT8192_CORE0_WDT_CFG);
620 }
621
mt8195_scp_stop(struct mtk_scp * scp)622 static void mt8195_scp_stop(struct mtk_scp *scp)
623 {
624 /* Disable SRAM clock */
625 scp_sram_power_off(scp->reg_base + MT8192_L2TCM_SRAM_PD_0, 0);
626 scp_sram_power_off(scp->reg_base + MT8192_L2TCM_SRAM_PD_1, 0);
627 scp_sram_power_off(scp->reg_base + MT8192_L2TCM_SRAM_PD_2, 0);
628 scp_sram_power_off(scp->reg_base + MT8192_L1TCM_SRAM_PDN,
629 MT8195_L1TCM_SRAM_PDN_RESERVED_RSI_BITS);
630 scp_sram_power_off(scp->reg_base + MT8192_CPU0_SRAM_PD, 0);
631
632 /* Disable SCP watchdog */
633 writel(0, scp->reg_base + MT8192_CORE0_WDT_CFG);
634 }
635
scp_stop(struct rproc * rproc)636 static int scp_stop(struct rproc *rproc)
637 {
638 struct mtk_scp *scp = rproc->priv;
639 int ret;
640
641 ret = clk_prepare_enable(scp->clk);
642 if (ret) {
643 dev_err(scp->dev, "failed to enable clocks\n");
644 return ret;
645 }
646
647 scp->data->scp_reset_assert(scp);
648 scp->data->scp_stop(scp);
649 clk_disable_unprepare(scp->clk);
650
651 return 0;
652 }
653
654 static const struct rproc_ops scp_ops = {
655 .start = scp_start,
656 .stop = scp_stop,
657 .load = scp_load,
658 .da_to_va = scp_da_to_va,
659 .parse_fw = scp_parse_fw,
660 .sanity_check = rproc_elf_sanity_check,
661 };
662
663 /**
664 * scp_get_device() - get device struct of SCP
665 *
666 * @scp: mtk_scp structure
667 **/
scp_get_device(struct mtk_scp * scp)668 struct device *scp_get_device(struct mtk_scp *scp)
669 {
670 return scp->dev;
671 }
672 EXPORT_SYMBOL_GPL(scp_get_device);
673
674 /**
675 * scp_get_rproc() - get rproc struct of SCP
676 *
677 * @scp: mtk_scp structure
678 **/
scp_get_rproc(struct mtk_scp * scp)679 struct rproc *scp_get_rproc(struct mtk_scp *scp)
680 {
681 return scp->rproc;
682 }
683 EXPORT_SYMBOL_GPL(scp_get_rproc);
684
685 /**
686 * scp_get_vdec_hw_capa() - get video decoder hardware capability
687 *
688 * @scp: mtk_scp structure
689 *
690 * Return: video decoder hardware capability
691 **/
scp_get_vdec_hw_capa(struct mtk_scp * scp)692 unsigned int scp_get_vdec_hw_capa(struct mtk_scp *scp)
693 {
694 return scp->run.dec_capability;
695 }
696 EXPORT_SYMBOL_GPL(scp_get_vdec_hw_capa);
697
698 /**
699 * scp_get_venc_hw_capa() - get video encoder hardware capability
700 *
701 * @scp: mtk_scp structure
702 *
703 * Return: video encoder hardware capability
704 **/
scp_get_venc_hw_capa(struct mtk_scp * scp)705 unsigned int scp_get_venc_hw_capa(struct mtk_scp *scp)
706 {
707 return scp->run.enc_capability;
708 }
709 EXPORT_SYMBOL_GPL(scp_get_venc_hw_capa);
710
711 /**
712 * scp_mapping_dm_addr() - Mapping SRAM/DRAM to kernel virtual address
713 *
714 * @scp: mtk_scp structure
715 * @mem_addr: SCP views memory address
716 *
717 * Mapping the SCP's SRAM address /
718 * DMEM (Data Extended Memory) memory address /
719 * Working buffer memory address to
720 * kernel virtual address.
721 *
722 * Return: Return ERR_PTR(-EINVAL) if mapping failed,
723 * otherwise the mapped kernel virtual address
724 **/
scp_mapping_dm_addr(struct mtk_scp * scp,u32 mem_addr)725 void *scp_mapping_dm_addr(struct mtk_scp *scp, u32 mem_addr)
726 {
727 void *ptr;
728
729 ptr = scp_da_to_va(scp->rproc, mem_addr, 0, NULL);
730 if (!ptr)
731 return ERR_PTR(-EINVAL);
732
733 return ptr;
734 }
735 EXPORT_SYMBOL_GPL(scp_mapping_dm_addr);
736
scp_map_memory_region(struct mtk_scp * scp)737 static int scp_map_memory_region(struct mtk_scp *scp)
738 {
739 int ret;
740
741 ret = of_reserved_mem_device_init(scp->dev);
742
743 /* reserved memory is optional. */
744 if (ret == -ENODEV) {
745 dev_info(scp->dev, "skipping reserved memory initialization.");
746 return 0;
747 }
748
749 if (ret) {
750 dev_err(scp->dev, "failed to assign memory-region: %d\n", ret);
751 return -ENOMEM;
752 }
753
754 /* Reserved SCP code size */
755 scp->dram_size = MAX_CODE_SIZE;
756 scp->cpu_addr = dma_alloc_coherent(scp->dev, scp->dram_size,
757 &scp->dma_addr, GFP_KERNEL);
758 if (!scp->cpu_addr)
759 return -ENOMEM;
760
761 return 0;
762 }
763
scp_unmap_memory_region(struct mtk_scp * scp)764 static void scp_unmap_memory_region(struct mtk_scp *scp)
765 {
766 if (scp->dram_size == 0)
767 return;
768
769 dma_free_coherent(scp->dev, scp->dram_size, scp->cpu_addr,
770 scp->dma_addr);
771 of_reserved_mem_device_release(scp->dev);
772 }
773
scp_register_ipi(struct platform_device * pdev,u32 id,ipi_handler_t handler,void * priv)774 static int scp_register_ipi(struct platform_device *pdev, u32 id,
775 ipi_handler_t handler, void *priv)
776 {
777 struct mtk_scp *scp = platform_get_drvdata(pdev);
778
779 return scp_ipi_register(scp, id, handler, priv);
780 }
781
scp_unregister_ipi(struct platform_device * pdev,u32 id)782 static void scp_unregister_ipi(struct platform_device *pdev, u32 id)
783 {
784 struct mtk_scp *scp = platform_get_drvdata(pdev);
785
786 scp_ipi_unregister(scp, id);
787 }
788
scp_send_ipi(struct platform_device * pdev,u32 id,void * buf,unsigned int len,unsigned int wait)789 static int scp_send_ipi(struct platform_device *pdev, u32 id, void *buf,
790 unsigned int len, unsigned int wait)
791 {
792 struct mtk_scp *scp = platform_get_drvdata(pdev);
793
794 return scp_ipi_send(scp, id, buf, len, wait);
795 }
796
797 static struct mtk_rpmsg_info mtk_scp_rpmsg_info = {
798 .send_ipi = scp_send_ipi,
799 .register_ipi = scp_register_ipi,
800 .unregister_ipi = scp_unregister_ipi,
801 .ns_ipi_id = SCP_IPI_NS_SERVICE,
802 };
803
scp_add_rpmsg_subdev(struct mtk_scp * scp)804 static void scp_add_rpmsg_subdev(struct mtk_scp *scp)
805 {
806 scp->rpmsg_subdev =
807 mtk_rpmsg_create_rproc_subdev(to_platform_device(scp->dev),
808 &mtk_scp_rpmsg_info);
809 if (scp->rpmsg_subdev)
810 rproc_add_subdev(scp->rproc, scp->rpmsg_subdev);
811 }
812
scp_remove_rpmsg_subdev(struct mtk_scp * scp)813 static void scp_remove_rpmsg_subdev(struct mtk_scp *scp)
814 {
815 if (scp->rpmsg_subdev) {
816 rproc_remove_subdev(scp->rproc, scp->rpmsg_subdev);
817 mtk_rpmsg_destroy_rproc_subdev(scp->rpmsg_subdev);
818 scp->rpmsg_subdev = NULL;
819 }
820 }
821
scp_probe(struct platform_device * pdev)822 static int scp_probe(struct platform_device *pdev)
823 {
824 struct device *dev = &pdev->dev;
825 struct device_node *np = dev->of_node;
826 struct mtk_scp *scp;
827 struct rproc *rproc;
828 struct resource *res;
829 const char *fw_name = "scp.img";
830 int ret, i;
831
832 ret = rproc_of_parse_firmware(dev, 0, &fw_name);
833 if (ret < 0 && ret != -EINVAL)
834 return ret;
835
836 rproc = devm_rproc_alloc(dev, np->name, &scp_ops, fw_name, sizeof(*scp));
837 if (!rproc)
838 return dev_err_probe(dev, -ENOMEM, "unable to allocate remoteproc\n");
839
840 scp = rproc->priv;
841 scp->rproc = rproc;
842 scp->dev = dev;
843 scp->data = of_device_get_match_data(dev);
844 platform_set_drvdata(pdev, scp);
845
846 res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "sram");
847 scp->sram_base = devm_ioremap_resource(dev, res);
848 if (IS_ERR(scp->sram_base))
849 return dev_err_probe(dev, PTR_ERR(scp->sram_base),
850 "Failed to parse and map sram memory\n");
851
852 scp->sram_size = resource_size(res);
853 scp->sram_phys = res->start;
854
855 /* l1tcm is an optional memory region */
856 res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "l1tcm");
857 scp->l1tcm_base = devm_ioremap_resource(dev, res);
858 if (IS_ERR(scp->l1tcm_base)) {
859 ret = PTR_ERR(scp->l1tcm_base);
860 if (ret != -EINVAL) {
861 return dev_err_probe(dev, ret, "Failed to map l1tcm memory\n");
862 }
863 } else {
864 scp->l1tcm_size = resource_size(res);
865 scp->l1tcm_phys = res->start;
866 }
867
868 scp->reg_base = devm_platform_ioremap_resource_byname(pdev, "cfg");
869 if (IS_ERR(scp->reg_base))
870 return dev_err_probe(dev, PTR_ERR(scp->reg_base),
871 "Failed to parse and map cfg memory\n");
872
873 ret = scp->data->scp_clk_get(scp);
874 if (ret)
875 return ret;
876
877 ret = scp_map_memory_region(scp);
878 if (ret)
879 return ret;
880
881 mutex_init(&scp->send_lock);
882 for (i = 0; i < SCP_IPI_MAX; i++)
883 mutex_init(&scp->ipi_desc[i].lock);
884
885 /* register SCP initialization IPI */
886 ret = scp_ipi_register(scp, SCP_IPI_INIT, scp_init_ipi_handler, scp);
887 if (ret) {
888 dev_err(dev, "Failed to register IPI_SCP_INIT\n");
889 goto release_dev_mem;
890 }
891
892 init_waitqueue_head(&scp->run.wq);
893 init_waitqueue_head(&scp->ack_wq);
894
895 scp_add_rpmsg_subdev(scp);
896
897 ret = devm_request_threaded_irq(dev, platform_get_irq(pdev, 0), NULL,
898 scp_irq_handler, IRQF_ONESHOT,
899 pdev->name, scp);
900
901 if (ret) {
902 dev_err(dev, "failed to request irq\n");
903 goto remove_subdev;
904 }
905
906 ret = rproc_add(rproc);
907 if (ret)
908 goto remove_subdev;
909
910 return 0;
911
912 remove_subdev:
913 scp_remove_rpmsg_subdev(scp);
914 scp_ipi_unregister(scp, SCP_IPI_INIT);
915 release_dev_mem:
916 scp_unmap_memory_region(scp);
917 for (i = 0; i < SCP_IPI_MAX; i++)
918 mutex_destroy(&scp->ipi_desc[i].lock);
919 mutex_destroy(&scp->send_lock);
920
921 return ret;
922 }
923
scp_remove(struct platform_device * pdev)924 static void scp_remove(struct platform_device *pdev)
925 {
926 struct mtk_scp *scp = platform_get_drvdata(pdev);
927 int i;
928
929 rproc_del(scp->rproc);
930 scp_remove_rpmsg_subdev(scp);
931 scp_ipi_unregister(scp, SCP_IPI_INIT);
932 scp_unmap_memory_region(scp);
933 for (i = 0; i < SCP_IPI_MAX; i++)
934 mutex_destroy(&scp->ipi_desc[i].lock);
935 mutex_destroy(&scp->send_lock);
936 }
937
938 static const struct mtk_scp_of_data mt8183_of_data = {
939 .scp_clk_get = mt8183_scp_clk_get,
940 .scp_before_load = mt8183_scp_before_load,
941 .scp_irq_handler = mt8183_scp_irq_handler,
942 .scp_reset_assert = mt8183_scp_reset_assert,
943 .scp_reset_deassert = mt8183_scp_reset_deassert,
944 .scp_stop = mt8183_scp_stop,
945 .scp_da_to_va = mt8183_scp_da_to_va,
946 .host_to_scp_reg = MT8183_HOST_TO_SCP,
947 .host_to_scp_int_bit = MT8183_HOST_IPC_INT_BIT,
948 .ipi_buf_offset = 0x7bdb0,
949 };
950
951 static const struct mtk_scp_of_data mt8186_of_data = {
952 .scp_clk_get = mt8195_scp_clk_get,
953 .scp_before_load = mt8186_scp_before_load,
954 .scp_irq_handler = mt8183_scp_irq_handler,
955 .scp_reset_assert = mt8183_scp_reset_assert,
956 .scp_reset_deassert = mt8183_scp_reset_deassert,
957 .scp_stop = mt8183_scp_stop,
958 .scp_da_to_va = mt8183_scp_da_to_va,
959 .host_to_scp_reg = MT8183_HOST_TO_SCP,
960 .host_to_scp_int_bit = MT8183_HOST_IPC_INT_BIT,
961 .ipi_buf_offset = 0x3bdb0,
962 };
963
964 static const struct mtk_scp_of_data mt8188_of_data = {
965 .scp_clk_get = mt8195_scp_clk_get,
966 .scp_before_load = mt8192_scp_before_load,
967 .scp_irq_handler = mt8192_scp_irq_handler,
968 .scp_reset_assert = mt8192_scp_reset_assert,
969 .scp_reset_deassert = mt8192_scp_reset_deassert,
970 .scp_stop = mt8192_scp_stop,
971 .scp_da_to_va = mt8192_scp_da_to_va,
972 .host_to_scp_reg = MT8192_GIPC_IN_SET,
973 .host_to_scp_int_bit = MT8192_HOST_IPC_INT_BIT,
974 };
975
976 static const struct mtk_scp_of_data mt8192_of_data = {
977 .scp_clk_get = mt8192_scp_clk_get,
978 .scp_before_load = mt8192_scp_before_load,
979 .scp_irq_handler = mt8192_scp_irq_handler,
980 .scp_reset_assert = mt8192_scp_reset_assert,
981 .scp_reset_deassert = mt8192_scp_reset_deassert,
982 .scp_stop = mt8192_scp_stop,
983 .scp_da_to_va = mt8192_scp_da_to_va,
984 .host_to_scp_reg = MT8192_GIPC_IN_SET,
985 .host_to_scp_int_bit = MT8192_HOST_IPC_INT_BIT,
986 };
987
988 static const struct mtk_scp_of_data mt8195_of_data = {
989 .scp_clk_get = mt8195_scp_clk_get,
990 .scp_before_load = mt8195_scp_before_load,
991 .scp_irq_handler = mt8192_scp_irq_handler,
992 .scp_reset_assert = mt8192_scp_reset_assert,
993 .scp_reset_deassert = mt8192_scp_reset_deassert,
994 .scp_stop = mt8195_scp_stop,
995 .scp_da_to_va = mt8192_scp_da_to_va,
996 .host_to_scp_reg = MT8192_GIPC_IN_SET,
997 .host_to_scp_int_bit = MT8192_HOST_IPC_INT_BIT,
998 };
999
1000 static const struct of_device_id mtk_scp_of_match[] = {
1001 { .compatible = "mediatek,mt8183-scp", .data = &mt8183_of_data },
1002 { .compatible = "mediatek,mt8186-scp", .data = &mt8186_of_data },
1003 { .compatible = "mediatek,mt8188-scp", .data = &mt8188_of_data },
1004 { .compatible = "mediatek,mt8192-scp", .data = &mt8192_of_data },
1005 { .compatible = "mediatek,mt8195-scp", .data = &mt8195_of_data },
1006 {},
1007 };
1008 MODULE_DEVICE_TABLE(of, mtk_scp_of_match);
1009
1010 static struct platform_driver mtk_scp_driver = {
1011 .probe = scp_probe,
1012 .remove_new = scp_remove,
1013 .driver = {
1014 .name = "mtk-scp",
1015 .of_match_table = mtk_scp_of_match,
1016 },
1017 };
1018
1019 module_platform_driver(mtk_scp_driver);
1020
1021 MODULE_LICENSE("GPL v2");
1022 MODULE_DESCRIPTION("MediaTek SCP control driver");
1023