1 /* SPDX-License-Identifier: GPL-2.0 */
2 /* Copyright (c) 2019 Fuzhou Rockchip Electronics Co., Ltd. */
3
4 #ifndef _RKISP_ISPP_H
5 #define _RKISP_ISPP_H
6
7 #include <linux/platform_device.h>
8 #include <media/v4l2-subdev.h>
9 #include <media/videobuf2-v4l2.h>
10 #include <linux/rkisp1-config.h>
11 #include <linux/rkispp-config.h>
12
13 #define RKISP_BUF_MAX 2
14 #define RKISPP_BUF_MAX 2
15 #define RKISP_ISPP_BUF_MAX (RKISP_BUF_MAX + RKISPP_BUF_MAX + (2 * (DEV_MAX - 1)))
16
17 #define RKISP_ISPP_REGBUF_NUM RKISPP_BUF_POOL_MAX
18 #define RKISP_ISP_SW_REG_SIZE 0x6000
19 #define RKISP_ISP_SW_MAX_SIZE (RKISP_ISP_SW_REG_SIZE * 2)
20 #define RKISP_ISPP_SW_REG_SIZE 0x0d00
21 #define RKISP_ISPP_SW_MAX_SIZE (RKISP_ISPP_SW_REG_SIZE * 2)
22
23 #define RKISP_ISPP_CMD_SET_MODE \
24 _IOW('V', BASE_VIDIOC_PRIVATE + 0, struct rkisp_ispp_mode)
25 #define RKISP_ISPP_CMD_SET_FMT \
26 _IOW('V', BASE_VIDIOC_PRIVATE + 1, struct max_input)
27 #define RKISP_ISPP_CMD_REQUEST_REGBUF \
28 _IOW('V', BASE_VIDIOC_PRIVATE + 2, struct rkisp_ispp_reg *)
29 #define RKISP_ISPP_CMD_GET_REG_WITHSTREAM \
30 _IOW('V', BASE_VIDIOC_PRIVATE + 3, bool)
31
32 enum frame_end_state {
33 FRAME_INIT,
34 FRAME_IRQ,
35 FRAME_WORK,
36 };
37
38 enum rkisp_ispp_dev {
39 DEV_ID0 = 0,
40 DEV_ID1,
41 DEV_ID2,
42 DEV_ID3,
43 DEV_MAX,
44 };
45
46 enum rkisp_ispp_sw_reg {
47 SW_REG_CACHE = 0xffffffff,
48 SW_REG_CACHE_SYNC = 0xeeeeeeee,
49 };
50
51 enum rkisp_ispp_buf_group {
52 GROUP_BUF_PIC = 0,
53 GROUP_BUF_GAIN,
54 GROUP_BUF_MAX,
55 };
56
57 enum rkisp_ispp_work_mode {
58 ISP_ISPP_FBC = BIT(0),
59 ISP_ISPP_422 = BIT(1),
60 ISP_ISPP_QUICK = BIT(2),
61 ISP_ISPP_INIT_FAIL = BIT(7),
62 };
63
64 enum rkisp_ispp_reg_stat {
65 ISP_ISPP_FREE = 0,
66 ISP_ISPP_INUSE,
67 };
68
69 struct frame_debug_info {
70 u64 timestamp;
71 u32 interval;
72 u32 delay;
73 u32 id;
74 u32 frameloss;
75 };
76
77 struct max_input {
78 u32 w;
79 u32 h;
80 u32 fps;
81 };
82
83 struct rkisp_ispp_mode {
84 u8 work_mode;
85 u8 buf_num;
86 };
87
88 struct rkisp_ispp_reg {
89 enum rkisp_ispp_reg_stat stat;
90 u32 dev_id;
91 u32 frame_id;
92 u32 reg_size;
93 s32 isp_offset[ISP2X_ID_MAX];
94 s32 ispp_offset[ISPP_ID_MAX];
95 u32 isp_size[ISP2X_ID_MAX];
96 u32 isp_stats_size[ISP2X_ID_MAX];
97 u32 ispp_size[ISPP_ID_MAX];
98 u64 sof_timestamp;
99 u64 frame_timestamp;
100 struct sensor_exposure_cfg exposure;
101 u8 reg[RKISP_ISP_SW_REG_SIZE + RKISP_ISPP_SW_REG_SIZE];
102 };
103
104 struct rkisp_ispp_buf {
105 struct list_head list;
106 struct dma_buf *dbuf[GROUP_BUF_MAX];
107 int dfd[GROUP_BUF_MAX];
108 u32 didx[GROUP_BUF_MAX];
109 /* timestamp in ns */
110 u64 frame_timestamp;
111 u32 frame_id;
112 u32 index;
113 bool is_isp;
114 bool is_move_judge;
115 u32 buf_idx;
116 u32 gain_dmaidx;
117 u32 mfbc_dmaidx;
118 u32 gain_size;
119 u32 mfbc_size;
120 void *priv;
121 };
122
123 int __init rkispp_hw_drv_init(void);
124
125 #if IS_ENABLED(CONFIG_VIDEO_ROCKCHIP_ISP_VERSION_V20) || IS_ENABLED(CONFIG_VIDEO_ROCKCHIP_ISP_VERSION_V30)
126 void rkisp_get_bridge_sd(struct platform_device *dev,
127 struct v4l2_subdev **sd);
128 #else
rkisp_get_bridge_sd(struct platform_device * dev,struct v4l2_subdev ** sd)129 static inline void rkisp_get_bridge_sd(struct platform_device *dev,
130 struct v4l2_subdev **sd)
131 {
132 *sd = NULL;
133 }
134 #endif
135
136 extern const struct vb2_mem_ops vb2_rdma_sg_memops;
137
138 #endif
139