1 // SPDX-License-Identifier: GPL-2.0
2 /* Copyright (c) 2019 Fuzhou Rockchip Electronics Co., Ltd. */
3
4 #include <media/v4l2-common.h>
5 #include <media/v4l2-ioctl.h>
6 #include <media/videobuf2-core.h>
7 #include <media/videobuf2-vmalloc.h> /* for ISP params */
8 #include <linux/rk-preisp.h>
9 #include "dev.h"
10 #include "regs.h"
11 #include "isp_params_v1x.h"
12
13 #define RKISP1_ISP_PARAMS_REQ_BUFS_MIN 2
14 #define RKISP1_ISP_PARAMS_REQ_BUFS_MAX 8
15
16 #define BLS_START_H_MAX_IS_VALID(val) ((val) < CIFISP_BLS_START_H_MAX)
17 #define BLS_STOP_H_MAX_IS_VALID(val) ((val) < CIFISP_BLS_STOP_H_MAX)
18
19 #define BLS_START_V_MAX_IS_VALID(val) ((val) < CIFISP_BLS_START_V_MAX)
20 #define BLS_STOP_V_MAX_IS_VALID(val) ((val) < CIFISP_BLS_STOP_V_MAX)
21
22 #define BLS_SAMPLE_MAX_IS_VALID(val) ((val) < CIFISP_BLS_SAMPLES_MAX)
23
24 #define BLS_FIX_SUB_IS_VALID(val) \
25 ((val) > (s16)CIFISP_BLS_FIX_SUB_MIN && (val) < CIFISP_BLS_FIX_SUB_MAX)
26
27 #define RKISP1_ISP_DPCC_LINE_THRESH(n) (CIF_ISP_DPCC_LINE_THRESH_1 + 0x14 * (n))
28 #define RKISP1_ISP_DPCC_LINE_MAD_FAC(n) (CIF_ISP_DPCC_LINE_MAD_FAC_1 + 0x14 * (n))
29 #define RKISP1_ISP_DPCC_PG_FAC(n) (CIF_ISP_DPCC_PG_FAC_1 + 0x14 * (n))
30 #define RKISP1_ISP_DPCC_RND_THRESH(n) (CIF_ISP_DPCC_RND_THRESH_1 + 0x14 * (n))
31 #define RKISP1_ISP_DPCC_RG_FAC(n) (CIF_ISP_DPCC_RG_FAC_1 + 0x14 * (n))
32 #define RKISP1_ISP_CC_COEFF(n) (CIF_ISP_CC_COEFF_0 + (n) * 4)
33
rkisp1_iowrite32(struct rkisp_isp_params_vdev * params_vdev,u32 value,u32 addr)34 static inline void rkisp1_iowrite32(struct rkisp_isp_params_vdev *params_vdev,
35 u32 value, u32 addr)
36 {
37 iowrite32(value, params_vdev->dev->base_addr + addr);
38 }
39
rkisp1_ioread32(struct rkisp_isp_params_vdev * params_vdev,u32 addr)40 static inline u32 rkisp1_ioread32(struct rkisp_isp_params_vdev *params_vdev,
41 u32 addr)
42 {
43 return ioread32(params_vdev->dev->base_addr + addr);
44 }
45
46 /* ISP BP interface function */
isp_dpcc_config(struct rkisp_isp_params_vdev * params_vdev,const struct cifisp_dpcc_config * arg)47 static void isp_dpcc_config(struct rkisp_isp_params_vdev *params_vdev,
48 const struct cifisp_dpcc_config *arg)
49 {
50 unsigned int i;
51 u32 mode;
52
53 /* avoid to override the old enable value */
54 mode = rkisp1_ioread32(params_vdev, CIF_ISP_DPCC_MODE);
55 mode &= CIF_ISP_DPCC_ENA;
56 mode |= arg->mode & ~CIF_ISP_DPCC_ENA;
57 rkisp1_iowrite32(params_vdev, mode, CIF_ISP_DPCC_MODE);
58 rkisp1_iowrite32(params_vdev, arg->output_mode,
59 CIF_ISP_DPCC_OUTPUT_MODE);
60 rkisp1_iowrite32(params_vdev, arg->set_use, CIF_ISP_DPCC_SET_USE);
61
62 rkisp1_iowrite32(params_vdev, arg->methods[0].method,
63 CIF_ISP_DPCC_METHODS_SET_1);
64 rkisp1_iowrite32(params_vdev, arg->methods[1].method,
65 CIF_ISP_DPCC_METHODS_SET_2);
66 rkisp1_iowrite32(params_vdev, arg->methods[2].method,
67 CIF_ISP_DPCC_METHODS_SET_3);
68 for (i = 0; i < CIFISP_DPCC_METHODS_MAX; i++) {
69 rkisp1_iowrite32(params_vdev, arg->methods[i].line_thresh,
70 RKISP1_ISP_DPCC_LINE_THRESH(i));
71 rkisp1_iowrite32(params_vdev, arg->methods[i].line_mad_fac,
72 RKISP1_ISP_DPCC_LINE_MAD_FAC(i));
73 rkisp1_iowrite32(params_vdev, arg->methods[i].pg_fac,
74 RKISP1_ISP_DPCC_PG_FAC(i));
75 rkisp1_iowrite32(params_vdev, arg->methods[i].rnd_thresh,
76 RKISP1_ISP_DPCC_RND_THRESH(i));
77 rkisp1_iowrite32(params_vdev, arg->methods[i].rg_fac,
78 RKISP1_ISP_DPCC_RG_FAC(i));
79 }
80
81 rkisp1_iowrite32(params_vdev, arg->rnd_offs, CIF_ISP_DPCC_RND_OFFS);
82 rkisp1_iowrite32(params_vdev, arg->ro_limits, CIF_ISP_DPCC_RO_LIMITS);
83 }
84
85 /* ISP black level subtraction interface function */
isp_bls_config(struct rkisp_isp_params_vdev * params_vdev,const struct cifisp_bls_config * arg)86 static void isp_bls_config(struct rkisp_isp_params_vdev *params_vdev,
87 const struct cifisp_bls_config *arg)
88 {
89 /* avoid to override the old enable value */
90 u32 new_control;
91
92 new_control = rkisp1_ioread32(params_vdev, CIF_ISP_BLS_CTRL);
93 new_control &= CIF_ISP_BLS_ENA;
94 /* fixed subtraction values */
95 if (!arg->enable_auto) {
96 const struct cifisp_bls_fixed_val *pval = &arg->fixed_val;
97
98 switch (params_vdev->raw_type) {
99 case RAW_BGGR:
100 rkisp1_iowrite32(params_vdev,
101 pval->r, CIF_ISP_BLS_D_FIXED);
102 rkisp1_iowrite32(params_vdev,
103 pval->gr, CIF_ISP_BLS_C_FIXED);
104 rkisp1_iowrite32(params_vdev,
105 pval->gb, CIF_ISP_BLS_B_FIXED);
106 rkisp1_iowrite32(params_vdev,
107 pval->b, CIF_ISP_BLS_A_FIXED);
108 break;
109 case RAW_GBRG:
110 rkisp1_iowrite32(params_vdev,
111 pval->r, CIF_ISP_BLS_C_FIXED);
112 rkisp1_iowrite32(params_vdev,
113 pval->gr, CIF_ISP_BLS_D_FIXED);
114 rkisp1_iowrite32(params_vdev,
115 pval->gb, CIF_ISP_BLS_A_FIXED);
116 rkisp1_iowrite32(params_vdev,
117 pval->b, CIF_ISP_BLS_B_FIXED);
118 break;
119 case RAW_GRBG:
120 rkisp1_iowrite32(params_vdev,
121 pval->r, CIF_ISP_BLS_B_FIXED);
122 rkisp1_iowrite32(params_vdev,
123 pval->gr, CIF_ISP_BLS_A_FIXED);
124 rkisp1_iowrite32(params_vdev,
125 pval->gb, CIF_ISP_BLS_D_FIXED);
126 rkisp1_iowrite32(params_vdev,
127 pval->b, CIF_ISP_BLS_C_FIXED);
128 break;
129 case RAW_RGGB:
130 rkisp1_iowrite32(params_vdev,
131 pval->r, CIF_ISP_BLS_A_FIXED);
132 rkisp1_iowrite32(params_vdev,
133 pval->gr, CIF_ISP_BLS_B_FIXED);
134 rkisp1_iowrite32(params_vdev,
135 pval->gb, CIF_ISP_BLS_C_FIXED);
136 rkisp1_iowrite32(params_vdev,
137 pval->b, CIF_ISP_BLS_D_FIXED);
138 break;
139 default:
140 break;
141 }
142
143 } else {
144 if (arg->en_windows & BIT(1)) {
145 rkisp1_iowrite32(params_vdev, arg->bls_window2.h_offs,
146 CIF_ISP_BLS_H2_START);
147 rkisp1_iowrite32(params_vdev, arg->bls_window2.h_size,
148 CIF_ISP_BLS_H2_STOP);
149 rkisp1_iowrite32(params_vdev, arg->bls_window2.v_offs,
150 CIF_ISP_BLS_V2_START);
151 rkisp1_iowrite32(params_vdev, arg->bls_window2.v_size,
152 CIF_ISP_BLS_V2_STOP);
153 new_control |= CIF_ISP_BLS_WINDOW_2;
154 }
155
156 if (arg->en_windows & BIT(0)) {
157 rkisp1_iowrite32(params_vdev, arg->bls_window1.h_offs,
158 CIF_ISP_BLS_H1_START);
159 rkisp1_iowrite32(params_vdev, arg->bls_window1.h_size,
160 CIF_ISP_BLS_H1_STOP);
161 rkisp1_iowrite32(params_vdev, arg->bls_window1.v_offs,
162 CIF_ISP_BLS_V1_START);
163 rkisp1_iowrite32(params_vdev, arg->bls_window1.v_size,
164 CIF_ISP_BLS_V1_STOP);
165 new_control |= CIF_ISP_BLS_WINDOW_1;
166 }
167
168 rkisp1_iowrite32(params_vdev, arg->bls_samples,
169 CIF_ISP_BLS_SAMPLES);
170
171 new_control |= CIF_ISP_BLS_MODE_MEASURED;
172 }
173 rkisp1_iowrite32(params_vdev, new_control, CIF_ISP_BLS_CTRL);
174 }
175
176 /* ISP LS correction interface function */
177 static void
isp_lsc_matrix_config_v10(struct rkisp_isp_params_vdev * params_vdev,const struct cifisp_lsc_config * pconfig)178 isp_lsc_matrix_config_v10(struct rkisp_isp_params_vdev *params_vdev,
179 const struct cifisp_lsc_config *pconfig)
180 {
181 int i, j;
182 unsigned int isp_lsc_status, sram_addr, isp_lsc_table_sel;
183 unsigned int data;
184
185 isp_lsc_status = rkisp1_ioread32(params_vdev, CIF_ISP_LSC_STATUS);
186
187 /* CIF_ISP_LSC_TABLE_ADDRESS_153 = ( 17 * 18 ) >> 1 */
188 sram_addr = (isp_lsc_status & CIF_ISP_LSC_ACTIVE_TABLE) ?
189 CIF_ISP_LSC_TABLE_ADDRESS_0 :
190 CIF_ISP_LSC_TABLE_ADDRESS_153;
191 rkisp1_iowrite32(params_vdev, sram_addr, CIF_ISP_LSC_R_TABLE_ADDR);
192 rkisp1_iowrite32(params_vdev, sram_addr, CIF_ISP_LSC_GR_TABLE_ADDR);
193 rkisp1_iowrite32(params_vdev, sram_addr, CIF_ISP_LSC_GB_TABLE_ADDR);
194 rkisp1_iowrite32(params_vdev, sram_addr, CIF_ISP_LSC_B_TABLE_ADDR);
195
196 /* program data tables (table size is 9 * 17 = 153) */
197 for (i = 0; i < CIF_ISP_LSC_SECTORS_MAX * CIF_ISP_LSC_SECTORS_MAX;
198 i += CIF_ISP_LSC_SECTORS_MAX) {
199 /*
200 * 17 sectors with 2 values in one DWORD = 9
201 * DWORDs (2nd value of last DWORD unused)
202 */
203 for (j = 0; j < CIF_ISP_LSC_SECTORS_MAX - 1; j += 2) {
204 data = CIF_ISP_LSC_TABLE_DATA_V10(
205 pconfig->r_data_tbl[i + j],
206 pconfig->r_data_tbl[i + j + 1]);
207 rkisp1_iowrite32(params_vdev, data,
208 CIF_ISP_LSC_R_TABLE_DATA);
209
210 data = CIF_ISP_LSC_TABLE_DATA_V10(
211 pconfig->gr_data_tbl[i + j],
212 pconfig->gr_data_tbl[i + j + 1]);
213 rkisp1_iowrite32(params_vdev, data,
214 CIF_ISP_LSC_GR_TABLE_DATA);
215
216 data = CIF_ISP_LSC_TABLE_DATA_V10(
217 pconfig->gb_data_tbl[i + j],
218 pconfig->gb_data_tbl[i + j + 1]);
219 rkisp1_iowrite32(params_vdev, data,
220 CIF_ISP_LSC_GB_TABLE_DATA);
221
222 data = CIF_ISP_LSC_TABLE_DATA_V10(
223 pconfig->b_data_tbl[i + j],
224 pconfig->b_data_tbl[i + j + 1]);
225 rkisp1_iowrite32(params_vdev, data,
226 CIF_ISP_LSC_B_TABLE_DATA);
227 }
228
229 data = CIF_ISP_LSC_TABLE_DATA_V10(
230 pconfig->r_data_tbl[i + j],
231 0);
232 rkisp1_iowrite32(params_vdev, data,
233 CIF_ISP_LSC_R_TABLE_DATA);
234
235 data = CIF_ISP_LSC_TABLE_DATA_V10(
236 pconfig->gr_data_tbl[i + j],
237 0);
238 rkisp1_iowrite32(params_vdev, data,
239 CIF_ISP_LSC_GR_TABLE_DATA);
240
241 data = CIF_ISP_LSC_TABLE_DATA_V10(
242 pconfig->gb_data_tbl[i + j],
243 0);
244 rkisp1_iowrite32(params_vdev, data,
245 CIF_ISP_LSC_GB_TABLE_DATA);
246
247 data = CIF_ISP_LSC_TABLE_DATA_V10(
248 pconfig->b_data_tbl[i + j],
249 0);
250 rkisp1_iowrite32(params_vdev, data,
251 CIF_ISP_LSC_B_TABLE_DATA);
252 }
253 isp_lsc_table_sel = (isp_lsc_status & CIF_ISP_LSC_ACTIVE_TABLE) ?
254 CIF_ISP_LSC_TABLE_0 : CIF_ISP_LSC_TABLE_1;
255 rkisp1_iowrite32(params_vdev, isp_lsc_table_sel, CIF_ISP_LSC_TABLE_SEL);
256 }
257
258 static void
isp_lsc_matrix_config_v12(struct rkisp_isp_params_vdev * params_vdev,const struct cifisp_lsc_config * pconfig)259 isp_lsc_matrix_config_v12(struct rkisp_isp_params_vdev *params_vdev,
260 const struct cifisp_lsc_config *pconfig)
261 {
262 int i, j;
263 unsigned int isp_lsc_status, sram_addr, isp_lsc_table_sel;
264 unsigned int data;
265
266 isp_lsc_status = rkisp1_ioread32(params_vdev, CIF_ISP_LSC_STATUS);
267
268 /* CIF_ISP_LSC_TABLE_ADDRESS_153 = ( 17 * 18 ) >> 1 */
269 sram_addr = (isp_lsc_status & CIF_ISP_LSC_ACTIVE_TABLE) ?
270 CIF_ISP_LSC_TABLE_ADDRESS_0 :
271 CIF_ISP_LSC_TABLE_ADDRESS_153;
272 rkisp1_iowrite32(params_vdev, sram_addr, CIF_ISP_LSC_R_TABLE_ADDR);
273 rkisp1_iowrite32(params_vdev, sram_addr, CIF_ISP_LSC_GR_TABLE_ADDR);
274 rkisp1_iowrite32(params_vdev, sram_addr, CIF_ISP_LSC_GB_TABLE_ADDR);
275 rkisp1_iowrite32(params_vdev, sram_addr, CIF_ISP_LSC_B_TABLE_ADDR);
276
277 /* program data tables (table size is 9 * 17 = 153) */
278 for (i = 0; i < CIF_ISP_LSC_SECTORS_MAX * CIF_ISP_LSC_SECTORS_MAX;
279 i += CIF_ISP_LSC_SECTORS_MAX) {
280 /*
281 * 17 sectors with 2 values in one DWORD = 9
282 * DWORDs (2nd value of last DWORD unused)
283 */
284 for (j = 0; j < CIF_ISP_LSC_SECTORS_MAX - 1; j += 2) {
285 data = CIF_ISP_LSC_TABLE_DATA_V12(
286 pconfig->r_data_tbl[i + j],
287 pconfig->r_data_tbl[i + j + 1]);
288 rkisp1_iowrite32(params_vdev, data,
289 CIF_ISP_LSC_R_TABLE_DATA);
290
291 data = CIF_ISP_LSC_TABLE_DATA_V12(
292 pconfig->gr_data_tbl[i + j],
293 pconfig->gr_data_tbl[i + j + 1]);
294 rkisp1_iowrite32(params_vdev, data,
295 CIF_ISP_LSC_GR_TABLE_DATA);
296
297 data = CIF_ISP_LSC_TABLE_DATA_V12(
298 pconfig->gb_data_tbl[i + j],
299 pconfig->gb_data_tbl[i + j + 1]);
300 rkisp1_iowrite32(params_vdev, data,
301 CIF_ISP_LSC_GB_TABLE_DATA);
302
303 data = CIF_ISP_LSC_TABLE_DATA_V12(
304 pconfig->b_data_tbl[i + j],
305 pconfig->b_data_tbl[i + j + 1]);
306 rkisp1_iowrite32(params_vdev, data,
307 CIF_ISP_LSC_B_TABLE_DATA);
308 }
309
310 data = CIF_ISP_LSC_TABLE_DATA_V12(
311 pconfig->r_data_tbl[i + j],
312 0);
313 rkisp1_iowrite32(params_vdev, data,
314 CIF_ISP_LSC_R_TABLE_DATA);
315
316 data = CIF_ISP_LSC_TABLE_DATA_V12(
317 pconfig->gr_data_tbl[i + j],
318 0);
319 rkisp1_iowrite32(params_vdev, data,
320 CIF_ISP_LSC_GR_TABLE_DATA);
321
322 data = CIF_ISP_LSC_TABLE_DATA_V12(
323 pconfig->gb_data_tbl[i + j],
324 0);
325 rkisp1_iowrite32(params_vdev, data,
326 CIF_ISP_LSC_GB_TABLE_DATA);
327
328 data = CIF_ISP_LSC_TABLE_DATA_V12(
329 pconfig->b_data_tbl[i + j],
330 0);
331 rkisp1_iowrite32(params_vdev, data,
332 CIF_ISP_LSC_B_TABLE_DATA);
333 }
334 isp_lsc_table_sel = (isp_lsc_status & CIF_ISP_LSC_ACTIVE_TABLE) ?
335 CIF_ISP_LSC_TABLE_0 : CIF_ISP_LSC_TABLE_1;
336 rkisp1_iowrite32(params_vdev, isp_lsc_table_sel, CIF_ISP_LSC_TABLE_SEL);
337 }
338
isp_lsc_config(struct rkisp_isp_params_vdev * params_vdev,const struct cifisp_lsc_config * arg)339 static void isp_lsc_config(struct rkisp_isp_params_vdev *params_vdev,
340 const struct cifisp_lsc_config *arg)
341 {
342 int i;
343 u32 lsc_ctrl;
344 unsigned int data;
345 struct rkisp_isp_params_v1x_ops *ops =
346 (struct rkisp_isp_params_v1x_ops *)params_vdev->priv_ops;
347
348 /* To config must be off , store the current status firstly */
349 lsc_ctrl = rkisp1_ioread32(params_vdev, CIF_ISP_LSC_CTRL);
350 isp_param_clear_bits(params_vdev, CIF_ISP_LSC_CTRL,
351 CIF_ISP_LSC_CTRL_ENA);
352 ops->lsc_matrix_config(params_vdev, arg);
353
354 for (i = 0; i < 4; i++) {
355 /* program x size tables */
356 data = CIF_ISP_LSC_SECT_SIZE(arg->x_size_tbl[i * 2],
357 arg->x_size_tbl[i * 2 + 1]);
358 rkisp1_iowrite32(params_vdev, data,
359 CIF_ISP_LSC_XSIZE_01 + i * 4);
360
361 /* program x grad tables */
362 data = CIF_ISP_LSC_SECT_SIZE(arg->x_grad_tbl[i * 2],
363 arg->x_grad_tbl[i * 2 + 1]);
364 rkisp1_iowrite32(params_vdev, data,
365 CIF_ISP_LSC_XGRAD_01 + i * 4);
366
367 /* program y size tables */
368 data = CIF_ISP_LSC_SECT_SIZE(arg->y_size_tbl[i * 2],
369 arg->y_size_tbl[i * 2 + 1]);
370 rkisp1_iowrite32(params_vdev, data,
371 CIF_ISP_LSC_YSIZE_01 + i * 4);
372
373 /* program y grad tables */
374 data = CIF_ISP_LSC_SECT_SIZE(arg->y_grad_tbl[i * 2],
375 arg->y_grad_tbl[i * 2 + 1]);
376 rkisp1_iowrite32(params_vdev, data,
377 CIF_ISP_LSC_YGRAD_01 + i * 4);
378 }
379
380 /* restore the lsc ctrl status */
381 if (lsc_ctrl & CIF_ISP_LSC_CTRL_ENA) {
382 isp_param_set_bits(params_vdev,
383 CIF_ISP_LSC_CTRL,
384 CIF_ISP_LSC_CTRL_ENA);
385 } else {
386 isp_param_clear_bits(params_vdev,
387 CIF_ISP_LSC_CTRL,
388 CIF_ISP_LSC_CTRL_ENA);
389 }
390 }
391
392 /* ISP Filtering function */
isp_flt_config(struct rkisp_isp_params_vdev * params_vdev,const struct cifisp_flt_config * arg)393 static void isp_flt_config(struct rkisp_isp_params_vdev *params_vdev,
394 const struct cifisp_flt_config *arg)
395 {
396 u32 filt_mode;
397
398 rkisp1_iowrite32(params_vdev, arg->thresh_bl0, CIF_ISP_FILT_THRESH_BL0);
399 rkisp1_iowrite32(params_vdev, arg->thresh_bl1, CIF_ISP_FILT_THRESH_BL1);
400 rkisp1_iowrite32(params_vdev, arg->thresh_sh0, CIF_ISP_FILT_THRESH_SH0);
401 rkisp1_iowrite32(params_vdev, arg->thresh_sh1, CIF_ISP_FILT_THRESH_SH1);
402 rkisp1_iowrite32(params_vdev, arg->fac_bl0, CIF_ISP_FILT_FAC_BL0);
403 rkisp1_iowrite32(params_vdev, arg->fac_bl1, CIF_ISP_FILT_FAC_BL1);
404 rkisp1_iowrite32(params_vdev, arg->fac_mid, CIF_ISP_FILT_FAC_MID);
405 rkisp1_iowrite32(params_vdev, arg->fac_sh0, CIF_ISP_FILT_FAC_SH0);
406 rkisp1_iowrite32(params_vdev, arg->fac_sh1, CIF_ISP_FILT_FAC_SH1);
407 rkisp1_iowrite32(params_vdev, arg->lum_weight, CIF_ISP_FILT_LUM_WEIGHT);
408
409 /* avoid to override the old enable value */
410 filt_mode = rkisp1_ioread32(params_vdev, CIF_ISP_FILT_MODE);
411 filt_mode &= CIF_ISP_FLT_ENA;
412 if (arg->mode)
413 filt_mode |= CIF_ISP_FLT_MODE_DNR;
414 filt_mode |= CIF_ISP_FLT_CHROMA_V_MODE(arg->chr_v_mode) |
415 CIF_ISP_FLT_CHROMA_H_MODE(arg->chr_h_mode) |
416 CIF_ISP_FLT_GREEN_STAGE1(arg->grn_stage1);
417 rkisp1_iowrite32(params_vdev, filt_mode, CIF_ISP_FILT_MODE);
418 }
419
420 /* ISP demosaic interface function */
isp_bdm_config(struct rkisp_isp_params_vdev * params_vdev,const struct cifisp_bdm_config * arg)421 static void isp_bdm_config(struct rkisp_isp_params_vdev *params_vdev,
422 const struct cifisp_bdm_config *arg)
423 {
424 u32 bdm_th;
425
426 /* avoid to override the old enable value */
427 bdm_th = rkisp1_ioread32(params_vdev, CIF_ISP_DEMOSAIC);
428 bdm_th &= CIF_ISP_DEMOSAIC_BYPASS;
429 bdm_th |= arg->demosaic_th & ~CIF_ISP_DEMOSAIC_BYPASS;
430 /* set demosaic threshold */
431 rkisp1_iowrite32(params_vdev, bdm_th, CIF_ISP_DEMOSAIC);
432 }
433
434 /* ISP GAMMA correction interface function */
isp_sdg_config(struct rkisp_isp_params_vdev * params_vdev,const struct cifisp_sdg_config * arg)435 static void isp_sdg_config(struct rkisp_isp_params_vdev *params_vdev,
436 const struct cifisp_sdg_config *arg)
437 {
438 int i;
439
440 rkisp1_iowrite32(params_vdev,
441 arg->xa_pnts.gamma_dx0, CIF_ISP_GAMMA_DX_LO);
442 rkisp1_iowrite32(params_vdev,
443 arg->xa_pnts.gamma_dx1, CIF_ISP_GAMMA_DX_HI);
444
445 for (i = 0; i < CIFISP_DEGAMMA_CURVE_SIZE; i++) {
446 rkisp1_iowrite32(params_vdev, arg->curve_r.gamma_y[i],
447 CIF_ISP_GAMMA_R_Y0 + i * 4);
448 rkisp1_iowrite32(params_vdev, arg->curve_g.gamma_y[i],
449 CIF_ISP_GAMMA_G_Y0 + i * 4);
450 rkisp1_iowrite32(params_vdev, arg->curve_b.gamma_y[i],
451 CIF_ISP_GAMMA_B_Y0 + i * 4);
452 }
453 }
454
455 /* ISP GAMMA correction interface function */
isp_goc_config_v10(struct rkisp_isp_params_vdev * params_vdev,const struct cifisp_goc_config * arg)456 static void isp_goc_config_v10(struct rkisp_isp_params_vdev *params_vdev,
457 const struct cifisp_goc_config *arg)
458 {
459 int i;
460 struct rkisp_isp_params_v1x_config *config =
461 (struct rkisp_isp_params_v1x_config *)params_vdev->priv_cfg;
462
463 rkisp1_iowrite32(params_vdev, arg->mode, CIF_ISP_GAMMA_OUT_MODE_V10);
464
465 for (i = 0; i < config->gamma_out_max_samples; i++)
466 rkisp1_iowrite32(params_vdev, arg->gamma_y[i],
467 CIF_ISP_GAMMA_OUT_Y_0_V10 + i * 4);
468 }
469
isp_goc_config_v12(struct rkisp_isp_params_vdev * params_vdev,const struct cifisp_goc_config * arg)470 static void isp_goc_config_v12(struct rkisp_isp_params_vdev *params_vdev,
471 const struct cifisp_goc_config *arg)
472 {
473 int i;
474 u32 value;
475 struct rkisp_isp_params_v1x_config *config =
476 (struct rkisp_isp_params_v1x_config *)params_vdev->priv_cfg;
477
478 rkisp1_iowrite32(params_vdev, arg->mode, CIF_ISP_GAMMA_OUT_MODE_V12);
479
480 for (i = 0; i < config->gamma_out_max_samples / 2; i++) {
481 value = CIF_ISP_GAMMA_REG_VALUE_V12(
482 arg->gamma_y[2 * i + 1],
483 arg->gamma_y[2 * i]);
484 rkisp1_iowrite32(params_vdev, value,
485 CIF_ISP_GAMMA_OUT_Y_0_V12 + i * 4);
486 }
487 }
488
489 /* ISP Cross Talk */
isp_ctk_config(struct rkisp_isp_params_vdev * params_vdev,const struct cifisp_ctk_config * arg)490 static void isp_ctk_config(struct rkisp_isp_params_vdev *params_vdev,
491 const struct cifisp_ctk_config *arg)
492 {
493 rkisp1_iowrite32(params_vdev, arg->coeff0, CIF_ISP_CT_COEFF_0);
494 rkisp1_iowrite32(params_vdev, arg->coeff1, CIF_ISP_CT_COEFF_1);
495 rkisp1_iowrite32(params_vdev, arg->coeff2, CIF_ISP_CT_COEFF_2);
496 rkisp1_iowrite32(params_vdev, arg->coeff3, CIF_ISP_CT_COEFF_3);
497 rkisp1_iowrite32(params_vdev, arg->coeff4, CIF_ISP_CT_COEFF_4);
498 rkisp1_iowrite32(params_vdev, arg->coeff5, CIF_ISP_CT_COEFF_5);
499 rkisp1_iowrite32(params_vdev, arg->coeff6, CIF_ISP_CT_COEFF_6);
500 rkisp1_iowrite32(params_vdev, arg->coeff7, CIF_ISP_CT_COEFF_7);
501 rkisp1_iowrite32(params_vdev, arg->coeff8, CIF_ISP_CT_COEFF_8);
502 rkisp1_iowrite32(params_vdev, arg->ct_offset_r, CIF_ISP_CT_OFFSET_R);
503 rkisp1_iowrite32(params_vdev, arg->ct_offset_g, CIF_ISP_CT_OFFSET_G);
504 rkisp1_iowrite32(params_vdev, arg->ct_offset_b, CIF_ISP_CT_OFFSET_B);
505 }
506
isp_ctk_enable(struct rkisp_isp_params_vdev * params_vdev,bool en)507 static void isp_ctk_enable(struct rkisp_isp_params_vdev *params_vdev, bool en)
508 {
509 if (en)
510 return;
511
512 /* Write back the default values. */
513 rkisp1_iowrite32(params_vdev, 0x80, CIF_ISP_CT_COEFF_0);
514 rkisp1_iowrite32(params_vdev, 0, CIF_ISP_CT_COEFF_1);
515 rkisp1_iowrite32(params_vdev, 0, CIF_ISP_CT_COEFF_2);
516 rkisp1_iowrite32(params_vdev, 0, CIF_ISP_CT_COEFF_3);
517 rkisp1_iowrite32(params_vdev, 0x80, CIF_ISP_CT_COEFF_4);
518 rkisp1_iowrite32(params_vdev, 0, CIF_ISP_CT_COEFF_5);
519 rkisp1_iowrite32(params_vdev, 0, CIF_ISP_CT_COEFF_6);
520 rkisp1_iowrite32(params_vdev, 0, CIF_ISP_CT_COEFF_7);
521 rkisp1_iowrite32(params_vdev, 0x80, CIF_ISP_CT_COEFF_8);
522
523 rkisp1_iowrite32(params_vdev, 0, CIF_ISP_CT_OFFSET_R);
524 rkisp1_iowrite32(params_vdev, 0, CIF_ISP_CT_OFFSET_G);
525 rkisp1_iowrite32(params_vdev, 0, CIF_ISP_CT_OFFSET_B);
526 }
527
528 /* ISP White Balance Mode */
isp_awb_meas_config_v10(struct rkisp_isp_params_vdev * params_vdev,const struct cifisp_awb_meas_config * arg)529 static void isp_awb_meas_config_v10(struct rkisp_isp_params_vdev *params_vdev,
530 const struct cifisp_awb_meas_config *arg)
531 {
532 u32 reg_val = 0;
533 /* based on the mode,configure the awb module */
534 if (arg->awb_mode == CIFISP_AWB_MODE_YCBCR) {
535 /* Reference Cb and Cr */
536 rkisp1_iowrite32(params_vdev,
537 CIF_ISP_AWB_REF_CR_SET(arg->awb_ref_cr) |
538 arg->awb_ref_cb, CIF_ISP_AWB_REF_V10);
539 /* Yc Threshold */
540 rkisp1_iowrite32(params_vdev,
541 CIF_ISP_AWB_MAX_Y_SET(arg->max_y) |
542 CIF_ISP_AWB_MIN_Y_SET(arg->min_y) |
543 CIF_ISP_AWB_MAX_CS_SET(arg->max_csum) |
544 arg->min_c, CIF_ISP_AWB_THRESH_V10);
545 }
546
547 reg_val = rkisp1_ioread32(params_vdev, CIF_ISP_AWB_PROP_V10);
548 if (arg->enable_ymax_cmp)
549 reg_val |= CIF_ISP_AWB_YMAX_CMP_EN;
550 else
551 reg_val &= ~CIF_ISP_AWB_YMAX_CMP_EN;
552 rkisp1_iowrite32(params_vdev, reg_val, CIF_ISP_AWB_PROP_V10);
553
554 /* window offset */
555 rkisp1_iowrite32(params_vdev,
556 arg->awb_wnd.v_offs, CIF_ISP_AWB_WND_V_OFFS_V10);
557 rkisp1_iowrite32(params_vdev,
558 arg->awb_wnd.h_offs, CIF_ISP_AWB_WND_H_OFFS_V10);
559 /* AWB window size */
560 rkisp1_iowrite32(params_vdev,
561 arg->awb_wnd.v_size, CIF_ISP_AWB_WND_V_SIZE_V10);
562 rkisp1_iowrite32(params_vdev,
563 arg->awb_wnd.h_size, CIF_ISP_AWB_WND_H_SIZE_V10);
564 /* Number of frames */
565 rkisp1_iowrite32(params_vdev,
566 arg->frames, CIF_ISP_AWB_FRAMES_V10);
567 }
568
isp_awb_meas_config_v12(struct rkisp_isp_params_vdev * params_vdev,const struct cifisp_awb_meas_config * arg)569 static void isp_awb_meas_config_v12(struct rkisp_isp_params_vdev *params_vdev,
570 const struct cifisp_awb_meas_config *arg)
571 {
572 u32 reg_val = 0;
573 /* based on the mode,configure the awb module */
574 if (arg->awb_mode == CIFISP_AWB_MODE_YCBCR) {
575 /* Reference Cb and Cr */
576 rkisp1_iowrite32(params_vdev,
577 CIF_ISP_AWB_REF_CR_SET(arg->awb_ref_cr) |
578 arg->awb_ref_cb, CIF_ISP_AWB_REF_V12);
579 /* Yc Threshold */
580 rkisp1_iowrite32(params_vdev,
581 CIF_ISP_AWB_MAX_Y_SET(arg->max_y) |
582 CIF_ISP_AWB_MIN_Y_SET(arg->min_y) |
583 CIF_ISP_AWB_MAX_CS_SET(arg->max_csum) |
584 arg->min_c, CIF_ISP_AWB_THRESH_V12);
585 }
586
587 reg_val = rkisp1_ioread32(params_vdev, CIF_ISP_AWB_PROP_V12);
588 if (arg->enable_ymax_cmp)
589 reg_val |= CIF_ISP_AWB_YMAX_CMP_EN;
590 else
591 reg_val &= ~CIF_ISP_AWB_YMAX_CMP_EN;
592 reg_val &= ~CIF_ISP_AWB_SET_FRAMES_MASK_V12;
593 reg_val |= CIF_ISP_AWB_SET_FRAMES_V12(arg->frames);
594 rkisp1_iowrite32(params_vdev, reg_val, CIF_ISP_AWB_PROP_V12);
595
596 /* window offset */
597 rkisp1_iowrite32(params_vdev,
598 arg->awb_wnd.v_offs << 16 |
599 arg->awb_wnd.h_offs,
600 CIF_ISP_AWB_OFFS_V12);
601 /* AWB window size */
602 rkisp1_iowrite32(params_vdev,
603 arg->awb_wnd.v_size << 16 |
604 arg->awb_wnd.h_size,
605 CIF_ISP_AWB_SIZE_V12);
606 }
607
isp_awb_meas_enable_v10(struct rkisp_isp_params_vdev * params_vdev,const struct cifisp_awb_meas_config * arg,bool en)608 static void isp_awb_meas_enable_v10(struct rkisp_isp_params_vdev *params_vdev,
609 const struct cifisp_awb_meas_config *arg, bool en)
610 {
611 u32 reg_val = rkisp1_ioread32(params_vdev, CIF_ISP_AWB_PROP_V10);
612
613 /* switch off */
614 reg_val &= CIF_ISP_AWB_MODE_MASK_NONE;
615
616 if (en) {
617 if (arg->awb_mode == CIFISP_AWB_MODE_RGB)
618 reg_val |= CIF_ISP_AWB_MODE_RGB_EN;
619 else
620 reg_val |= CIF_ISP_AWB_MODE_YCBCR_EN;
621
622 rkisp1_iowrite32(params_vdev, reg_val, CIF_ISP_AWB_PROP_V10);
623
624 /* Measurements require AWB block be active. */
625 /* TODO: need to enable here ? awb_gain_enable has done this */
626 isp_param_set_bits(params_vdev, CIF_ISP_CTRL,
627 CIF_ISP_CTRL_ISP_AWB_ENA);
628 } else {
629 rkisp1_iowrite32(params_vdev,
630 reg_val, CIF_ISP_AWB_PROP_V10);
631 isp_param_clear_bits(params_vdev, CIF_ISP_CTRL,
632 CIF_ISP_CTRL_ISP_AWB_ENA);
633 }
634 }
635
isp_awb_meas_enable_v12(struct rkisp_isp_params_vdev * params_vdev,const struct cifisp_awb_meas_config * arg,bool en)636 static void isp_awb_meas_enable_v12(struct rkisp_isp_params_vdev *params_vdev,
637 const struct cifisp_awb_meas_config *arg, bool en)
638 {
639 u32 reg_val = rkisp1_ioread32(params_vdev, CIF_ISP_AWB_PROP_V12);
640
641 /* switch off */
642 reg_val &= CIF_ISP_AWB_MODE_MASK_NONE;
643
644 if (en) {
645 if (arg->awb_mode == CIFISP_AWB_MODE_RGB)
646 reg_val |= CIF_ISP_AWB_MODE_RGB_EN;
647 else
648 reg_val |= CIF_ISP_AWB_MODE_YCBCR_EN;
649
650 rkisp1_iowrite32(params_vdev, reg_val, CIF_ISP_AWB_PROP_V12);
651
652 /* Measurements require AWB block be active. */
653 /* TODO: need to enable here ? awb_gain_enable has done this */
654 isp_param_set_bits(params_vdev, CIF_ISP_CTRL,
655 CIF_ISP_CTRL_ISP_AWB_ENA);
656 } else {
657 rkisp1_iowrite32(params_vdev,
658 reg_val, CIF_ISP_AWB_PROP_V12);
659 isp_param_clear_bits(params_vdev, CIF_ISP_CTRL,
660 CIF_ISP_CTRL_ISP_AWB_ENA);
661 }
662 }
663
isp_awb_gain_config_v10(struct rkisp_isp_params_vdev * params_vdev,const struct cifisp_awb_gain_config * arg)664 static void isp_awb_gain_config_v10(struct rkisp_isp_params_vdev *params_vdev,
665 const struct cifisp_awb_gain_config *arg)
666 {
667 rkisp1_iowrite32(params_vdev,
668 CIF_ISP_AWB_GAIN_R_SET(arg->gain_green_r) |
669 arg->gain_green_b, CIF_ISP_AWB_GAIN_G_V10);
670
671 rkisp1_iowrite32(params_vdev, CIF_ISP_AWB_GAIN_R_SET(arg->gain_red) |
672 arg->gain_blue, CIF_ISP_AWB_GAIN_RB_V10);
673 }
674
isp_awb_gain_config_v12(struct rkisp_isp_params_vdev * params_vdev,const struct cifisp_awb_gain_config * arg)675 static void isp_awb_gain_config_v12(struct rkisp_isp_params_vdev *params_vdev,
676 const struct cifisp_awb_gain_config *arg)
677 {
678 rkisp1_iowrite32(params_vdev,
679 CIF_ISP_AWB_GAIN_R_SET(arg->gain_green_r) |
680 arg->gain_green_b, CIF_ISP_AWB_GAIN_G_V12);
681
682 rkisp1_iowrite32(params_vdev, CIF_ISP_AWB_GAIN_R_SET(arg->gain_red) |
683 arg->gain_blue, CIF_ISP_AWB_GAIN_RB_V12);
684 }
685
isp_aec_config_v10(struct rkisp_isp_params_vdev * params_vdev,const struct cifisp_aec_config * arg)686 static void isp_aec_config_v10(struct rkisp_isp_params_vdev *params_vdev,
687 const struct cifisp_aec_config *arg)
688 {
689 unsigned int block_hsize, block_vsize;
690 u32 exp_ctrl;
691
692 /* avoid to override the old enable value */
693 exp_ctrl = rkisp1_ioread32(params_vdev, CIF_ISP_EXP_CTRL);
694 exp_ctrl &= CIF_ISP_EXP_ENA;
695 if (arg->autostop)
696 exp_ctrl |= CIF_ISP_EXP_CTRL_AUTOSTOP;
697 if (arg->mode == CIFISP_EXP_MEASURING_MODE_1)
698 exp_ctrl |= CIF_ISP_EXP_CTRL_MEASMODE_1;
699 rkisp1_iowrite32(params_vdev, exp_ctrl, CIF_ISP_EXP_CTRL);
700
701 rkisp1_iowrite32(params_vdev,
702 arg->meas_window.h_offs, CIF_ISP_EXP_H_OFFSET_V10);
703 rkisp1_iowrite32(params_vdev,
704 arg->meas_window.v_offs, CIF_ISP_EXP_V_OFFSET_V10);
705
706 block_hsize = arg->meas_window.h_size / CIF_ISP_EXP_COLUMN_NUM_V10 - 1;
707 block_vsize = arg->meas_window.v_size / CIF_ISP_EXP_ROW_NUM_V10 - 1;
708
709 rkisp1_iowrite32(params_vdev, CIF_ISP_EXP_H_SIZE_SET_V10(block_hsize),
710 CIF_ISP_EXP_H_SIZE_V10);
711 rkisp1_iowrite32(params_vdev, CIF_ISP_EXP_V_SIZE_SET_V10(block_vsize),
712 CIF_ISP_EXP_V_SIZE_V10);
713 }
714
isp_aec_config_v12(struct rkisp_isp_params_vdev * params_vdev,const struct cifisp_aec_config * arg)715 static void isp_aec_config_v12(struct rkisp_isp_params_vdev *params_vdev,
716 const struct cifisp_aec_config *arg)
717 {
718 u32 exp_ctrl;
719 u32 block_hsize, block_vsize;
720 u32 wnd_num_idx = 1;
721 const u32 ae_wnd_num[] = {
722 5, 9, 15, 15
723 };
724
725 /* avoid to override the old enable value */
726 exp_ctrl = rkisp1_ioread32(params_vdev, CIF_ISP_EXP_CTRL);
727 exp_ctrl &= CIF_ISP_EXP_ENA;
728 if (arg->autostop)
729 exp_ctrl |= CIF_ISP_EXP_CTRL_AUTOSTOP;
730 if (arg->mode == CIFISP_EXP_MEASURING_MODE_1)
731 exp_ctrl |= CIF_ISP_EXP_CTRL_MEASMODE_1;
732 exp_ctrl |= CIF_ISP_EXP_CTRL_WNDNUM_SET_V12(wnd_num_idx);
733 rkisp1_iowrite32(params_vdev, exp_ctrl, CIF_ISP_EXP_CTRL);
734
735 rkisp1_iowrite32(params_vdev,
736 CIF_ISP_EXP_V_OFFSET_SET_V12(arg->meas_window.v_offs) |
737 CIF_ISP_EXP_H_OFFSET_SET_V12(arg->meas_window.h_offs),
738 CIF_ISP_EXP_OFFS_V12);
739
740 block_hsize = arg->meas_window.h_size / ae_wnd_num[wnd_num_idx] - 1;
741 block_vsize = arg->meas_window.v_size / ae_wnd_num[wnd_num_idx] - 1;
742
743 rkisp1_iowrite32(params_vdev,
744 CIF_ISP_EXP_V_SIZE_SET_V12(block_vsize) |
745 CIF_ISP_EXP_H_SIZE_SET_V12(block_hsize),
746 CIF_ISP_EXP_SIZE_V12);
747 }
748
isp_cproc_config(struct rkisp_isp_params_vdev * params_vdev,const struct cifisp_cproc_config * arg)749 static void isp_cproc_config(struct rkisp_isp_params_vdev *params_vdev,
750 const struct cifisp_cproc_config *arg)
751 {
752 u32 quantization = params_vdev->quantization;
753
754 rkisp1_iowrite32(params_vdev, arg->contrast, CIF_C_PROC_CONTRAST);
755 rkisp1_iowrite32(params_vdev, arg->hue, CIF_C_PROC_HUE);
756 rkisp1_iowrite32(params_vdev, arg->sat, CIF_C_PROC_SATURATION);
757 rkisp1_iowrite32(params_vdev, arg->brightness, CIF_C_PROC_BRIGHTNESS);
758
759 if (quantization != V4L2_QUANTIZATION_FULL_RANGE) {
760 isp_param_clear_bits(params_vdev, CIF_C_PROC_CTRL,
761 CIF_C_PROC_YOUT_FULL |
762 CIF_C_PROC_YIN_FULL |
763 CIF_C_PROC_COUT_FULL);
764 } else {
765 isp_param_set_bits(params_vdev, CIF_C_PROC_CTRL,
766 CIF_C_PROC_YOUT_FULL |
767 CIF_C_PROC_YIN_FULL |
768 CIF_C_PROC_COUT_FULL);
769 }
770 }
771
isp_hst_config_v10(struct rkisp_isp_params_vdev * params_vdev,const struct cifisp_hst_config * arg)772 static void isp_hst_config_v10(struct rkisp_isp_params_vdev *params_vdev,
773 const struct cifisp_hst_config *arg)
774 {
775 unsigned int block_hsize, block_vsize;
776 const u32 hist_weight_regs[] = {
777 CIF_ISP_HIST_WEIGHT_00TO30_V10, CIF_ISP_HIST_WEIGHT_40TO21_V10,
778 CIF_ISP_HIST_WEIGHT_31TO12_V10, CIF_ISP_HIST_WEIGHT_22TO03_V10,
779 CIF_ISP_HIST_WEIGHT_13TO43_V10, CIF_ISP_HIST_WEIGHT_04TO34_V10,
780 CIF_ISP_HIST_WEIGHT_44_V10,
781 };
782 int i;
783 const u8 *weight;
784 u32 hist_prop;
785
786 /* avoid to override the old enable value */
787 hist_prop = rkisp1_ioread32(params_vdev, CIF_ISP_HIST_PROP_V10);
788 hist_prop &= CIF_ISP_HIST_PROP_MODE_MASK_V10;
789 hist_prop |= CIF_ISP_HIST_PREDIV_SET_V10(arg->histogram_predivider);
790 rkisp1_iowrite32(params_vdev, hist_prop, CIF_ISP_HIST_PROP_V10);
791 rkisp1_iowrite32(params_vdev,
792 arg->meas_window.h_offs,
793 CIF_ISP_HIST_H_OFFS_V10);
794 rkisp1_iowrite32(params_vdev,
795 arg->meas_window.v_offs,
796 CIF_ISP_HIST_V_OFFS_V10);
797
798 block_hsize = arg->meas_window.h_size / CIF_ISP_HIST_COLUMN_NUM_V10 - 1;
799 block_vsize = arg->meas_window.v_size / CIF_ISP_HIST_ROW_NUM_V10 - 1;
800
801 rkisp1_iowrite32(params_vdev, block_hsize, CIF_ISP_HIST_H_SIZE_V10);
802 rkisp1_iowrite32(params_vdev, block_vsize, CIF_ISP_HIST_V_SIZE_V10);
803
804 weight = arg->hist_weight;
805 for (i = 0; i < ARRAY_SIZE(hist_weight_regs); ++i, weight += 4)
806 rkisp1_iowrite32(params_vdev, CIF_ISP_HIST_WEIGHT_SET_V10(
807 weight[0], weight[1], weight[2], weight[3]),
808 hist_weight_regs[i]);
809 }
810
isp_hst_config_v12(struct rkisp_isp_params_vdev * params_vdev,const struct cifisp_hst_config * arg)811 static void isp_hst_config_v12(struct rkisp_isp_params_vdev *params_vdev,
812 const struct cifisp_hst_config *arg)
813 {
814 u32 i, j;
815 u32 value;
816 u32 hist_ctrl;
817 u32 block_hsize, block_vsize;
818 u32 wnd_num_idx, hist_weight_num;
819 u8 weight15x15[CIF_ISP_HIST_WEIGHT_REG_SIZE_V12];
820 const u32 hist_wnd_num[] = {
821 5, 9, 15, 15
822 };
823
824 /* now we just support 9x9 window */
825 wnd_num_idx = 1;
826 memset(weight15x15, 0x00, sizeof(weight15x15));
827 /* avoid to override the old enable value */
828 hist_ctrl = rkisp1_ioread32(params_vdev, CIF_ISP_HIST_CTRL_V12);
829 hist_ctrl &= CIF_ISP_HIST_CTRL_MODE_MASK_V12 |
830 CIF_ISP_HIST_CTRL_EN_MASK_V12;
831 hist_ctrl = hist_ctrl |
832 CIF_ISP_HIST_CTRL_INTRSEL_SET_V12(1) |
833 CIF_ISP_HIST_CTRL_DATASEL_SET_V12(0) |
834 CIF_ISP_HIST_CTRL_WATERLINE_SET_V12(0) |
835 CIF_ISP_HIST_CTRL_AUTOSTOP_SET_V12(0) |
836 CIF_ISP_HIST_CTRL_WNDNUM_SET_V12(1) |
837 CIF_ISP_HIST_CTRL_STEPSIZE_SET_V12(arg->histogram_predivider);
838 rkisp1_iowrite32(params_vdev, hist_ctrl, CIF_ISP_HIST_CTRL_V12);
839
840 rkisp1_iowrite32(params_vdev,
841 CIF_ISP_HIST_OFFS_SET_V12(arg->meas_window.h_offs,
842 arg->meas_window.v_offs),
843 CIF_ISP_HIST_OFFS_V12);
844
845 block_hsize = arg->meas_window.h_size / hist_wnd_num[wnd_num_idx] - 1;
846 block_vsize = arg->meas_window.v_size / hist_wnd_num[wnd_num_idx] - 1;
847 rkisp1_iowrite32(params_vdev,
848 CIF_ISP_HIST_SIZE_SET_V12(block_hsize, block_vsize),
849 CIF_ISP_HIST_SIZE_V12);
850
851 for (i = 0; i < hist_wnd_num[wnd_num_idx]; i++) {
852 for (j = 0; j < hist_wnd_num[wnd_num_idx]; j++) {
853 weight15x15[i * CIF_ISP_HIST_ROW_NUM_V12 + j] =
854 arg->hist_weight[i * hist_wnd_num[wnd_num_idx] + j];
855 }
856 }
857
858 hist_weight_num = CIF_ISP_HIST_WEIGHT_REG_SIZE_V12;
859 for (i = 0; i < (hist_weight_num / 4); i++) {
860 value = CIF_ISP_HIST_WEIGHT_SET_V12(
861 weight15x15[4 * i + 0],
862 weight15x15[4 * i + 1],
863 weight15x15[4 * i + 2],
864 weight15x15[4 * i + 3]);
865 rkisp1_iowrite32(params_vdev, value,
866 CIF_ISP_HIST_WEIGHT_V12 + 4 * i);
867 }
868 value = CIF_ISP_HIST_WEIGHT_SET_V12(
869 weight15x15[4 * i + 0], 0, 0, 0);
870 rkisp1_iowrite32(params_vdev, value,
871 CIF_ISP_HIST_WEIGHT_V12 + 4 * i);
872 }
873
isp_hst_enable_v10(struct rkisp_isp_params_vdev * params_vdev,const struct cifisp_hst_config * arg,bool en)874 static void isp_hst_enable_v10(struct rkisp_isp_params_vdev *params_vdev,
875 const struct cifisp_hst_config *arg, bool en)
876 {
877 if (en) {
878 u32 hist_prop = rkisp1_ioread32(params_vdev, CIF_ISP_HIST_PROP_V10);
879
880 hist_prop &= ~CIF_ISP_HIST_PROP_MODE_MASK_V10;
881 hist_prop |= arg->mode;
882 isp_param_set_bits(params_vdev, CIF_ISP_HIST_PROP_V10, hist_prop);
883 } else {
884 isp_param_clear_bits(params_vdev, CIF_ISP_HIST_PROP_V10,
885 CIF_ISP_HIST_PROP_MODE_MASK_V10);
886 }
887 }
888
isp_hst_enable_v12(struct rkisp_isp_params_vdev * params_vdev,const struct cifisp_hst_config * arg,bool en)889 static void isp_hst_enable_v12(struct rkisp_isp_params_vdev *params_vdev,
890 const struct cifisp_hst_config *arg, bool en)
891 {
892 if (en) {
893 u32 hist_ctrl = rkisp1_ioread32(params_vdev, CIF_ISP_HIST_CTRL_V12);
894
895 hist_ctrl &= ~CIF_ISP_HIST_CTRL_MODE_MASK_V12;
896 hist_ctrl |= CIF_ISP_HIST_CTRL_MODE_SET_V12(arg->mode);
897 hist_ctrl |= CIF_ISP_HIST_CTRL_EN_SET_V12(1);
898 isp_param_set_bits(params_vdev, CIF_ISP_HIST_CTRL_V12, hist_ctrl);
899 } else {
900 isp_param_clear_bits(params_vdev, CIF_ISP_HIST_CTRL_V12,
901 CIF_ISP_HIST_CTRL_MODE_MASK_V12 |
902 CIF_ISP_HIST_CTRL_EN_MASK_V12);
903 }
904 }
905
isp_afm_config_v10(struct rkisp_isp_params_vdev * params_vdev,const struct cifisp_afc_config * arg)906 static void isp_afm_config_v10(struct rkisp_isp_params_vdev *params_vdev,
907 const struct cifisp_afc_config *arg)
908 {
909 int i;
910 size_t num_of_win = min_t(size_t, ARRAY_SIZE(arg->afm_win),
911 arg->num_afm_win);
912 u32 afm_ctrl = rkisp1_ioread32(params_vdev, CIF_ISP_AFM_CTRL);
913
914 /* Switch off to configure. */
915 isp_param_clear_bits(params_vdev, CIF_ISP_AFM_CTRL, CIF_ISP_AFM_ENA);
916
917 for (i = 0; i < num_of_win; i++) {
918 rkisp1_iowrite32(params_vdev,
919 CIF_ISP_AFM_WINDOW_X(arg->afm_win[i].h_offs) |
920 CIF_ISP_AFM_WINDOW_Y(arg->afm_win[i].v_offs),
921 CIF_ISP_AFM_LT_A + i * 8);
922 rkisp1_iowrite32(params_vdev,
923 CIF_ISP_AFM_WINDOW_X(arg->afm_win[i].h_size +
924 arg->afm_win[i].h_offs) |
925 CIF_ISP_AFM_WINDOW_Y(arg->afm_win[i].v_size +
926 arg->afm_win[i].v_offs),
927 CIF_ISP_AFM_RB_A + i * 8);
928 }
929 rkisp1_iowrite32(params_vdev, arg->thres, CIF_ISP_AFM_THRES);
930 rkisp1_iowrite32(params_vdev, arg->var_shift, CIF_ISP_AFM_VAR_SHIFT);
931 /* restore afm status */
932 rkisp1_iowrite32(params_vdev, afm_ctrl, CIF_ISP_AFM_CTRL);
933 }
934
isp_afm_config_v12(struct rkisp_isp_params_vdev * params_vdev,const struct cifisp_afc_config * arg)935 static void isp_afm_config_v12(struct rkisp_isp_params_vdev *params_vdev,
936 const struct cifisp_afc_config *arg)
937 {
938 unsigned int i;
939 u32 lum_var_shift, afm_var_shift;
940 size_t num_of_win = min_t(size_t, ARRAY_SIZE(arg->afm_win),
941 arg->num_afm_win);
942 u32 afm_ctrl = rkisp1_ioread32(params_vdev, CIF_ISP_AFM_CTRL);
943
944 /* Switch off to configure. */
945 isp_param_clear_bits(params_vdev, CIF_ISP_AFM_CTRL, CIF_ISP_AFM_ENA);
946
947 for (i = 0; i < num_of_win; i++) {
948 rkisp1_iowrite32(params_vdev,
949 CIF_ISP_AFM_WINDOW_X(arg->afm_win[i].h_offs) |
950 CIF_ISP_AFM_WINDOW_Y(arg->afm_win[i].v_offs),
951 CIF_ISP_AFM_LT_A + i * 8);
952 rkisp1_iowrite32(params_vdev,
953 CIF_ISP_AFM_WINDOW_X(arg->afm_win[i].h_size +
954 arg->afm_win[i].h_offs) |
955 CIF_ISP_AFM_WINDOW_Y(arg->afm_win[i].v_size +
956 arg->afm_win[i].v_offs),
957 CIF_ISP_AFM_RB_A + i * 8);
958 }
959 rkisp1_iowrite32(params_vdev, arg->thres, CIF_ISP_AFM_THRES);
960
961 lum_var_shift = CIF_ISP_AFM_GET_LUM_SHIFT_a_V12(arg->var_shift);
962 afm_var_shift = CIF_ISP_AFM_GET_AFM_SHIFT_a_V12(arg->var_shift);
963 rkisp1_iowrite32(params_vdev,
964 CIF_ISP_AFM_SET_SHIFT_a_V12(lum_var_shift, afm_var_shift) |
965 CIF_ISP_AFM_SET_SHIFT_b_V12(lum_var_shift, afm_var_shift) |
966 CIF_ISP_AFM_SET_SHIFT_c_V12(lum_var_shift, afm_var_shift),
967 CIF_ISP_AFM_VAR_SHIFT);
968
969 /* restore afm status */
970 rkisp1_iowrite32(params_vdev, afm_ctrl, CIF_ISP_AFM_CTRL);
971 }
972
isp_ie_config(struct rkisp_isp_params_vdev * params_vdev,const struct cifisp_ie_config * arg)973 static void isp_ie_config(struct rkisp_isp_params_vdev *params_vdev,
974 const struct cifisp_ie_config *arg)
975 {
976 u32 eff_ctrl;
977
978 eff_ctrl = rkisp1_ioread32(params_vdev, CIF_IMG_EFF_CTRL);
979 eff_ctrl &= ~CIF_IMG_EFF_CTRL_MODE_MASK;
980
981 if (params_vdev->quantization == V4L2_QUANTIZATION_FULL_RANGE)
982 eff_ctrl |= CIF_IMG_EFF_CTRL_YCBCR_FULL;
983
984 switch (arg->effect) {
985 case V4L2_COLORFX_SEPIA:
986 eff_ctrl |= CIF_IMG_EFF_CTRL_MODE_SEPIA;
987 break;
988 case V4L2_COLORFX_SET_CBCR:
989 rkisp1_iowrite32(params_vdev, arg->eff_tint, CIF_IMG_EFF_TINT);
990 eff_ctrl |= CIF_IMG_EFF_CTRL_MODE_SEPIA;
991 break;
992 /*
993 * Color selection is similar to water color(AQUA):
994 * grayscale + selected color w threshold
995 */
996 case V4L2_COLORFX_AQUA:
997 eff_ctrl |= CIF_IMG_EFF_CTRL_MODE_COLOR_SEL;
998 rkisp1_iowrite32(params_vdev, arg->color_sel,
999 CIF_IMG_EFF_COLOR_SEL);
1000 break;
1001 case V4L2_COLORFX_EMBOSS:
1002 eff_ctrl |= CIF_IMG_EFF_CTRL_MODE_EMBOSS;
1003 rkisp1_iowrite32(params_vdev, arg->eff_mat_1,
1004 CIF_IMG_EFF_MAT_1);
1005 rkisp1_iowrite32(params_vdev, arg->eff_mat_2,
1006 CIF_IMG_EFF_MAT_2);
1007 rkisp1_iowrite32(params_vdev, arg->eff_mat_3,
1008 CIF_IMG_EFF_MAT_3);
1009 break;
1010 case V4L2_COLORFX_SKETCH:
1011 eff_ctrl |= CIF_IMG_EFF_CTRL_MODE_SKETCH;
1012 rkisp1_iowrite32(params_vdev, arg->eff_mat_3,
1013 CIF_IMG_EFF_MAT_3);
1014 rkisp1_iowrite32(params_vdev, arg->eff_mat_4,
1015 CIF_IMG_EFF_MAT_4);
1016 rkisp1_iowrite32(params_vdev, arg->eff_mat_5,
1017 CIF_IMG_EFF_MAT_5);
1018 break;
1019 case V4L2_COLORFX_BW:
1020 eff_ctrl |= CIF_IMG_EFF_CTRL_MODE_BLACKWHITE;
1021 break;
1022 case V4L2_COLORFX_NEGATIVE:
1023 eff_ctrl |= CIF_IMG_EFF_CTRL_MODE_NEGATIVE;
1024 break;
1025 default:
1026 break;
1027 }
1028
1029 rkisp1_iowrite32(params_vdev, eff_ctrl, CIF_IMG_EFF_CTRL);
1030 }
1031
isp_ie_enable(struct rkisp_isp_params_vdev * params_vdev,bool en)1032 static void isp_ie_enable(struct rkisp_isp_params_vdev *params_vdev, bool en)
1033 {
1034 if (en) {
1035 isp_param_set_bits(params_vdev, CIF_ICCL, CIF_ICCL_IE_CLK);
1036 isp_param_set_bits(params_vdev, CIF_IMG_EFF_CTRL,
1037 CIF_IMG_EFF_CTRL_ENABLE);
1038 isp_param_set_bits(params_vdev, CIF_IMG_EFF_CTRL,
1039 CIF_IMG_EFF_CTRL_CFG_UPD);
1040 } else {
1041 isp_param_clear_bits(params_vdev, CIF_IMG_EFF_CTRL,
1042 CIF_IMG_EFF_CTRL_ENABLE);
1043 isp_param_clear_bits(params_vdev, CIF_ICCL, CIF_ICCL_IE_CLK);
1044 }
1045 }
1046
isp_csm_config(struct rkisp_isp_params_vdev * params_vdev,bool full_range)1047 static void isp_csm_config(struct rkisp_isp_params_vdev *params_vdev,
1048 bool full_range)
1049 {
1050 const u16 full_range_coeff[] = {
1051 0x0026, 0x004b, 0x000f,
1052 0x01ea, 0x01d6, 0x0040,
1053 0x0040, 0x01ca, 0x01f6
1054 };
1055 const u16 limited_range_coeff[] = {
1056 0x0021, 0x0040, 0x000d,
1057 0x01ed, 0x01db, 0x0038,
1058 0x0038, 0x01d1, 0x01f7,
1059 };
1060 unsigned int i;
1061
1062 if (full_range) {
1063 for (i = 0; i < ARRAY_SIZE(full_range_coeff); i++)
1064 rkisp1_iowrite32(params_vdev, full_range_coeff[i],
1065 CIF_ISP_CC_COEFF_0 + i * 4);
1066
1067 isp_param_set_bits(params_vdev, CIF_ISP_CTRL,
1068 CIF_ISP_CTRL_ISP_CSM_Y_FULL_ENA |
1069 CIF_ISP_CTRL_ISP_CSM_C_FULL_ENA);
1070 } else {
1071 for (i = 0; i < ARRAY_SIZE(limited_range_coeff); i++)
1072 rkisp1_iowrite32(params_vdev, limited_range_coeff[i],
1073 CIF_ISP_CC_COEFF_0 + i * 4);
1074
1075 isp_param_clear_bits(params_vdev, CIF_ISP_CTRL,
1076 CIF_ISP_CTRL_ISP_CSM_Y_FULL_ENA |
1077 CIF_ISP_CTRL_ISP_CSM_C_FULL_ENA);
1078 }
1079 }
1080
1081 /* ISP De-noise Pre-Filter(DPF) function */
isp_dpf_config(struct rkisp_isp_params_vdev * params_vdev,const struct cifisp_dpf_config * arg)1082 static void isp_dpf_config(struct rkisp_isp_params_vdev *params_vdev,
1083 const struct cifisp_dpf_config *arg)
1084 {
1085 unsigned int isp_dpf_mode;
1086 unsigned int spatial_coeff;
1087 unsigned int i;
1088
1089 switch (arg->gain.mode) {
1090 case CIFISP_DPF_GAIN_USAGE_NF_GAINS:
1091 isp_dpf_mode = CIF_ISP_DPF_MODE_USE_NF_GAIN |
1092 CIF_ISP_DPF_MODE_AWB_GAIN_COMP;
1093 break;
1094 case CIFISP_DPF_GAIN_USAGE_LSC_GAINS:
1095 isp_dpf_mode = CIF_ISP_DPF_MODE_LSC_GAIN_COMP;
1096 break;
1097 case CIFISP_DPF_GAIN_USAGE_NF_LSC_GAINS:
1098 isp_dpf_mode = CIF_ISP_DPF_MODE_USE_NF_GAIN |
1099 CIF_ISP_DPF_MODE_AWB_GAIN_COMP |
1100 CIF_ISP_DPF_MODE_LSC_GAIN_COMP;
1101 break;
1102 case CIFISP_DPF_GAIN_USAGE_AWB_GAINS:
1103 isp_dpf_mode = CIF_ISP_DPF_MODE_AWB_GAIN_COMP;
1104 break;
1105 case CIFISP_DPF_GAIN_USAGE_AWB_LSC_GAINS:
1106 isp_dpf_mode = CIF_ISP_DPF_MODE_LSC_GAIN_COMP |
1107 CIF_ISP_DPF_MODE_AWB_GAIN_COMP;
1108 break;
1109 case CIFISP_DPF_GAIN_USAGE_DISABLED:
1110 default:
1111 isp_dpf_mode = 0;
1112 break;
1113 }
1114
1115 if (arg->nll.scale_mode == CIFISP_NLL_SCALE_LOGARITHMIC)
1116 isp_dpf_mode |= CIF_ISP_DPF_MODE_NLL_SEGMENTATION;
1117 if (arg->rb_flt.fltsize == CIFISP_DPF_RB_FILTERSIZE_9x9)
1118 isp_dpf_mode |= CIF_ISP_DPF_MODE_RB_FLTSIZE_9x9;
1119 if (!arg->rb_flt.r_enable)
1120 isp_dpf_mode |= CIF_ISP_DPF_MODE_R_FLT_DIS;
1121 if (!arg->rb_flt.b_enable)
1122 isp_dpf_mode |= CIF_ISP_DPF_MODE_B_FLT_DIS;
1123 if (!arg->g_flt.gb_enable)
1124 isp_dpf_mode |= CIF_ISP_DPF_MODE_GB_FLT_DIS;
1125 if (!arg->g_flt.gr_enable)
1126 isp_dpf_mode |= CIF_ISP_DPF_MODE_GR_FLT_DIS;
1127
1128 isp_param_set_bits(params_vdev, CIF_ISP_DPF_MODE, isp_dpf_mode);
1129 rkisp1_iowrite32(params_vdev, arg->gain.nf_b_gain,
1130 CIF_ISP_DPF_NF_GAIN_B);
1131 rkisp1_iowrite32(params_vdev, arg->gain.nf_r_gain,
1132 CIF_ISP_DPF_NF_GAIN_R);
1133 rkisp1_iowrite32(params_vdev, arg->gain.nf_gb_gain,
1134 CIF_ISP_DPF_NF_GAIN_GB);
1135 rkisp1_iowrite32(params_vdev, arg->gain.nf_gr_gain,
1136 CIF_ISP_DPF_NF_GAIN_GR);
1137
1138 for (i = 0; i < CIFISP_DPF_MAX_NLF_COEFFS; i++) {
1139 rkisp1_iowrite32(params_vdev, arg->nll.coeff[i],
1140 CIF_ISP_DPF_NULL_COEFF_0 + i * 4);
1141 }
1142
1143 spatial_coeff = arg->g_flt.spatial_coeff[0] |
1144 (arg->g_flt.spatial_coeff[1] << 8) |
1145 (arg->g_flt.spatial_coeff[2] << 16) |
1146 (arg->g_flt.spatial_coeff[3] << 24);
1147 rkisp1_iowrite32(params_vdev, spatial_coeff,
1148 CIF_ISP_DPF_S_WEIGHT_G_1_4);
1149
1150 spatial_coeff = arg->g_flt.spatial_coeff[4] |
1151 (arg->g_flt.spatial_coeff[5] << 8);
1152 rkisp1_iowrite32(params_vdev, spatial_coeff,
1153 CIF_ISP_DPF_S_WEIGHT_G_5_6);
1154
1155 spatial_coeff = arg->rb_flt.spatial_coeff[0] |
1156 (arg->rb_flt.spatial_coeff[1] << 8) |
1157 (arg->rb_flt.spatial_coeff[2] << 16) |
1158 (arg->rb_flt.spatial_coeff[3] << 24);
1159 rkisp1_iowrite32(params_vdev, spatial_coeff,
1160 CIF_ISP_DPF_S_WEIGHT_RB_1_4);
1161
1162 spatial_coeff = arg->rb_flt.spatial_coeff[4] |
1163 (arg->rb_flt.spatial_coeff[5] << 8);
1164 rkisp1_iowrite32(params_vdev, spatial_coeff,
1165 CIF_ISP_DPF_S_WEIGHT_RB_5_6);
1166 }
1167
isp_dpf_strength_config(struct rkisp_isp_params_vdev * params_vdev,const struct cifisp_dpf_strength_config * arg)1168 static void isp_dpf_strength_config(struct rkisp_isp_params_vdev *params_vdev,
1169 const struct cifisp_dpf_strength_config *arg)
1170 {
1171 rkisp1_iowrite32(params_vdev, arg->b, CIF_ISP_DPF_STRENGTH_B);
1172 rkisp1_iowrite32(params_vdev, arg->g, CIF_ISP_DPF_STRENGTH_G);
1173 rkisp1_iowrite32(params_vdev, arg->r, CIF_ISP_DPF_STRENGTH_R);
1174 }
1175
isp_dummy_enable(struct rkisp_isp_params_vdev * params_vdev,bool en)1176 static void isp_dummy_enable(struct rkisp_isp_params_vdev *params_vdev,
1177 bool en)
1178 {
1179 }
1180
isp_wdr_config_v10(struct rkisp_isp_params_vdev * params_vdev,const struct cifisp_wdr_config * arg)1181 static void isp_wdr_config_v10(struct rkisp_isp_params_vdev *params_vdev,
1182 const struct cifisp_wdr_config *arg)
1183 {
1184 }
1185
isp_wdr_config_v12(struct rkisp_isp_params_vdev * params_vdev,const struct cifisp_wdr_config * arg)1186 static void isp_wdr_config_v12(struct rkisp_isp_params_vdev *params_vdev,
1187 const struct cifisp_wdr_config *arg)
1188 {
1189 int i;
1190
1191 for (i = 0; i < CIFISP_WDR_SIZE; i++) {
1192 if (i <= 39)
1193 rkisp1_iowrite32(params_vdev, arg->c_wdr[i],
1194 CIF_ISP_WDR_CTRL + i * 4);
1195 else
1196 rkisp1_iowrite32(params_vdev, arg->c_wdr[i],
1197 CIF_ISP_RKWDR_CTRL0 + (i - 40) * 4);
1198 }
1199 }
1200
isp_wdr_enable_v12(struct rkisp_isp_params_vdev * params_vdev,bool en)1201 static void isp_wdr_enable_v12(struct rkisp_isp_params_vdev *params_vdev,
1202 bool en)
1203 {
1204 if (en)
1205 rkisp1_iowrite32(params_vdev, 0x030cf1,
1206 CIF_ISP_RKWDR_CTRL0);
1207 else
1208 rkisp1_iowrite32(params_vdev, 0x030cf0,
1209 CIF_ISP_RKWDR_CTRL0);
1210 }
1211
1212 static void
isp_demosaiclp_config_v10(struct rkisp_isp_params_vdev * params_vdev,const struct cifisp_demosaiclp_config * arg)1213 isp_demosaiclp_config_v10(struct rkisp_isp_params_vdev *params_vdev,
1214 const struct cifisp_demosaiclp_config *arg)
1215 {
1216 }
1217
1218 static void
isp_demosaiclp_config_v12(struct rkisp_isp_params_vdev * params_vdev,const struct cifisp_demosaiclp_config * arg)1219 isp_demosaiclp_config_v12(struct rkisp_isp_params_vdev *params_vdev,
1220 const struct cifisp_demosaiclp_config *arg)
1221 {
1222 u32 val;
1223 u32 level_sel;
1224
1225 val = CIF_ISP_PACK_4BYTE(arg->lu_divided[0],
1226 arg->lu_divided[1],
1227 arg->lu_divided[2],
1228 arg->lu_divided[3]);
1229 rkisp1_iowrite32(params_vdev, val,
1230 CIF_ISP_FILT_LU_DIVID);
1231
1232 val = CIF_ISP_PACK_4BYTE(arg->thgrad_divided[0],
1233 arg->thgrad_divided[1],
1234 arg->thgrad_divided[2],
1235 arg->thgrad_divided[3]);
1236 rkisp1_iowrite32(params_vdev, val,
1237 CIF_ISP_FILT_THGRAD_DIVID0123);
1238 rkisp1_iowrite32(params_vdev,
1239 arg->thgrad_divided[4],
1240 CIF_ISP_FILT_THGRAD_DIVID4);
1241
1242 val = CIF_ISP_PACK_4BYTE(arg->thdiff_divided[0],
1243 arg->thdiff_divided[1],
1244 arg->thdiff_divided[2],
1245 arg->thdiff_divided[3]);
1246 rkisp1_iowrite32(params_vdev, val,
1247 CIF_ISP_FILT_THDIFF_DIVID0123);
1248 rkisp1_iowrite32(params_vdev,
1249 arg->thdiff_divided[4],
1250 CIF_ISP_FILT_THDIFF_DIVID4);
1251
1252 val = CIF_ISP_PACK_4BYTE(arg->thcsc_divided[0],
1253 arg->thcsc_divided[1],
1254 arg->thcsc_divided[2],
1255 arg->thcsc_divided[3]);
1256 rkisp1_iowrite32(params_vdev, val,
1257 CIF_ISP_FILT_THCSC_DIVID0123);
1258 rkisp1_iowrite32(params_vdev, arg->thcsc_divided[4],
1259 CIF_ISP_FILT_THCSC_DIVID4);
1260
1261 val = CIF_ISP_PACK_2SHORT(arg->thvar_divided[0],
1262 arg->thvar_divided[1]);
1263 rkisp1_iowrite32(params_vdev, val,
1264 CIF_ISP_FILT_THVAR_DIVID01);
1265
1266 val = CIF_ISP_PACK_2SHORT(arg->thvar_divided[2],
1267 arg->thvar_divided[3]);
1268 rkisp1_iowrite32(params_vdev, val,
1269 CIF_ISP_FILT_THVAR_DIVID23);
1270 rkisp1_iowrite32(params_vdev, arg->thvar_divided[4],
1271 CIF_ISP_FILT_THVAR_DIVID4);
1272
1273 rkisp1_iowrite32(params_vdev, arg->th_grad,
1274 CIF_ISP_FILT_TH_GRAD);
1275 rkisp1_iowrite32(params_vdev, arg->th_diff,
1276 CIF_ISP_FILT_TH_DIFF);
1277 rkisp1_iowrite32(params_vdev, arg->th_csc,
1278 CIF_ISP_FILT_TH_CSC);
1279 rkisp1_iowrite32(params_vdev, arg->th_var,
1280 CIF_ISP_FILT_TH_VAR);
1281
1282 val = CIF_ISP_PACK_4BYTE(arg->thvar_r_fct,
1283 arg->thdiff_r_fct,
1284 arg->thgrad_r_fct,
1285 0);
1286 rkisp1_iowrite32(params_vdev, val,
1287 CIF_ISP_FILT_R_FCT);
1288
1289 val = CIF_ISP_PACK_4BYTE(arg->thgrad_b_fct,
1290 arg->thdiff_b_fct,
1291 arg->thvar_b_fct,
1292 0);
1293 rkisp1_iowrite32(params_vdev, val,
1294 CIF_ISP_FILT_B_FCT);
1295
1296 isp_param_set_bits(params_vdev,
1297 CIF_ISP_FILT_MODE,
1298 arg->rb_filter_en << 3 |
1299 arg->hp_filter_en << 2);
1300
1301 level_sel = rkisp1_ioread32(params_vdev, CIF_ISP_FILT_LELEL_SEL);
1302 level_sel &= CIF_ISP_FLT_LEVEL_OLD_LP;
1303 level_sel |= arg->th_var_en << 20 |
1304 arg->th_csc_en << 19 |
1305 arg->th_diff_en << 18 |
1306 arg->th_grad_en << 17 |
1307 arg->similarity_th << 12 |
1308 arg->flat_level_sel << 8 |
1309 arg->pattern_level_sel << 4 |
1310 arg->edge_level_sel;
1311
1312 rkisp1_iowrite32(params_vdev, level_sel,
1313 CIF_ISP_FILT_LELEL_SEL);
1314 }
1315
1316 static void
isp_demosaiclp_enable_v12(struct rkisp_isp_params_vdev * params_vdev,bool en)1317 isp_demosaiclp_enable_v12(struct rkisp_isp_params_vdev *params_vdev,
1318 bool en)
1319 {
1320 if (en)
1321 isp_param_clear_bits(params_vdev,
1322 CIF_ISP_FILT_LELEL_SEL,
1323 CIF_ISP_FLT_LEVEL_OLD_LP);
1324 else
1325 isp_param_set_bits(params_vdev,
1326 CIF_ISP_FILT_LELEL_SEL,
1327 CIF_ISP_FLT_LEVEL_OLD_LP);
1328 }
1329
1330 static void
isp_rkiesharp_config_v10(struct rkisp_isp_params_vdev * params_vdev,const struct cifisp_rkiesharp_config * arg)1331 isp_rkiesharp_config_v10(struct rkisp_isp_params_vdev *params_vdev,
1332 const struct cifisp_rkiesharp_config *arg)
1333 {
1334 }
1335
1336 static void
isp_rkiesharp_config_v12(struct rkisp_isp_params_vdev * params_vdev,const struct cifisp_rkiesharp_config * arg)1337 isp_rkiesharp_config_v12(struct rkisp_isp_params_vdev *params_vdev,
1338 const struct cifisp_rkiesharp_config *arg)
1339 {
1340 u32 i;
1341 u32 val;
1342 u32 eff_ctrl;
1343 u32 minmax[5];
1344
1345 val = CIF_ISP_PACK_4BYTE(arg->yavg_thr[0],
1346 arg->yavg_thr[1],
1347 arg->yavg_thr[2],
1348 arg->yavg_thr[3]);
1349 rkisp1_iowrite32(params_vdev, val,
1350 CIF_RKSHARP_YAVG_THR);
1351
1352 val = CIF_ISP_PACK_4BYTE(arg->delta1[0],
1353 arg->delta2[0],
1354 arg->delta1[1],
1355 arg->delta2[1]);
1356 rkisp1_iowrite32(params_vdev, val,
1357 CIF_RKSHARP_DELTA_P0_P1);
1358
1359 val = CIF_ISP_PACK_4BYTE(arg->delta1[2],
1360 arg->delta2[2],
1361 arg->delta1[3],
1362 arg->delta2[3]);
1363 rkisp1_iowrite32(params_vdev, val,
1364 CIF_RKSHARP_DELTA_P2_P3);
1365
1366 val = CIF_ISP_PACK_4BYTE(arg->delta1[4],
1367 arg->delta2[4],
1368 0,
1369 0);
1370 rkisp1_iowrite32(params_vdev, val,
1371 CIF_RKSHARP_DELTA_P4);
1372
1373 for (i = 0; i < 5; i++)
1374 minmax[i] = arg->minnumber[i] << 4 | arg->maxnumber[i];
1375 val = CIF_ISP_PACK_4BYTE(minmax[0],
1376 minmax[1],
1377 minmax[2],
1378 minmax[3]);
1379 rkisp1_iowrite32(params_vdev, val,
1380 CIF_RKSHARP_NPIXEL_P0_P1_P2_P3);
1381 rkisp1_iowrite32(params_vdev, minmax[4],
1382 CIF_RKSHARP_NPIXEL_P4);
1383
1384 val = CIF_ISP_PACK_4BYTE(arg->gauss_flat_coe[0],
1385 arg->gauss_flat_coe[1],
1386 arg->gauss_flat_coe[2],
1387 0);
1388 rkisp1_iowrite32(params_vdev, val,
1389 CIF_RKSHARP_GAUSS_FLAT_COE1);
1390
1391 val = CIF_ISP_PACK_4BYTE(arg->gauss_flat_coe[3],
1392 arg->gauss_flat_coe[4],
1393 arg->gauss_flat_coe[5],
1394 0);
1395 rkisp1_iowrite32(params_vdev, val,
1396 CIF_RKSHARP_GAUSS_FLAT_COE2);
1397
1398 val = CIF_ISP_PACK_4BYTE(arg->gauss_flat_coe[6],
1399 arg->gauss_flat_coe[7],
1400 arg->gauss_flat_coe[8],
1401 0);
1402 rkisp1_iowrite32(params_vdev, val,
1403 CIF_RKSHARP_GAUSS_FLAT_COE3);
1404
1405 val = CIF_ISP_PACK_4BYTE(arg->gauss_noise_coe[0],
1406 arg->gauss_noise_coe[1],
1407 arg->gauss_noise_coe[2],
1408 0);
1409 rkisp1_iowrite32(params_vdev, val,
1410 CIF_RKSHARP_GAUSS_NOISE_COE1);
1411
1412 val = CIF_ISP_PACK_4BYTE(arg->gauss_noise_coe[3],
1413 arg->gauss_noise_coe[4],
1414 arg->gauss_noise_coe[5],
1415 0);
1416 rkisp1_iowrite32(params_vdev, val,
1417 CIF_RKSHARP_GAUSS_NOISE_COE2);
1418
1419 val = CIF_ISP_PACK_4BYTE(arg->gauss_noise_coe[6],
1420 arg->gauss_noise_coe[7],
1421 arg->gauss_noise_coe[8],
1422 0);
1423 rkisp1_iowrite32(params_vdev, val,
1424 CIF_RKSHARP_GAUSS_NOISE_COE3);
1425
1426 val = CIF_ISP_PACK_4BYTE(arg->gauss_other_coe[0],
1427 arg->gauss_other_coe[1],
1428 arg->gauss_other_coe[2],
1429 0);
1430 rkisp1_iowrite32(params_vdev, val,
1431 CIF_RKSHARP_GAUSS_OTHER_COE1);
1432
1433 val = CIF_ISP_PACK_4BYTE(arg->gauss_other_coe[3],
1434 arg->gauss_other_coe[4],
1435 arg->gauss_other_coe[5],
1436 0);
1437 rkisp1_iowrite32(params_vdev, val,
1438 CIF_RKSHARP_GAUSS_OTHER_COE2);
1439
1440 val = CIF_ISP_PACK_4BYTE(arg->gauss_other_coe[6],
1441 arg->gauss_other_coe[7],
1442 arg->gauss_other_coe[8],
1443 0);
1444 rkisp1_iowrite32(params_vdev, val,
1445 CIF_RKSHARP_GAUSS_OTHER_COE3);
1446
1447 val = CIF_ISP_PACK_4BYTE(arg->line1_filter_coe[0],
1448 arg->line1_filter_coe[1],
1449 arg->line1_filter_coe[2],
1450 0);
1451 rkisp1_iowrite32(params_vdev, val,
1452 CIF_RKSHARP_LINE1_FILTER_COE1);
1453
1454 val = CIF_ISP_PACK_4BYTE(arg->line1_filter_coe[3],
1455 arg->line1_filter_coe[4],
1456 arg->line1_filter_coe[5],
1457 0);
1458 rkisp1_iowrite32(params_vdev, val,
1459 CIF_RKSHARP_LINE1_FILTER_COE2);
1460
1461 val = CIF_ISP_PACK_4BYTE(arg->line2_filter_coe[0],
1462 arg->line2_filter_coe[1],
1463 arg->line2_filter_coe[2],
1464 0);
1465 rkisp1_iowrite32(params_vdev, val,
1466 CIF_RKSHARP_LINE2_FILTER_COE1);
1467
1468 val = CIF_ISP_PACK_4BYTE(arg->line2_filter_coe[3],
1469 arg->line2_filter_coe[4],
1470 arg->line2_filter_coe[5],
1471 0);
1472 rkisp1_iowrite32(params_vdev, val,
1473 CIF_RKSHARP_LINE2_FILTER_COE2);
1474
1475 val = CIF_ISP_PACK_4BYTE(arg->line2_filter_coe[6],
1476 arg->line2_filter_coe[7],
1477 arg->line2_filter_coe[8],
1478 0);
1479 rkisp1_iowrite32(params_vdev, val,
1480 CIF_RKSHARP_LINE2_FILTER_COE3);
1481
1482 val = CIF_ISP_PACK_4BYTE(arg->line3_filter_coe[0],
1483 arg->line3_filter_coe[1],
1484 arg->line3_filter_coe[2],
1485 0);
1486 rkisp1_iowrite32(params_vdev, val,
1487 CIF_RKSHARP_LINE3_FILTER_COE1);
1488
1489 val = CIF_ISP_PACK_4BYTE(arg->line3_filter_coe[3],
1490 arg->line3_filter_coe[4],
1491 arg->line3_filter_coe[5],
1492 0);
1493 rkisp1_iowrite32(params_vdev, val,
1494 CIF_RKSHARP_LINE3_FILTER_COE2);
1495
1496 val = CIF_ISP_PACK_2SHORT(arg->grad_seq[0],
1497 arg->grad_seq[1]);
1498 rkisp1_iowrite32(params_vdev, val,
1499 CIF_RKSHARP_GRAD_SEQ_P0_P1);
1500
1501 val = CIF_ISP_PACK_2SHORT(arg->grad_seq[2],
1502 arg->grad_seq[3]);
1503 rkisp1_iowrite32(params_vdev, val,
1504 CIF_RKSHARP_GRAD_SEQ_P2_P3);
1505
1506 val = CIF_ISP_PACK_4BYTE(arg->sharp_factor[0],
1507 arg->sharp_factor[1],
1508 arg->sharp_factor[2],
1509 0);
1510 rkisp1_iowrite32(params_vdev, val,
1511 CIF_RKSHARP_SHARP_FACTOR_P0_P1_P2);
1512
1513 val = CIF_ISP_PACK_4BYTE(arg->sharp_factor[3],
1514 arg->sharp_factor[4],
1515 0,
1516 0);
1517 rkisp1_iowrite32(params_vdev, val,
1518 CIF_RKSHARP_SHARP_FACTOR_P3_P4);
1519
1520 val = CIF_ISP_PACK_4BYTE(arg->uv_gauss_flat_coe[0],
1521 arg->uv_gauss_flat_coe[1],
1522 arg->uv_gauss_flat_coe[2],
1523 arg->uv_gauss_flat_coe[3]);
1524 rkisp1_iowrite32(params_vdev, val,
1525 CIF_RKSHARP_UV_GAUSS_FLAT_COE11_COE14);
1526
1527 val = CIF_ISP_PACK_4BYTE(arg->uv_gauss_flat_coe[4],
1528 arg->uv_gauss_flat_coe[5],
1529 arg->uv_gauss_flat_coe[6],
1530 arg->uv_gauss_flat_coe[7]);
1531 rkisp1_iowrite32(params_vdev, val,
1532 CIF_RKSHARP_UV_GAUSS_FLAT_COE15_COE23);
1533
1534 val = CIF_ISP_PACK_4BYTE(arg->uv_gauss_flat_coe[8],
1535 arg->uv_gauss_flat_coe[9],
1536 arg->uv_gauss_flat_coe[10],
1537 arg->uv_gauss_flat_coe[11]);
1538 rkisp1_iowrite32(params_vdev, val,
1539 CIF_RKSHARP_UV_GAUSS_FLAT_COE24_COE32);
1540
1541 val = CIF_ISP_PACK_4BYTE(arg->uv_gauss_flat_coe[12],
1542 arg->uv_gauss_flat_coe[13],
1543 arg->uv_gauss_flat_coe[14],
1544 0);
1545 rkisp1_iowrite32(params_vdev, val,
1546 CIF_RKSHARP_UV_GAUSS_FLAT_COE33_COE35);
1547
1548 val = CIF_ISP_PACK_4BYTE(arg->uv_gauss_noise_coe[0],
1549 arg->uv_gauss_noise_coe[1],
1550 arg->uv_gauss_noise_coe[2],
1551 arg->uv_gauss_noise_coe[3]);
1552 rkisp1_iowrite32(params_vdev, val,
1553 CIF_RKSHARP_UV_GAUSS_NOISE_COE11_COE14);
1554
1555 val = CIF_ISP_PACK_4BYTE(arg->uv_gauss_noise_coe[4],
1556 arg->uv_gauss_noise_coe[5],
1557 arg->uv_gauss_noise_coe[6],
1558 arg->uv_gauss_noise_coe[7]);
1559 rkisp1_iowrite32(params_vdev, val,
1560 CIF_RKSHARP_UV_GAUSS_NOISE_COE15_COE23);
1561
1562 val = CIF_ISP_PACK_4BYTE(arg->uv_gauss_noise_coe[8],
1563 arg->uv_gauss_noise_coe[9],
1564 arg->uv_gauss_noise_coe[10],
1565 arg->uv_gauss_noise_coe[11]);
1566 rkisp1_iowrite32(params_vdev, val,
1567 CIF_RKSHARP_UV_GAUSS_NOISE_COE24_COE32);
1568
1569 val = CIF_ISP_PACK_4BYTE(arg->uv_gauss_noise_coe[12],
1570 arg->uv_gauss_noise_coe[13],
1571 arg->uv_gauss_noise_coe[14],
1572 0);
1573 rkisp1_iowrite32(params_vdev, val,
1574 CIF_RKSHARP_UV_GAUSS_NOISE_COE33_COE35);
1575
1576 val = CIF_ISP_PACK_4BYTE(arg->uv_gauss_other_coe[0],
1577 arg->uv_gauss_other_coe[1],
1578 arg->uv_gauss_other_coe[2],
1579 arg->uv_gauss_other_coe[3]);
1580 rkisp1_iowrite32(params_vdev, val,
1581 CIF_RKSHARP_UV_GAUSS_OTHER_COE11_COE14);
1582
1583 val = CIF_ISP_PACK_4BYTE(arg->uv_gauss_other_coe[4],
1584 arg->uv_gauss_other_coe[5],
1585 arg->uv_gauss_other_coe[6],
1586 arg->uv_gauss_other_coe[7]);
1587 rkisp1_iowrite32(params_vdev, val,
1588 CIF_RKSHARP_UV_GAUSS_OTHER_COE15_COE23);
1589
1590 val = CIF_ISP_PACK_4BYTE(arg->uv_gauss_other_coe[8],
1591 arg->uv_gauss_other_coe[9],
1592 arg->uv_gauss_other_coe[10],
1593 arg->uv_gauss_other_coe[11]);
1594 rkisp1_iowrite32(params_vdev, val,
1595 CIF_RKSHARP_UV_GAUSS_OTHER_COE24_COE32);
1596
1597 val = CIF_ISP_PACK_4BYTE(arg->uv_gauss_other_coe[12],
1598 arg->uv_gauss_other_coe[13],
1599 arg->uv_gauss_other_coe[14],
1600 0);
1601 rkisp1_iowrite32(params_vdev, val,
1602 CIF_RKSHARP_UV_GAUSS_OTHER_COE33_COE35);
1603
1604 rkisp1_iowrite32(params_vdev, arg->switch_avg,
1605 CIF_RKSHARP_CTRL);
1606
1607 rkisp1_iowrite32(params_vdev,
1608 arg->coring_thr,
1609 CIF_IMG_EFF_SHARPEN);
1610
1611 val = rkisp1_ioread32(params_vdev, CIF_IMG_EFF_MAT_3) & 0x0F;
1612 val |= (arg->lap_mat_coe[0] & 0x0F) << 4 |
1613 (arg->lap_mat_coe[1] & 0x0F) << 8 |
1614 (arg->lap_mat_coe[2] & 0x0F) << 12;
1615 rkisp1_iowrite32(params_vdev, val, CIF_IMG_EFF_MAT_3);
1616
1617 val = (arg->lap_mat_coe[3] & 0x0F) << 0 |
1618 (arg->lap_mat_coe[4] & 0x0F) << 4 |
1619 (arg->lap_mat_coe[5] & 0x0F) << 8 |
1620 (arg->lap_mat_coe[6] & 0x0F) << 12;
1621 rkisp1_iowrite32(params_vdev, val, CIF_IMG_EFF_MAT_4);
1622
1623 val = (arg->lap_mat_coe[7] & 0x0F) << 0 |
1624 (arg->lap_mat_coe[8] & 0x0F) << 4;
1625 rkisp1_iowrite32(params_vdev, val, CIF_IMG_EFF_MAT_5);
1626
1627 eff_ctrl = rkisp1_ioread32(params_vdev, CIF_IMG_EFF_CTRL);
1628 eff_ctrl &= ~CIF_IMG_EFF_CTRL_MODE_MASK;
1629 eff_ctrl |= CIF_IMG_EFF_CTRL_MODE_RKSHARPEN;
1630
1631 if (arg->full_range)
1632 eff_ctrl |= CIF_IMG_EFF_CTRL_YCBCR_FULL;
1633
1634 rkisp1_iowrite32(params_vdev, eff_ctrl, CIF_IMG_EFF_CTRL);
1635 }
1636
1637 static struct rkisp_isp_params_v1x_ops rkisp1_v10_isp_params_ops = {
1638 .dpcc_config = isp_dpcc_config,
1639 .bls_config = isp_bls_config,
1640 .lsc_config = isp_lsc_config,
1641 .lsc_matrix_config = isp_lsc_matrix_config_v10,
1642 .flt_config = isp_flt_config,
1643 .bdm_config = isp_bdm_config,
1644 .sdg_config = isp_sdg_config,
1645 .goc_config = isp_goc_config_v10,
1646 .ctk_config = isp_ctk_config,
1647 .ctk_enable = isp_ctk_enable,
1648 .awb_meas_config = isp_awb_meas_config_v10,
1649 .awb_meas_enable = isp_awb_meas_enable_v10,
1650 .awb_gain_config = isp_awb_gain_config_v10,
1651 .aec_config = isp_aec_config_v10,
1652 .cproc_config = isp_cproc_config,
1653 .hst_config = isp_hst_config_v10,
1654 .hst_enable = isp_hst_enable_v10,
1655 .afm_config = isp_afm_config_v10,
1656 .ie_config = isp_ie_config,
1657 .ie_enable = isp_ie_enable,
1658 .csm_config = isp_csm_config,
1659 .dpf_config = isp_dpf_config,
1660 .dpf_strength_config = isp_dpf_strength_config,
1661 .wdr_config = isp_wdr_config_v10,
1662 .wdr_enable = isp_dummy_enable,
1663 .demosaiclp_config = isp_demosaiclp_config_v10,
1664 .demosaiclp_enable = isp_dummy_enable,
1665 .rkiesharp_config = isp_rkiesharp_config_v10,
1666 .rkiesharp_enable = isp_dummy_enable,
1667 };
1668
1669 static struct rkisp_isp_params_v1x_ops rkisp1_v12_isp_params_ops = {
1670 .dpcc_config = isp_dpcc_config,
1671 .bls_config = isp_bls_config,
1672 .lsc_config = isp_lsc_config,
1673 .lsc_matrix_config = isp_lsc_matrix_config_v12,
1674 .flt_config = isp_flt_config,
1675 .bdm_config = isp_bdm_config,
1676 .sdg_config = isp_sdg_config,
1677 .goc_config = isp_goc_config_v12,
1678 .ctk_config = isp_ctk_config,
1679 .ctk_enable = isp_ctk_enable,
1680 .awb_meas_config = isp_awb_meas_config_v12,
1681 .awb_meas_enable = isp_awb_meas_enable_v12,
1682 .awb_gain_config = isp_awb_gain_config_v12,
1683 .aec_config = isp_aec_config_v12,
1684 .cproc_config = isp_cproc_config,
1685 .hst_config = isp_hst_config_v12,
1686 .hst_enable = isp_hst_enable_v12,
1687 .afm_config = isp_afm_config_v12,
1688 .ie_config = isp_ie_config,
1689 .ie_enable = isp_ie_enable,
1690 .csm_config = isp_csm_config,
1691 .dpf_config = isp_dpf_config,
1692 .dpf_strength_config = isp_dpf_strength_config,
1693 .wdr_config = isp_wdr_config_v12,
1694 .wdr_enable = isp_wdr_enable_v12,
1695 .demosaiclp_config = isp_demosaiclp_config_v12,
1696 .demosaiclp_enable = isp_demosaiclp_enable_v12,
1697 .rkiesharp_config = isp_rkiesharp_config_v12,
1698 .rkiesharp_enable = isp_ie_enable,
1699 };
1700
1701 static struct rkisp_isp_params_v1x_config rkisp1_v10_isp_params_config = {
1702 .gamma_out_max_samples = 17,
1703 .hst_weight_grids_size = 28,
1704 };
1705
1706 static struct rkisp_isp_params_v1x_config rkisp1_v12_isp_params_config = {
1707 .gamma_out_max_samples = 34,
1708 .hst_weight_grids_size = 81,
1709 };
1710
1711 static __maybe_unused
__isp_isr_other_config(struct rkisp_isp_params_vdev * params_vdev,const struct rkisp1_isp_params_cfg * new_params)1712 void __isp_isr_other_config(struct rkisp_isp_params_vdev *params_vdev,
1713 const struct rkisp1_isp_params_cfg *new_params)
1714 {
1715 unsigned int module_en_update, module_cfg_update, module_ens;
1716 struct rkisp_isp_params_v1x_ops *ops =
1717 (struct rkisp_isp_params_v1x_ops *)params_vdev->priv_ops;
1718 struct ispsd_in_fmt *in_fmt = ¶ms_vdev->dev->isp_sdev.in_fmt;
1719 bool ie_enable;
1720 bool iesharp_enable;
1721 bool is_grey_sensor;
1722
1723 is_grey_sensor = in_fmt->mbus_code == MEDIA_BUS_FMT_Y8_1X8 ||
1724 in_fmt->mbus_code == MEDIA_BUS_FMT_Y10_1X10 ||
1725 in_fmt->mbus_code == MEDIA_BUS_FMT_Y12_1X12;
1726
1727 module_en_update = new_params->module_en_update;
1728 module_cfg_update = new_params->module_cfg_update;
1729 module_ens = new_params->module_ens;
1730
1731 ie_enable = !!(module_ens & CIFISP_MODULE_IE);
1732 iesharp_enable = !!(module_ens & CIFISP_MODULE_RK_IESHARP);
1733 if (ie_enable && iesharp_enable) {
1734 iesharp_enable = false;
1735 dev_err(params_vdev->dev->dev,
1736 "You can only use one mode in IE and RK_IESHARP!\n");
1737 }
1738
1739 if ((module_en_update & CIFISP_MODULE_DPCC) ||
1740 (module_cfg_update & CIFISP_MODULE_DPCC)) {
1741 /*update dpc config */
1742 if ((module_cfg_update & CIFISP_MODULE_DPCC))
1743 ops->dpcc_config(params_vdev,
1744 &new_params->others.dpcc_config);
1745
1746 if (module_en_update & CIFISP_MODULE_DPCC) {
1747 if (!!(module_ens & CIFISP_MODULE_DPCC))
1748 isp_param_set_bits(params_vdev,
1749 CIF_ISP_DPCC_MODE,
1750 CIF_ISP_DPCC_ENA);
1751 else
1752 isp_param_clear_bits(params_vdev,
1753 CIF_ISP_DPCC_MODE,
1754 CIF_ISP_DPCC_ENA);
1755 }
1756 }
1757
1758 if ((module_en_update & CIFISP_MODULE_BLS) ||
1759 (module_cfg_update & CIFISP_MODULE_BLS)) {
1760 /* update bls config */
1761 if ((module_cfg_update & CIFISP_MODULE_BLS))
1762 ops->bls_config(params_vdev, &new_params->others.bls_config);
1763
1764 if (module_en_update & CIFISP_MODULE_BLS) {
1765 if (!!(module_ens & CIFISP_MODULE_BLS))
1766 isp_param_set_bits(params_vdev,
1767 CIF_ISP_BLS_CTRL,
1768 CIF_ISP_BLS_ENA);
1769 else
1770 isp_param_clear_bits(params_vdev,
1771 CIF_ISP_BLS_CTRL,
1772 CIF_ISP_BLS_ENA);
1773 }
1774 }
1775
1776 if ((module_en_update & CIFISP_MODULE_SDG) ||
1777 (module_cfg_update & CIFISP_MODULE_SDG)) {
1778 /* update sdg config */
1779 if ((module_cfg_update & CIFISP_MODULE_SDG))
1780 ops->sdg_config(params_vdev, &new_params->others.sdg_config);
1781
1782 if (module_en_update & CIFISP_MODULE_SDG) {
1783 if (!!(module_ens & CIFISP_MODULE_SDG))
1784 isp_param_set_bits(params_vdev,
1785 CIF_ISP_CTRL,
1786 CIF_ISP_CTRL_ISP_GAMMA_IN_ENA);
1787 else
1788 isp_param_clear_bits(params_vdev,
1789 CIF_ISP_CTRL,
1790 CIF_ISP_CTRL_ISP_GAMMA_IN_ENA);
1791 }
1792 }
1793
1794 if ((module_en_update & CIFISP_MODULE_LSC) ||
1795 (module_cfg_update & CIFISP_MODULE_LSC)) {
1796 /* update lsc config */
1797 if ((module_cfg_update & CIFISP_MODULE_LSC))
1798 ops->lsc_config(params_vdev, &new_params->others.lsc_config);
1799
1800 if (module_en_update & CIFISP_MODULE_LSC) {
1801 if (!!(module_ens & CIFISP_MODULE_LSC))
1802 isp_param_set_bits(params_vdev,
1803 CIF_ISP_LSC_CTRL,
1804 CIF_ISP_LSC_CTRL_ENA);
1805 else
1806 isp_param_clear_bits(params_vdev,
1807 CIF_ISP_LSC_CTRL,
1808 CIF_ISP_LSC_CTRL_ENA);
1809 }
1810 }
1811
1812 if ((module_en_update & CIFISP_MODULE_AWB_GAIN) ||
1813 (module_cfg_update & CIFISP_MODULE_AWB_GAIN)) {
1814 /* update awb gains */
1815 if ((module_cfg_update & CIFISP_MODULE_AWB_GAIN))
1816 ops->awb_gain_config(params_vdev,
1817 &new_params->others.awb_gain_config);
1818
1819 if (module_en_update & CIFISP_MODULE_AWB_GAIN) {
1820 if (!!(module_ens & CIFISP_MODULE_AWB_GAIN))
1821 isp_param_set_bits(params_vdev,
1822 CIF_ISP_CTRL,
1823 CIF_ISP_CTRL_ISP_AWB_ENA);
1824 else
1825 isp_param_clear_bits(params_vdev,
1826 CIF_ISP_CTRL,
1827 CIF_ISP_CTRL_ISP_AWB_ENA);
1828 }
1829 }
1830
1831 if (((module_en_update & CIFISP_MODULE_BDM) ||
1832 (module_cfg_update & CIFISP_MODULE_BDM)) &&
1833 !is_grey_sensor) {
1834 /* update bdm config */
1835 if ((module_cfg_update & CIFISP_MODULE_BDM))
1836 ops->bdm_config(params_vdev, &new_params->others.bdm_config);
1837
1838 if (module_en_update & CIFISP_MODULE_BDM) {
1839 if (!!(module_ens & CIFISP_MODULE_BDM))
1840 isp_param_set_bits(params_vdev,
1841 CIF_ISP_DEMOSAIC,
1842 CIF_ISP_DEMOSAIC_BYPASS);
1843 else
1844 isp_param_clear_bits(params_vdev,
1845 CIF_ISP_DEMOSAIC,
1846 CIF_ISP_DEMOSAIC_BYPASS);
1847 }
1848 }
1849
1850 if ((module_en_update & CIFISP_MODULE_DEMOSAICLP) ||
1851 (module_cfg_update & CIFISP_MODULE_DEMOSAICLP)) {
1852 /* update demosaiclp config */
1853 if ((module_cfg_update & CIFISP_MODULE_DEMOSAICLP))
1854 ops->demosaiclp_config(params_vdev,
1855 &new_params->others.demosaiclp_config);
1856
1857 if (module_en_update & CIFISP_MODULE_DEMOSAICLP)
1858 ops->demosaiclp_enable(params_vdev,
1859 !!(module_ens & CIFISP_MODULE_DEMOSAICLP));
1860 }
1861
1862 if ((module_en_update & CIFISP_MODULE_FLT) ||
1863 (module_cfg_update & CIFISP_MODULE_FLT)) {
1864 /* update filter config */
1865 if ((module_cfg_update & CIFISP_MODULE_FLT))
1866 ops->flt_config(params_vdev, &new_params->others.flt_config);
1867
1868 if (module_en_update & CIFISP_MODULE_FLT) {
1869 if (!!(module_ens & CIFISP_MODULE_FLT))
1870 isp_param_set_bits(params_vdev,
1871 CIF_ISP_FILT_MODE,
1872 CIF_ISP_FLT_ENA);
1873 else
1874 isp_param_clear_bits(params_vdev,
1875 CIF_ISP_FILT_MODE,
1876 CIF_ISP_FLT_ENA);
1877 }
1878 }
1879
1880 if ((module_en_update & CIFISP_MODULE_CTK) ||
1881 (module_cfg_update & CIFISP_MODULE_CTK)) {
1882 /* update ctk config */
1883 if ((module_cfg_update & CIFISP_MODULE_CTK))
1884 ops->ctk_config(params_vdev, &new_params->others.ctk_config);
1885
1886 if (module_en_update & CIFISP_MODULE_CTK)
1887 ops->ctk_enable(params_vdev,
1888 !!(module_ens & CIFISP_MODULE_CTK));
1889 }
1890
1891 if ((module_en_update & CIFISP_MODULE_GOC) ||
1892 (module_cfg_update & CIFISP_MODULE_GOC)) {
1893 /* update goc config */
1894 if ((module_cfg_update & CIFISP_MODULE_GOC))
1895 ops->goc_config(params_vdev, &new_params->others.goc_config);
1896
1897 if (module_en_update & CIFISP_MODULE_GOC) {
1898 if (!!(module_ens & CIFISP_MODULE_GOC))
1899 isp_param_set_bits(params_vdev,
1900 CIF_ISP_CTRL,
1901 CIF_ISP_CTRL_ISP_GAMMA_OUT_ENA);
1902 else
1903 isp_param_clear_bits(params_vdev,
1904 CIF_ISP_CTRL,
1905 CIF_ISP_CTRL_ISP_GAMMA_OUT_ENA);
1906 }
1907 }
1908
1909 if ((module_en_update & CIFISP_MODULE_CPROC) ||
1910 (module_cfg_update & CIFISP_MODULE_CPROC)) {
1911 /* update cproc config */
1912 if ((module_cfg_update & CIFISP_MODULE_CPROC)) {
1913 ops->cproc_config(params_vdev,
1914 &new_params->others.cproc_config);
1915 }
1916 if (module_en_update & CIFISP_MODULE_CPROC) {
1917 if (!!(module_ens & CIFISP_MODULE_CPROC))
1918 isp_param_set_bits(params_vdev,
1919 CIF_C_PROC_CTRL,
1920 CIF_C_PROC_CTR_ENABLE);
1921 else
1922 isp_param_clear_bits(params_vdev,
1923 CIF_C_PROC_CTRL,
1924 CIF_C_PROC_CTR_ENABLE);
1925 }
1926 }
1927
1928 if (((module_en_update & CIFISP_MODULE_IE) ||
1929 (module_cfg_update & CIFISP_MODULE_IE)) && ie_enable) {
1930 /* update ie config */
1931 if ((module_cfg_update & CIFISP_MODULE_IE))
1932 ops->ie_config(params_vdev, &new_params->others.ie_config);
1933 }
1934
1935 if (((module_en_update & CIFISP_MODULE_RK_IESHARP) ||
1936 (module_cfg_update & CIFISP_MODULE_RK_IESHARP)) && iesharp_enable) {
1937 /* update rkiesharp config */
1938 if ((module_cfg_update & CIFISP_MODULE_RK_IESHARP))
1939 ops->rkiesharp_config(params_vdev,
1940 &new_params->others.rkiesharp_config);
1941 }
1942
1943 if (ie_enable || iesharp_enable)
1944 ops->ie_enable(params_vdev, true);
1945 else
1946 ops->ie_enable(params_vdev, false);
1947
1948 if ((module_en_update & CIFISP_MODULE_DPF) ||
1949 (module_cfg_update & CIFISP_MODULE_DPF)) {
1950 /* update dpf config */
1951 if ((module_cfg_update & CIFISP_MODULE_DPF))
1952 ops->dpf_config(params_vdev, &new_params->others.dpf_config);
1953
1954 if (module_en_update & CIFISP_MODULE_DPF) {
1955 if (!!(module_ens & CIFISP_MODULE_DPF))
1956 isp_param_set_bits(params_vdev,
1957 CIF_ISP_DPF_MODE,
1958 CIF_ISP_DPF_MODE_EN);
1959 else
1960 isp_param_clear_bits(params_vdev,
1961 CIF_ISP_DPF_MODE,
1962 CIF_ISP_DPF_MODE_EN);
1963 }
1964 }
1965
1966 if ((module_en_update & CIFISP_MODULE_DPF_STRENGTH) ||
1967 (module_cfg_update & CIFISP_MODULE_DPF_STRENGTH)) {
1968 /* update dpf strength config */
1969 ops->dpf_strength_config(params_vdev,
1970 &new_params->others.dpf_strength_config);
1971 }
1972
1973 if ((module_en_update & CIFISP_MODULE_WDR) ||
1974 (module_cfg_update & CIFISP_MODULE_WDR)) {
1975 /* update wdr config */
1976 if ((module_cfg_update & CIFISP_MODULE_WDR))
1977 ops->wdr_config(params_vdev,
1978 &new_params->others.wdr_config);
1979
1980 if (module_en_update & CIFISP_MODULE_WDR)
1981 ops->wdr_enable(params_vdev,
1982 !!(module_ens & CIFISP_MODULE_WDR));
1983 }
1984 }
1985
1986 static __maybe_unused
__isp_isr_meas_config(struct rkisp_isp_params_vdev * params_vdev,struct rkisp1_isp_params_cfg * new_params)1987 void __isp_isr_meas_config(struct rkisp_isp_params_vdev *params_vdev,
1988 struct rkisp1_isp_params_cfg *new_params)
1989 {
1990 unsigned int module_en_update, module_cfg_update, module_ens;
1991 struct rkisp_isp_params_v1x_ops *ops =
1992 (struct rkisp_isp_params_v1x_ops *)params_vdev->priv_ops;
1993
1994 module_en_update = new_params->module_en_update;
1995 module_cfg_update = new_params->module_cfg_update;
1996 module_ens = new_params->module_ens;
1997
1998 if ((module_en_update & CIFISP_MODULE_AWB) ||
1999 (module_cfg_update & CIFISP_MODULE_AWB)) {
2000 /* update awb config */
2001 if ((module_cfg_update & CIFISP_MODULE_AWB))
2002 ops->awb_meas_config(params_vdev,
2003 &new_params->meas.awb_meas_config);
2004
2005 if (module_en_update & CIFISP_MODULE_AWB)
2006 ops->awb_meas_enable(params_vdev,
2007 &new_params->meas.awb_meas_config,
2008 !!(module_ens & CIFISP_MODULE_AWB));
2009 }
2010
2011 if ((module_en_update & CIFISP_MODULE_AFC) ||
2012 (module_cfg_update & CIFISP_MODULE_AFC)) {
2013 /* update afc config */
2014 if ((module_cfg_update & CIFISP_MODULE_AFC))
2015 ops->afm_config(params_vdev, &new_params->meas.afc_config);
2016
2017 if (module_en_update & CIFISP_MODULE_AFC) {
2018 if (!!(module_ens & CIFISP_MODULE_AFC))
2019 isp_param_set_bits(params_vdev,
2020 CIF_ISP_AFM_CTRL,
2021 CIF_ISP_AFM_ENA);
2022 else
2023 isp_param_clear_bits(params_vdev,
2024 CIF_ISP_AFM_CTRL,
2025 CIF_ISP_AFM_ENA);
2026 }
2027 }
2028
2029 if ((module_en_update & CIFISP_MODULE_HST) ||
2030 (module_cfg_update & CIFISP_MODULE_HST)) {
2031 /* update hst config */
2032 if ((module_cfg_update & CIFISP_MODULE_HST))
2033 ops->hst_config(params_vdev, &new_params->meas.hst_config);
2034
2035 if (module_en_update & CIFISP_MODULE_HST)
2036 ops->hst_enable(params_vdev,
2037 &new_params->meas.hst_config,
2038 !!(module_ens & CIFISP_MODULE_HST));
2039 }
2040
2041 if ((module_en_update & CIFISP_MODULE_AEC) ||
2042 (module_cfg_update & CIFISP_MODULE_AEC)) {
2043 /* update aec config */
2044 if ((module_cfg_update & CIFISP_MODULE_AEC))
2045 ops->aec_config(params_vdev, &new_params->meas.aec_config);
2046
2047 if (module_en_update & CIFISP_MODULE_AEC) {
2048 if (!!(module_ens & CIFISP_MODULE_AEC))
2049 isp_param_set_bits(params_vdev,
2050 CIF_ISP_EXP_CTRL,
2051 CIF_ISP_EXP_ENA);
2052 else
2053 isp_param_clear_bits(params_vdev,
2054 CIF_ISP_EXP_CTRL,
2055 CIF_ISP_EXP_ENA);
2056 }
2057 }
2058 }
2059
2060 static __maybe_unused
__preisp_isr_update_hdrae_para(struct rkisp_isp_params_vdev * params_vdev,struct rkisp1_isp_params_cfg * new_params)2061 void __preisp_isr_update_hdrae_para(struct rkisp_isp_params_vdev *params_vdev,
2062 struct rkisp1_isp_params_cfg *new_params)
2063 {
2064 struct preisp_hdrae_para_s *hdrae;
2065 struct cifisp_lsc_config *lsc;
2066 struct cifisp_awb_gain_config *awb_gain;
2067 unsigned int module_en_update, module_cfg_update, module_ens;
2068 int i, ret;
2069
2070 hdrae = ¶ms_vdev->hdrae_para;
2071 module_en_update = new_params->module_en_update;
2072 module_cfg_update = new_params->module_cfg_update;
2073 module_ens = new_params->module_ens;
2074 lsc = &new_params->others.lsc_config;
2075 awb_gain = &new_params->others.awb_gain_config;
2076
2077 if (!params_vdev->dev->hdr.sensor)
2078 return;
2079
2080 if ((module_en_update & CIFISP_MODULE_AWB_GAIN) ||
2081 (module_cfg_update & CIFISP_MODULE_AWB_GAIN)) {
2082 /* update awb gains */
2083 if ((module_cfg_update & CIFISP_MODULE_AWB_GAIN)) {
2084 hdrae->r_gain = awb_gain->gain_red;
2085 hdrae->b_gain = awb_gain->gain_blue;
2086 hdrae->gr_gain = awb_gain->gain_green_r;
2087 hdrae->gb_gain = awb_gain->gain_green_b;
2088 }
2089
2090 if (module_en_update & CIFISP_MODULE_AWB_GAIN) {
2091 if (!(module_ens & CIFISP_MODULE_AWB_GAIN)) {
2092 hdrae->r_gain = 0x0100;
2093 hdrae->b_gain = 0x0100;
2094 hdrae->gr_gain = 0x0100;
2095 hdrae->gb_gain = 0x0100;
2096 }
2097 }
2098 }
2099
2100 if ((module_en_update & CIFISP_MODULE_LSC) ||
2101 (module_cfg_update & CIFISP_MODULE_LSC)) {
2102 /* update lsc config */
2103 if ((module_cfg_update & CIFISP_MODULE_LSC))
2104 memcpy(hdrae->lsc_table, lsc->gr_data_tbl,
2105 PREISP_LSCTBL_SIZE);
2106
2107 if (module_en_update & CIFISP_MODULE_LSC) {
2108 if (!(module_ens & CIFISP_MODULE_LSC))
2109 for (i = 0; i < PREISP_LSCTBL_SIZE; i++)
2110 hdrae->lsc_table[i] = 0x0400;
2111 }
2112 }
2113
2114 ret = v4l2_subdev_call(params_vdev->dev->hdr.sensor, core, ioctl,
2115 PREISP_CMD_SAVE_HDRAE_PARAM, hdrae);
2116 if (ret)
2117 params_vdev->dev->hdr.sensor = NULL;
2118 }
2119
2120 static const struct cifisp_awb_meas_config awb_params_default_config = {
2121 {
2122 0, 0, RKISP_DEFAULT_WIDTH, RKISP_DEFAULT_HEIGHT
2123 },
2124 CIFISP_AWB_MODE_YCBCR, 200, 30, 20, 20, 0, 128, 128
2125 };
2126
2127 static const struct cifisp_aec_config aec_params_default_config = {
2128 CIFISP_EXP_MEASURING_MODE_0,
2129 CIFISP_EXP_CTRL_AUTOSTOP_0,
2130 {
2131 RKISP_DEFAULT_WIDTH >> 2, RKISP_DEFAULT_HEIGHT >> 2,
2132 RKISP_DEFAULT_WIDTH >> 1, RKISP_DEFAULT_HEIGHT >> 1
2133 }
2134 };
2135
2136 static const struct cifisp_hst_config hst_params_default_config = {
2137 CIFISP_HISTOGRAM_MODE_RGB_COMBINED,
2138 3,
2139 {
2140 RKISP_DEFAULT_WIDTH >> 2, RKISP_DEFAULT_HEIGHT >> 2,
2141 RKISP_DEFAULT_WIDTH >> 1, RKISP_DEFAULT_HEIGHT >> 1
2142 },
2143 {
2144 0, /* To be filled in with 0x01 at runtime. */
2145 }
2146 };
2147
2148 static const struct cifisp_afc_config afc_params_default_config = {
2149 1,
2150 {
2151 {
2152 300, 225, 200, 150
2153 }
2154 },
2155 4,
2156 14
2157 };
2158
2159 /* Not called when the camera active, thus not isr protection. */
rkisp1_params_first_cfg_v1x(struct rkisp_isp_params_vdev * params_vdev)2160 static void rkisp1_params_first_cfg_v1x(struct rkisp_isp_params_vdev *params_vdev)
2161 {
2162 struct rkisp_isp_params_v1x_ops *ops =
2163 (struct rkisp_isp_params_v1x_ops *)params_vdev->priv_ops;
2164 struct cifisp_hst_config hst = hst_params_default_config;
2165 struct device *dev = params_vdev->dev->dev;
2166 int i;
2167
2168 spin_lock(¶ms_vdev->config_lock);
2169
2170 ops->awb_meas_config(params_vdev, &awb_params_default_config);
2171 ops->awb_meas_enable(params_vdev, &awb_params_default_config, true);
2172
2173 ops->aec_config(params_vdev, &aec_params_default_config);
2174 isp_param_set_bits(params_vdev, CIF_ISP_EXP_CTRL, CIF_ISP_EXP_ENA);
2175
2176 ops->afm_config(params_vdev, &afc_params_default_config);
2177 isp_param_set_bits(params_vdev, CIF_ISP_AFM_CTRL, CIF_ISP_AFM_ENA);
2178
2179 memset(hst.hist_weight, 0x01, sizeof(hst.hist_weight));
2180 ops->hst_config(params_vdev, &hst);
2181 if (params_vdev->dev->isp_ver == ISP_V12 ||
2182 params_vdev->dev->isp_ver == ISP_V13) {
2183 isp_param_set_bits(params_vdev, CIF_ISP_HIST_CTRL_V12,
2184 ~CIF_ISP_HIST_CTRL_MODE_MASK_V12 |
2185 hst_params_default_config.mode);
2186 } else {
2187 isp_param_set_bits(params_vdev, CIF_ISP_HIST_PROP_V10,
2188 ~CIF_ISP_HIST_PROP_MODE_MASK_V10 |
2189 hst_params_default_config.mode);
2190 }
2191
2192 /* disable color related config for grey sensor */
2193 if (params_vdev->in_mbus_code == MEDIA_BUS_FMT_Y8_1X8 ||
2194 params_vdev->in_mbus_code == MEDIA_BUS_FMT_Y10_1X10 ||
2195 params_vdev->in_mbus_code == MEDIA_BUS_FMT_Y12_1X12) {
2196 ops->ctk_enable(params_vdev, false);
2197 isp_param_clear_bits(params_vdev,
2198 CIF_ISP_CTRL,
2199 CIF_ISP_CTRL_ISP_AWB_ENA);
2200 isp_param_clear_bits(params_vdev,
2201 CIF_ISP_LSC_CTRL,
2202 CIF_ISP_LSC_CTRL_ENA);
2203 }
2204
2205 params_vdev->hdrae_para.r_gain = 0x0100;
2206 params_vdev->hdrae_para.b_gain = 0x0100;
2207 params_vdev->hdrae_para.gr_gain = 0x0100;
2208 params_vdev->hdrae_para.gb_gain = 0x0100;
2209 for (i = 0; i < PREISP_LSCTBL_SIZE; i++)
2210 params_vdev->hdrae_para.lsc_table[i] = 0x0400;
2211
2212 /* override the default things */
2213 if (!params_vdev->isp1x_params->module_cfg_update &&
2214 !params_vdev->isp1x_params->module_en_update)
2215 dev_warn(dev, "can not get first iq setting in stream on\n");
2216
2217 __isp_isr_other_config(params_vdev, params_vdev->isp1x_params);
2218 __isp_isr_meas_config(params_vdev, params_vdev->isp1x_params);
2219 __preisp_isr_update_hdrae_para(params_vdev, params_vdev->isp1x_params);
2220
2221 spin_unlock(¶ms_vdev->config_lock);
2222 }
2223
rkisp1_save_first_param_v1x(struct rkisp_isp_params_vdev * params_vdev,void * param)2224 static void rkisp1_save_first_param_v1x(struct rkisp_isp_params_vdev *params_vdev, void *param)
2225 {
2226 struct rkisp1_isp_params_cfg *new_params;
2227
2228 new_params = (struct rkisp1_isp_params_cfg *)param;
2229 *params_vdev->isp1x_params = *new_params;
2230 }
2231
rkisp1_clear_first_param_v1x(struct rkisp_isp_params_vdev * params_vdev)2232 static void rkisp1_clear_first_param_v1x(struct rkisp_isp_params_vdev *params_vdev)
2233 {
2234 params_vdev->isp1x_params->module_cfg_update = 0;
2235 params_vdev->isp1x_params->module_en_update = 0;
2236 }
2237
2238 static void
rkisp1_get_param_size_v1x(struct rkisp_isp_params_vdev * params_vdev,unsigned int sizes[])2239 rkisp1_get_param_size_v1x(struct rkisp_isp_params_vdev *params_vdev, unsigned int sizes[])
2240 {
2241 sizes[0] = sizeof(struct rkisp1_isp_params_cfg);
2242 }
2243
2244 /* Not called when the camera active, thus not isr protection. */
rkisp1_params_disable_isp_v1x(struct rkisp_isp_params_vdev * params_vdev)2245 static void rkisp1_params_disable_isp_v1x(struct rkisp_isp_params_vdev *params_vdev)
2246 {
2247 struct rkisp_isp_params_v1x_ops *ops =
2248 (struct rkisp_isp_params_v1x_ops *)params_vdev->priv_ops;
2249
2250 isp_param_clear_bits(params_vdev, CIF_ISP_DPCC_MODE, CIF_ISP_DPCC_ENA);
2251 isp_param_clear_bits(params_vdev, CIF_ISP_LSC_CTRL,
2252 CIF_ISP_LSC_CTRL_ENA);
2253 isp_param_clear_bits(params_vdev, CIF_ISP_BLS_CTRL, CIF_ISP_BLS_ENA);
2254 isp_param_clear_bits(params_vdev, CIF_ISP_CTRL,
2255 CIF_ISP_CTRL_ISP_GAMMA_IN_ENA);
2256 isp_param_clear_bits(params_vdev, CIF_ISP_CTRL,
2257 CIF_ISP_CTRL_ISP_GAMMA_OUT_ENA);
2258 isp_param_clear_bits(params_vdev, CIF_ISP_DEMOSAIC,
2259 CIF_ISP_DEMOSAIC_BYPASS);
2260 isp_param_clear_bits(params_vdev, CIF_ISP_FILT_MODE, CIF_ISP_FLT_ENA);
2261 ops->awb_meas_enable(params_vdev, NULL, false);
2262 isp_param_clear_bits(params_vdev, CIF_ISP_CTRL,
2263 CIF_ISP_CTRL_ISP_AWB_ENA);
2264 isp_param_clear_bits(params_vdev, CIF_ISP_EXP_CTRL, CIF_ISP_EXP_ENA);
2265 ops->ctk_enable(params_vdev, false);
2266 isp_param_clear_bits(params_vdev, CIF_C_PROC_CTRL,
2267 CIF_C_PROC_CTR_ENABLE);
2268 ops->hst_enable(params_vdev, NULL, false);
2269 isp_param_clear_bits(params_vdev, CIF_ISP_AFM_CTRL, CIF_ISP_AFM_ENA);
2270 ops->ie_enable(params_vdev, false);
2271 isp_param_clear_bits(params_vdev, CIF_ISP_DPF_MODE,
2272 CIF_ISP_DPF_MODE_EN);
2273 }
2274
rkisp1_params_isr_v1x(struct rkisp_isp_params_vdev * params_vdev,u32 isp_mis)2275 static void rkisp1_params_isr_v1x(struct rkisp_isp_params_vdev *params_vdev,
2276 u32 isp_mis)
2277 {
2278 struct rkisp1_isp_params_cfg *new_params;
2279 struct rkisp_buffer *cur_buf = NULL;
2280 unsigned int cur_frame_id =
2281 atomic_read(¶ms_vdev->dev->isp_sdev.frm_sync_seq) - 1;
2282
2283 spin_lock(¶ms_vdev->config_lock);
2284 if (!params_vdev->streamon)
2285 goto unlock;
2286
2287 /* get one empty buffer */
2288 if (!list_empty(¶ms_vdev->params))
2289 cur_buf = list_first_entry(¶ms_vdev->params,
2290 struct rkisp_buffer, queue);
2291 if (!cur_buf)
2292 goto unlock;
2293
2294 new_params = (struct rkisp1_isp_params_cfg *)(cur_buf->vaddr[0]);
2295
2296 if (isp_mis & CIF_ISP_FRAME) {
2297 u32 isp_ctrl;
2298
2299 list_del(&cur_buf->queue);
2300
2301 __isp_isr_other_config(params_vdev, new_params);
2302 __isp_isr_meas_config(params_vdev, new_params);
2303
2304 /* update shadow register immediately */
2305 isp_ctrl = rkisp1_ioread32(params_vdev, CIF_ISP_CTRL);
2306 isp_ctrl |= CIF_ISP_CTRL_ISP_CFG_UPD;
2307 rkisp1_iowrite32(params_vdev, isp_ctrl, CIF_ISP_CTRL);
2308
2309 __preisp_isr_update_hdrae_para(params_vdev, new_params);
2310
2311 cur_buf->vb.sequence = cur_frame_id;
2312 vb2_buffer_done(&cur_buf->vb.vb2_buf, VB2_BUF_STATE_DONE);
2313 }
2314 unlock:
2315 spin_unlock(¶ms_vdev->config_lock);
2316 }
2317
2318 static struct rkisp_isp_params_ops rkisp_isp_params_ops_tbl = {
2319 .save_first_param = rkisp1_save_first_param_v1x,
2320 .clear_first_param = rkisp1_clear_first_param_v1x,
2321 .get_param_size = rkisp1_get_param_size_v1x,
2322 .first_cfg = rkisp1_params_first_cfg_v1x,
2323 .disable_isp = rkisp1_params_disable_isp_v1x,
2324 .isr_hdl = rkisp1_params_isr_v1x,
2325 };
2326
rkisp_init_params_vdev_v1x(struct rkisp_isp_params_vdev * params_vdev)2327 int rkisp_init_params_vdev_v1x(struct rkisp_isp_params_vdev *params_vdev)
2328 {
2329 params_vdev->ops = &rkisp_isp_params_ops_tbl;
2330 if (params_vdev->dev->isp_ver == ISP_V12 ||
2331 params_vdev->dev->isp_ver == ISP_V13) {
2332 params_vdev->priv_ops = &rkisp1_v12_isp_params_ops;
2333 params_vdev->priv_cfg = &rkisp1_v12_isp_params_config;
2334 } else {
2335 params_vdev->priv_ops = &rkisp1_v10_isp_params_ops;
2336 params_vdev->priv_cfg = &rkisp1_v10_isp_params_config;
2337 }
2338
2339 params_vdev->isp1x_params = vmalloc(sizeof(*params_vdev->isp1x_params));
2340 if (!params_vdev->isp1x_params)
2341 return -ENOMEM;
2342
2343 rkisp1_clear_first_param_v1x(params_vdev);
2344
2345 return 0;
2346 }
2347
rkisp_uninit_params_vdev_v1x(struct rkisp_isp_params_vdev * params_vdev)2348 void rkisp_uninit_params_vdev_v1x(struct rkisp_isp_params_vdev *params_vdev)
2349 {
2350 vfree(params_vdev->isp1x_params);
2351 }
2352