1 // SPDX-License-Identifier: GPL-2.0
2 /* Copyright (c) 2019 Fuzhou Rockchip Electronics Co., Ltd. */
3
4 #include <media/v4l2-common.h>
5 #include <media/v4l2-ioctl.h>
6 #include <media/videobuf2-core.h>
7 #include <media/videobuf2-vmalloc.h> /* for ISP params */
8 #include <linux/delay.h>
9 #include <linux/rk-preisp.h>
10 #include <linux/slab.h>
11 #include "dev.h"
12 #include "regs.h"
13 #include "regs_v2x.h"
14 #include "isp_params_v2x.h"
15
16 #define ISP2X_PACK_4BYTE(a, b, c, d) \
17 (((a) & 0xFF) << 0 | ((b) & 0xFF) << 8 | \
18 ((c) & 0xFF) << 16 | ((d) & 0xFF) << 24)
19
20 #define ISP2X_PACK_2SHORT(a, b) \
21 (((a) & 0xFFFF) << 0 | ((b) & 0xFFFF) << 16)
22
23 #define ISP2X_REG_WR_MASK BIT(31) //disable write protect
24 #define ISP2X_NOBIG_OVERFLOW_SIZE (2560 * 1440)
25
26 static inline size_t
isp_param_get_insize(struct rkisp_isp_params_vdev * params_vdev)27 isp_param_get_insize(struct rkisp_isp_params_vdev *params_vdev)
28 {
29 struct rkisp_device *dev = params_vdev->dev;
30 struct rkisp_isp_subdev *isp_sdev = &dev->isp_sdev;
31 u32 height = isp_sdev->in_crop.height;
32
33 if (dev->isp_ver == ISP_V20 &&
34 dev->rd_mode == HDR_RDBK_FRAME1)
35 height += RKMODULE_EXTEND_LINE;
36
37 return isp_sdev->in_crop.width * height;
38 }
39
40 static void
isp_dpcc_config(struct rkisp_isp_params_vdev * params_vdev,const struct isp2x_dpcc_cfg * arg)41 isp_dpcc_config(struct rkisp_isp_params_vdev *params_vdev,
42 const struct isp2x_dpcc_cfg *arg)
43 {
44 u32 value;
45 int i;
46
47 value = rkisp_ioread32(params_vdev, ISP_DPCC0_MODE);
48 value &= ISP_DPCC_EN;
49
50 value |= (arg->stage1_enable & 0x01) << 2 |
51 (arg->grayscale_mode & 0x01) << 1;
52 rkisp_iowrite32(params_vdev, value, ISP_DPCC0_MODE);
53 rkisp_iowrite32(params_vdev, value, ISP_DPCC1_MODE);
54 rkisp_iowrite32(params_vdev, value, ISP_DPCC2_MODE);
55
56 value = (arg->sw_rk_out_sel & 0x03) << 5 |
57 (arg->sw_dpcc_output_sel & 0x01) << 4 |
58 (arg->stage1_rb_3x3 & 0x01) << 3 |
59 (arg->stage1_g_3x3 & 0x01) << 2 |
60 (arg->stage1_incl_rb_center & 0x01) << 1 |
61 (arg->stage1_incl_green_center & 0x01);
62 rkisp_iowrite32(params_vdev, value, ISP_DPCC0_OUTPUT_MODE);
63 rkisp_iowrite32(params_vdev, value, ISP_DPCC1_OUTPUT_MODE);
64 rkisp_iowrite32(params_vdev, value, ISP_DPCC2_OUTPUT_MODE);
65
66 value = (arg->stage1_use_fix_set & 0x01) << 3 |
67 (arg->stage1_use_set_3 & 0x01) << 2 |
68 (arg->stage1_use_set_2 & 0x01) << 1 |
69 (arg->stage1_use_set_1 & 0x01);
70 rkisp_iowrite32(params_vdev, value, ISP_DPCC0_SET_USE);
71 rkisp_iowrite32(params_vdev, value, ISP_DPCC1_SET_USE);
72 rkisp_iowrite32(params_vdev, value, ISP_DPCC2_SET_USE);
73
74 value = (arg->sw_rk_red_blue1_en & 0x01) << 13 |
75 (arg->rg_red_blue1_enable & 0x01) << 12 |
76 (arg->rnd_red_blue1_enable & 0x01) << 11 |
77 (arg->ro_red_blue1_enable & 0x01) << 10 |
78 (arg->lc_red_blue1_enable & 0x01) << 9 |
79 (arg->pg_red_blue1_enable & 0x01) << 8 |
80 (arg->sw_rk_green1_en & 0x01) << 5 |
81 (arg->rg_green1_enable & 0x01) << 4 |
82 (arg->rnd_green1_enable & 0x01) << 3 |
83 (arg->ro_green1_enable & 0x01) << 2 |
84 (arg->lc_green1_enable & 0x01) << 1 |
85 (arg->pg_green1_enable & 0x01);
86 rkisp_iowrite32(params_vdev, value, ISP_DPCC0_METHODS_SET_1);
87 rkisp_iowrite32(params_vdev, value, ISP_DPCC1_METHODS_SET_1);
88 rkisp_iowrite32(params_vdev, value, ISP_DPCC2_METHODS_SET_1);
89
90 value = (arg->sw_rk_red_blue2_en & 0x01) << 13 |
91 (arg->rg_red_blue2_enable & 0x01) << 12 |
92 (arg->rnd_red_blue2_enable & 0x01) << 11 |
93 (arg->ro_red_blue2_enable & 0x01) << 10 |
94 (arg->lc_red_blue2_enable & 0x01) << 9 |
95 (arg->pg_red_blue2_enable & 0x01) << 8 |
96 (arg->sw_rk_green2_en & 0x01) << 5 |
97 (arg->rg_green2_enable & 0x01) << 4 |
98 (arg->rnd_green2_enable & 0x01) << 3 |
99 (arg->ro_green2_enable & 0x01) << 2 |
100 (arg->lc_green2_enable & 0x01) << 1 |
101 (arg->pg_green2_enable & 0x01);
102 rkisp_iowrite32(params_vdev, value, ISP_DPCC0_METHODS_SET_2);
103 rkisp_iowrite32(params_vdev, value, ISP_DPCC1_METHODS_SET_2);
104 rkisp_iowrite32(params_vdev, value, ISP_DPCC2_METHODS_SET_2);
105
106 value = (arg->sw_rk_red_blue3_en & 0x01) << 13 |
107 (arg->rg_red_blue3_enable & 0x01) << 12 |
108 (arg->rnd_red_blue3_enable & 0x01) << 11 |
109 (arg->ro_red_blue3_enable & 0x01) << 10 |
110 (arg->lc_red_blue3_enable & 0x01) << 9 |
111 (arg->pg_red_blue3_enable & 0x01) << 8 |
112 (arg->sw_rk_green3_en & 0x01) << 5 |
113 (arg->rg_green3_enable & 0x01) << 4 |
114 (arg->rnd_green3_enable & 0x01) << 3 |
115 (arg->ro_green3_enable & 0x01) << 2 |
116 (arg->lc_green3_enable & 0x01) << 1 |
117 (arg->pg_green3_enable & 0x01);
118 rkisp_iowrite32(params_vdev, value, ISP_DPCC0_METHODS_SET_3);
119 rkisp_iowrite32(params_vdev, value, ISP_DPCC1_METHODS_SET_3);
120 rkisp_iowrite32(params_vdev, value, ISP_DPCC2_METHODS_SET_3);
121
122 value = ISP2X_PACK_4BYTE(arg->line_thr_1_g, arg->line_thr_1_rb,
123 arg->sw_mindis1_g, arg->sw_mindis1_rb);
124 rkisp_iowrite32(params_vdev, value, ISP_DPCC0_LINE_THRESH_1);
125 rkisp_iowrite32(params_vdev, value, ISP_DPCC1_LINE_THRESH_1);
126 rkisp_iowrite32(params_vdev, value, ISP_DPCC2_LINE_THRESH_1);
127
128 value = ISP2X_PACK_4BYTE(arg->line_mad_fac_1_g, arg->line_mad_fac_1_rb,
129 arg->sw_dis_scale_max1, arg->sw_dis_scale_min1);
130 rkisp_iowrite32(params_vdev, value, ISP_DPCC0_LINE_MAD_FAC_1);
131 rkisp_iowrite32(params_vdev, value, ISP_DPCC1_LINE_MAD_FAC_1);
132 rkisp_iowrite32(params_vdev, value, ISP_DPCC2_LINE_MAD_FAC_1);
133
134 value = ISP2X_PACK_4BYTE(arg->pg_fac_1_g, arg->pg_fac_1_rb, 0, 0);
135 rkisp_iowrite32(params_vdev, value, ISP_DPCC0_PG_FAC_1);
136 rkisp_iowrite32(params_vdev, value, ISP_DPCC1_PG_FAC_1);
137 rkisp_iowrite32(params_vdev, value, ISP_DPCC2_PG_FAC_1);
138
139 value = ISP2X_PACK_4BYTE(arg->rnd_thr_1_g, arg->rnd_thr_1_rb, 0, 0);
140 rkisp_iowrite32(params_vdev, value, ISP_DPCC0_RND_THRESH_1);
141 rkisp_iowrite32(params_vdev, value, ISP_DPCC1_RND_THRESH_1);
142 rkisp_iowrite32(params_vdev, value, ISP_DPCC2_RND_THRESH_1);
143
144 value = ISP2X_PACK_4BYTE(arg->rg_fac_1_g, arg->rg_fac_1_rb, 0, 0);
145 rkisp_iowrite32(params_vdev, value, ISP_DPCC0_RG_FAC_1);
146 rkisp_iowrite32(params_vdev, value, ISP_DPCC1_RG_FAC_1);
147 rkisp_iowrite32(params_vdev, value, ISP_DPCC2_RG_FAC_1);
148
149 value = ISP2X_PACK_4BYTE(arg->line_thr_2_g, arg->line_thr_2_rb,
150 arg->sw_mindis2_g, arg->sw_mindis2_rb);
151 rkisp_iowrite32(params_vdev, value, ISP_DPCC0_LINE_THRESH_2);
152 rkisp_iowrite32(params_vdev, value, ISP_DPCC1_LINE_THRESH_2);
153 rkisp_iowrite32(params_vdev, value, ISP_DPCC2_LINE_THRESH_2);
154
155 value = ISP2X_PACK_4BYTE(arg->line_mad_fac_2_g, arg->line_mad_fac_2_rb,
156 arg->sw_dis_scale_max2, arg->sw_dis_scale_min2);
157 rkisp_iowrite32(params_vdev, value, ISP_DPCC0_LINE_MAD_FAC_2);
158 rkisp_iowrite32(params_vdev, value, ISP_DPCC1_LINE_MAD_FAC_2);
159 rkisp_iowrite32(params_vdev, value, ISP_DPCC2_LINE_MAD_FAC_2);
160
161 value = ISP2X_PACK_4BYTE(arg->pg_fac_2_g, arg->pg_fac_2_rb, 0, 0);
162 rkisp_iowrite32(params_vdev, value, ISP_DPCC0_PG_FAC_2);
163 rkisp_iowrite32(params_vdev, value, ISP_DPCC1_PG_FAC_2);
164 rkisp_iowrite32(params_vdev, value, ISP_DPCC2_PG_FAC_2);
165
166 value = ISP2X_PACK_4BYTE(arg->rnd_thr_2_g, arg->rnd_thr_2_rb, 0, 0);
167 rkisp_iowrite32(params_vdev, value, ISP_DPCC0_RND_THRESH_2);
168 rkisp_iowrite32(params_vdev, value, ISP_DPCC1_RND_THRESH_2);
169 rkisp_iowrite32(params_vdev, value, ISP_DPCC2_RND_THRESH_2);
170
171 value = ISP2X_PACK_4BYTE(arg->rg_fac_2_g, arg->rg_fac_2_rb, 0, 0);
172 rkisp_iowrite32(params_vdev, value, ISP_DPCC0_RG_FAC_2);
173 rkisp_iowrite32(params_vdev, value, ISP_DPCC1_RG_FAC_2);
174 rkisp_iowrite32(params_vdev, value, ISP_DPCC2_RG_FAC_2);
175
176 value = ISP2X_PACK_4BYTE(arg->line_thr_3_g, arg->line_thr_3_rb,
177 arg->sw_mindis3_g, arg->sw_mindis3_rb);
178 rkisp_iowrite32(params_vdev, value, ISP_DPCC0_LINE_THRESH_3);
179 rkisp_iowrite32(params_vdev, value, ISP_DPCC1_LINE_THRESH_3);
180 rkisp_iowrite32(params_vdev, value, ISP_DPCC2_LINE_THRESH_3);
181
182 value = ISP2X_PACK_4BYTE(arg->line_mad_fac_3_g, arg->line_mad_fac_3_rb,
183 arg->sw_dis_scale_max3, arg->sw_dis_scale_min3);
184 rkisp_iowrite32(params_vdev, value, ISP_DPCC0_LINE_MAD_FAC_3);
185 rkisp_iowrite32(params_vdev, value, ISP_DPCC1_LINE_MAD_FAC_3);
186 rkisp_iowrite32(params_vdev, value, ISP_DPCC2_LINE_MAD_FAC_3);
187
188 value = ISP2X_PACK_4BYTE(arg->pg_fac_3_g, arg->pg_fac_3_rb, 0, 0);
189 rkisp_iowrite32(params_vdev, value, ISP_DPCC0_PG_FAC_3);
190 rkisp_iowrite32(params_vdev, value, ISP_DPCC1_PG_FAC_3);
191 rkisp_iowrite32(params_vdev, value, ISP_DPCC2_PG_FAC_3);
192
193 value = ISP2X_PACK_4BYTE(arg->rnd_thr_3_g, arg->rnd_thr_3_rb, 0, 0);
194 rkisp_iowrite32(params_vdev, value, ISP_DPCC0_RND_THRESH_3);
195 rkisp_iowrite32(params_vdev, value, ISP_DPCC1_RND_THRESH_3);
196 rkisp_iowrite32(params_vdev, value, ISP_DPCC2_RND_THRESH_3);
197
198 value = ISP2X_PACK_4BYTE(arg->rg_fac_3_g, arg->rg_fac_3_rb, 0, 0);
199 rkisp_iowrite32(params_vdev, value, ISP_DPCC0_RG_FAC_3);
200 rkisp_iowrite32(params_vdev, value, ISP_DPCC1_RG_FAC_3);
201 rkisp_iowrite32(params_vdev, value, ISP_DPCC2_RG_FAC_3);
202
203 value = (arg->ro_lim_3_rb & 0x03) << 10 |
204 (arg->ro_lim_3_g & 0x03) << 8 |
205 (arg->ro_lim_2_rb & 0x03) << 6 |
206 (arg->ro_lim_2_g & 0x03) << 4 |
207 (arg->ro_lim_1_rb & 0x03) << 2 |
208 (arg->ro_lim_1_g & 0x03);
209 rkisp_iowrite32(params_vdev, value, ISP_DPCC0_RO_LIMITS);
210 rkisp_iowrite32(params_vdev, value, ISP_DPCC1_RO_LIMITS);
211 rkisp_iowrite32(params_vdev, value, ISP_DPCC2_RO_LIMITS);
212
213 value = (arg->rnd_offs_3_rb & 0x03) << 10 |
214 (arg->rnd_offs_3_g & 0x03) << 8 |
215 (arg->rnd_offs_2_rb & 0x03) << 6 |
216 (arg->rnd_offs_2_g & 0x03) << 4 |
217 (arg->rnd_offs_1_rb & 0x03) << 2 |
218 (arg->rnd_offs_1_g & 0x03);
219 rkisp_iowrite32(params_vdev, value, ISP_DPCC0_RND_OFFS);
220 rkisp_iowrite32(params_vdev, value, ISP_DPCC1_RND_OFFS);
221 rkisp_iowrite32(params_vdev, value, ISP_DPCC2_RND_OFFS);
222
223 value = (arg->bpt_rb_3x3 & 0x01) << 11 |
224 (arg->bpt_g_3x3 & 0x01) << 10 |
225 (arg->bpt_incl_rb_center & 0x01) << 9 |
226 (arg->bpt_incl_green_center & 0x01) << 8 |
227 (arg->bpt_use_fix_set & 0x01) << 7 |
228 (arg->bpt_use_set_3 & 0x01) << 6 |
229 (arg->bpt_use_set_2 & 0x01) << 5 |
230 (arg->bpt_use_set_1 & 0x01) << 4 |
231 (arg->bpt_cor_en & 0x01) << 1 |
232 (arg->bpt_det_en & 0x01);
233 rkisp_iowrite32(params_vdev, value, ISP_DPCC0_BPT_CTRL);
234 rkisp_iowrite32(params_vdev, value, ISP_DPCC1_BPT_CTRL);
235 rkisp_iowrite32(params_vdev, value, ISP_DPCC2_BPT_CTRL);
236
237 rkisp_iowrite32(params_vdev, arg->bp_number, ISP_DPCC0_BPT_NUMBER);
238 rkisp_iowrite32(params_vdev, arg->bp_number, ISP_DPCC1_BPT_NUMBER);
239 rkisp_iowrite32(params_vdev, arg->bp_number, ISP_DPCC2_BPT_NUMBER);
240 rkisp_iowrite32(params_vdev, arg->bp_table_addr, ISP_DPCC0_BPT_ADDR);
241 rkisp_iowrite32(params_vdev, arg->bp_table_addr, ISP_DPCC1_BPT_ADDR);
242 rkisp_iowrite32(params_vdev, arg->bp_table_addr, ISP_DPCC2_BPT_ADDR);
243
244 value = ISP2X_PACK_2SHORT(arg->bpt_h_addr, arg->bpt_v_addr);
245 rkisp_iowrite32(params_vdev, value, ISP_DPCC0_BPT_DATA);
246 rkisp_iowrite32(params_vdev, value, ISP_DPCC1_BPT_DATA);
247 rkisp_iowrite32(params_vdev, value, ISP_DPCC2_BPT_DATA);
248
249 rkisp_iowrite32(params_vdev, arg->bp_cnt, ISP_DPCC0_BP_CNT);
250 rkisp_iowrite32(params_vdev, arg->bp_cnt, ISP_DPCC1_BP_CNT);
251 rkisp_iowrite32(params_vdev, arg->bp_cnt, ISP_DPCC2_BP_CNT);
252
253 rkisp_iowrite32(params_vdev, arg->sw_pdaf_en, ISP_DPCC0_PDAF_EN);
254 rkisp_iowrite32(params_vdev, arg->sw_pdaf_en, ISP_DPCC1_PDAF_EN);
255 rkisp_iowrite32(params_vdev, arg->sw_pdaf_en, ISP_DPCC2_PDAF_EN);
256
257 value = 0;
258 for (i = 0; i < ISP2X_DPCC_PDAF_POINT_NUM; i++)
259 value |= (arg->pdaf_point_en[i] & 0x01) << i;
260 rkisp_iowrite32(params_vdev, value, ISP_DPCC0_PDAF_POINT_EN);
261 rkisp_iowrite32(params_vdev, value, ISP_DPCC1_PDAF_POINT_EN);
262 rkisp_iowrite32(params_vdev, value, ISP_DPCC2_PDAF_POINT_EN);
263
264 value = ISP2X_PACK_2SHORT(arg->pdaf_offsetx, arg->pdaf_offsety);
265 rkisp_iowrite32(params_vdev, value, ISP_DPCC0_PDAF_OFFSET);
266 rkisp_iowrite32(params_vdev, value, ISP_DPCC1_PDAF_OFFSET);
267 rkisp_iowrite32(params_vdev, value, ISP_DPCC2_PDAF_OFFSET);
268
269 value = ISP2X_PACK_2SHORT(arg->pdaf_wrapx, arg->pdaf_wrapy);
270 rkisp_iowrite32(params_vdev, value, ISP_DPCC0_PDAF_WRAP);
271 rkisp_iowrite32(params_vdev, value, ISP_DPCC1_PDAF_WRAP);
272 rkisp_iowrite32(params_vdev, value, ISP_DPCC2_PDAF_WRAP);
273
274 value = ISP2X_PACK_2SHORT(arg->pdaf_wrapx_num, arg->pdaf_wrapy_num);
275 rkisp_iowrite32(params_vdev, value, ISP_DPCC0_PDAF_SCOPE);
276 rkisp_iowrite32(params_vdev, value, ISP_DPCC1_PDAF_SCOPE);
277 rkisp_iowrite32(params_vdev, value, ISP_DPCC2_PDAF_SCOPE);
278
279 for (i = 0; i < ISP2X_DPCC_PDAF_POINT_NUM / 2; i++) {
280 value = ISP2X_PACK_4BYTE(arg->point[2 * i].x, arg->point[2 * i].y,
281 arg->point[2 * i + 1].x, arg->point[2 * i + 1].y);
282 rkisp_iowrite32(params_vdev, value, ISP_DPCC0_PDAF_POINT_0 + 4 * i);
283 rkisp_iowrite32(params_vdev, value, ISP_DPCC1_PDAF_POINT_0 + 4 * i);
284 rkisp_iowrite32(params_vdev, value, ISP_DPCC2_PDAF_POINT_0 + 4 * i);
285 }
286
287 rkisp_iowrite32(params_vdev, arg->pdaf_forward_med, ISP_DPCC0_PDAF_FORWARD_MED);
288 rkisp_iowrite32(params_vdev, arg->pdaf_forward_med, ISP_DPCC1_PDAF_FORWARD_MED);
289 rkisp_iowrite32(params_vdev, arg->pdaf_forward_med, ISP_DPCC2_PDAF_FORWARD_MED);
290 }
291
292 static void
isp_dpcc_enable(struct rkisp_isp_params_vdev * params_vdev,bool en)293 isp_dpcc_enable(struct rkisp_isp_params_vdev *params_vdev,
294 bool en)
295 {
296 u32 value;
297
298 value = rkisp_ioread32(params_vdev, ISP_DPCC0_MODE);
299 value &= ~ISP_DPCC_EN;
300
301 if (en)
302 value |= ISP_DPCC_EN;
303 rkisp_iowrite32(params_vdev, value, ISP_DPCC0_MODE);
304 rkisp_iowrite32(params_vdev, value, ISP_DPCC1_MODE);
305 rkisp_iowrite32(params_vdev, value, ISP_DPCC2_MODE);
306 }
307
308 static void
isp_bls_config(struct rkisp_isp_params_vdev * params_vdev,const struct isp2x_bls_cfg * arg)309 isp_bls_config(struct rkisp_isp_params_vdev *params_vdev,
310 const struct isp2x_bls_cfg *arg)
311 {
312 /* avoid to override the old enable value */
313 u32 new_control;
314
315 new_control = rkisp_ioread32(params_vdev, ISP_BLS_CTRL);
316 new_control &= ISP_BLS_ENA;
317 /* fixed subtraction values */
318 if (!arg->enable_auto) {
319 const struct isp2x_bls_fixed_val *pval = &arg->fixed_val;
320
321 switch (params_vdev->raw_type) {
322 case RAW_BGGR:
323 rkisp_iowrite32(params_vdev,
324 pval->r, ISP_BLS_D_FIXED);
325 rkisp_iowrite32(params_vdev,
326 pval->gr, ISP_BLS_C_FIXED);
327 rkisp_iowrite32(params_vdev,
328 pval->gb, ISP_BLS_B_FIXED);
329 rkisp_iowrite32(params_vdev,
330 pval->b, ISP_BLS_A_FIXED);
331 break;
332 case RAW_GBRG:
333 rkisp_iowrite32(params_vdev,
334 pval->r, ISP_BLS_C_FIXED);
335 rkisp_iowrite32(params_vdev,
336 pval->gr, ISP_BLS_D_FIXED);
337 rkisp_iowrite32(params_vdev,
338 pval->gb, ISP_BLS_A_FIXED);
339 rkisp_iowrite32(params_vdev,
340 pval->b, ISP_BLS_B_FIXED);
341 break;
342 case RAW_GRBG:
343 rkisp_iowrite32(params_vdev,
344 pval->r, ISP_BLS_B_FIXED);
345 rkisp_iowrite32(params_vdev,
346 pval->gr, ISP_BLS_A_FIXED);
347 rkisp_iowrite32(params_vdev,
348 pval->gb, ISP_BLS_D_FIXED);
349 rkisp_iowrite32(params_vdev,
350 pval->b, ISP_BLS_C_FIXED);
351 break;
352 case RAW_RGGB:
353 rkisp_iowrite32(params_vdev,
354 pval->r, ISP_BLS_A_FIXED);
355 rkisp_iowrite32(params_vdev,
356 pval->gr, ISP_BLS_B_FIXED);
357 rkisp_iowrite32(params_vdev,
358 pval->gb, ISP_BLS_C_FIXED);
359 rkisp_iowrite32(params_vdev,
360 pval->b, ISP_BLS_D_FIXED);
361 break;
362 default:
363 break;
364 }
365
366 } else {
367 if (arg->en_windows & BIT(1)) {
368 rkisp_iowrite32(params_vdev, arg->bls_window2.h_offs,
369 ISP_BLS_H2_START);
370 rkisp_iowrite32(params_vdev, arg->bls_window2.h_offs + arg->bls_window2.h_size,
371 ISP_BLS_H2_STOP);
372 rkisp_iowrite32(params_vdev, arg->bls_window2.v_offs,
373 ISP_BLS_V2_START);
374 rkisp_iowrite32(params_vdev, arg->bls_window2.v_offs + arg->bls_window2.v_size,
375 ISP_BLS_V2_STOP);
376 new_control |= ISP_BLS_WINDOW_2;
377 }
378
379 if (arg->en_windows & BIT(0)) {
380 rkisp_iowrite32(params_vdev, arg->bls_window1.h_offs,
381 ISP_BLS_H1_START);
382 rkisp_iowrite32(params_vdev, arg->bls_window1.h_offs + arg->bls_window1.h_size,
383 ISP_BLS_H1_STOP);
384 rkisp_iowrite32(params_vdev, arg->bls_window1.v_offs,
385 ISP_BLS_V1_START);
386 rkisp_iowrite32(params_vdev, arg->bls_window1.v_offs + arg->bls_window1.v_size,
387 ISP_BLS_V1_STOP);
388 new_control |= ISP_BLS_WINDOW_1;
389 }
390
391 rkisp_iowrite32(params_vdev, arg->bls_samples,
392 ISP_BLS_SAMPLES);
393
394 new_control |= ISP_BLS_MODE_MEASURED;
395 }
396 rkisp_iowrite32(params_vdev, new_control, ISP_BLS_CTRL);
397 }
398
399 static void
isp_bls_enable(struct rkisp_isp_params_vdev * params_vdev,bool en)400 isp_bls_enable(struct rkisp_isp_params_vdev *params_vdev,
401 bool en)
402 {
403 u32 new_control;
404
405 new_control = rkisp_ioread32(params_vdev, ISP_BLS_CTRL);
406 if (en)
407 new_control |= ISP_BLS_ENA;
408 else
409 new_control &= ~ISP_BLS_ENA;
410 rkisp_iowrite32(params_vdev, new_control, ISP_BLS_CTRL);
411 }
412
413 static void
isp_sdg_config(struct rkisp_isp_params_vdev * params_vdev,const struct isp2x_sdg_cfg * arg)414 isp_sdg_config(struct rkisp_isp_params_vdev *params_vdev,
415 const struct isp2x_sdg_cfg *arg)
416 {
417 int i;
418
419 rkisp_iowrite32(params_vdev,
420 arg->xa_pnts.gamma_dx0, ISP_GAMMA_DX_LO);
421 rkisp_iowrite32(params_vdev,
422 arg->xa_pnts.gamma_dx1, ISP_GAMMA_DX_HI);
423
424 for (i = 0; i < ISP2X_DEGAMMA_CURVE_SIZE; i++) {
425 rkisp_iowrite32(params_vdev, arg->curve_r.gamma_y[i],
426 ISP_GAMMA_R_Y_0 + i * 4);
427 rkisp_iowrite32(params_vdev, arg->curve_g.gamma_y[i],
428 ISP_GAMMA_G_Y_0 + i * 4);
429 rkisp_iowrite32(params_vdev, arg->curve_b.gamma_y[i],
430 ISP_GAMMA_B_Y_0 + i * 4);
431 }
432 }
433
434 static void
isp_sdg_enable(struct rkisp_isp_params_vdev * params_vdev,bool en)435 isp_sdg_enable(struct rkisp_isp_params_vdev *params_vdev,
436 bool en)
437 {
438 if (en) {
439 isp_param_set_bits(params_vdev,
440 CIF_ISP_CTRL,
441 CIF_ISP_CTRL_ISP_GAMMA_IN_ENA);
442 } else {
443 isp_param_clear_bits(params_vdev,
444 CIF_ISP_CTRL,
445 CIF_ISP_CTRL_ISP_GAMMA_IN_ENA);
446 }
447 }
448
449 static void
isp_sihst_config(struct rkisp_isp_params_vdev * params_vdev,const struct isp2x_sihst_cfg * arg)450 isp_sihst_config(struct rkisp_isp_params_vdev *params_vdev,
451 const struct isp2x_sihst_cfg *arg)
452 {
453 u32 i, j;
454 u32 value;
455 u32 hist_ctrl;
456 u32 block_hsize, block_vsize;
457 u32 wnd_num_idx, hist_weight_num;
458 u8 weight15x15[ISP2X_SIHST_WEIGHT_REG_SIZE];
459 const u32 hist_wnd_num[] = {
460 5, 9, 15, 15
461 };
462
463 wnd_num_idx = arg->wnd_num;
464 for (i = 0; i < ISP2X_SIHIST_WIN_NUM; i++) {
465 /* avoid to override the old enable value */
466 hist_ctrl = rkisp_ioread32(params_vdev, ISP_HIST_HIST_CTRL + i * 0x10);
467 hist_ctrl &= ISP2X_SIHST_CTRL_INTRSEL_MASK |
468 ISP2X_SIHST_CTRL_WNDNUM_MASK |
469 ISP2X_SIHST_CTRL_EN_MASK;
470 hist_ctrl = hist_ctrl |
471 ISP2X_SIHST_CTRL_DATASEL_SET(arg->win_cfg[i].data_sel) |
472 ISP2X_SIHST_CTRL_WATERLINE_SET(arg->win_cfg[i].waterline) |
473 ISP2X_SIHST_CTRL_AUTOSTOP_SET(arg->win_cfg[i].auto_stop) |
474 ISP2X_SIHST_CTRL_MODE_SET(arg->win_cfg[i].mode) |
475 ISP2X_SIHST_CTRL_STEPSIZE_SET(arg->win_cfg[i].stepsize);
476 rkisp_iowrite32(params_vdev, hist_ctrl, ISP_HIST_HIST_CTRL + i * 0x10);
477
478 rkisp_iowrite32(params_vdev,
479 ISP2X_SIHST_OFFS_SET(arg->win_cfg[i].win.h_offs,
480 arg->win_cfg[i].win.v_offs),
481 ISP_HIST_HIST_OFFS + i * 0x10);
482
483 block_hsize = arg->win_cfg[i].win.h_size / hist_wnd_num[wnd_num_idx] - 1;
484 block_vsize = arg->win_cfg[i].win.v_size / hist_wnd_num[wnd_num_idx] - 1;
485 rkisp_iowrite32(params_vdev,
486 ISP2X_SIHST_SIZE_SET(block_hsize, block_vsize),
487 ISP_HIST_HIST_SIZE + i * 0x10);
488 }
489
490 memset(weight15x15, 0x00, sizeof(weight15x15));
491 for (i = 0; i < hist_wnd_num[wnd_num_idx]; i++) {
492 for (j = 0; j < hist_wnd_num[wnd_num_idx]; j++) {
493 weight15x15[i * ISP2X_SIHST_ROW_NUM + j] =
494 arg->hist_weight[i * hist_wnd_num[wnd_num_idx] + j];
495 }
496 }
497
498 hist_weight_num = ISP2X_SIHST_WEIGHT_REG_SIZE;
499 for (i = 0; i < (hist_weight_num / 4); i++) {
500 value = ISP2X_SIHST_WEIGHT_SET(
501 weight15x15[4 * i + 0],
502 weight15x15[4 * i + 1],
503 weight15x15[4 * i + 2],
504 weight15x15[4 * i + 3]);
505 rkisp_iowrite32(params_vdev, value,
506 ISP_HIST_HIST_WEIGHT_0 + 4 * i);
507 }
508 value = ISP2X_SIHST_WEIGHT_SET(
509 weight15x15[4 * i + 0], 0, 0, 0);
510 rkisp_iowrite32(params_vdev, value,
511 ISP_HIST_HIST_WEIGHT_0 + 4 * i);
512
513 hist_ctrl = rkisp_ioread32(params_vdev, ISP_HIST_HIST_CTRL);
514 hist_ctrl &= ~ISP2X_SIHST_CTRL_WNDNUM_MASK;
515 hist_ctrl |= ISP2X_SIHST_CTRL_WNDNUM_SET(arg->wnd_num);
516 rkisp_iowrite32(params_vdev, hist_ctrl, ISP_HIST_HIST_CTRL);
517 }
518
519 static void
isp_sihst_enable(struct rkisp_isp_params_vdev * params_vdev,bool en)520 isp_sihst_enable(struct rkisp_isp_params_vdev *params_vdev,
521 bool en)
522 {
523 u32 hist_ctrl;
524
525 hist_ctrl = rkisp_ioread32(params_vdev, ISP_HIST_HIST_CTRL);
526 hist_ctrl &= ~ISP2X_SIHST_CTRL_EN_MASK;
527 if (en)
528 hist_ctrl |= ISP2X_SIHST_CTRL_EN_SET(0x1);
529
530 rkisp_iowrite32(params_vdev, hist_ctrl, ISP_HIST_HIST_CTRL);
531 }
532
533 static void __maybe_unused
isp_lsc_matrix_cfg_sram(struct rkisp_isp_params_vdev * params_vdev,const struct isp2x_lsc_cfg * pconfig,bool is_check)534 isp_lsc_matrix_cfg_sram(struct rkisp_isp_params_vdev *params_vdev,
535 const struct isp2x_lsc_cfg *pconfig, bool is_check)
536 {
537 int i, j;
538 unsigned int sram_addr;
539 unsigned int data;
540
541 if (is_check &&
542 !(rkisp_ioread32(params_vdev, ISP_LSC_CTRL) & ISP_LSC_EN))
543 return;
544
545 /* CIF_ISP_LSC_TABLE_ADDRESS_153 = ( 17 * 18 ) >> 1 */
546 sram_addr = CIF_ISP_LSC_TABLE_ADDRESS_0;
547 rkisp_write(params_vdev->dev, ISP_LSC_R_TABLE_ADDR, sram_addr, true);
548 rkisp_write(params_vdev->dev, ISP_LSC_GR_TABLE_ADDR, sram_addr, true);
549 rkisp_write(params_vdev->dev, ISP_LSC_GB_TABLE_ADDR, sram_addr, true);
550 rkisp_write(params_vdev->dev, ISP_LSC_B_TABLE_ADDR, sram_addr, true);
551
552 /* program data tables (table size is 9 * 17 = 153) */
553 for (i = 0; i < CIF_ISP_LSC_SECTORS_MAX * CIF_ISP_LSC_SECTORS_MAX;
554 i += CIF_ISP_LSC_SECTORS_MAX) {
555 /*
556 * 17 sectors with 2 values in one DWORD = 9
557 * DWORDs (2nd value of last DWORD unused)
558 */
559 for (j = 0; j < CIF_ISP_LSC_SECTORS_MAX - 1; j += 2) {
560 data = ISP_ISP_LSC_TABLE_DATA(pconfig->r_data_tbl[i + j],
561 pconfig->r_data_tbl[i + j + 1]);
562 rkisp_write(params_vdev->dev, ISP_LSC_R_TABLE_DATA, data, true);
563
564 data = ISP_ISP_LSC_TABLE_DATA(pconfig->gr_data_tbl[i + j],
565 pconfig->gr_data_tbl[i + j + 1]);
566 rkisp_write(params_vdev->dev, ISP_LSC_GR_TABLE_DATA, data, true);
567
568 data = ISP_ISP_LSC_TABLE_DATA(pconfig->gb_data_tbl[i + j],
569 pconfig->gb_data_tbl[i + j + 1]);
570 rkisp_write(params_vdev->dev, ISP_LSC_GB_TABLE_DATA, data, true);
571
572 data = ISP_ISP_LSC_TABLE_DATA(pconfig->b_data_tbl[i + j],
573 pconfig->b_data_tbl[i + j + 1]);
574 rkisp_write(params_vdev->dev, ISP_LSC_B_TABLE_DATA, data, true);
575 }
576
577 data = ISP_ISP_LSC_TABLE_DATA(pconfig->r_data_tbl[i + j], 0);
578 rkisp_write(params_vdev->dev, ISP_LSC_R_TABLE_DATA, data, true);
579
580 data = ISP_ISP_LSC_TABLE_DATA(pconfig->gr_data_tbl[i + j], 0);
581 rkisp_write(params_vdev->dev, ISP_LSC_GR_TABLE_DATA, data, true);
582
583 data = ISP_ISP_LSC_TABLE_DATA(pconfig->gb_data_tbl[i + j], 0);
584 rkisp_write(params_vdev->dev, ISP_LSC_GB_TABLE_DATA, data, true);
585
586 data = ISP_ISP_LSC_TABLE_DATA(pconfig->b_data_tbl[i + j], 0);
587 rkisp_write(params_vdev->dev, ISP_LSC_B_TABLE_DATA, data, true);
588 }
589 }
590
591 static void __maybe_unused
isp_lsc_matrix_cfg_ddr(struct rkisp_isp_params_vdev * params_vdev,const struct isp2x_lsc_cfg * pconfig)592 isp_lsc_matrix_cfg_ddr(struct rkisp_isp_params_vdev *params_vdev,
593 const struct isp2x_lsc_cfg *pconfig)
594 {
595 struct rkisp_isp_params_val_v2x *priv_val;
596 u32 data, buf_idx, *vaddr[4], index[4];
597 void *buf_vaddr;
598 int i, j;
599
600 memset(&index[0], 0, sizeof(index));
601 priv_val = (struct rkisp_isp_params_val_v2x *)params_vdev->priv_val;
602 buf_idx = (priv_val->buf_lsclut_idx++) % RKISP_PARAM_LSC_LUT_BUF_NUM;
603 buf_vaddr = priv_val->buf_lsclut[buf_idx].vaddr;
604
605 vaddr[0] = buf_vaddr;
606 vaddr[1] = buf_vaddr + RKISP_PARAM_LSC_LUT_TBL_SIZE;
607 vaddr[2] = buf_vaddr + RKISP_PARAM_LSC_LUT_TBL_SIZE * 2;
608 vaddr[3] = buf_vaddr + RKISP_PARAM_LSC_LUT_TBL_SIZE * 3;
609
610 /* program data tables (table size is 9 * 17 = 153) */
611 for (i = 0; i < CIF_ISP_LSC_SECTORS_MAX * CIF_ISP_LSC_SECTORS_MAX;
612 i += CIF_ISP_LSC_SECTORS_MAX) {
613 /*
614 * 17 sectors with 2 values in one DWORD = 9
615 * DWORDs (2nd value of last DWORD unused)
616 */
617 for (j = 0; j < CIF_ISP_LSC_SECTORS_MAX - 1; j += 2) {
618 data = ISP_ISP_LSC_TABLE_DATA(
619 pconfig->r_data_tbl[i + j],
620 pconfig->r_data_tbl[i + j + 1]);
621 vaddr[0][index[0]++] = data;
622
623 data = ISP_ISP_LSC_TABLE_DATA(
624 pconfig->gr_data_tbl[i + j],
625 pconfig->gr_data_tbl[i + j + 1]);
626 vaddr[1][index[1]++] = data;
627
628 data = ISP_ISP_LSC_TABLE_DATA(
629 pconfig->b_data_tbl[i + j],
630 pconfig->b_data_tbl[i + j + 1]);
631 vaddr[2][index[2]++] = data;
632
633 data = ISP_ISP_LSC_TABLE_DATA(
634 pconfig->gb_data_tbl[i + j],
635 pconfig->gb_data_tbl[i + j + 1]);
636 vaddr[3][index[3]++] = data;
637 }
638
639 data = ISP_ISP_LSC_TABLE_DATA(
640 pconfig->r_data_tbl[i + j],
641 0);
642 vaddr[0][index[0]++] = data;
643
644 data = ISP_ISP_LSC_TABLE_DATA(
645 pconfig->gr_data_tbl[i + j],
646 0);
647 vaddr[1][index[1]++] = data;
648
649 data = ISP_ISP_LSC_TABLE_DATA(
650 pconfig->b_data_tbl[i + j],
651 0);
652 vaddr[2][index[2]++] = data;
653
654 data = ISP_ISP_LSC_TABLE_DATA(
655 pconfig->gb_data_tbl[i + j],
656 0);
657 vaddr[3][index[3]++] = data;
658 }
659 rkisp_prepare_buffer(params_vdev->dev, &priv_val->buf_lsclut[buf_idx]);
660 data = priv_val->buf_lsclut[buf_idx].dma_addr;
661 rkisp_iowrite32(params_vdev, data, MI_LUT_LSC_RD_BASE);
662 rkisp_iowrite32(params_vdev, RKISP_PARAM_LSC_LUT_BUF_SIZE, MI_LUT_LSC_RD_WSIZE);
663 }
664
665 static void
isp_lsc_config(struct rkisp_isp_params_vdev * params_vdev,const struct isp2x_lsc_cfg * arg)666 isp_lsc_config(struct rkisp_isp_params_vdev *params_vdev,
667 const struct isp2x_lsc_cfg *arg)
668 {
669 struct isp2x_isp_params_cfg *params_rec = params_vdev->isp2x_params;
670 struct rkisp_device *dev = params_vdev->dev;
671 unsigned int data;
672 u32 lsc_ctrl;
673 int i;
674
675 /* To config must be off , store the current status firstly */
676 lsc_ctrl = rkisp_ioread32(params_vdev, ISP_LSC_CTRL);
677 isp_param_clear_bits(params_vdev, ISP_LSC_CTRL, ISP_LSC_EN);
678 /* online mode lsc lut load from ddr quick for some sensor VB short
679 * readback mode lsc lut AHB config to sram, once for single device,
680 * need record to switch for multi-device.
681 */
682 if (!IS_HDR_RDBK(dev->rd_mode))
683 isp_lsc_matrix_cfg_ddr(params_vdev, arg);
684 else if (dev->hw_dev->is_single)
685 isp_lsc_matrix_cfg_sram(params_vdev, arg, false);
686 else
687 params_rec->others.lsc_cfg = *arg;
688
689 for (i = 0; i < 4; i++) {
690 /* program x size tables */
691 data = CIF_ISP_LSC_SECT_SIZE(arg->x_size_tbl[i * 2],
692 arg->x_size_tbl[i * 2 + 1]);
693 rkisp_iowrite32(params_vdev, data,
694 ISP_LSC_XSIZE_01 + i * 4);
695
696 /* program x grad tables */
697 data = CIF_ISP_LSC_SECT_SIZE(arg->x_grad_tbl[i * 2],
698 arg->x_grad_tbl[i * 2 + 1]);
699 rkisp_iowrite32(params_vdev, data,
700 ISP_LSC_XGRAD_01 + i * 4);
701
702 /* program y size tables */
703 data = CIF_ISP_LSC_SECT_SIZE(arg->y_size_tbl[i * 2],
704 arg->y_size_tbl[i * 2 + 1]);
705 rkisp_iowrite32(params_vdev, data,
706 ISP_LSC_YSIZE_01 + i * 4);
707
708 /* program y grad tables */
709 data = CIF_ISP_LSC_SECT_SIZE(arg->y_grad_tbl[i * 2],
710 arg->y_grad_tbl[i * 2 + 1]);
711 rkisp_iowrite32(params_vdev, data,
712 ISP_LSC_YGRAD_01 + i * 4);
713 }
714
715 /* restore the lsc ctrl status */
716 if (lsc_ctrl & ISP_LSC_EN) {
717 if (!IS_HDR_RDBK(dev->rd_mode))
718 lsc_ctrl |= ISP_LSC_LUT_EN;
719 isp_param_set_bits(params_vdev, ISP_LSC_CTRL, lsc_ctrl);
720 } else {
721 isp_param_clear_bits(params_vdev, ISP_LSC_CTRL, ISP_LSC_EN);
722 }
723 }
724
725 static void
isp_lsc_enable(struct rkisp_isp_params_vdev * params_vdev,bool en)726 isp_lsc_enable(struct rkisp_isp_params_vdev *params_vdev,
727 bool en)
728 {
729 struct rkisp_device *dev = params_vdev->dev;
730 u32 val = ISP_LSC_EN;
731
732 if (!IS_HDR_RDBK(dev->rd_mode))
733 val |= ISP_LSC_LUT_EN;
734
735 if (en)
736 isp_param_set_bits(params_vdev, ISP_LSC_CTRL, val);
737 else
738 isp_param_clear_bits(params_vdev, ISP_LSC_CTRL, ISP_LSC_EN);
739 }
740
741 static void
isp_awbgain_config(struct rkisp_isp_params_vdev * params_vdev,const struct isp2x_awb_gain_cfg * arg)742 isp_awbgain_config(struct rkisp_isp_params_vdev *params_vdev,
743 const struct isp2x_awb_gain_cfg *arg)
744 {
745 struct rkisp_device *dev = params_vdev->dev;
746
747 if (!arg->gain_green_r || !arg->gain_green_b ||
748 !arg->gain_red || !arg->gain_blue) {
749 dev_err(dev->dev, "awb gain is zero!\n");
750 return;
751 }
752
753 rkisp_iowrite32(params_vdev,
754 CIF_ISP_AWB_GAIN_R_SET(arg->gain_green_r) |
755 arg->gain_green_b, CIF_ISP_AWB_GAIN_G_V12);
756
757 rkisp_iowrite32(params_vdev, CIF_ISP_AWB_GAIN_R_SET(arg->gain_red) |
758 arg->gain_blue, CIF_ISP_AWB_GAIN_RB_V12);
759 }
760
761 static void
isp_awbgain_enable(struct rkisp_isp_params_vdev * params_vdev,bool en)762 isp_awbgain_enable(struct rkisp_isp_params_vdev *params_vdev,
763 bool en)
764 {
765 if (en)
766 isp_param_set_bits(params_vdev, CIF_ISP_CTRL,
767 CIF_ISP_CTRL_ISP_AWB_ENA);
768 else
769 isp_param_clear_bits(params_vdev, CIF_ISP_CTRL,
770 CIF_ISP_CTRL_ISP_AWB_ENA);
771 }
772
773 static void
isp_debayer_config(struct rkisp_isp_params_vdev * params_vdev,const struct isp2x_debayer_cfg * arg)774 isp_debayer_config(struct rkisp_isp_params_vdev *params_vdev,
775 const struct isp2x_debayer_cfg *arg)
776 {
777 u32 value;
778
779 value = rkisp_ioread32(params_vdev, ISP_DEBAYER_CONTROL);
780 value &= ISP_DEBAYER_EN;
781
782 value |= (arg->filter_c_en & 0x01) << 8 |
783 (arg->filter_g_en & 0x01) << 4;
784 rkisp_iowrite32(params_vdev, value, ISP_DEBAYER_CONTROL);
785
786 value = (arg->thed1 & 0x0F) << 12 |
787 (arg->thed0 & 0x0F) << 8 |
788 (arg->dist_scale & 0x0F) << 4 |
789 (arg->max_ratio & 0x07) << 1 |
790 (arg->clip_en & 0x01);
791 rkisp_iowrite32(params_vdev, value, ISP_DEBAYER_G_INTERP);
792
793 value = (arg->filter1_coe5 & 0x0F) << 16 |
794 (arg->filter1_coe4 & 0x0F) << 12 |
795 (arg->filter1_coe3 & 0x0F) << 8 |
796 (arg->filter1_coe2 & 0x0F) << 4 |
797 (arg->filter1_coe1 & 0x0F);
798 rkisp_iowrite32(params_vdev, value, ISP_DEBAYER_G_INTERP_FILTER1);
799
800 value = (arg->filter2_coe5 & 0x0F) << 16 |
801 (arg->filter2_coe4 & 0x0F) << 12 |
802 (arg->filter2_coe3 & 0x0F) << 8 |
803 (arg->filter2_coe2 & 0x0F) << 4 |
804 (arg->filter2_coe1 & 0x0F);
805 rkisp_iowrite32(params_vdev, value, ISP_DEBAYER_G_INTERP_FILTER2);
806
807 value = (arg->hf_offset & 0xFFFF) << 16 |
808 (arg->gain_offset & 0x0F) << 8 |
809 (arg->offset & 0x1F);
810 rkisp_iowrite32(params_vdev, value, ISP_DEBAYER_G_FILTER);
811
812 value = (arg->shift_num & 0x03) << 16 |
813 (arg->order_max & 0x1F) << 8 |
814 (arg->order_min & 0x1F);
815 rkisp_iowrite32(params_vdev, value, ISP_DEBAYER_C_FILTER);
816 }
817
818 static void
isp_debayer_enable(struct rkisp_isp_params_vdev * params_vdev,bool en)819 isp_debayer_enable(struct rkisp_isp_params_vdev *params_vdev,
820 bool en)
821 {
822 if (en)
823 isp_param_set_bits(params_vdev,
824 ISP_DEBAYER_CONTROL,
825 ISP_DEBAYER_EN);
826 else
827 isp_param_clear_bits(params_vdev,
828 ISP_DEBAYER_CONTROL,
829 ISP_DEBAYER_EN);
830 }
831
832 static void
isp_ccm_config(struct rkisp_isp_params_vdev * params_vdev,const struct isp2x_ccm_cfg * arg)833 isp_ccm_config(struct rkisp_isp_params_vdev *params_vdev,
834 const struct isp2x_ccm_cfg *arg)
835 {
836 u32 value;
837 u32 i;
838
839 value = ISP2X_PACK_2SHORT(arg->coeff0_r, arg->coeff1_r);
840 rkisp_iowrite32(params_vdev, value, ISP_CCM_COEFF0_R);
841
842 value = ISP2X_PACK_2SHORT(arg->coeff2_r, arg->offset_r);
843 rkisp_iowrite32(params_vdev, value, ISP_CCM_COEFF1_R);
844
845 value = ISP2X_PACK_2SHORT(arg->coeff0_g, arg->coeff1_g);
846 rkisp_iowrite32(params_vdev, value, ISP_CCM_COEFF0_G);
847
848 value = ISP2X_PACK_2SHORT(arg->coeff2_g, arg->offset_g);
849 rkisp_iowrite32(params_vdev, value, ISP_CCM_COEFF1_G);
850
851 value = ISP2X_PACK_2SHORT(arg->coeff0_b, arg->coeff1_b);
852 rkisp_iowrite32(params_vdev, value, ISP_CCM_COEFF0_B);
853
854 value = ISP2X_PACK_2SHORT(arg->coeff2_b, arg->offset_b);
855 rkisp_iowrite32(params_vdev, value, ISP_CCM_COEFF1_B);
856
857 value = ISP2X_PACK_2SHORT(arg->coeff0_y, arg->coeff1_y);
858 rkisp_iowrite32(params_vdev, value, ISP_CCM_COEFF0_Y);
859
860 value = ISP2X_PACK_2SHORT(arg->coeff2_y, 0);
861 rkisp_iowrite32(params_vdev, value, ISP_CCM_COEFF1_Y);
862
863 for (i = 0; i < ISP2X_CCM_CURVE_NUM / 2; i++) {
864 value = ISP2X_PACK_2SHORT(arg->alp_y[2 * i], arg->alp_y[2 * i + 1]);
865 rkisp_iowrite32(params_vdev, value, ISP_CCM_ALP_Y0 + 4 * i);
866 }
867 value = ISP2X_PACK_2SHORT(arg->alp_y[2 * i], 0);
868 rkisp_iowrite32(params_vdev, value, ISP_CCM_ALP_Y0 + 4 * i);
869
870 value = arg->bound_bit & 0x0F;
871 rkisp_iowrite32(params_vdev, value, ISP_CCM_BOUND_BIT);
872 }
873
874 static void
isp_ccm_enable(struct rkisp_isp_params_vdev * params_vdev,bool en)875 isp_ccm_enable(struct rkisp_isp_params_vdev *params_vdev,
876 bool en)
877 {
878 if (en)
879 isp_param_set_bits(params_vdev, ISP_CCM_CTRL, ISP_CCM_EN);
880 else
881 isp_param_clear_bits(params_vdev, ISP_CCM_CTRL, ISP_CCM_EN);
882 }
883
884 static void
isp_goc_config(struct rkisp_isp_params_vdev * params_vdev,const struct isp2x_gammaout_cfg * arg)885 isp_goc_config(struct rkisp_isp_params_vdev *params_vdev,
886 const struct isp2x_gammaout_cfg *arg)
887 {
888 int i;
889 u32 value;
890
891 if (arg->equ_segm)
892 isp_param_set_bits(params_vdev, ISP_GAMMA_OUT_CTRL, 0x02);
893 else
894 isp_param_clear_bits(params_vdev, ISP_GAMMA_OUT_CTRL, 0x02);
895
896 rkisp_iowrite32(params_vdev, arg->offset, ISP_GAMMA_OUT_OFFSET);
897 for (i = 0; i < ISP2X_GAMMA_OUT_MAX_SAMPLES / 2; i++) {
898 value = ISP2X_PACK_2SHORT(
899 arg->gamma_y[2 * i],
900 arg->gamma_y[2 * i + 1]);
901 rkisp_iowrite32(params_vdev, value, ISP_GAMMA_OUT_Y0 + i * 4);
902 }
903
904 rkisp_iowrite32(params_vdev, arg->gamma_y[2 * i], ISP_GAMMA_OUT_Y0 + i * 4);
905 }
906
907 static void
isp_goc_enable(struct rkisp_isp_params_vdev * params_vdev,bool en)908 isp_goc_enable(struct rkisp_isp_params_vdev *params_vdev,
909 bool en)
910 {
911 if (en)
912 isp_param_set_bits(params_vdev, ISP_GAMMA_OUT_CTRL, 0x01);
913 else
914 isp_param_clear_bits(params_vdev, ISP_GAMMA_OUT_CTRL, 0x01);
915 }
916
917 static void
isp_cproc_config(struct rkisp_isp_params_vdev * params_vdev,const struct isp2x_cproc_cfg * arg)918 isp_cproc_config(struct rkisp_isp_params_vdev *params_vdev,
919 const struct isp2x_cproc_cfg *arg)
920 {
921 u32 quantization = params_vdev->quantization;
922
923 rkisp_iowrite32(params_vdev, arg->contrast, CPROC_CONTRAST);
924 rkisp_iowrite32(params_vdev, arg->hue, CPROC_HUE);
925 rkisp_iowrite32(params_vdev, arg->sat, CPROC_SATURATION);
926 rkisp_iowrite32(params_vdev, arg->brightness, CPROC_BRIGHTNESS);
927
928 if (quantization != V4L2_QUANTIZATION_FULL_RANGE) {
929 isp_param_clear_bits(params_vdev, CPROC_CTRL,
930 CIF_C_PROC_YOUT_FULL |
931 CIF_C_PROC_YIN_FULL |
932 CIF_C_PROC_COUT_FULL);
933 } else {
934 isp_param_set_bits(params_vdev, CPROC_CTRL,
935 CIF_C_PROC_YOUT_FULL |
936 CIF_C_PROC_YIN_FULL |
937 CIF_C_PROC_COUT_FULL);
938 }
939 }
940
941 static void
isp_cproc_enable(struct rkisp_isp_params_vdev * params_vdev,bool en)942 isp_cproc_enable(struct rkisp_isp_params_vdev *params_vdev,
943 bool en)
944 {
945 if (en)
946 isp_param_set_bits(params_vdev,
947 CPROC_CTRL,
948 CIF_C_PROC_CTR_ENABLE);
949 else
950 isp_param_clear_bits(params_vdev,
951 CPROC_CTRL,
952 CIF_C_PROC_CTR_ENABLE);
953 }
954
955 static void
isp_siaf_config(struct rkisp_isp_params_vdev * params_vdev,const struct isp2x_siaf_cfg * arg)956 isp_siaf_config(struct rkisp_isp_params_vdev *params_vdev,
957 const struct isp2x_siaf_cfg *arg)
958 {
959 unsigned int i;
960 size_t num_of_win;
961 u32 afm_ctrl;
962
963 num_of_win = min_t(size_t, ARRAY_SIZE(arg->afm_win),
964 arg->num_afm_win);
965 afm_ctrl = rkisp_ioread32(params_vdev, ISP_AFM_CTRL);
966
967 /* Switch off to configure. */
968 isp_param_clear_bits(params_vdev, ISP_AFM_CTRL, ISP2X_SIAF_ENA);
969 for (i = 0; i < num_of_win; i++) {
970 rkisp_iowrite32(params_vdev,
971 ISP2X_SIAF_WIN_X(arg->afm_win[i].win.h_offs) |
972 ISP2X_SIAF_WIN_Y(arg->afm_win[i].win.v_offs),
973 ISP_AFM_LT_A + i * 8);
974 rkisp_iowrite32(params_vdev,
975 ISP2X_SIAF_WIN_X(arg->afm_win[i].win.h_size +
976 arg->afm_win[i].win.h_offs) |
977 ISP2X_SIAF_WIN_Y(arg->afm_win[i].win.v_size +
978 arg->afm_win[i].win.v_offs),
979 ISP_AFM_RB_A + i * 8);
980 }
981 rkisp_iowrite32(params_vdev, arg->thres, ISP_AFM_THRES);
982
983 rkisp_iowrite32(params_vdev,
984 ISP2X_SIAF_SET_SHIFT_A(arg->afm_win[0].lum_shift, arg->afm_win[0].sum_shift) |
985 ISP2X_SIAF_SET_SHIFT_B(arg->afm_win[1].lum_shift, arg->afm_win[1].sum_shift) |
986 ISP2X_SIAF_SET_SHIFT_C(arg->afm_win[2].lum_shift, arg->afm_win[2].sum_shift),
987 ISP_AFM_VAR_SHIFT);
988
989 /* restore afm status */
990 rkisp_iowrite32(params_vdev, afm_ctrl, ISP_AFM_CTRL);
991 }
992
993 static void
isp_siaf_enable(struct rkisp_isp_params_vdev * params_vdev,bool en)994 isp_siaf_enable(struct rkisp_isp_params_vdev *params_vdev,
995 bool en)
996 {
997 u32 afm_ctrl = rkisp_ioread32(params_vdev, ISP_AFM_CTRL);
998
999 if (en)
1000 afm_ctrl |= ISP2X_SIAF_ENA;
1001 else
1002 afm_ctrl &= ~ISP2X_SIAF_ENA;
1003
1004 rkisp_iowrite32(params_vdev, afm_ctrl, ISP_AFM_CTRL);
1005 }
1006
1007 static void
isp_siawb_config(struct rkisp_isp_params_vdev * params_vdev,const struct isp2x_siawb_meas_cfg * arg)1008 isp_siawb_config(struct rkisp_isp_params_vdev *params_vdev,
1009 const struct isp2x_siawb_meas_cfg *arg)
1010 {
1011 u32 reg_val = 0;
1012 /* based on the mode,configure the awb module */
1013 if (arg->awb_mode == CIFISP_AWB_MODE_YCBCR) {
1014 /* Reference Cb and Cr */
1015 rkisp_iowrite32(params_vdev,
1016 CIF_ISP_AWB_REF_CR_SET(arg->awb_ref_cr) |
1017 arg->awb_ref_cb, CIF_ISP_AWB_REF_V10);
1018 /* Yc Threshold */
1019 rkisp_iowrite32(params_vdev,
1020 CIF_ISP_AWB_MAX_Y_SET(arg->max_y) |
1021 CIF_ISP_AWB_MIN_Y_SET(arg->min_y) |
1022 CIF_ISP_AWB_MAX_CS_SET(arg->max_csum) |
1023 arg->min_c, CIF_ISP_AWB_THRESH_V10);
1024 }
1025
1026 reg_val = rkisp_ioread32(params_vdev, CIF_ISP_AWB_PROP_V10);
1027 if (arg->enable_ymax_cmp)
1028 reg_val |= CIF_ISP_AWB_YMAX_CMP_EN;
1029 else
1030 reg_val &= ~CIF_ISP_AWB_YMAX_CMP_EN;
1031 if (arg->awb_mode != CIFISP_AWB_MODE_YCBCR)
1032 reg_val |= CIF_ISP_AWB_MODE_RGB;
1033 else
1034 reg_val &= ~CIF_ISP_AWB_MODE_RGB;
1035 rkisp_iowrite32(params_vdev, reg_val, CIF_ISP_AWB_PROP_V10);
1036
1037 /* window offset */
1038 rkisp_iowrite32(params_vdev,
1039 arg->awb_wnd.v_offs, CIF_ISP_AWB_WND_V_OFFS_V10);
1040 rkisp_iowrite32(params_vdev,
1041 arg->awb_wnd.h_offs, CIF_ISP_AWB_WND_H_OFFS_V10);
1042 /* AWB window size */
1043 rkisp_iowrite32(params_vdev,
1044 arg->awb_wnd.v_size, CIF_ISP_AWB_WND_V_SIZE_V10);
1045 rkisp_iowrite32(params_vdev,
1046 arg->awb_wnd.h_size, CIF_ISP_AWB_WND_H_SIZE_V10);
1047 /* Number of frames */
1048 rkisp_iowrite32(params_vdev,
1049 arg->frames, CIF_ISP_AWB_FRAMES_V10);
1050 }
1051
1052 static void
isp_siawb_enable(struct rkisp_isp_params_vdev * params_vdev,bool en)1053 isp_siawb_enable(struct rkisp_isp_params_vdev *params_vdev,
1054 bool en)
1055 {
1056 u32 reg_val = rkisp_ioread32(params_vdev, CIF_ISP_AWB_PROP_V10);
1057
1058 /* switch off */
1059 reg_val &= CIF_ISP_AWB_MODE_MASK_NONE;
1060
1061 if (en) {
1062 reg_val |= CIF_ISP_AWB_ENABLE;
1063
1064 rkisp_iowrite32(params_vdev, reg_val, CIF_ISP_AWB_PROP_V10);
1065 } else {
1066 rkisp_iowrite32(params_vdev,
1067 reg_val, CIF_ISP_AWB_PROP_V10);
1068 }
1069 }
1070
1071 static void
isp_ie_config(struct rkisp_isp_params_vdev * params_vdev,const struct isp2x_ie_cfg * arg)1072 isp_ie_config(struct rkisp_isp_params_vdev *params_vdev,
1073 const struct isp2x_ie_cfg *arg)
1074 {
1075 u32 eff_ctrl;
1076
1077 eff_ctrl = rkisp_ioread32(params_vdev, CIF_IMG_EFF_CTRL);
1078 eff_ctrl &= ~CIF_IMG_EFF_CTRL_MODE_MASK;
1079
1080 if (params_vdev->quantization == V4L2_QUANTIZATION_FULL_RANGE)
1081 eff_ctrl |= CIF_IMG_EFF_CTRL_YCBCR_FULL;
1082
1083 switch (arg->effect) {
1084 case V4L2_COLORFX_SEPIA:
1085 eff_ctrl |= CIF_IMG_EFF_CTRL_MODE_SEPIA;
1086 break;
1087 case V4L2_COLORFX_SET_CBCR:
1088 rkisp_iowrite32(params_vdev, arg->eff_tint, CIF_IMG_EFF_TINT);
1089 eff_ctrl |= CIF_IMG_EFF_CTRL_MODE_SEPIA;
1090 break;
1091 /*
1092 * Color selection is similar to water color(AQUA):
1093 * grayscale + selected color w threshold
1094 */
1095 case V4L2_COLORFX_AQUA:
1096 eff_ctrl |= CIF_IMG_EFF_CTRL_MODE_COLOR_SEL;
1097 rkisp_iowrite32(params_vdev, arg->color_sel,
1098 CIF_IMG_EFF_COLOR_SEL);
1099 break;
1100 case V4L2_COLORFX_EMBOSS:
1101 eff_ctrl |= CIF_IMG_EFF_CTRL_MODE_EMBOSS;
1102 rkisp_iowrite32(params_vdev, arg->eff_mat_1,
1103 CIF_IMG_EFF_MAT_1);
1104 rkisp_iowrite32(params_vdev, arg->eff_mat_2,
1105 CIF_IMG_EFF_MAT_2);
1106 rkisp_iowrite32(params_vdev, arg->eff_mat_3,
1107 CIF_IMG_EFF_MAT_3);
1108 break;
1109 case V4L2_COLORFX_SKETCH:
1110 eff_ctrl |= CIF_IMG_EFF_CTRL_MODE_SKETCH;
1111 rkisp_iowrite32(params_vdev, arg->eff_mat_3,
1112 CIF_IMG_EFF_MAT_3);
1113 rkisp_iowrite32(params_vdev, arg->eff_mat_4,
1114 CIF_IMG_EFF_MAT_4);
1115 rkisp_iowrite32(params_vdev, arg->eff_mat_5,
1116 CIF_IMG_EFF_MAT_5);
1117 break;
1118 case V4L2_COLORFX_BW:
1119 eff_ctrl |= CIF_IMG_EFF_CTRL_MODE_BLACKWHITE;
1120 break;
1121 case V4L2_COLORFX_NEGATIVE:
1122 eff_ctrl |= CIF_IMG_EFF_CTRL_MODE_NEGATIVE;
1123 break;
1124 default:
1125 break;
1126 }
1127
1128 rkisp_iowrite32(params_vdev, eff_ctrl, CIF_IMG_EFF_CTRL);
1129 }
1130
1131 static void
isp_ie_enable(struct rkisp_isp_params_vdev * params_vdev,bool en)1132 isp_ie_enable(struct rkisp_isp_params_vdev *params_vdev,
1133 bool en)
1134 {
1135 if (en) {
1136 isp_param_set_bits(params_vdev, CIF_IMG_EFF_CTRL,
1137 CIF_IMG_EFF_CTRL_ENABLE);
1138 isp_param_set_bits(params_vdev, CIF_IMG_EFF_CTRL,
1139 CIF_IMG_EFF_CTRL_CFG_UPD);
1140 } else {
1141 isp_param_clear_bits(params_vdev, CIF_IMG_EFF_CTRL,
1142 CIF_IMG_EFF_CTRL_ENABLE);
1143 }
1144 }
1145
1146 static void
isp_yuvae_config(struct rkisp_isp_params_vdev * params_vdev,const struct isp2x_yuvae_meas_cfg * arg)1147 isp_yuvae_config(struct rkisp_isp_params_vdev *params_vdev,
1148 const struct isp2x_yuvae_meas_cfg *arg)
1149 {
1150 u32 i;
1151 u32 exp_ctrl;
1152 u32 block_hsize, block_vsize;
1153 u32 wnd_num_idx = 0;
1154 const u32 ae_wnd_num[] = {
1155 1, 15
1156 };
1157
1158 /* avoid to override the old enable value */
1159 exp_ctrl = rkisp_ioread32(params_vdev, ISP_YUVAE_CTRL);
1160 exp_ctrl &= ~(ISP2X_YUVAE_WNDNUM_SET |
1161 ISP2X_YUVAE_SUBWIN1_EN |
1162 ISP2X_YUVAE_SUBWIN2_EN |
1163 ISP2X_YUVAE_SUBWIN3_EN |
1164 ISP2X_YUVAE_SUBWIN4_EN |
1165 ISP2X_YUVAE_YSEL |
1166 ISP2X_REG_WR_MASK);
1167 if (arg->ysel)
1168 exp_ctrl |= ISP2X_YUVAE_YSEL;
1169 if (arg->wnd_num) {
1170 exp_ctrl |= ISP2X_YUVAE_WNDNUM_SET;
1171 wnd_num_idx = 1;
1172 }
1173 if (arg->subwin_en[0])
1174 exp_ctrl |= ISP2X_YUVAE_SUBWIN1_EN;
1175 if (arg->subwin_en[1])
1176 exp_ctrl |= ISP2X_YUVAE_SUBWIN2_EN;
1177 if (arg->subwin_en[2])
1178 exp_ctrl |= ISP2X_YUVAE_SUBWIN3_EN;
1179 if (arg->subwin_en[3])
1180 exp_ctrl |= ISP2X_YUVAE_SUBWIN4_EN;
1181
1182 rkisp_iowrite32(params_vdev, exp_ctrl, ISP_YUVAE_CTRL);
1183
1184 rkisp_iowrite32(params_vdev,
1185 ISP2X_YUVAE_V_OFFSET_SET(arg->win.v_offs) |
1186 ISP2X_YUVAE_H_OFFSET_SET(arg->win.h_offs),
1187 ISP_YUVAE_OFFSET);
1188
1189 block_hsize = arg->win.h_size / ae_wnd_num[wnd_num_idx] - 1;
1190 block_vsize = arg->win.v_size / ae_wnd_num[wnd_num_idx] - 1;
1191 rkisp_iowrite32(params_vdev,
1192 ISP2X_YUVAE_V_SIZE_SET(block_vsize) |
1193 ISP2X_YUVAE_H_SIZE_SET(block_hsize),
1194 ISP_YUVAE_BLK_SIZE);
1195
1196 for (i = 0; i < ISP2X_YUVAE_SUBWIN_NUM; i++) {
1197 rkisp_iowrite32(params_vdev,
1198 ISP2X_YUVAE_SUBWIN_V_OFFSET_SET(arg->subwin[i].v_offs) |
1199 ISP2X_YUVAE_SUBWIN_H_OFFSET_SET(arg->subwin[i].h_offs),
1200 ISP_YUVAE_WND1_OFFSET + 8 * i);
1201
1202 rkisp_iowrite32(params_vdev,
1203 ISP2X_YUVAE_SUBWIN_V_SIZE_SET(arg->subwin[i].v_size + arg->subwin[i].v_offs) |
1204 ISP2X_YUVAE_SUBWIN_H_SIZE_SET(arg->subwin[i].h_size + arg->subwin[i].h_offs),
1205 ISP_YUVAE_WND1_SIZE + 8 * i);
1206 }
1207 }
1208
1209 static void
isp_yuvae_enable(struct rkisp_isp_params_vdev * params_vdev,bool en)1210 isp_yuvae_enable(struct rkisp_isp_params_vdev *params_vdev,
1211 bool en)
1212 {
1213 u32 exp_ctrl;
1214
1215 exp_ctrl = rkisp_ioread32(params_vdev, ISP_YUVAE_CTRL);
1216 exp_ctrl &= ~ISP2X_REG_WR_MASK;
1217 if (en)
1218 exp_ctrl |= ISP2X_YUVAE_ENA;
1219 else
1220 exp_ctrl &= ~ISP2X_YUVAE_ENA;
1221
1222 rkisp_iowrite32(params_vdev, exp_ctrl, ISP_YUVAE_CTRL);
1223 }
1224
1225 static void
isp_wdr_config(struct rkisp_isp_params_vdev * params_vdev,const struct isp2x_wdr_cfg * arg)1226 isp_wdr_config(struct rkisp_isp_params_vdev *params_vdev,
1227 const struct isp2x_wdr_cfg *arg)
1228 {
1229 int i;
1230
1231 for (i = 0; i < ISP2X_WDR_SIZE; i++) {
1232 if (i <= 39)
1233 rkisp_iowrite32(params_vdev, arg->c_wdr[i],
1234 ISP_WDR_CTRL + i * 4);
1235 else
1236 rkisp_iowrite32(params_vdev, arg->c_wdr[i],
1237 ISP_WDR_CTRL0 + (i - 40) * 4);
1238 }
1239 }
1240
1241 static void
isp_wdr_enable(struct rkisp_isp_params_vdev * params_vdev,bool en)1242 isp_wdr_enable(struct rkisp_isp_params_vdev *params_vdev,
1243 bool en)
1244 {
1245 if (en)
1246 rkisp_iowrite32(params_vdev, 0x030cf1,
1247 ISP_WDR_CTRL0);
1248 else
1249 rkisp_iowrite32(params_vdev, 0x030cf0,
1250 ISP_WDR_CTRL0);
1251 }
1252
1253 static void
isp_iesharp_config(struct rkisp_isp_params_vdev * params_vdev,const struct isp2x_rkiesharp_cfg * arg)1254 isp_iesharp_config(struct rkisp_isp_params_vdev *params_vdev,
1255 const struct isp2x_rkiesharp_cfg *arg)
1256 {
1257 u32 i;
1258 u32 val;
1259 u32 eff_ctrl;
1260 u32 minmax[5];
1261
1262 val = CIF_ISP_PACK_4BYTE(arg->yavg_thr[0],
1263 arg->yavg_thr[1],
1264 arg->yavg_thr[2],
1265 arg->yavg_thr[3]);
1266 rkisp_iowrite32(params_vdev, val,
1267 CIF_RKSHARP_YAVG_THR);
1268
1269 val = CIF_ISP_PACK_4BYTE(arg->delta1[0],
1270 arg->delta2[0],
1271 arg->delta1[1],
1272 arg->delta2[1]);
1273 rkisp_iowrite32(params_vdev, val,
1274 CIF_RKSHARP_DELTA_P0_P1);
1275
1276 val = CIF_ISP_PACK_4BYTE(arg->delta1[2],
1277 arg->delta2[2],
1278 arg->delta1[3],
1279 arg->delta2[3]);
1280 rkisp_iowrite32(params_vdev, val,
1281 CIF_RKSHARP_DELTA_P2_P3);
1282
1283 val = CIF_ISP_PACK_4BYTE(arg->delta1[4],
1284 arg->delta2[4],
1285 0,
1286 0);
1287 rkisp_iowrite32(params_vdev, val,
1288 CIF_RKSHARP_DELTA_P4);
1289
1290 for (i = 0; i < 5; i++)
1291 minmax[i] = arg->minnumber[i] << 4 | arg->maxnumber[i];
1292 val = CIF_ISP_PACK_4BYTE(minmax[0],
1293 minmax[1],
1294 minmax[2],
1295 minmax[3]);
1296 rkisp_iowrite32(params_vdev, val,
1297 CIF_RKSHARP_NPIXEL_P0_P1_P2_P3);
1298 rkisp_iowrite32(params_vdev, minmax[4],
1299 CIF_RKSHARP_NPIXEL_P4);
1300
1301 val = CIF_ISP_PACK_4BYTE(arg->gauss_flat_coe[0],
1302 arg->gauss_flat_coe[1],
1303 arg->gauss_flat_coe[2],
1304 0);
1305 rkisp_iowrite32(params_vdev, val,
1306 CIF_RKSHARP_GAUSS_FLAT_COE1);
1307
1308 val = CIF_ISP_PACK_4BYTE(arg->gauss_flat_coe[3],
1309 arg->gauss_flat_coe[4],
1310 arg->gauss_flat_coe[5],
1311 0);
1312 rkisp_iowrite32(params_vdev, val,
1313 CIF_RKSHARP_GAUSS_FLAT_COE2);
1314
1315 val = CIF_ISP_PACK_4BYTE(arg->gauss_flat_coe[6],
1316 arg->gauss_flat_coe[7],
1317 arg->gauss_flat_coe[8],
1318 0);
1319 rkisp_iowrite32(params_vdev, val,
1320 CIF_RKSHARP_GAUSS_FLAT_COE3);
1321
1322 val = CIF_ISP_PACK_4BYTE(arg->gauss_noise_coe[0],
1323 arg->gauss_noise_coe[1],
1324 arg->gauss_noise_coe[2],
1325 0);
1326 rkisp_iowrite32(params_vdev, val,
1327 CIF_RKSHARP_GAUSS_NOISE_COE1);
1328
1329 val = CIF_ISP_PACK_4BYTE(arg->gauss_noise_coe[3],
1330 arg->gauss_noise_coe[4],
1331 arg->gauss_noise_coe[5],
1332 0);
1333 rkisp_iowrite32(params_vdev, val,
1334 CIF_RKSHARP_GAUSS_NOISE_COE2);
1335
1336 val = CIF_ISP_PACK_4BYTE(arg->gauss_noise_coe[6],
1337 arg->gauss_noise_coe[7],
1338 arg->gauss_noise_coe[8],
1339 0);
1340 rkisp_iowrite32(params_vdev, val,
1341 CIF_RKSHARP_GAUSS_NOISE_COE3);
1342
1343 val = CIF_ISP_PACK_4BYTE(arg->gauss_other_coe[0],
1344 arg->gauss_other_coe[1],
1345 arg->gauss_other_coe[2],
1346 0);
1347 rkisp_iowrite32(params_vdev, val,
1348 CIF_RKSHARP_GAUSS_OTHER_COE1);
1349
1350 val = CIF_ISP_PACK_4BYTE(arg->gauss_other_coe[3],
1351 arg->gauss_other_coe[4],
1352 arg->gauss_other_coe[5],
1353 0);
1354 rkisp_iowrite32(params_vdev, val,
1355 CIF_RKSHARP_GAUSS_OTHER_COE2);
1356
1357 val = CIF_ISP_PACK_4BYTE(arg->gauss_other_coe[6],
1358 arg->gauss_other_coe[7],
1359 arg->gauss_other_coe[8],
1360 0);
1361 rkisp_iowrite32(params_vdev, val,
1362 CIF_RKSHARP_GAUSS_OTHER_COE3);
1363
1364 val = CIF_ISP_PACK_4BYTE(arg->line1_filter_coe[0],
1365 arg->line1_filter_coe[1],
1366 arg->line1_filter_coe[2],
1367 0);
1368 rkisp_iowrite32(params_vdev, val,
1369 CIF_RKSHARP_LINE1_FILTER_COE1);
1370
1371 val = CIF_ISP_PACK_4BYTE(arg->line1_filter_coe[3],
1372 arg->line1_filter_coe[4],
1373 arg->line1_filter_coe[5],
1374 0);
1375 rkisp_iowrite32(params_vdev, val,
1376 CIF_RKSHARP_LINE1_FILTER_COE2);
1377
1378 val = CIF_ISP_PACK_4BYTE(arg->line2_filter_coe[0],
1379 arg->line2_filter_coe[1],
1380 arg->line2_filter_coe[2],
1381 0);
1382 rkisp_iowrite32(params_vdev, val,
1383 CIF_RKSHARP_LINE2_FILTER_COE1);
1384
1385 val = CIF_ISP_PACK_4BYTE(arg->line2_filter_coe[3],
1386 arg->line2_filter_coe[4],
1387 arg->line2_filter_coe[5],
1388 0);
1389 rkisp_iowrite32(params_vdev, val,
1390 CIF_RKSHARP_LINE2_FILTER_COE2);
1391
1392 val = CIF_ISP_PACK_4BYTE(arg->line2_filter_coe[6],
1393 arg->line2_filter_coe[7],
1394 arg->line2_filter_coe[8],
1395 0);
1396 rkisp_iowrite32(params_vdev, val,
1397 CIF_RKSHARP_LINE2_FILTER_COE3);
1398
1399 val = CIF_ISP_PACK_4BYTE(arg->line3_filter_coe[0],
1400 arg->line3_filter_coe[1],
1401 arg->line3_filter_coe[2],
1402 0);
1403 rkisp_iowrite32(params_vdev, val,
1404 CIF_RKSHARP_LINE3_FILTER_COE1);
1405
1406 val = CIF_ISP_PACK_4BYTE(arg->line3_filter_coe[3],
1407 arg->line3_filter_coe[4],
1408 arg->line3_filter_coe[5],
1409 0);
1410 rkisp_iowrite32(params_vdev, val,
1411 CIF_RKSHARP_LINE3_FILTER_COE2);
1412
1413 val = CIF_ISP_PACK_2SHORT(arg->grad_seq[0],
1414 arg->grad_seq[1]);
1415 rkisp_iowrite32(params_vdev, val,
1416 CIF_RKSHARP_GRAD_SEQ_P0_P1);
1417
1418 val = CIF_ISP_PACK_2SHORT(arg->grad_seq[2],
1419 arg->grad_seq[3]);
1420 rkisp_iowrite32(params_vdev, val,
1421 CIF_RKSHARP_GRAD_SEQ_P2_P3);
1422
1423 val = CIF_ISP_PACK_4BYTE(arg->sharp_factor[0],
1424 arg->sharp_factor[1],
1425 arg->sharp_factor[2],
1426 0);
1427 rkisp_iowrite32(params_vdev, val,
1428 CIF_RKSHARP_SHARP_FACTOR_P0_P1_P2);
1429
1430 val = CIF_ISP_PACK_4BYTE(arg->sharp_factor[3],
1431 arg->sharp_factor[4],
1432 0,
1433 0);
1434 rkisp_iowrite32(params_vdev, val,
1435 CIF_RKSHARP_SHARP_FACTOR_P3_P4);
1436
1437 val = CIF_ISP_PACK_4BYTE(arg->uv_gauss_flat_coe[0],
1438 arg->uv_gauss_flat_coe[1],
1439 arg->uv_gauss_flat_coe[2],
1440 arg->uv_gauss_flat_coe[3]);
1441 rkisp_iowrite32(params_vdev, val,
1442 CIF_RKSHARP_UV_GAUSS_FLAT_COE11_COE14);
1443
1444 val = CIF_ISP_PACK_4BYTE(arg->uv_gauss_flat_coe[4],
1445 arg->uv_gauss_flat_coe[5],
1446 arg->uv_gauss_flat_coe[6],
1447 arg->uv_gauss_flat_coe[7]);
1448 rkisp_iowrite32(params_vdev, val,
1449 CIF_RKSHARP_UV_GAUSS_FLAT_COE15_COE23);
1450
1451 val = CIF_ISP_PACK_4BYTE(arg->uv_gauss_flat_coe[8],
1452 arg->uv_gauss_flat_coe[9],
1453 arg->uv_gauss_flat_coe[10],
1454 arg->uv_gauss_flat_coe[11]);
1455 rkisp_iowrite32(params_vdev, val,
1456 CIF_RKSHARP_UV_GAUSS_FLAT_COE24_COE32);
1457
1458 val = CIF_ISP_PACK_4BYTE(arg->uv_gauss_flat_coe[12],
1459 arg->uv_gauss_flat_coe[13],
1460 arg->uv_gauss_flat_coe[14],
1461 0);
1462 rkisp_iowrite32(params_vdev, val,
1463 CIF_RKSHARP_UV_GAUSS_FLAT_COE33_COE35);
1464
1465 val = CIF_ISP_PACK_4BYTE(arg->uv_gauss_noise_coe[0],
1466 arg->uv_gauss_noise_coe[1],
1467 arg->uv_gauss_noise_coe[2],
1468 arg->uv_gauss_noise_coe[3]);
1469 rkisp_iowrite32(params_vdev, val,
1470 CIF_RKSHARP_UV_GAUSS_NOISE_COE11_COE14);
1471
1472 val = CIF_ISP_PACK_4BYTE(arg->uv_gauss_noise_coe[4],
1473 arg->uv_gauss_noise_coe[5],
1474 arg->uv_gauss_noise_coe[6],
1475 arg->uv_gauss_noise_coe[7]);
1476 rkisp_iowrite32(params_vdev, val,
1477 CIF_RKSHARP_UV_GAUSS_NOISE_COE15_COE23);
1478
1479 val = CIF_ISP_PACK_4BYTE(arg->uv_gauss_noise_coe[8],
1480 arg->uv_gauss_noise_coe[9],
1481 arg->uv_gauss_noise_coe[10],
1482 arg->uv_gauss_noise_coe[11]);
1483 rkisp_iowrite32(params_vdev, val,
1484 CIF_RKSHARP_UV_GAUSS_NOISE_COE24_COE32);
1485
1486 val = CIF_ISP_PACK_4BYTE(arg->uv_gauss_noise_coe[12],
1487 arg->uv_gauss_noise_coe[13],
1488 arg->uv_gauss_noise_coe[14],
1489 0);
1490 rkisp_iowrite32(params_vdev, val,
1491 CIF_RKSHARP_UV_GAUSS_NOISE_COE33_COE35);
1492
1493 val = CIF_ISP_PACK_4BYTE(arg->uv_gauss_other_coe[0],
1494 arg->uv_gauss_other_coe[1],
1495 arg->uv_gauss_other_coe[2],
1496 arg->uv_gauss_other_coe[3]);
1497 rkisp_iowrite32(params_vdev, val,
1498 CIF_RKSHARP_UV_GAUSS_OTHER_COE11_COE14);
1499
1500 val = CIF_ISP_PACK_4BYTE(arg->uv_gauss_other_coe[4],
1501 arg->uv_gauss_other_coe[5],
1502 arg->uv_gauss_other_coe[6],
1503 arg->uv_gauss_other_coe[7]);
1504 rkisp_iowrite32(params_vdev, val,
1505 CIF_RKSHARP_UV_GAUSS_OTHER_COE15_COE23);
1506
1507 val = CIF_ISP_PACK_4BYTE(arg->uv_gauss_other_coe[8],
1508 arg->uv_gauss_other_coe[9],
1509 arg->uv_gauss_other_coe[10],
1510 arg->uv_gauss_other_coe[11]);
1511 rkisp_iowrite32(params_vdev, val,
1512 CIF_RKSHARP_UV_GAUSS_OTHER_COE24_COE32);
1513
1514 val = CIF_ISP_PACK_4BYTE(arg->uv_gauss_other_coe[12],
1515 arg->uv_gauss_other_coe[13],
1516 arg->uv_gauss_other_coe[14],
1517 0);
1518 rkisp_iowrite32(params_vdev, val,
1519 CIF_RKSHARP_UV_GAUSS_OTHER_COE33_COE35);
1520
1521 rkisp_iowrite32(params_vdev, arg->switch_avg,
1522 CIF_RKSHARP_CTRL);
1523
1524 rkisp_iowrite32(params_vdev,
1525 arg->coring_thr,
1526 CIF_IMG_EFF_SHARPEN);
1527
1528 val = rkisp_ioread32(params_vdev, CIF_IMG_EFF_MAT_3) & 0x0F;
1529 val |= (arg->lap_mat_coe[0] & 0x0F) << 4 |
1530 (arg->lap_mat_coe[1] & 0x0F) << 8 |
1531 (arg->lap_mat_coe[2] & 0x0F) << 12;
1532 rkisp_iowrite32(params_vdev, val, CIF_IMG_EFF_MAT_3);
1533
1534 val = (arg->lap_mat_coe[3] & 0x0F) << 0 |
1535 (arg->lap_mat_coe[4] & 0x0F) << 4 |
1536 (arg->lap_mat_coe[5] & 0x0F) << 8 |
1537 (arg->lap_mat_coe[6] & 0x0F) << 12;
1538 rkisp_iowrite32(params_vdev, val, CIF_IMG_EFF_MAT_4);
1539
1540 val = (arg->lap_mat_coe[7] & 0x0F) << 0 |
1541 (arg->lap_mat_coe[8] & 0x0F) << 4;
1542 rkisp_iowrite32(params_vdev, val, CIF_IMG_EFF_MAT_5);
1543
1544 eff_ctrl = rkisp_ioread32(params_vdev, CIF_IMG_EFF_CTRL);
1545 eff_ctrl &= ~CIF_IMG_EFF_CTRL_MODE_MASK;
1546 eff_ctrl |= CIF_IMG_EFF_CTRL_MODE_RKSHARPEN;
1547
1548 if (arg->full_range)
1549 eff_ctrl |= CIF_IMG_EFF_CTRL_YCBCR_FULL;
1550
1551 rkisp_iowrite32(params_vdev, eff_ctrl, CIF_IMG_EFF_CTRL);
1552 }
1553
1554 static void
isp_iesharp_enable(struct rkisp_isp_params_vdev * params_vdev,bool en)1555 isp_iesharp_enable(struct rkisp_isp_params_vdev *params_vdev,
1556 bool en)
1557 {
1558 return isp_ie_enable(params_vdev, en);
1559 }
1560
1561 static void
isp_rawaf_config(struct rkisp_isp_params_vdev * params_vdev,const struct isp2x_rawaf_meas_cfg * arg)1562 isp_rawaf_config(struct rkisp_isp_params_vdev *params_vdev,
1563 const struct isp2x_rawaf_meas_cfg *arg)
1564 {
1565 u32 i, var;
1566 u16 h_size, v_size;
1567 u16 h_offs, v_offs;
1568 size_t num_of_win = min_t(size_t, ARRAY_SIZE(arg->win),
1569 arg->num_afm_win);
1570 u32 value = rkisp_ioread32(params_vdev, ISP_RAWAF_CTRL);
1571
1572 for (i = 0; i < num_of_win; i++) {
1573 h_size = arg->win[i].h_size;
1574 v_size = arg->win[i].v_size;
1575 h_offs = arg->win[i].h_offs < 2 ? 2 : arg->win[i].h_offs;
1576 v_offs = arg->win[i].v_offs < 1 ? 1 : arg->win[i].v_offs;
1577
1578 if (i == 0) {
1579 h_size = h_size / 15 * 15;
1580 v_size = v_size / 15 * 15;
1581 }
1582
1583 // (horizontal left row), value must be greater or equal 2
1584 // (vertical top line), value must be greater or equal 1
1585 rkisp_iowrite32(params_vdev,
1586 ISP2X_PACK_2SHORT(v_offs, h_offs),
1587 ISP_RAWAF_LT_A + i * 8);
1588
1589 // value must be smaller than [width of picture -2]
1590 // value must be lower than (number of lines -2)
1591 rkisp_iowrite32(params_vdev,
1592 ISP2X_PACK_2SHORT(v_size, h_size),
1593 ISP_RAWAF_RB_A + i * 8);
1594 }
1595
1596 var = 0;
1597 for (i = 0; i < ISP2X_RAWAF_LINE_NUM; i++) {
1598 if (arg->line_en[i])
1599 var |= ISP2X_RAWAF_INT_LINE0_EN << i;
1600 var |= ISP2X_RAWAF_INT_LINE0_NUM(arg->line_num[i]) << 4 * i;
1601 }
1602 rkisp_iowrite32(params_vdev, var, ISP_RAWAF_INT_LINE);
1603
1604 rkisp_iowrite32(params_vdev,
1605 ISP2X_PACK_4BYTE(arg->gaus_coe_h0, arg->gaus_coe_h1, arg->gaus_coe_h2, 0),
1606 ISP_RAWAF_GAUS_COE);
1607
1608 var = rkisp_ioread32(params_vdev, ISP_RAWAF_THRES);
1609 var &= ~(ISP2X_RAWAF_THRES(0xFFFF));
1610 var |= arg->afm_thres;
1611 rkisp_iowrite32(params_vdev, var, ISP_RAWAF_THRES);
1612
1613 rkisp_iowrite32(params_vdev,
1614 ISP2X_RAWAF_SET_SHIFT_A(arg->lum_var_shift[0], arg->afm_var_shift[0]) |
1615 ISP2X_RAWAF_SET_SHIFT_B(arg->lum_var_shift[1], arg->afm_var_shift[1]),
1616 ISP_RAWAF_VAR_SHIFT);
1617
1618 for (i = 0; i < ISP2X_RAWAF_GAMMA_NUM / 2; i++)
1619 rkisp_iowrite32(params_vdev,
1620 ISP2X_PACK_2SHORT(arg->gamma_y[2 * i], arg->gamma_y[2 * i + 1]),
1621 ISP_RAWAF_GAMMA_Y0 + i * 4);
1622
1623 rkisp_iowrite32(params_vdev,
1624 ISP2X_PACK_2SHORT(arg->gamma_y[16], 0),
1625 ISP_RAWAF_GAMMA_Y8);
1626
1627 value &= ISP2X_RAWAF_ENA;
1628 if (arg->gamma_en)
1629 value |= ISP2X_RAWAF_GAMMA_ENA;
1630 else
1631 value &= ~ISP2X_RAWAF_GAMMA_ENA;
1632 if (arg->gaus_en)
1633 value |= ISP2X_RAWAF_GAUS_ENA;
1634 else
1635 value &= ~ISP2X_RAWAF_GAUS_ENA;
1636 value &= ~ISP2X_REG_WR_MASK;
1637 rkisp_iowrite32(params_vdev, value, ISP_RAWAF_CTRL);
1638
1639 value = rkisp_ioread32(params_vdev, CTRL_VI_ISP_PATH);
1640 value &= ~(ISP2X_ISPPATH_RAWAF_SEL_SET(3));
1641 value |= ISP2X_ISPPATH_RAWAF_SEL_SET(arg->rawaf_sel);
1642 rkisp_iowrite32(params_vdev, value, CTRL_VI_ISP_PATH);
1643 }
1644
1645 static void
isp_rawaf_enable(struct rkisp_isp_params_vdev * params_vdev,bool en)1646 isp_rawaf_enable(struct rkisp_isp_params_vdev *params_vdev,
1647 bool en)
1648 {
1649 u32 afm_ctrl = rkisp_ioread32(params_vdev, ISP_RAWAF_CTRL);
1650
1651 afm_ctrl &= ~ISP2X_REG_WR_MASK;
1652 if (en)
1653 afm_ctrl |= ISP2X_RAWAF_ENA;
1654 else
1655 afm_ctrl &= ~ISP2X_RAWAF_ENA;
1656
1657 rkisp_iowrite32(params_vdev, afm_ctrl, ISP_RAWAF_CTRL);
1658 }
1659
1660 static void
isp_rawaelite_config(struct rkisp_isp_params_vdev * params_vdev,const struct isp2x_rawaelite_meas_cfg * arg)1661 isp_rawaelite_config(struct rkisp_isp_params_vdev *params_vdev,
1662 const struct isp2x_rawaelite_meas_cfg *arg)
1663 {
1664 struct rkisp_device *ispdev = params_vdev->dev;
1665 struct v4l2_rect *out_crop = &ispdev->isp_sdev.out_crop;
1666 u32 block_hsize, block_vsize, value;
1667 u32 wnd_num_idx = 0;
1668 const u32 ae_wnd_num[] = {
1669 1, 5
1670 };
1671
1672 value = rkisp_ioread32(params_vdev, ISP_RAWAE_LITE_CTRL);
1673 value &= ~(ISP2X_RAWAE_LITE_WNDNUM_SET(0x1));
1674 if (arg->wnd_num) {
1675 value |= ISP2X_RAWAE_LITE_WNDNUM_SET(0x1);
1676 wnd_num_idx = 1;
1677 }
1678 value &= ~ISP2X_REG_WR_MASK;
1679 rkisp_iowrite32(params_vdev, value, ISP_RAWAE_LITE_CTRL);
1680
1681 rkisp_iowrite32(params_vdev,
1682 ISP2X_RAWAE_LITE_V_OFFSET_SET(arg->win.v_offs) |
1683 ISP2X_RAWAE_LITE_H_OFFSET_SET(arg->win.h_offs),
1684 ISP_RAWAE_LITE_OFFSET);
1685
1686 block_hsize = arg->win.h_size / ae_wnd_num[wnd_num_idx];
1687 value = block_hsize * ae_wnd_num[wnd_num_idx] + arg->win.h_offs;
1688 if (value + 1 > out_crop->width)
1689 block_hsize -= 1;
1690 block_vsize = arg->win.v_size / ae_wnd_num[wnd_num_idx];
1691 value = block_vsize * ae_wnd_num[wnd_num_idx] + arg->win.v_offs;
1692 if (value + 2 > out_crop->height)
1693 block_vsize -= 1;
1694 if (block_vsize % 2)
1695 block_vsize -= 1;
1696 rkisp_iowrite32(params_vdev,
1697 ISP2X_RAWAE_LITE_V_SIZE_SET(block_vsize) |
1698 ISP2X_RAWAE_LITE_H_SIZE_SET(block_hsize),
1699 ISP_RAWAE_LITE_BLK_SIZ);
1700
1701 value = rkisp_ioread32(params_vdev, CTRL_VI_ISP_PATH);
1702 value &= ~(ISP2X_ISPPATH_RAWAE_SWAP_SET(3));
1703 value |= ISP2X_ISPPATH_RAWAE_SWAP_SET(arg->rawae_sel);
1704 rkisp_iowrite32(params_vdev, value, CTRL_VI_ISP_PATH);
1705 }
1706
1707 static void
isp_rawaelite_enable(struct rkisp_isp_params_vdev * params_vdev,bool en)1708 isp_rawaelite_enable(struct rkisp_isp_params_vdev *params_vdev,
1709 bool en)
1710 {
1711 u32 exp_ctrl;
1712
1713 exp_ctrl = rkisp_ioread32(params_vdev, ISP_RAWAE_LITE_CTRL);
1714 exp_ctrl &= ~ISP2X_REG_WR_MASK;
1715 if (en)
1716 exp_ctrl |= ISP2X_RAWAE_LITE_ENA;
1717 else
1718 exp_ctrl &= ~ISP2X_RAWAE_LITE_ENA;
1719
1720 rkisp_iowrite32(params_vdev, exp_ctrl, ISP_RAWAE_LITE_CTRL);
1721 }
1722
1723 static void
isp_rawaebig_config(struct rkisp_isp_params_vdev * params_vdev,const struct isp2x_rawaebig_meas_cfg * arg,u32 blk_no)1724 isp_rawaebig_config(struct rkisp_isp_params_vdev *params_vdev,
1725 const struct isp2x_rawaebig_meas_cfg *arg, u32 blk_no)
1726 {
1727 struct rkisp_device *ispdev = params_vdev->dev;
1728 struct v4l2_rect *out_crop = &ispdev->isp_sdev.out_crop;
1729 u32 block_hsize, block_vsize;
1730 u32 addr, i, value;
1731 u32 wnd_num_idx = 0;
1732 const u32 ae_wnd_num[] = {
1733 1, 5, 15, 15
1734 };
1735
1736 switch (blk_no) {
1737 case 0:
1738 addr = RAWAE_BIG1_BASE;
1739 break;
1740 case 1:
1741 addr = RAWAE_BIG2_BASE;
1742 break;
1743 case 2:
1744 addr = RAWAE_BIG3_BASE;
1745 break;
1746 default:
1747 addr = RAWAE_BIG1_BASE;
1748 break;
1749 }
1750
1751 /* avoid to override the old enable value */
1752 value = rkisp_ioread32(params_vdev, addr + RAWAE_BIG_CTRL);
1753 value &= ~(ISP2X_RAWAEBIG_WNDNUM_SET(0x3) |
1754 ISP2X_RAWAEBIG_SUBWIN1_EN |
1755 ISP2X_RAWAEBIG_SUBWIN2_EN |
1756 ISP2X_RAWAEBIG_SUBWIN3_EN |
1757 ISP2X_RAWAEBIG_SUBWIN4_EN |
1758 ISP2X_REG_WR_MASK);
1759
1760 wnd_num_idx = arg->wnd_num;
1761 value |= ISP2X_RAWAEBIG_WNDNUM_SET(wnd_num_idx);
1762
1763 if (arg->subwin_en[0])
1764 value |= ISP2X_RAWAEBIG_SUBWIN1_EN;
1765 if (arg->subwin_en[1])
1766 value |= ISP2X_RAWAEBIG_SUBWIN2_EN;
1767 if (arg->subwin_en[2])
1768 value |= ISP2X_RAWAEBIG_SUBWIN3_EN;
1769 if (arg->subwin_en[3])
1770 value |= ISP2X_RAWAEBIG_SUBWIN4_EN;
1771
1772 rkisp_iowrite32(params_vdev, value, addr + RAWAE_BIG_CTRL);
1773
1774 rkisp_iowrite32(params_vdev,
1775 ISP2X_RAWAEBIG_V_OFFSET_SET(arg->win.v_offs) |
1776 ISP2X_RAWAEBIG_H_OFFSET_SET(arg->win.h_offs),
1777 addr + RAWAE_BIG_OFFSET);
1778
1779 block_hsize = arg->win.h_size / ae_wnd_num[wnd_num_idx];
1780 value = block_hsize * ae_wnd_num[wnd_num_idx] + arg->win.h_offs;
1781 if (value + 1 > out_crop->width)
1782 block_hsize -= 1;
1783 block_vsize = arg->win.v_size / ae_wnd_num[wnd_num_idx];
1784 value = block_vsize * ae_wnd_num[wnd_num_idx] + arg->win.v_offs;
1785 if (value + 2 > out_crop->height)
1786 block_vsize -= 1;
1787 if (block_vsize % 2)
1788 block_vsize -= 1;
1789 rkisp_iowrite32(params_vdev,
1790 ISP2X_RAWAEBIG_V_SIZE_SET(block_vsize) |
1791 ISP2X_RAWAEBIG_H_SIZE_SET(block_hsize),
1792 addr + RAWAE_BIG_BLK_SIZE);
1793
1794 for (i = 0; i < ISP2X_RAWAEBIG_SUBWIN_NUM; i++) {
1795 rkisp_iowrite32(params_vdev,
1796 ISP2X_RAWAEBIG_SUBWIN_V_OFFSET_SET(arg->subwin[i].v_offs) |
1797 ISP2X_RAWAEBIG_SUBWIN_H_OFFSET_SET(arg->subwin[i].h_offs),
1798 addr + RAWAE_BIG_WND1_OFFSET + 8 * i);
1799
1800 rkisp_iowrite32(params_vdev,
1801 ISP2X_RAWAEBIG_SUBWIN_V_SIZE_SET(arg->subwin[i].v_size + arg->subwin[i].v_offs) |
1802 ISP2X_RAWAEBIG_SUBWIN_H_SIZE_SET(arg->subwin[i].h_size + arg->subwin[i].h_offs),
1803 addr + RAWAE_BIG_WND1_SIZE + 8 * i);
1804 }
1805
1806 if (blk_no == 0) {
1807 value = rkisp_ioread32(params_vdev, CTRL_VI_ISP_PATH);
1808 value &= ~(ISP2X_ISPPATH_RAWAE_SEL_SET(3));
1809 value |= ISP2X_ISPPATH_RAWAE_SEL_SET(arg->rawae_sel);
1810 rkisp_iowrite32(params_vdev, value, CTRL_VI_ISP_PATH);
1811 } else {
1812 value = rkisp_ioread32(params_vdev, CTRL_VI_ISP_PATH);
1813 value &= ~(ISP2X_ISPPATH_RAWAE_SWAP_SET(3));
1814 value |= ISP2X_ISPPATH_RAWAE_SWAP_SET(arg->rawae_sel);
1815 rkisp_iowrite32(params_vdev, value, CTRL_VI_ISP_PATH);
1816 }
1817 }
1818
1819 static void
isp_rawaebig_enable(struct rkisp_isp_params_vdev * params_vdev,bool en,u32 blk_no)1820 isp_rawaebig_enable(struct rkisp_isp_params_vdev *params_vdev,
1821 bool en, u32 blk_no)
1822 {
1823 u32 exp_ctrl;
1824 u32 addr;
1825
1826 switch (blk_no) {
1827 case 0:
1828 addr = RAWAE_BIG1_BASE;
1829 break;
1830 case 1:
1831 addr = RAWAE_BIG2_BASE;
1832 break;
1833 case 2:
1834 addr = RAWAE_BIG3_BASE;
1835 break;
1836 default:
1837 addr = RAWAE_BIG1_BASE;
1838 break;
1839 }
1840
1841 exp_ctrl = rkisp_ioread32(params_vdev, addr + RAWAE_BIG_CTRL);
1842 exp_ctrl &= ~ISP2X_REG_WR_MASK;
1843 if (en)
1844 exp_ctrl |= ISP2X_RAWAEBIG_ENA;
1845 else
1846 exp_ctrl &= ~ISP2X_RAWAEBIG_ENA;
1847
1848 rkisp_iowrite32(params_vdev, exp_ctrl, addr + RAWAE_BIG_CTRL);
1849 }
1850
1851 static void
isp_rawae1_config(struct rkisp_isp_params_vdev * params_vdev,const struct isp2x_rawaebig_meas_cfg * arg)1852 isp_rawae1_config(struct rkisp_isp_params_vdev *params_vdev,
1853 const struct isp2x_rawaebig_meas_cfg *arg)
1854 {
1855 isp_rawaebig_config(params_vdev, arg, 1);
1856 }
1857
1858 static void
isp_rawae1_enable(struct rkisp_isp_params_vdev * params_vdev,bool en)1859 isp_rawae1_enable(struct rkisp_isp_params_vdev *params_vdev,
1860 bool en)
1861 {
1862 isp_rawaebig_enable(params_vdev, en, 1);
1863 }
1864
1865 static void
isp_rawae2_config(struct rkisp_isp_params_vdev * params_vdev,const struct isp2x_rawaebig_meas_cfg * arg)1866 isp_rawae2_config(struct rkisp_isp_params_vdev *params_vdev,
1867 const struct isp2x_rawaebig_meas_cfg *arg)
1868 {
1869 isp_rawaebig_config(params_vdev, arg, 2);
1870 }
1871
1872 static void
isp_rawae2_enable(struct rkisp_isp_params_vdev * params_vdev,bool en)1873 isp_rawae2_enable(struct rkisp_isp_params_vdev *params_vdev,
1874 bool en)
1875 {
1876 isp_rawaebig_enable(params_vdev, en, 2);
1877 }
1878
1879 static void
isp_rawae3_config(struct rkisp_isp_params_vdev * params_vdev,const struct isp2x_rawaebig_meas_cfg * arg)1880 isp_rawae3_config(struct rkisp_isp_params_vdev *params_vdev,
1881 const struct isp2x_rawaebig_meas_cfg *arg)
1882 {
1883 isp_rawaebig_config(params_vdev, arg, 0);
1884 }
1885
1886 static void
isp_rawae3_enable(struct rkisp_isp_params_vdev * params_vdev,bool en)1887 isp_rawae3_enable(struct rkisp_isp_params_vdev *params_vdev,
1888 bool en)
1889 {
1890 isp_rawaebig_enable(params_vdev, en, 0);
1891 }
1892
1893 static void
isp_rawawb_config(struct rkisp_isp_params_vdev * params_vdev,const struct isp2x_rawawb_meas_cfg * arg)1894 isp_rawawb_config(struct rkisp_isp_params_vdev *params_vdev,
1895 const struct isp2x_rawawb_meas_cfg *arg)
1896 {
1897 u32 value;
1898
1899 rkisp_iowrite32(params_vdev,
1900 ISP2X_PACK_2SHORT(arg->sw_rawawb_h_offs, arg->sw_rawawb_v_offs),
1901 ISP_RAWAWB_WIN_OFFS);
1902
1903 rkisp_iowrite32(params_vdev,
1904 ISP2X_PACK_2SHORT(arg->sw_rawawb_h_size, arg->sw_rawawb_v_size),
1905 ISP_RAWAWB_WIN_SIZE);
1906
1907 rkisp_iowrite32(params_vdev,
1908 ISP2X_PACK_2SHORT(arg->sw_rawawb_r_max, arg->sw_rawawb_g_max),
1909 ISP_RAWAWB_LIMIT_RG_MAX);
1910
1911 rkisp_iowrite32(params_vdev,
1912 ISP2X_PACK_2SHORT(arg->sw_rawawb_b_max, arg->sw_rawawb_y_max),
1913 ISP_RAWAWB_LIMIT_BY_MAX);
1914
1915 rkisp_iowrite32(params_vdev,
1916 ISP2X_PACK_2SHORT(arg->sw_rawawb_r_min, arg->sw_rawawb_g_min),
1917 ISP_RAWAWB_LIMIT_RG_MIN);
1918
1919 rkisp_iowrite32(params_vdev,
1920 ISP2X_PACK_2SHORT(arg->sw_rawawb_b_min, arg->sw_rawawb_y_min),
1921 ISP_RAWAWB_LIMIT_BY_MIN);
1922
1923 rkisp_iowrite32(params_vdev,
1924 ISP2X_PACK_2SHORT(arg->sw_rawawb_coeff_y_r, arg->sw_rawawb_coeff_y_g),
1925 ISP_RAWAWB_RGB2Y_0);
1926 rkisp_iowrite32(params_vdev,
1927 ISP2X_PACK_2SHORT(arg->sw_rawawb_coeff_y_b, 0),
1928 ISP_RAWAWB_RGB2Y_1);
1929
1930 rkisp_iowrite32(params_vdev,
1931 ISP2X_PACK_2SHORT(arg->sw_rawawb_coeff_u_r, arg->sw_rawawb_coeff_u_g),
1932 ISP_RAWAWB_RGB2U_0);
1933 rkisp_iowrite32(params_vdev,
1934 ISP2X_PACK_2SHORT(arg->sw_rawawb_coeff_u_b, 0),
1935 ISP_RAWAWB_RGB2U_1);
1936
1937 rkisp_iowrite32(params_vdev,
1938 ISP2X_PACK_2SHORT(arg->sw_rawawb_coeff_v_r, arg->sw_rawawb_coeff_v_g),
1939 ISP_RAWAWB_RGB2V_0);
1940 rkisp_iowrite32(params_vdev,
1941 ISP2X_PACK_2SHORT(arg->sw_rawawb_coeff_v_b, 0),
1942 ISP_RAWAWB_RGB2V_1);
1943
1944 rkisp_iowrite32(params_vdev,
1945 ISP2X_PACK_2SHORT(arg->sw_rawawb_vertex0_u_0, arg->sw_rawawb_vertex0_v_0),
1946 ISP_RAWAWB_UV_DETC_VERTEX0_0);
1947
1948 rkisp_iowrite32(params_vdev,
1949 ISP2X_PACK_2SHORT(arg->sw_rawawb_vertex1_u_0, arg->sw_rawawb_vertex1_v_0),
1950 ISP_RAWAWB_UV_DETC_VERTEX1_0);
1951
1952 rkisp_iowrite32(params_vdev,
1953 ISP2X_PACK_2SHORT(arg->sw_rawawb_vertex2_u_0, arg->sw_rawawb_vertex2_v_0),
1954 ISP_RAWAWB_UV_DETC_VERTEX2_0);
1955
1956 rkisp_iowrite32(params_vdev,
1957 ISP2X_PACK_2SHORT(arg->sw_rawawb_vertex3_u_0, arg->sw_rawawb_vertex3_v_0),
1958 ISP_RAWAWB_UV_DETC_VERTEX3_0);
1959
1960 rkisp_iowrite32(params_vdev,
1961 arg->sw_rawawb_islope01_0,
1962 ISP_RAWAWB_UV_DETC_ISLOPE01_0);
1963
1964 rkisp_iowrite32(params_vdev,
1965 arg->sw_rawawb_islope12_0,
1966 ISP_RAWAWB_UV_DETC_ISLOPE12_0);
1967
1968 rkisp_iowrite32(params_vdev,
1969 arg->sw_rawawb_islope23_0,
1970 ISP_RAWAWB_UV_DETC_ISLOPE23_0);
1971
1972 rkisp_iowrite32(params_vdev,
1973 arg->sw_rawawb_islope30_0,
1974 ISP_RAWAWB_UV_DETC_ISLOPE30_0);
1975
1976 rkisp_iowrite32(params_vdev,
1977 ISP2X_PACK_2SHORT(arg->sw_rawawb_vertex0_u_1, arg->sw_rawawb_vertex0_v_1),
1978 ISP_RAWAWB_UV_DETC_VERTEX0_1);
1979
1980 rkisp_iowrite32(params_vdev,
1981 ISP2X_PACK_2SHORT(arg->sw_rawawb_vertex1_u_1, arg->sw_rawawb_vertex1_v_1),
1982 ISP_RAWAWB_UV_DETC_VERTEX1_1);
1983
1984 rkisp_iowrite32(params_vdev,
1985 ISP2X_PACK_2SHORT(arg->sw_rawawb_vertex2_u_1, arg->sw_rawawb_vertex2_v_1),
1986 ISP_RAWAWB_UV_DETC_VERTEX2_1);
1987
1988 rkisp_iowrite32(params_vdev,
1989 ISP2X_PACK_2SHORT(arg->sw_rawawb_vertex3_u_1, arg->sw_rawawb_vertex3_v_1),
1990 ISP_RAWAWB_UV_DETC_VERTEX3_1);
1991
1992 rkisp_iowrite32(params_vdev,
1993 arg->sw_rawawb_islope01_1,
1994 ISP_RAWAWB_UV_DETC_ISLOPE01_1);
1995
1996 rkisp_iowrite32(params_vdev,
1997 arg->sw_rawawb_islope12_1,
1998 ISP_RAWAWB_UV_DETC_ISLOPE12_1);
1999
2000 rkisp_iowrite32(params_vdev,
2001 arg->sw_rawawb_islope23_1,
2002 ISP_RAWAWB_UV_DETC_ISLOPE23_1);
2003
2004 rkisp_iowrite32(params_vdev,
2005 arg->sw_rawawb_islope30_1,
2006 ISP_RAWAWB_UV_DETC_ISLOPE30_1);
2007
2008 rkisp_iowrite32(params_vdev,
2009 ISP2X_PACK_2SHORT(arg->sw_rawawb_vertex0_u_2, arg->sw_rawawb_vertex0_v_2),
2010 ISP_RAWAWB_UV_DETC_VERTEX0_2);
2011
2012 rkisp_iowrite32(params_vdev,
2013 ISP2X_PACK_2SHORT(arg->sw_rawawb_vertex1_u_2, arg->sw_rawawb_vertex1_v_2),
2014 ISP_RAWAWB_UV_DETC_VERTEX1_2);
2015
2016 rkisp_iowrite32(params_vdev,
2017 ISP2X_PACK_2SHORT(arg->sw_rawawb_vertex2_u_2, arg->sw_rawawb_vertex2_v_2),
2018 ISP_RAWAWB_UV_DETC_VERTEX2_2);
2019
2020 rkisp_iowrite32(params_vdev,
2021 ISP2X_PACK_2SHORT(arg->sw_rawawb_vertex3_u_2, arg->sw_rawawb_vertex3_v_2),
2022 ISP_RAWAWB_UV_DETC_VERTEX3_2);
2023
2024 rkisp_iowrite32(params_vdev,
2025 arg->sw_rawawb_islope01_2,
2026 ISP_RAWAWB_UV_DETC_ISLOPE01_2);
2027
2028 rkisp_iowrite32(params_vdev,
2029 arg->sw_rawawb_islope12_2,
2030 ISP_RAWAWB_UV_DETC_ISLOPE12_2);
2031
2032 rkisp_iowrite32(params_vdev,
2033 arg->sw_rawawb_islope23_2,
2034 ISP_RAWAWB_UV_DETC_ISLOPE23_2);
2035
2036 rkisp_iowrite32(params_vdev,
2037 arg->sw_rawawb_islope30_2,
2038 ISP_RAWAWB_UV_DETC_ISLOPE30_2);
2039
2040 rkisp_iowrite32(params_vdev,
2041 ISP2X_PACK_2SHORT(arg->sw_rawawb_vertex0_u_3, arg->sw_rawawb_vertex0_v_3),
2042 ISP_RAWAWB_UV_DETC_VERTEX0_3);
2043
2044 rkisp_iowrite32(params_vdev,
2045 ISP2X_PACK_2SHORT(arg->sw_rawawb_vertex1_u_3, arg->sw_rawawb_vertex1_v_3),
2046 ISP_RAWAWB_UV_DETC_VERTEX1_3);
2047
2048 rkisp_iowrite32(params_vdev,
2049 ISP2X_PACK_2SHORT(arg->sw_rawawb_vertex2_u_3, arg->sw_rawawb_vertex2_v_3),
2050 ISP_RAWAWB_UV_DETC_VERTEX2_3);
2051
2052 rkisp_iowrite32(params_vdev,
2053 ISP2X_PACK_2SHORT(arg->sw_rawawb_vertex3_u_3, arg->sw_rawawb_vertex3_v_3),
2054 ISP_RAWAWB_UV_DETC_VERTEX3_3);
2055
2056 rkisp_iowrite32(params_vdev,
2057 arg->sw_rawawb_islope01_3,
2058 ISP_RAWAWB_UV_DETC_ISLOPE01_3);
2059
2060 rkisp_iowrite32(params_vdev,
2061 arg->sw_rawawb_islope12_3,
2062 ISP_RAWAWB_UV_DETC_ISLOPE12_3);
2063
2064 rkisp_iowrite32(params_vdev,
2065 arg->sw_rawawb_islope23_3,
2066 ISP_RAWAWB_UV_DETC_ISLOPE23_3);
2067
2068 rkisp_iowrite32(params_vdev,
2069 arg->sw_rawawb_islope30_3,
2070 ISP_RAWAWB_UV_DETC_ISLOPE30_3);
2071
2072 rkisp_iowrite32(params_vdev,
2073 ISP2X_PACK_2SHORT(arg->sw_rawawb_vertex0_u_4, arg->sw_rawawb_vertex0_v_4),
2074 ISP_RAWAWB_UV_DETC_VERTEX0_4);
2075
2076 rkisp_iowrite32(params_vdev,
2077 ISP2X_PACK_2SHORT(arg->sw_rawawb_vertex1_u_4, arg->sw_rawawb_vertex1_v_4),
2078 ISP_RAWAWB_UV_DETC_VERTEX1_4);
2079
2080 rkisp_iowrite32(params_vdev,
2081 ISP2X_PACK_2SHORT(arg->sw_rawawb_vertex2_u_4, arg->sw_rawawb_vertex2_v_4),
2082 ISP_RAWAWB_UV_DETC_VERTEX2_4);
2083
2084 rkisp_iowrite32(params_vdev,
2085 ISP2X_PACK_2SHORT(arg->sw_rawawb_vertex3_u_4, arg->sw_rawawb_vertex3_v_4),
2086 ISP_RAWAWB_UV_DETC_VERTEX3_4);
2087
2088 rkisp_iowrite32(params_vdev,
2089 arg->sw_rawawb_islope01_4,
2090 ISP_RAWAWB_UV_DETC_ISLOPE01_4);
2091
2092 rkisp_iowrite32(params_vdev,
2093 arg->sw_rawawb_islope12_4,
2094 ISP_RAWAWB_UV_DETC_ISLOPE12_4);
2095
2096 rkisp_iowrite32(params_vdev,
2097 arg->sw_rawawb_islope23_4,
2098 ISP_RAWAWB_UV_DETC_ISLOPE23_4);
2099
2100 rkisp_iowrite32(params_vdev,
2101 arg->sw_rawawb_islope30_4,
2102 ISP_RAWAWB_UV_DETC_ISLOPE30_4);
2103
2104 rkisp_iowrite32(params_vdev,
2105 ISP2X_PACK_2SHORT(arg->sw_rawawb_vertex0_u_5, arg->sw_rawawb_vertex0_v_5),
2106 ISP_RAWAWB_UV_DETC_VERTEX0_5);
2107
2108 rkisp_iowrite32(params_vdev,
2109 ISP2X_PACK_2SHORT(arg->sw_rawawb_vertex1_u_5, arg->sw_rawawb_vertex1_v_5),
2110 ISP_RAWAWB_UV_DETC_VERTEX1_5);
2111
2112 rkisp_iowrite32(params_vdev,
2113 ISP2X_PACK_2SHORT(arg->sw_rawawb_vertex2_u_5, arg->sw_rawawb_vertex2_v_5),
2114 ISP_RAWAWB_UV_DETC_VERTEX2_5);
2115
2116 rkisp_iowrite32(params_vdev,
2117 ISP2X_PACK_2SHORT(arg->sw_rawawb_vertex3_u_5, arg->sw_rawawb_vertex3_v_5),
2118 ISP_RAWAWB_UV_DETC_VERTEX3_5);
2119
2120 rkisp_iowrite32(params_vdev,
2121 arg->sw_rawawb_islope01_5,
2122 ISP_RAWAWB_UV_DETC_ISLOPE01_5);
2123
2124 rkisp_iowrite32(params_vdev,
2125 arg->sw_rawawb_islope12_5,
2126 ISP_RAWAWB_UV_DETC_ISLOPE12_5);
2127
2128 rkisp_iowrite32(params_vdev,
2129 arg->sw_rawawb_islope23_5,
2130 ISP_RAWAWB_UV_DETC_ISLOPE23_5);
2131
2132 rkisp_iowrite32(params_vdev,
2133 arg->sw_rawawb_islope30_5,
2134 ISP_RAWAWB_UV_DETC_ISLOPE30_5);
2135
2136 rkisp_iowrite32(params_vdev,
2137 ISP2X_PACK_2SHORT(arg->sw_rawawb_vertex0_u_6, arg->sw_rawawb_vertex0_v_6),
2138 ISP_RAWAWB_UV_DETC_VERTEX0_6);
2139
2140 rkisp_iowrite32(params_vdev,
2141 ISP2X_PACK_2SHORT(arg->sw_rawawb_vertex1_u_6, arg->sw_rawawb_vertex1_v_6),
2142 ISP_RAWAWB_UV_DETC_VERTEX1_6);
2143
2144 rkisp_iowrite32(params_vdev,
2145 ISP2X_PACK_2SHORT(arg->sw_rawawb_vertex2_u_6, arg->sw_rawawb_vertex2_v_6),
2146 ISP_RAWAWB_UV_DETC_VERTEX2_6);
2147
2148 rkisp_iowrite32(params_vdev,
2149 ISP2X_PACK_2SHORT(arg->sw_rawawb_vertex3_u_6, arg->sw_rawawb_vertex3_v_6),
2150 ISP_RAWAWB_UV_DETC_VERTEX3_6);
2151
2152 rkisp_iowrite32(params_vdev,
2153 arg->sw_rawawb_islope01_6,
2154 ISP_RAWAWB_UV_DETC_ISLOPE01_6);
2155
2156 rkisp_iowrite32(params_vdev,
2157 arg->sw_rawawb_islope12_6,
2158 ISP_RAWAWB_UV_DETC_ISLOPE12_6);
2159
2160 rkisp_iowrite32(params_vdev,
2161 arg->sw_rawawb_islope23_6,
2162 ISP_RAWAWB_UV_DETC_ISLOPE23_6);
2163
2164 rkisp_iowrite32(params_vdev,
2165 arg->sw_rawawb_islope30_6,
2166 ISP_RAWAWB_UV_DETC_ISLOPE30_6);
2167
2168 rkisp_iowrite32(params_vdev,
2169 arg->sw_rawawb_b_uv_0,
2170 ISP_RAWAWB_YUV_DETC_B_UV_0);
2171
2172 rkisp_iowrite32(params_vdev,
2173 arg->sw_rawawb_slope_vtcuv_0,
2174 ISP_RAWAWB_YUV_DETC_SLOPE_VTCUV_0);
2175
2176 rkisp_iowrite32(params_vdev,
2177 arg->sw_rawawb_inv_dslope_0,
2178 ISP_RAWAWB_YUV_DETC_INV_DSLOPE_0);
2179
2180 rkisp_iowrite32(params_vdev,
2181 arg->sw_rawawb_slope_ydis_0,
2182 ISP_RAWAWB_YUV_DETC_SLOPE_YDIS_0);
2183
2184 rkisp_iowrite32(params_vdev,
2185 arg->sw_rawawb_b_ydis_0,
2186 ISP_RAWAWB_YUV_DETC_B_YDIS_0);
2187
2188 rkisp_iowrite32(params_vdev,
2189 arg->sw_rawawb_b_uv_1,
2190 ISP_RAWAWB_YUV_DETC_B_UV_1);
2191
2192 rkisp_iowrite32(params_vdev,
2193 arg->sw_rawawb_slope_vtcuv_1,
2194 ISP_RAWAWB_YUV_DETC_SLOPE_VTCUV_1);
2195
2196 rkisp_iowrite32(params_vdev,
2197 arg->sw_rawawb_inv_dslope_1,
2198 ISP_RAWAWB_YUV_DETC_INV_DSLOPE_1);
2199
2200 rkisp_iowrite32(params_vdev,
2201 arg->sw_rawawb_slope_ydis_1,
2202 ISP_RAWAWB_YUV_DETC_SLOPE_YDIS_1);
2203
2204 rkisp_iowrite32(params_vdev,
2205 arg->sw_rawawb_b_ydis_1,
2206 ISP_RAWAWB_YUV_DETC_B_YDIS_1);
2207
2208 rkisp_iowrite32(params_vdev,
2209 arg->sw_rawawb_b_uv_2,
2210 ISP_RAWAWB_YUV_DETC_B_UV_2);
2211
2212 rkisp_iowrite32(params_vdev,
2213 arg->sw_rawawb_slope_vtcuv_2,
2214 ISP_RAWAWB_YUV_DETC_SLOPE_VTCUV_2);
2215
2216 rkisp_iowrite32(params_vdev,
2217 arg->sw_rawawb_inv_dslope_2,
2218 ISP_RAWAWB_YUV_DETC_INV_DSLOPE_2);
2219
2220 rkisp_iowrite32(params_vdev,
2221 arg->sw_rawawb_slope_ydis_2,
2222 ISP_RAWAWB_YUV_DETC_SLOPE_YDIS_2);
2223
2224 rkisp_iowrite32(params_vdev,
2225 arg->sw_rawawb_b_ydis_2,
2226 ISP_RAWAWB_YUV_DETC_B_YDIS_2);
2227
2228 rkisp_iowrite32(params_vdev,
2229 arg->sw_rawawb_b_uv_3,
2230 ISP_RAWAWB_YUV_DETC_B_UV_3);
2231
2232 rkisp_iowrite32(params_vdev,
2233 arg->sw_rawawb_slope_vtcuv_3,
2234 ISP_RAWAWB_YUV_DETC_SLOPE_VTCUV_3);
2235
2236 rkisp_iowrite32(params_vdev,
2237 arg->sw_rawawb_inv_dslope_3,
2238 ISP_RAWAWB_YUV_DETC_INV_DSLOPE_3);
2239
2240 rkisp_iowrite32(params_vdev,
2241 arg->sw_rawawb_slope_ydis_3,
2242 ISP_RAWAWB_YUV_DETC_SLOPE_YDIS_3);
2243
2244 rkisp_iowrite32(params_vdev,
2245 arg->sw_rawawb_b_ydis_3,
2246 ISP_RAWAWB_YUV_DETC_B_YDIS_3);
2247
2248 rkisp_iowrite32(params_vdev,
2249 arg->sw_rawawb_ref_u,
2250 ISP_RAWAWB_YUV_DETC_REF_U);
2251
2252 rkisp_iowrite32(params_vdev,
2253 ISP2X_PACK_4BYTE(arg->sw_rawawb_ref_v_0, arg->sw_rawawb_ref_v_1,
2254 arg->sw_rawawb_ref_v_2, arg->sw_rawawb_ref_v_3),
2255 ISP_RAWAWB_YUV_DETC_REF_V);
2256
2257 rkisp_iowrite32(params_vdev,
2258 ISP2X_PACK_2SHORT(arg->sw_rawawb_dis0_0, arg->sw_rawawb_dis1_0),
2259 ISP_RAWAWB_YUV_DETC_DIS01_0);
2260
2261 rkisp_iowrite32(params_vdev,
2262 ISP2X_PACK_2SHORT(arg->sw_rawawb_dis2_0, arg->sw_rawawb_dis3_0),
2263 ISP_RAWAWB_YUV_DETC_DIS23_0);
2264
2265 rkisp_iowrite32(params_vdev,
2266 ISP2X_PACK_2SHORT(arg->sw_rawawb_dis4_0, arg->sw_rawawb_dis5_0),
2267 ISP_RAWAWB_YUV_DETC_DIS45_0);
2268
2269 rkisp_iowrite32(params_vdev,
2270 ISP2X_PACK_4BYTE(arg->sw_rawawb_th0_0, arg->sw_rawawb_th1_0,
2271 arg->sw_rawawb_th2_0, arg->sw_rawawb_th3_0),
2272 ISP_RAWAWB_YUV_DETC_TH03_0);
2273
2274 rkisp_iowrite32(params_vdev,
2275 ISP2X_PACK_4BYTE(arg->sw_rawawb_th4_0, arg->sw_rawawb_th5_0,
2276 0, 0),
2277 ISP_RAWAWB_YUV_DETC_TH45_0);
2278
2279 rkisp_iowrite32(params_vdev,
2280 ISP2X_PACK_2SHORT(arg->sw_rawawb_dis0_1, arg->sw_rawawb_dis1_1),
2281 ISP_RAWAWB_YUV_DETC_DIS01_1);
2282
2283 rkisp_iowrite32(params_vdev,
2284 ISP2X_PACK_2SHORT(arg->sw_rawawb_dis2_1, arg->sw_rawawb_dis3_1),
2285 ISP_RAWAWB_YUV_DETC_DIS23_1);
2286
2287 rkisp_iowrite32(params_vdev,
2288 ISP2X_PACK_2SHORT(arg->sw_rawawb_dis4_1, arg->sw_rawawb_dis5_1),
2289 ISP_RAWAWB_YUV_DETC_DIS45_1);
2290
2291 rkisp_iowrite32(params_vdev,
2292 ISP2X_PACK_4BYTE(arg->sw_rawawb_th0_1, arg->sw_rawawb_th1_1,
2293 arg->sw_rawawb_th2_1, arg->sw_rawawb_th3_1),
2294 ISP_RAWAWB_YUV_DETC_TH03_1);
2295
2296 rkisp_iowrite32(params_vdev,
2297 ISP2X_PACK_4BYTE(arg->sw_rawawb_th4_1, arg->sw_rawawb_th5_1,
2298 0, 0),
2299 ISP_RAWAWB_YUV_DETC_TH45_1);
2300
2301 rkisp_iowrite32(params_vdev,
2302 ISP2X_PACK_2SHORT(arg->sw_rawawb_dis0_2, arg->sw_rawawb_dis1_2),
2303 ISP_RAWAWB_YUV_DETC_DIS01_2);
2304
2305 rkisp_iowrite32(params_vdev,
2306 ISP2X_PACK_2SHORT(arg->sw_rawawb_dis2_2, arg->sw_rawawb_dis3_2),
2307 ISP_RAWAWB_YUV_DETC_DIS23_2);
2308
2309 rkisp_iowrite32(params_vdev,
2310 ISP2X_PACK_2SHORT(arg->sw_rawawb_dis4_2, arg->sw_rawawb_dis5_2),
2311 ISP_RAWAWB_YUV_DETC_DIS45_2);
2312
2313 rkisp_iowrite32(params_vdev,
2314 ISP2X_PACK_4BYTE(arg->sw_rawawb_th0_2, arg->sw_rawawb_th1_2,
2315 arg->sw_rawawb_th2_2, arg->sw_rawawb_th3_2),
2316 ISP_RAWAWB_YUV_DETC_TH03_2);
2317
2318 rkisp_iowrite32(params_vdev,
2319 ISP2X_PACK_4BYTE(arg->sw_rawawb_th4_2, arg->sw_rawawb_th5_2,
2320 0, 0),
2321 ISP_RAWAWB_YUV_DETC_TH45_2);
2322
2323 rkisp_iowrite32(params_vdev,
2324 ISP2X_PACK_2SHORT(arg->sw_rawawb_dis0_3, arg->sw_rawawb_dis1_3),
2325 ISP_RAWAWB_YUV_DETC_DIS01_3);
2326
2327 rkisp_iowrite32(params_vdev,
2328 ISP2X_PACK_2SHORT(arg->sw_rawawb_dis2_3, arg->sw_rawawb_dis3_3),
2329 ISP_RAWAWB_YUV_DETC_DIS23_3);
2330
2331 rkisp_iowrite32(params_vdev,
2332 ISP2X_PACK_2SHORT(arg->sw_rawawb_dis4_3, arg->sw_rawawb_dis5_3),
2333 ISP_RAWAWB_YUV_DETC_DIS45_3);
2334
2335 rkisp_iowrite32(params_vdev,
2336 ISP2X_PACK_4BYTE(arg->sw_rawawb_th0_3, arg->sw_rawawb_th1_3,
2337 arg->sw_rawawb_th2_3, arg->sw_rawawb_th3_3),
2338 ISP_RAWAWB_YUV_DETC_TH03_3);
2339
2340 rkisp_iowrite32(params_vdev,
2341 ISP2X_PACK_4BYTE(arg->sw_rawawb_th4_3, arg->sw_rawawb_th5_3,
2342 0, 0),
2343 ISP_RAWAWB_YUV_DETC_TH45_3);
2344
2345 rkisp_iowrite32(params_vdev,
2346 ISP2X_PACK_2SHORT(arg->sw_rawawb_wt0, arg->sw_rawawb_wt1),
2347 ISP_RAWAWB_RGB2XY_WT01);
2348
2349 rkisp_iowrite32(params_vdev,
2350 arg->sw_rawawb_wt2,
2351 ISP_RAWAWB_RGB2XY_WT2);
2352
2353 rkisp_iowrite32(params_vdev,
2354 ISP2X_PACK_2SHORT(arg->sw_rawawb_mat0_x, arg->sw_rawawb_mat0_y),
2355 ISP_RAWAWB_RGB2XY_MAT0_XY);
2356
2357 rkisp_iowrite32(params_vdev,
2358 ISP2X_PACK_2SHORT(arg->sw_rawawb_mat1_x, arg->sw_rawawb_mat1_y),
2359 ISP_RAWAWB_RGB2XY_MAT1_XY);
2360
2361 rkisp_iowrite32(params_vdev,
2362 ISP2X_PACK_2SHORT(arg->sw_rawawb_mat2_x, arg->sw_rawawb_mat2_y),
2363 ISP_RAWAWB_RGB2XY_MAT2_XY);
2364
2365 rkisp_iowrite32(params_vdev,
2366 ISP2X_PACK_2SHORT(arg->sw_rawawb_nor_x0_0, arg->sw_rawawb_nor_x1_0),
2367 ISP_RAWAWB_XY_DETC_NOR_X_0);
2368
2369 rkisp_iowrite32(params_vdev,
2370 ISP2X_PACK_2SHORT(arg->sw_rawawb_nor_y0_0, arg->sw_rawawb_nor_y1_0),
2371 ISP_RAWAWB_XY_DETC_NOR_Y_0);
2372
2373 rkisp_iowrite32(params_vdev,
2374 ISP2X_PACK_2SHORT(arg->sw_rawawb_big_x0_0, arg->sw_rawawb_big_x1_0),
2375 ISP_RAWAWB_XY_DETC_BIG_X_0);
2376
2377 rkisp_iowrite32(params_vdev,
2378 ISP2X_PACK_2SHORT(arg->sw_rawawb_big_y0_0, arg->sw_rawawb_big_y1_0),
2379 ISP_RAWAWB_XY_DETC_BIG_Y_0);
2380
2381 rkisp_iowrite32(params_vdev,
2382 ISP2X_PACK_2SHORT(arg->sw_rawawb_sma_x0_0, arg->sw_rawawb_sma_x1_0),
2383 ISP_RAWAWB_XY_DETC_SMA_X_0);
2384
2385 rkisp_iowrite32(params_vdev,
2386 ISP2X_PACK_2SHORT(arg->sw_rawawb_sma_y0_0, arg->sw_rawawb_sma_y1_0),
2387 ISP_RAWAWB_XY_DETC_SMA_Y_0);
2388
2389 rkisp_iowrite32(params_vdev,
2390 ISP2X_PACK_2SHORT(arg->sw_rawawb_nor_x0_1, arg->sw_rawawb_nor_x1_1),
2391 ISP_RAWAWB_XY_DETC_NOR_X_1);
2392
2393 rkisp_iowrite32(params_vdev,
2394 ISP2X_PACK_2SHORT(arg->sw_rawawb_nor_y0_1, arg->sw_rawawb_nor_y1_1),
2395 ISP_RAWAWB_XY_DETC_NOR_Y_1);
2396
2397 rkisp_iowrite32(params_vdev,
2398 ISP2X_PACK_2SHORT(arg->sw_rawawb_big_x0_1, arg->sw_rawawb_big_x1_1),
2399 ISP_RAWAWB_XY_DETC_BIG_X_1);
2400
2401 rkisp_iowrite32(params_vdev,
2402 ISP2X_PACK_2SHORT(arg->sw_rawawb_big_y0_1, arg->sw_rawawb_big_y1_1),
2403 ISP_RAWAWB_XY_DETC_BIG_Y_1);
2404
2405 rkisp_iowrite32(params_vdev,
2406 ISP2X_PACK_2SHORT(arg->sw_rawawb_sma_x0_1, arg->sw_rawawb_sma_x1_1),
2407 ISP_RAWAWB_XY_DETC_SMA_X_1);
2408
2409 rkisp_iowrite32(params_vdev,
2410 ISP2X_PACK_2SHORT(arg->sw_rawawb_sma_y0_1, arg->sw_rawawb_sma_y1_1),
2411 ISP_RAWAWB_XY_DETC_SMA_Y_1);
2412
2413 rkisp_iowrite32(params_vdev,
2414 ISP2X_PACK_2SHORT(arg->sw_rawawb_nor_x0_2, arg->sw_rawawb_nor_x1_2),
2415 ISP_RAWAWB_XY_DETC_NOR_X_2);
2416
2417 rkisp_iowrite32(params_vdev,
2418 ISP2X_PACK_2SHORT(arg->sw_rawawb_nor_y0_2, arg->sw_rawawb_nor_y1_2),
2419 ISP_RAWAWB_XY_DETC_NOR_Y_2);
2420
2421 rkisp_iowrite32(params_vdev,
2422 ISP2X_PACK_2SHORT(arg->sw_rawawb_big_x0_2, arg->sw_rawawb_big_x1_2),
2423 ISP_RAWAWB_XY_DETC_BIG_X_2);
2424
2425 rkisp_iowrite32(params_vdev,
2426 ISP2X_PACK_2SHORT(arg->sw_rawawb_big_y0_2, arg->sw_rawawb_big_y1_2),
2427 ISP_RAWAWB_XY_DETC_BIG_Y_2);
2428
2429 rkisp_iowrite32(params_vdev,
2430 ISP2X_PACK_2SHORT(arg->sw_rawawb_sma_x0_2, arg->sw_rawawb_sma_x1_2),
2431 ISP_RAWAWB_XY_DETC_SMA_X_2);
2432
2433 rkisp_iowrite32(params_vdev,
2434 ISP2X_PACK_2SHORT(arg->sw_rawawb_sma_y0_2, arg->sw_rawawb_sma_y1_2),
2435 ISP_RAWAWB_XY_DETC_SMA_Y_2);
2436
2437 rkisp_iowrite32(params_vdev,
2438 ISP2X_PACK_2SHORT(arg->sw_rawawb_nor_x0_3, arg->sw_rawawb_nor_x1_3),
2439 ISP_RAWAWB_XY_DETC_NOR_X_3);
2440
2441 rkisp_iowrite32(params_vdev,
2442 ISP2X_PACK_2SHORT(arg->sw_rawawb_nor_y0_3, arg->sw_rawawb_nor_y1_3),
2443 ISP_RAWAWB_XY_DETC_NOR_Y_3);
2444
2445 rkisp_iowrite32(params_vdev,
2446 ISP2X_PACK_2SHORT(arg->sw_rawawb_big_x0_3, arg->sw_rawawb_big_x1_3),
2447 ISP_RAWAWB_XY_DETC_BIG_X_3);
2448
2449 rkisp_iowrite32(params_vdev,
2450 ISP2X_PACK_2SHORT(arg->sw_rawawb_big_y0_3, arg->sw_rawawb_big_y1_3),
2451 ISP_RAWAWB_XY_DETC_BIG_Y_3);
2452
2453 rkisp_iowrite32(params_vdev,
2454 ISP2X_PACK_2SHORT(arg->sw_rawawb_sma_x0_3, arg->sw_rawawb_sma_x1_3),
2455 ISP_RAWAWB_XY_DETC_SMA_X_3);
2456
2457 rkisp_iowrite32(params_vdev,
2458 ISP2X_PACK_2SHORT(arg->sw_rawawb_sma_y0_3, arg->sw_rawawb_sma_y1_3),
2459 ISP_RAWAWB_XY_DETC_SMA_Y_3);
2460
2461 rkisp_iowrite32(params_vdev,
2462 ISP2X_PACK_2SHORT(arg->sw_rawawb_nor_x0_4, arg->sw_rawawb_nor_x1_4),
2463 ISP_RAWAWB_XY_DETC_NOR_X_4);
2464
2465 rkisp_iowrite32(params_vdev,
2466 ISP2X_PACK_2SHORT(arg->sw_rawawb_nor_y0_4, arg->sw_rawawb_nor_y1_4),
2467 ISP_RAWAWB_XY_DETC_NOR_Y_4);
2468
2469 rkisp_iowrite32(params_vdev,
2470 ISP2X_PACK_2SHORT(arg->sw_rawawb_big_x0_4, arg->sw_rawawb_big_x1_4),
2471 ISP_RAWAWB_XY_DETC_BIG_X_4);
2472
2473 rkisp_iowrite32(params_vdev,
2474 ISP2X_PACK_2SHORT(arg->sw_rawawb_big_y0_4, arg->sw_rawawb_big_y1_4),
2475 ISP_RAWAWB_XY_DETC_BIG_Y_4);
2476
2477 rkisp_iowrite32(params_vdev,
2478 ISP2X_PACK_2SHORT(arg->sw_rawawb_sma_x0_4, arg->sw_rawawb_sma_x1_4),
2479 ISP_RAWAWB_XY_DETC_SMA_X_4);
2480
2481 rkisp_iowrite32(params_vdev,
2482 ISP2X_PACK_2SHORT(arg->sw_rawawb_sma_y0_4, arg->sw_rawawb_sma_y1_4),
2483 ISP_RAWAWB_XY_DETC_SMA_Y_4);
2484
2485 rkisp_iowrite32(params_vdev,
2486 ISP2X_PACK_2SHORT(arg->sw_rawawb_nor_x0_5, arg->sw_rawawb_nor_x1_5),
2487 ISP_RAWAWB_XY_DETC_NOR_X_5);
2488
2489 rkisp_iowrite32(params_vdev,
2490 ISP2X_PACK_2SHORT(arg->sw_rawawb_nor_y0_5, arg->sw_rawawb_nor_y1_5),
2491 ISP_RAWAWB_XY_DETC_NOR_Y_5);
2492
2493 rkisp_iowrite32(params_vdev,
2494 ISP2X_PACK_2SHORT(arg->sw_rawawb_big_x0_5, arg->sw_rawawb_big_x1_5),
2495 ISP_RAWAWB_XY_DETC_BIG_X_5);
2496
2497 rkisp_iowrite32(params_vdev,
2498 ISP2X_PACK_2SHORT(arg->sw_rawawb_big_y0_5, arg->sw_rawawb_big_y1_5),
2499 ISP_RAWAWB_XY_DETC_BIG_Y_5);
2500
2501 rkisp_iowrite32(params_vdev,
2502 ISP2X_PACK_2SHORT(arg->sw_rawawb_sma_x0_5, arg->sw_rawawb_sma_x1_5),
2503 ISP_RAWAWB_XY_DETC_SMA_X_5);
2504
2505 rkisp_iowrite32(params_vdev,
2506 ISP2X_PACK_2SHORT(arg->sw_rawawb_sma_y0_5, arg->sw_rawawb_sma_y1_5),
2507 ISP_RAWAWB_XY_DETC_SMA_Y_5);
2508
2509 rkisp_iowrite32(params_vdev,
2510 ISP2X_PACK_2SHORT(arg->sw_rawawb_nor_x0_6, arg->sw_rawawb_nor_x1_6),
2511 ISP_RAWAWB_XY_DETC_NOR_X_6);
2512
2513 rkisp_iowrite32(params_vdev,
2514 ISP2X_PACK_2SHORT(arg->sw_rawawb_nor_y0_6, arg->sw_rawawb_nor_y1_6),
2515 ISP_RAWAWB_XY_DETC_NOR_Y_6);
2516
2517 rkisp_iowrite32(params_vdev,
2518 ISP2X_PACK_2SHORT(arg->sw_rawawb_big_x0_6, arg->sw_rawawb_big_x1_6),
2519 ISP_RAWAWB_XY_DETC_BIG_X_6);
2520
2521 rkisp_iowrite32(params_vdev,
2522 ISP2X_PACK_2SHORT(arg->sw_rawawb_big_y0_6, arg->sw_rawawb_big_y1_6),
2523 ISP_RAWAWB_XY_DETC_BIG_Y_6);
2524
2525 rkisp_iowrite32(params_vdev,
2526 ISP2X_PACK_2SHORT(arg->sw_rawawb_sma_x0_6, arg->sw_rawawb_sma_x1_6),
2527 ISP_RAWAWB_XY_DETC_SMA_X_6);
2528
2529 rkisp_iowrite32(params_vdev,
2530 ISP2X_PACK_2SHORT(arg->sw_rawawb_sma_y0_6, arg->sw_rawawb_sma_y1_6),
2531 ISP_RAWAWB_XY_DETC_SMA_Y_6);
2532
2533 rkisp_iowrite32(params_vdev,
2534 ISP2X_PACK_2SHORT(arg->sw_rawawb_multiwindow0_h_offs, arg->sw_rawawb_multiwindow0_v_offs),
2535 ISP_RAWAWB_MULTIWINDOW0_OFFS);
2536
2537 rkisp_iowrite32(params_vdev,
2538 ISP2X_PACK_2SHORT(arg->sw_rawawb_multiwindow0_h_size, arg->sw_rawawb_multiwindow0_v_size),
2539 ISP_RAWAWB_MULTIWINDOW0_SIZE);
2540
2541 rkisp_iowrite32(params_vdev,
2542 ISP2X_PACK_2SHORT(arg->sw_rawawb_multiwindow1_h_offs, arg->sw_rawawb_multiwindow1_v_offs),
2543 ISP_RAWAWB_MULTIWINDOW1_OFFS);
2544
2545 rkisp_iowrite32(params_vdev,
2546 ISP2X_PACK_2SHORT(arg->sw_rawawb_multiwindow1_h_size, arg->sw_rawawb_multiwindow1_v_size),
2547 ISP_RAWAWB_MULTIWINDOW1_SIZE);
2548
2549 rkisp_iowrite32(params_vdev,
2550 ISP2X_PACK_2SHORT(arg->sw_rawawb_multiwindow2_h_offs, arg->sw_rawawb_multiwindow2_v_offs),
2551 ISP_RAWAWB_MULTIWINDOW2_OFFS);
2552
2553 rkisp_iowrite32(params_vdev,
2554 ISP2X_PACK_2SHORT(arg->sw_rawawb_multiwindow2_h_size, arg->sw_rawawb_multiwindow2_v_size),
2555 ISP_RAWAWB_MULTIWINDOW2_SIZE);
2556
2557 rkisp_iowrite32(params_vdev,
2558 ISP2X_PACK_2SHORT(arg->sw_rawawb_multiwindow3_h_offs, arg->sw_rawawb_multiwindow3_v_offs),
2559 ISP_RAWAWB_MULTIWINDOW3_OFFS);
2560
2561 rkisp_iowrite32(params_vdev,
2562 ISP2X_PACK_2SHORT(arg->sw_rawawb_multiwindow3_h_size, arg->sw_rawawb_multiwindow3_v_size),
2563 ISP_RAWAWB_MULTIWINDOW3_SIZE);
2564
2565 rkisp_iowrite32(params_vdev,
2566 ISP2X_PACK_2SHORT(arg->sw_rawawb_multiwindow4_h_offs, arg->sw_rawawb_multiwindow4_v_offs),
2567 ISP_RAWAWB_MULTIWINDOW4_OFFS);
2568
2569 rkisp_iowrite32(params_vdev,
2570 ISP2X_PACK_2SHORT(arg->sw_rawawb_multiwindow4_h_size, arg->sw_rawawb_multiwindow4_v_size),
2571 ISP_RAWAWB_MULTIWINDOW4_SIZE);
2572
2573 rkisp_iowrite32(params_vdev,
2574 ISP2X_PACK_2SHORT(arg->sw_rawawb_multiwindow5_h_offs, arg->sw_rawawb_multiwindow5_v_offs),
2575 ISP_RAWAWB_MULTIWINDOW5_OFFS);
2576
2577 rkisp_iowrite32(params_vdev,
2578 ISP2X_PACK_2SHORT(arg->sw_rawawb_multiwindow5_h_size, arg->sw_rawawb_multiwindow5_v_size),
2579 ISP_RAWAWB_MULTIWINDOW5_SIZE);
2580
2581 rkisp_iowrite32(params_vdev,
2582 ISP2X_PACK_2SHORT(arg->sw_rawawb_multiwindow6_h_offs, arg->sw_rawawb_multiwindow6_v_offs),
2583 ISP_RAWAWB_MULTIWINDOW6_OFFS);
2584
2585 rkisp_iowrite32(params_vdev,
2586 ISP2X_PACK_2SHORT(arg->sw_rawawb_multiwindow6_h_size, arg->sw_rawawb_multiwindow6_v_size),
2587 ISP_RAWAWB_MULTIWINDOW6_SIZE);
2588
2589 rkisp_iowrite32(params_vdev,
2590 ISP2X_PACK_2SHORT(arg->sw_rawawb_multiwindow7_h_offs, arg->sw_rawawb_multiwindow7_v_offs),
2591 ISP_RAWAWB_MULTIWINDOW7_OFFS);
2592
2593 rkisp_iowrite32(params_vdev,
2594 ISP2X_PACK_2SHORT(arg->sw_rawawb_multiwindow7_h_size, arg->sw_rawawb_multiwindow7_v_size),
2595 ISP_RAWAWB_MULTIWINDOW7_SIZE);
2596
2597 rkisp_iowrite32(params_vdev,
2598 ISP2X_PACK_2SHORT(arg->sw_rawawb_exc_wp_region0_xu0, arg->sw_rawawb_exc_wp_region0_xu1),
2599 ISP_RAWAWB_EXC_WP_REGION0_XU);
2600
2601 rkisp_iowrite32(params_vdev,
2602 ISP2X_PACK_2SHORT(arg->sw_rawawb_exc_wp_region0_yv0, arg->sw_rawawb_exc_wp_region0_yv1),
2603 ISP_RAWAWB_EXC_WP_REGION0_YV);
2604
2605 rkisp_iowrite32(params_vdev,
2606 ISP2X_PACK_2SHORT(arg->sw_rawawb_exc_wp_region1_xu0, arg->sw_rawawb_exc_wp_region1_xu1),
2607 ISP_RAWAWB_EXC_WP_REGION1_XU);
2608
2609 rkisp_iowrite32(params_vdev,
2610 ISP2X_PACK_2SHORT(arg->sw_rawawb_exc_wp_region1_yv0, arg->sw_rawawb_exc_wp_region1_yv1),
2611 ISP_RAWAWB_EXC_WP_REGION1_YV);
2612
2613 rkisp_iowrite32(params_vdev,
2614 ISP2X_PACK_2SHORT(arg->sw_rawawb_exc_wp_region2_xu0, arg->sw_rawawb_exc_wp_region2_xu1),
2615 ISP_RAWAWB_EXC_WP_REGION2_XU);
2616
2617 rkisp_iowrite32(params_vdev,
2618 ISP2X_PACK_2SHORT(arg->sw_rawawb_exc_wp_region2_yv0, arg->sw_rawawb_exc_wp_region2_yv1),
2619 ISP_RAWAWB_EXC_WP_REGION2_YV);
2620
2621 rkisp_iowrite32(params_vdev,
2622 ISP2X_PACK_2SHORT(arg->sw_rawawb_exc_wp_region3_xu0, arg->sw_rawawb_exc_wp_region3_xu1),
2623 ISP_RAWAWB_EXC_WP_REGION3_XU);
2624
2625 rkisp_iowrite32(params_vdev,
2626 ISP2X_PACK_2SHORT(arg->sw_rawawb_exc_wp_region3_yv0, arg->sw_rawawb_exc_wp_region3_yv1),
2627 ISP_RAWAWB_EXC_WP_REGION3_YV);
2628
2629 rkisp_iowrite32(params_vdev,
2630 ISP2X_PACK_2SHORT(arg->sw_rawawb_exc_wp_region4_xu0, arg->sw_rawawb_exc_wp_region4_xu1),
2631 ISP_RAWAWB_EXC_WP_REGION4_XU);
2632
2633 rkisp_iowrite32(params_vdev,
2634 ISP2X_PACK_2SHORT(arg->sw_rawawb_exc_wp_region4_yv0, arg->sw_rawawb_exc_wp_region4_yv1),
2635 ISP_RAWAWB_EXC_WP_REGION4_YV);
2636
2637 rkisp_iowrite32(params_vdev,
2638 ISP2X_PACK_2SHORT(arg->sw_rawawb_exc_wp_region5_xu0, arg->sw_rawawb_exc_wp_region5_xu1),
2639 ISP_RAWAWB_EXC_WP_REGION5_XU);
2640
2641 rkisp_iowrite32(params_vdev,
2642 ISP2X_PACK_2SHORT(arg->sw_rawawb_exc_wp_region5_yv0, arg->sw_rawawb_exc_wp_region5_yv1),
2643 ISP_RAWAWB_EXC_WP_REGION5_YV);
2644
2645 rkisp_iowrite32(params_vdev,
2646 ISP2X_PACK_2SHORT(arg->sw_rawawb_exc_wp_region6_xu0, arg->sw_rawawb_exc_wp_region6_xu1),
2647 ISP_RAWAWB_EXC_WP_REGION6_XU);
2648
2649 rkisp_iowrite32(params_vdev,
2650 ISP2X_PACK_2SHORT(arg->sw_rawawb_exc_wp_region6_yv0, arg->sw_rawawb_exc_wp_region6_yv1),
2651 ISP_RAWAWB_EXC_WP_REGION6_YV);
2652
2653 rkisp_iowrite32(params_vdev,
2654 (arg->sw_rawawb_multiwindow_en & 0x1) << 31 |
2655 (arg->sw_rawawb_exc_wp_region6_domain & 0x1) << 26 |
2656 (arg->sw_rawawb_exc_wp_region6_measen & 0x1) << 25 |
2657 (arg->sw_rawawb_exc_wp_region6_excen & 0x1) << 24 |
2658 (arg->sw_rawawb_exc_wp_region5_domain & 0x1) << 22 |
2659 (arg->sw_rawawb_exc_wp_region5_measen & 0x1) << 21 |
2660 (arg->sw_rawawb_exc_wp_region5_excen & 0x1) << 20 |
2661 (arg->sw_rawawb_exc_wp_region4_domain & 0x1) << 18 |
2662 (arg->sw_rawawb_exc_wp_region4_measen & 0x1) << 17 |
2663 (arg->sw_rawawb_exc_wp_region4_excen & 0x1) << 16 |
2664 (arg->sw_rawawb_exc_wp_region3_domain & 0x1) << 14 |
2665 (arg->sw_rawawb_exc_wp_region3_measen & 0x1) << 13 |
2666 (arg->sw_rawawb_exc_wp_region3_excen & 0x1) << 12 |
2667 (arg->sw_rawawb_exc_wp_region2_domain & 0x1) << 10 |
2668 (arg->sw_rawawb_exc_wp_region2_measen & 0x1) << 9 |
2669 (arg->sw_rawawb_exc_wp_region2_excen & 0x1) << 8 |
2670 (arg->sw_rawawb_exc_wp_region1_domain & 0x1) << 6 |
2671 (arg->sw_rawawb_exc_wp_region1_measen & 0x1) << 5 |
2672 (arg->sw_rawawb_exc_wp_region1_excen & 0x1) << 4 |
2673 (arg->sw_rawawb_exc_wp_region0_domain & 0x1) << 2 |
2674 (arg->sw_rawawb_exc_wp_region0_measen & 0x1) << 1 |
2675 (arg->sw_rawawb_exc_wp_region0_excen & 0x1) << 0,
2676 ISP_RAWAWB_MULTIWINDOW_EXC_CTRL);
2677
2678 rkisp_iowrite32(params_vdev,
2679 (arg->sw_rawawb_store_wp_flag_ls_idx0 & 0x7) |
2680 (arg->sw_rawawb_store_wp_flag_ls_idx1 & 0x7) << 3 |
2681 (arg->sw_rawawb_store_wp_flag_ls_idx2 & 0x7) << 6 |
2682 (arg->sw_rawawb_blk_measure_mode & 0x3) << 12 |
2683 (arg->sw_rawawb_store_wp_th0 & 0x1FF) << 14 |
2684 (arg->sw_rawawb_store_wp_th1 & 0x1FF) << 23,
2685 ISP_RAWAWB_BLK_CTRL);
2686
2687 value = rkisp_ioread32(params_vdev, ISP_RAWAWB_RAM_CTRL);
2688 value &= ~(ISP2X_RAWAWB_WPTH2_SET(0x1FF));
2689 value |= ISP2X_RAWAWB_WPTH2_SET(arg->sw_rawawb_store_wp_th2);
2690 rkisp_iowrite32(params_vdev, value, ISP_RAWAWB_RAM_CTRL);
2691
2692 /* avoid to override the old enable value */
2693 value = rkisp_ioread32(params_vdev, ISP_RAWAWB_CTRL);
2694 value &= ISP2X_RAWAWB_ENA;
2695 value &= ~ISP2X_REG_WR_MASK;
2696 rkisp_iowrite32(params_vdev,
2697 value |
2698 (arg->sw_rawawb_uv_en & 0x1) << 1 |
2699 (arg->sw_rawawb_xy_en & 0x1) << 2 |
2700 (arg->sw_rawlsc_bypass_en & 0x1) << 3 |
2701 (arg->sw_rawawb_3dyuv_ls_idx0 & 0x7) << 4 |
2702 (arg->sw_rawawb_3dyuv_ls_idx1 & 0x7) << 7 |
2703 (arg->sw_rawawb_3dyuv_ls_idx2 & 0x7) << 10 |
2704 (arg->sw_rawawb_3dyuv_ls_idx3 & 0x7) << 13 |
2705 (arg->sw_rawawb_y_range & 0x1) << 16 |
2706 (arg->sw_rawawb_c_range & 0x1) << 17 |
2707 (arg->sw_rawawb_wind_size & 0x1) << 18 |
2708 (arg->sw_rawawb_light_num & 0x7) << 20,
2709 ISP_RAWAWB_CTRL);
2710
2711 value = rkisp_ioread32(params_vdev, CTRL_VI_ISP_PATH);
2712 value &= ~(ISP2X_ISPPATH_RAWAWB_SEL_SET(3));
2713 value |= ISP2X_ISPPATH_RAWAWB_SEL_SET(arg->rawawb_sel);
2714 rkisp_iowrite32(params_vdev, value, CTRL_VI_ISP_PATH);
2715 }
2716
2717 static void
isp_rawawb_enable(struct rkisp_isp_params_vdev * params_vdev,bool en)2718 isp_rawawb_enable(struct rkisp_isp_params_vdev *params_vdev,
2719 bool en)
2720 {
2721 u32 awb_ctrl;
2722
2723 awb_ctrl = rkisp_ioread32(params_vdev, ISP_RAWAWB_CTRL);
2724 awb_ctrl &= ~ISP2X_REG_WR_MASK;
2725 if (en)
2726 awb_ctrl |= ISP2X_RAWAWB_ENA;
2727 else
2728 awb_ctrl &= ~ISP2X_RAWAWB_ENA;
2729
2730 rkisp_iowrite32(params_vdev, awb_ctrl, ISP_RAWAWB_CTRL);
2731 }
2732
2733 static void
isp_rawhstlite_config(struct rkisp_isp_params_vdev * params_vdev,const struct isp2x_rawhistlite_cfg * arg)2734 isp_rawhstlite_config(struct rkisp_isp_params_vdev *params_vdev,
2735 const struct isp2x_rawhistlite_cfg *arg)
2736 {
2737 u32 i;
2738 u32 value;
2739 u32 hist_ctrl;
2740 u32 block_hsize, block_vsize;
2741
2742 /* avoid to override the old enable value */
2743 hist_ctrl = rkisp_ioread32(params_vdev,
2744 ISP_RAWHIST_LITE_CTRL);
2745 hist_ctrl &= ISP2X_RAWHSTLITE_CTRL_EN_MASK;
2746 hist_ctrl &= ~ISP2X_REG_WR_MASK;
2747 hist_ctrl = hist_ctrl |
2748 ISP2X_RAWHSTLITE_CTRL_MODE_SET(arg->mode) |
2749 ISP2X_RAWHSTLITE_CTRL_DATASEL_SET(arg->data_sel) |
2750 ISP2X_RAWHSTLITE_CTRL_WATERLINE_SET(arg->waterline) |
2751 ISP2X_RAWHSTLITE_CTRL_STEPSIZE_SET(arg->stepsize);
2752 rkisp_iowrite32(params_vdev, hist_ctrl,
2753 ISP_RAWHIST_LITE_CTRL);
2754
2755 rkisp_iowrite32(params_vdev,
2756 ISP2X_RAWHSTLITE_OFFS_SET(arg->win.h_offs & 0xFFFE,
2757 arg->win.v_offs & 0xFFFE),
2758 ISP_RAWHIST_LITE_OFFS);
2759
2760 block_hsize = arg->win.h_size / ISP2X_RAWHSTLITE_ROW_NUM - 1;
2761 block_vsize = arg->win.v_size / ISP2X_RAWHSTLITE_COLUMN_NUM - 1;
2762 block_hsize &= 0xFFFE;
2763 block_vsize &= 0xFFFE;
2764 rkisp_iowrite32(params_vdev,
2765 ISP2X_RAWHSTLITE_SIZE_SET(block_hsize, block_vsize),
2766 ISP_RAWHIST_LITE_SIZE);
2767
2768 rkisp_iowrite32(params_vdev,
2769 ISP2X_PACK_4BYTE(arg->rcc, arg->gcc, arg->bcc, arg->off),
2770 ISP_RAWHIST_LITE_RAW2Y_CC);
2771
2772 for (i = 0; i < (ISP2X_RAWHSTLITE_WEIGHT_REG_SIZE / 4); i++) {
2773 value = ISP2X_RAWHSTLITE_WEIGHT_SET(
2774 arg->weight[4 * i + 0],
2775 arg->weight[4 * i + 1],
2776 arg->weight[4 * i + 2],
2777 arg->weight[4 * i + 3]);
2778 rkisp_iowrite32(params_vdev, value,
2779 ISP_RAWHIST_LITE_WEIGHT + 4 * i);
2780 }
2781
2782 value = ISP2X_RAWHSTLITE_WEIGHT_SET(
2783 arg->weight[4 * i + 0], 0, 0, 0);
2784 rkisp_iowrite32(params_vdev, value,
2785 ISP_RAWHIST_LITE_WEIGHT + 4 * i);
2786 }
2787
2788 static void
isp_rawhstlite_enable(struct rkisp_isp_params_vdev * params_vdev,bool en)2789 isp_rawhstlite_enable(struct rkisp_isp_params_vdev *params_vdev,
2790 bool en)
2791 {
2792 u32 hist_ctrl;
2793
2794 hist_ctrl = rkisp_ioread32(params_vdev,
2795 ISP_RAWHIST_LITE_CTRL);
2796 hist_ctrl &= ~(ISP2X_RAWHSTLITE_CTRL_EN_MASK | ISP2X_REG_WR_MASK);
2797
2798 if (en)
2799 hist_ctrl |= ISP2X_RAWHSTLITE_CTRL_EN_SET(0x1);
2800
2801 rkisp_iowrite32(params_vdev, hist_ctrl,
2802 ISP_RAWHIST_LITE_CTRL);
2803 }
2804
2805 static void
isp_rawhstbig_cfg_sram(struct rkisp_isp_params_vdev * params_vdev,const struct isp2x_rawhistbig_cfg * arg,u32 blk_no,bool is_check)2806 isp_rawhstbig_cfg_sram(struct rkisp_isp_params_vdev *params_vdev,
2807 const struct isp2x_rawhistbig_cfg *arg,
2808 u32 blk_no, bool is_check)
2809 {
2810 u32 i, j, wnd_num_idx, value;
2811 u8 weight15x15[ISP2X_RAWHSTBIG_WEIGHT_REG_SIZE];
2812 const u32 hist_wnd_num[] = { 5, 5, 15, 15 };
2813 u32 addr;
2814
2815 switch (blk_no) {
2816 case 1:
2817 addr = ISP_RAWHIST_BIG2_BASE;
2818 break;
2819 case 2:
2820 addr = ISP_RAWHIST_BIG3_BASE;
2821 break;
2822 case 0:
2823 default:
2824 addr = ISP_RAWHIST_BIG1_BASE;
2825 break;
2826 }
2827
2828 value = ISP2X_RAWHSTBIG_CTRL_EN_MASK;
2829 if (is_check &&
2830 !(rkisp_ioread32(params_vdev, addr + ISP_RAWHIST_BIG_CTRL) & value))
2831 return;
2832
2833 wnd_num_idx = arg->wnd_num;
2834 memset(weight15x15, 0, sizeof(weight15x15));
2835 for (i = 0; i < hist_wnd_num[wnd_num_idx]; i++) {
2836 for (j = 0; j < hist_wnd_num[wnd_num_idx]; j++) {
2837 weight15x15[i * ISP2X_RAWHSTBIG_ROW_NUM + j] =
2838 arg->weight[i * hist_wnd_num[wnd_num_idx] + j];
2839 }
2840 }
2841
2842 for (i = 0; i < (ISP2X_RAWHSTBIG_WEIGHT_REG_SIZE / 5); i++) {
2843 value = ISP2X_RAWHSTBIG_WEIGHT_SET(weight15x15[5 * i + 0],
2844 weight15x15[5 * i + 1],
2845 weight15x15[5 * i + 2],
2846 weight15x15[5 * i + 3],
2847 weight15x15[5 * i + 4]);
2848 rkisp_write(params_vdev->dev,
2849 addr + ISP_RAWHIST_BIG_WEIGHT_BASE,
2850 value, true);
2851 }
2852 }
2853
2854 static void
isp_rawhstbig_config(struct rkisp_isp_params_vdev * params_vdev,const struct isp2x_rawhistbig_cfg * arg,u32 blk_no)2855 isp_rawhstbig_config(struct rkisp_isp_params_vdev *params_vdev,
2856 const struct isp2x_rawhistbig_cfg *arg, u32 blk_no)
2857 {
2858 struct isp2x_isp_params_cfg *params_rec = params_vdev->isp2x_params;
2859 struct rkisp_device *dev = params_vdev->dev;
2860 struct isp2x_rawhistbig_cfg *arg_rec;
2861 u32 hist_ctrl, block_hsize, block_vsize, wnd_num_idx;
2862 const u32 hist_wnd_num[] = { 5, 5, 15, 15 };
2863 u32 addr;
2864
2865 switch (blk_no) {
2866 case 1:
2867 addr = ISP_RAWHIST_BIG2_BASE;
2868 arg_rec = ¶ms_rec->meas.rawhist1;
2869 break;
2870 case 2:
2871 addr = ISP_RAWHIST_BIG3_BASE;
2872 arg_rec = ¶ms_rec->meas.rawhist2;
2873 break;
2874 case 0:
2875 default:
2876 addr = ISP_RAWHIST_BIG1_BASE;
2877 arg_rec = ¶ms_rec->meas.rawhist3;
2878 break;
2879 }
2880
2881 wnd_num_idx = arg->wnd_num;
2882 /* avoid to override the old enable value */
2883 hist_ctrl = rkisp_ioread32(params_vdev, addr + ISP_RAWHIST_BIG_CTRL);
2884 hist_ctrl &= ISP2X_RAWHSTBIG_CTRL_EN_MASK;
2885 hist_ctrl &= ~ISP2X_REG_WR_MASK;
2886 hist_ctrl = hist_ctrl |
2887 ISP2X_RAWHSTBIG_CTRL_MODE_SET(arg->mode) |
2888 ISP2X_RAWHSTBIG_CTRL_DATASEL_SET(arg->data_sel) |
2889 ISP2X_RAWHSTBIG_CTRL_WATERLINE_SET(arg->waterline) |
2890 ISP2X_RAWHSTBIG_CTRL_WNDNUM_SET(arg->wnd_num) |
2891 ISP2X_RAWHSTBIG_CTRL_STEPSIZE_SET(arg->stepsize);
2892 rkisp_iowrite32(params_vdev, hist_ctrl, addr + ISP_RAWHIST_BIG_CTRL);
2893
2894 rkisp_iowrite32(params_vdev,
2895 ISP2X_RAWHSTBIG_OFFS_SET(arg->win.h_offs & 0xFFFE,
2896 arg->win.v_offs & 0xFFFE),
2897 addr + ISP_RAWHIST_BIG_OFFS);
2898
2899 block_hsize = arg->win.h_size / hist_wnd_num[wnd_num_idx] - 1;
2900 block_vsize = arg->win.v_size / hist_wnd_num[wnd_num_idx] - 1;
2901 block_hsize &= 0xFFFE;
2902 block_vsize &= 0xFFFE;
2903 rkisp_iowrite32(params_vdev,
2904 ISP2X_RAWHSTBIG_SIZE_SET(block_hsize, block_vsize),
2905 addr + ISP_RAWHIST_BIG_SIZE);
2906
2907 rkisp_iowrite32(params_vdev,
2908 ISP2X_PACK_4BYTE(arg->rcc, arg->gcc, arg->bcc, arg->off),
2909 addr + ISP_RAWHIST_BIG_RAW2Y_CC);
2910
2911 if (dev->hw_dev->is_single)
2912 isp_rawhstbig_cfg_sram(params_vdev, arg, blk_no, false);
2913 else
2914 *arg_rec = *arg;
2915 }
2916
2917 static void
isp_rawhstbig_enable(struct rkisp_isp_params_vdev * params_vdev,bool en,u32 blk_no)2918 isp_rawhstbig_enable(struct rkisp_isp_params_vdev *params_vdev,
2919 bool en, u32 blk_no)
2920 {
2921 u32 hist_ctrl;
2922 u32 addr;
2923
2924 switch (blk_no) {
2925 case 0:
2926 addr = ISP_RAWHIST_BIG1_BASE;
2927 break;
2928 case 1:
2929 addr = ISP_RAWHIST_BIG2_BASE;
2930 break;
2931 case 2:
2932 addr = ISP_RAWHIST_BIG3_BASE;
2933 break;
2934 default:
2935 addr = ISP_RAWHIST_BIG1_BASE;
2936 break;
2937 }
2938
2939 hist_ctrl = rkisp_ioread32(params_vdev, addr + ISP_RAWHIST_BIG_CTRL);
2940 hist_ctrl &= ~(ISP2X_RAWHSTBIG_CTRL_EN_MASK | ISP2X_REG_WR_MASK);
2941 if (en)
2942 hist_ctrl |= ISP2X_RAWHSTBIG_CTRL_EN_SET(0x1);
2943
2944 rkisp_iowrite32(params_vdev, hist_ctrl, addr + ISP_RAWHIST_BIG_CTRL);
2945 }
2946
2947 static void
isp_rawhst1_config(struct rkisp_isp_params_vdev * params_vdev,const struct isp2x_rawhistbig_cfg * arg)2948 isp_rawhst1_config(struct rkisp_isp_params_vdev *params_vdev,
2949 const struct isp2x_rawhistbig_cfg *arg)
2950 {
2951 isp_rawhstbig_config(params_vdev, arg, 1);
2952 }
2953
2954 static void
isp_rawhst1_enable(struct rkisp_isp_params_vdev * params_vdev,bool en)2955 isp_rawhst1_enable(struct rkisp_isp_params_vdev *params_vdev,
2956 bool en)
2957 {
2958 isp_rawhstbig_enable(params_vdev, en, 1);
2959 }
2960
2961 static void
isp_rawhst2_config(struct rkisp_isp_params_vdev * params_vdev,const struct isp2x_rawhistbig_cfg * arg)2962 isp_rawhst2_config(struct rkisp_isp_params_vdev *params_vdev,
2963 const struct isp2x_rawhistbig_cfg *arg)
2964 {
2965 isp_rawhstbig_config(params_vdev, arg, 2);
2966 }
2967
2968 static void
isp_rawhst2_enable(struct rkisp_isp_params_vdev * params_vdev,bool en)2969 isp_rawhst2_enable(struct rkisp_isp_params_vdev *params_vdev,
2970 bool en)
2971 {
2972 isp_rawhstbig_enable(params_vdev, en, 2);
2973 }
2974
2975 static void
isp_rawhst3_config(struct rkisp_isp_params_vdev * params_vdev,const struct isp2x_rawhistbig_cfg * arg)2976 isp_rawhst3_config(struct rkisp_isp_params_vdev *params_vdev,
2977 const struct isp2x_rawhistbig_cfg *arg)
2978 {
2979 isp_rawhstbig_config(params_vdev, arg, 0);
2980 }
2981
2982 static void
isp_rawhst3_enable(struct rkisp_isp_params_vdev * params_vdev,bool en)2983 isp_rawhst3_enable(struct rkisp_isp_params_vdev *params_vdev,
2984 bool en)
2985 {
2986 isp_rawhstbig_enable(params_vdev, en, 0);
2987 }
2988
2989 static void
isp_hdrmge_config(struct rkisp_isp_params_vdev * params_vdev,const struct isp2x_hdrmge_cfg * arg,enum rkisp_params_type type)2990 isp_hdrmge_config(struct rkisp_isp_params_vdev *params_vdev,
2991 const struct isp2x_hdrmge_cfg *arg, enum rkisp_params_type type)
2992 {
2993 u32 value;
2994 int i;
2995
2996 if (type == RKISP_PARAMS_SHD || type == RKISP_PARAMS_ALL) {
2997 value = ISP2X_PACK_2SHORT(arg->gain0, arg->gain0_inv);
2998 rkisp_iowrite32(params_vdev, value, ISP_HDRMGE_GAIN0);
2999
3000 value = ISP2X_PACK_2SHORT(arg->gain1, arg->gain1_inv);
3001 rkisp_iowrite32(params_vdev, value, ISP_HDRMGE_GAIN1);
3002
3003 value = arg->gain2;
3004 rkisp_iowrite32(params_vdev, value, ISP_HDRMGE_GAIN2);
3005 }
3006
3007 if (type == RKISP_PARAMS_IMD || type == RKISP_PARAMS_ALL) {
3008 value = ISP2X_PACK_4BYTE(arg->ms_dif_0p8, arg->ms_diff_0p15,
3009 arg->lm_dif_0p9, arg->lm_dif_0p15);
3010 rkisp_iowrite32(params_vdev, value, ISP_HDRMGE_CONS_DIFF);
3011
3012 for (i = 0; i < ISP2X_HDRMGE_L_CURVE_NUM; i++) {
3013 value = ISP2X_PACK_2SHORT(arg->curve.curve_0[i], arg->curve.curve_1[i]);
3014 rkisp_iowrite32(params_vdev, value, ISP_HDRMGE_DIFF_Y0 + 4 * i);
3015 }
3016
3017 for (i = 0; i < ISP2X_HDRMGE_E_CURVE_NUM; i++) {
3018 value = arg->e_y[i];
3019 rkisp_iowrite32(params_vdev, value, ISP_HDRMGE_OVER_Y0 + 4 * i);
3020 }
3021 }
3022 }
3023
3024 static void
isp_hdrmge_enable(struct rkisp_isp_params_vdev * params_vdev,bool en)3025 isp_hdrmge_enable(struct rkisp_isp_params_vdev *params_vdev,
3026 bool en)
3027 {
3028 }
3029
3030 static void
isp_rawnr_config(struct rkisp_isp_params_vdev * params_vdev,const struct isp2x_rawnr_cfg * arg)3031 isp_rawnr_config(struct rkisp_isp_params_vdev *params_vdev,
3032 const struct isp2x_rawnr_cfg *arg)
3033 {
3034 u32 value;
3035 int i;
3036
3037 value = rkisp_ioread32(params_vdev, ISP_RAWNR_CTRL);
3038 value &= ISP_RAWNR_EN;
3039
3040 value |= (arg->gauss_en & 0x01) << 20 |
3041 (arg->log_bypass & 0x01) << 12;
3042 rkisp_iowrite32(params_vdev, value, ISP_RAWNR_CTRL);
3043 rkisp_iowrite32(params_vdev, arg->filtpar0, ISP_RAWNR_FILTPAR0);
3044 rkisp_iowrite32(params_vdev, arg->filtpar1, ISP_RAWNR_FILTPAR1);
3045 rkisp_iowrite32(params_vdev, arg->filtpar2, ISP_RAWNR_FILTPAR2);
3046 rkisp_iowrite32(params_vdev, arg->dgain0, ISP_RAWNR_DGAIN0);
3047 rkisp_iowrite32(params_vdev, arg->dgain1, ISP_RAWNR_DGAIN1);
3048 rkisp_iowrite32(params_vdev, arg->dgain2, ISP_RAWNR_DGAIN2);
3049
3050 for (i = 0; i < ISP2X_RAWNR_LUMA_RATION_NUM / 2; i++) {
3051 value = ISP2X_PACK_2SHORT(arg->luration[2 * i], arg->luration[2 * i + 1]);
3052 rkisp_iowrite32(params_vdev, value, ISP_RAWNR_LURTION0_1 + 4 * i);
3053 }
3054
3055 for (i = 0; i < ISP2X_RAWNR_LUMA_RATION_NUM / 2; i++) {
3056 value = ISP2X_PACK_2SHORT(arg->lulevel[2 * i], arg->lulevel[2 * i + 1]);
3057 rkisp_iowrite32(params_vdev, value, ISP_RAWNR_LULEVEL0_1 + 4 * i);
3058 }
3059
3060 rkisp_iowrite32(params_vdev, arg->gauss, ISP_RAWNR_GAUSS);
3061 rkisp_iowrite32(params_vdev, arg->sigma, ISP_RAWNR_SIGMA);
3062 rkisp_iowrite32(params_vdev, arg->pix_diff, ISP_RAWNR_PIX_DIFF);
3063 rkisp_iowrite32(params_vdev, arg->thld_diff, ISP_RAWNR_HILD_DIFF);
3064
3065 value = (arg->gas_weig_scl2 & 0xFF) << 24 |
3066 (arg->gas_weig_scl1 & 0xFF) << 16 |
3067 (arg->thld_chanelw & 0x07FF);
3068 rkisp_iowrite32(params_vdev, value, ISP_RAWNR_THLD_CHANELW);
3069
3070 rkisp_iowrite32(params_vdev, arg->lamda, ISP_RAWNR_LAMDA);
3071
3072 value = ISP2X_PACK_2SHORT(arg->fixw0, arg->fixw1);
3073 rkisp_iowrite32(params_vdev, value, ISP_RAWNR_FIXW0_1);
3074
3075 value = ISP2X_PACK_2SHORT(arg->fixw2, arg->fixw3);
3076 rkisp_iowrite32(params_vdev, value, ISP_RAWNR_FIXW2_3);
3077
3078 rkisp_iowrite32(params_vdev, arg->wlamda0, ISP_RAWNR_WLAMDA0);
3079 rkisp_iowrite32(params_vdev, arg->wlamda1, ISP_RAWNR_WLAMDA1);
3080 rkisp_iowrite32(params_vdev, arg->wlamda2, ISP_RAWNR_WLAMDA2);
3081
3082 value = ISP2X_PACK_2SHORT(arg->bgain_filp, arg->rgain_filp);
3083 rkisp_iowrite32(params_vdev, value, ISP_RAWNR_RGBAIN_FLIP);
3084 }
3085
3086 static void
isp_rawnr_enable(struct rkisp_isp_params_vdev * params_vdev,bool en)3087 isp_rawnr_enable(struct rkisp_isp_params_vdev *params_vdev,
3088 bool en)
3089 {
3090 u32 value;
3091
3092 value = rkisp_ioread32(params_vdev, ISP_RAWNR_CTRL);
3093 value &= ~ISP_RAWNR_EN;
3094
3095 if (en)
3096 value |= ISP_RAWNR_EN;
3097 rkisp_iowrite32(params_vdev, value, ISP_RAWNR_CTRL);
3098 }
3099
isp_hdrtmo_wait_first_line(struct rkisp_isp_params_vdev * params_vdev)3100 static void isp_hdrtmo_wait_first_line(struct rkisp_isp_params_vdev *params_vdev)
3101 {
3102 s32 retry = 10;
3103 u32 value, line_cnt, frame_id;
3104 struct v4l2_rect *out_crop = ¶ms_vdev->dev->isp_sdev.out_crop;
3105
3106 rkisp_dmarx_get_frame(params_vdev->dev, &frame_id, NULL, NULL, true);
3107
3108 do {
3109 value = rkisp_read(params_vdev->dev, ISP_HDRTMO_LG_RO5, true);
3110 line_cnt = value & 0x1fff;
3111
3112 if (frame_id != 0 && (line_cnt < 1 || line_cnt >= out_crop->height))
3113 udelay(10);
3114 else
3115 break;
3116 } while (retry-- > 0);
3117 }
3118
3119 static void
isp_hdrtmo_config(struct rkisp_isp_params_vdev * params_vdev,const struct isp2x_hdrtmo_cfg * arg,enum rkisp_params_type type)3120 isp_hdrtmo_config(struct rkisp_isp_params_vdev *params_vdev,
3121 const struct isp2x_hdrtmo_cfg *arg, enum rkisp_params_type type)
3122 {
3123 u8 big_en, nobig_en;
3124 u32 value;
3125
3126 if (type == RKISP_PARAMS_SHD || type == RKISP_PARAMS_ALL) {
3127 value = rkisp_ioread32(params_vdev, ISP_HDRTMO_CTRL_CFG);
3128 value &= 0xff;
3129 value |= (arg->expl_lgratio & 0xFFFF) << 16 |
3130 (arg->lgscl_ratio & 0xFF) << 8;
3131 rkisp_iowrite32(params_vdev, value, ISP_HDRTMO_CTRL_CFG);
3132
3133 value = ISP2X_PACK_2SHORT(arg->lgscl, arg->lgscl_inv);
3134 rkisp_iowrite32(params_vdev, value, ISP_HDRTMO_LG_SCL);
3135
3136 if (type == RKISP_PARAMS_SHD)
3137 isp_hdrtmo_wait_first_line(params_vdev);
3138
3139 value = ISP2X_PACK_2SHORT(arg->set_palpha, arg->set_gainoff);
3140 rkisp_iowrite32(params_vdev, value, ISP_HDRTMO_LG_CFG0);
3141
3142 value = ISP2X_PACK_2SHORT(arg->set_lgmin, arg->set_lgmax);
3143 rkisp_iowrite32(params_vdev, value, ISP_HDRTMO_LG_CFG1);
3144
3145 value = ISP2X_PACK_2SHORT(arg->set_lgmean, arg->set_weightkey);
3146 rkisp_iowrite32(params_vdev, value, ISP_HDRTMO_LG_CFG2);
3147
3148 value = ISP2X_PACK_2SHORT(arg->set_lgrange0, arg->set_lgrange1);
3149 rkisp_iowrite32(params_vdev, value, ISP_HDRTMO_LG_CFG3);
3150
3151 value = arg->set_lgavgmax;
3152 rkisp_iowrite32(params_vdev, value, ISP_HDRTMO_LG_CFG4);
3153 }
3154
3155 if (type == RKISP_PARAMS_IMD || type == RKISP_PARAMS_ALL) {
3156 big_en = arg->big_en & 0x01;
3157 nobig_en = arg->nobig_en & 0x01;
3158 if (isp_param_get_insize(params_vdev) > ISP2X_NOBIG_OVERFLOW_SIZE) {
3159 big_en = 1;
3160 nobig_en = 0;
3161 }
3162
3163 value = rkisp_ioread32(params_vdev, ISP_HDRTMO_CTRL);
3164 value &= ISP_HDRTMO_EN;
3165 value |= (arg->cnt_vsize & 0x1FFF) << 16 |
3166 (arg->gain_ld_off2 & 0x0F) << 12 |
3167 (arg->gain_ld_off1 & 0x0F) << 8 |
3168 (big_en & 0x01) << 5 |
3169 (nobig_en & 0x01) << 4 |
3170 (arg->newhst_en & 0x01) << 2 |
3171 (arg->cnt_mode & 0x01) << 1;
3172 rkisp_iowrite32(params_vdev, value, ISP_HDRTMO_CTRL);
3173
3174 /*
3175 * expl_lgratio/lgscl_ratio will reconfigure in vs
3176 * when rx perform 'back read' for the last time.
3177 *
3178 * expl_lgratio[31:16] is fixed at 0x0 and
3179 * lgscl_ratio[15:8] is fixed at 0x80
3180 * during rx perform 'back read', so set value to 0x8000.
3181 */
3182 value = 0x8000;
3183 value |= arg->cfg_alpha & 0xFF;
3184 rkisp_iowrite32(params_vdev, value, ISP_HDRTMO_CTRL_CFG);
3185
3186 value = (arg->clipgap1_i & 0x0F) << 28 |
3187 (arg->clipgap0_i & 0x0F) << 24 |
3188 (arg->clipratio1 & 0xFF) << 16 |
3189 (arg->clipratio0 & 0xFF) << 8 |
3190 (arg->ratiol & 0xFF);
3191 rkisp_iowrite32(params_vdev, value, ISP_HDRTMO_CLIPRATIO);
3192
3193 value = arg->lgmax;
3194 rkisp_iowrite32(params_vdev, value, ISP_HDRTMO_LG_MAX);
3195
3196 value = ISP2X_PACK_2SHORT(arg->hist_min, arg->hist_low);
3197 rkisp_iowrite32(params_vdev, value, ISP_HDRTMO_HIST_LOW);
3198
3199 value = (arg->hist_shift & 0x07) << 28 |
3200 (arg->hist_0p3 & 0x07FF) << 16 |
3201 (arg->hist_high & 0x3FFF);
3202 rkisp_iowrite32(params_vdev, value, ISP_HDRTMO_HIST_HIGH);
3203
3204 value = (arg->palpha_lwscl & 0x3F) << 26 |
3205 (arg->palpha_lw0p5 & 0x03FF) << 16 |
3206 (arg->palpha_0p18 & 0x03FF);
3207 rkisp_iowrite32(params_vdev, value, ISP_HDRTMO_PALPHA);
3208
3209 value = ISP2X_PACK_2SHORT(arg->maxpalpha, arg->maxgain);
3210 rkisp_iowrite32(params_vdev, value, ISP_HDRTMO_MAXGAIN);
3211 }
3212 }
3213
3214 static void
isp_hdrtmo_enable(struct rkisp_isp_params_vdev * params_vdev,bool en)3215 isp_hdrtmo_enable(struct rkisp_isp_params_vdev *params_vdev,
3216 bool en)
3217 {
3218 u32 value;
3219
3220 params_vdev->hdrtmo_en = en;
3221 value = rkisp_ioread32(params_vdev, ISP_HDRTMO_CTRL);
3222 if (en)
3223 value |= ISP_HDRTMO_EN;
3224 else
3225 value &= ~ISP_HDRTMO_EN;
3226 rkisp_iowrite32(params_vdev, value, ISP_HDRTMO_CTRL);
3227 }
3228
3229 static void
isp_gic_config(struct rkisp_isp_params_vdev * params_vdev,const struct isp2x_gic_cfg * arg)3230 isp_gic_config(struct rkisp_isp_params_vdev *params_vdev,
3231 const struct isp2x_gic_cfg *arg)
3232 {
3233 u32 value;
3234 s32 i;
3235
3236 value = rkisp_ioread32(params_vdev, ISP_GIC_CONTROL);
3237 value &= ISP_GIC_ENA;
3238
3239 if (arg->edge_open)
3240 value |= ISP_GIC_EDGE_OPEN;
3241 rkisp_iowrite32(params_vdev, value, ISP_GIC_CONTROL);
3242
3243 value = (arg->regmingradthrdark2 & 0x03FF) << 20 |
3244 (arg->regmingradthrdark1 & 0x03FF) << 10 |
3245 (arg->regminbusythre & 0x03FF);
3246 rkisp_iowrite32(params_vdev, value, ISP_GIC_DIFF_PARA1);
3247
3248 value = (arg->regdarkthre & 0x07FF) << 21 |
3249 (arg->regmaxcorvboth & 0x03FF) << 11 |
3250 (arg->regdarktthrehi & 0x07FF);
3251 rkisp_iowrite32(params_vdev, value, ISP_GIC_DIFF_PARA2);
3252
3253 value = (arg->regkgrad2dark & 0x0F) << 28 |
3254 (arg->regkgrad1dark & 0x0F) << 24 |
3255 (arg->regstrengthglobal_fix & 0xFF) << 16 |
3256 (arg->regdarkthrestep & 0x0F) << 12 |
3257 (arg->regkgrad2 & 0x0F) << 8 |
3258 (arg->regkgrad1 & 0x0F) << 4 |
3259 (arg->reggbthre & 0x0F);
3260 rkisp_iowrite32(params_vdev, value, ISP_GIC_DIFF_PARA3);
3261
3262 value = (arg->regmaxcorv & 0x03FF) << 20 |
3263 (arg->regmingradthr2 & 0x03FF) << 10 |
3264 (arg->regmingradthr1 & 0x03FF);
3265 rkisp_iowrite32(params_vdev, value, ISP_GIC_DIFF_PARA4);
3266
3267 value = (arg->gr_ratio & 0x03) << 28 |
3268 (arg->dnloscale & 0x07FF) << 15 |
3269 (arg->dnhiscale & 0x07FF) << 4 |
3270 (arg->reglumapointsstep & 0x0F);
3271 rkisp_iowrite32(params_vdev, value, ISP_GIC_NOISE_PARA1);
3272
3273 value = (arg->gvaluelimitlo & 0x0FFF) << 20 |
3274 (arg->gvaluelimithi & 0x0FFF) << 8 |
3275 (arg->fusionratiohilimt1 & 0xFF);
3276 rkisp_iowrite32(params_vdev, value, ISP_GIC_NOISE_PARA2);
3277
3278 value = arg->regstrength_fix & 0xFF;
3279 rkisp_iowrite32(params_vdev, value, ISP_GIC_NOISE_PARA3);
3280
3281 for (i = 0; i < ISP2X_GIC_SIGMA_Y_NUM / 2; i++) {
3282 value = ISP2X_PACK_2SHORT(arg->sigma_y[2 * i], arg->sigma_y[2 * i + 1]);
3283 rkisp_iowrite32(params_vdev, value, ISP_GIC_SIGMA_VALUE0 + 4 * i);
3284 }
3285 value = ISP2X_PACK_2SHORT(arg->sigma_y[2 * i], 0);
3286 rkisp_iowrite32(params_vdev, value, ISP_GIC_SIGMA_VALUE0 + 4 * i);
3287
3288 value = (arg->noise_coe_a & 0x07FF) << 4 |
3289 (arg->noise_cut_en & 0x01);
3290 rkisp_iowrite32(params_vdev, value, ISP_GIC_NOISE_CTRL0);
3291
3292 value = ISP2X_PACK_2SHORT(arg->noise_coe_b, arg->diff_clip);
3293 rkisp_iowrite32(params_vdev, value, ISP_GIC_NOISE_CTRL1);
3294 }
3295
3296 static void
isp_gic_enable(struct rkisp_isp_params_vdev * params_vdev,bool en)3297 isp_gic_enable(struct rkisp_isp_params_vdev *params_vdev,
3298 bool en)
3299 {
3300 u32 value;
3301
3302 value = rkisp_ioread32(params_vdev, ISP_GIC_CONTROL);
3303 value &= ISP_GIC_EDGE_OPEN;
3304
3305 if (en)
3306 value |= ISP_GIC_ENA;
3307 rkisp_iowrite32(params_vdev, value, ISP_GIC_CONTROL);
3308 }
3309
3310 static void
isp_dhaz_config(struct rkisp_isp_params_vdev * params_vdev,const struct isp2x_dhaz_cfg * arg)3311 isp_dhaz_config(struct rkisp_isp_params_vdev *params_vdev,
3312 const struct isp2x_dhaz_cfg *arg)
3313 {
3314 u8 big_en, nobig_en;
3315 u32 value;
3316
3317 big_en = arg->big_en & 0x01;
3318 nobig_en = arg->nobig_en & 0x01;
3319 if (isp_param_get_insize(params_vdev) > ISP2X_NOBIG_OVERFLOW_SIZE) {
3320 big_en = 1;
3321 nobig_en = 0;
3322 }
3323
3324 value = rkisp_ioread32(params_vdev, ISP_DHAZ_CTRL);
3325 value &= ISP_DHAZ_ENMUX;
3326 if (nobig_en)
3327 value |= ISP_DHAZ_NOBIGEN;
3328 if (big_en)
3329 value |= ISP_DHAZ_BIGEN;
3330 if (arg->dc_en)
3331 value |= ISP_DHAZ_DCEN;
3332 if (arg->hist_en)
3333 value |= ISP_DHAZ_HSTEN;
3334 if (arg->hpara_en)
3335 value |= ISP_DHAZ_HPARAEN;
3336 if (arg->hist_chn)
3337 value |= ISP_DHAZ_HSTCHN;
3338 if (arg->enhance_en)
3339 value |= ISP_DHAZ_ENHANCE;
3340 rkisp_iowrite32(params_vdev, value, ISP_DHAZ_CTRL);
3341
3342 value = ISP2X_PACK_4BYTE(arg->dc_min_th, arg->dc_max_th,
3343 arg->yhist_th, arg->yblk_th);
3344 rkisp_iowrite32(params_vdev, value, ISP_DHAZ_ADP0);
3345
3346 value = ISP2X_PACK_4BYTE(arg->bright_min, arg->bright_max,
3347 arg->wt_max, 0);
3348 rkisp_iowrite32(params_vdev, value, ISP_DHAZ_ADP1);
3349
3350 value = ISP2X_PACK_4BYTE(arg->air_min, arg->air_max,
3351 arg->dark_th, arg->tmax_base);
3352 rkisp_iowrite32(params_vdev, value, ISP_DHAZ_ADP2);
3353
3354 value = ISP2X_PACK_2SHORT(arg->tmax_off, arg->tmax_max);
3355 rkisp_iowrite32(params_vdev, value, ISP_DHAZ_ADP_TMAX);
3356
3357 value = ISP2X_PACK_2SHORT(arg->hist_gratio, arg->hist_th_off);
3358 rkisp_iowrite32(params_vdev, value, ISP_DHAZ_ADP_HIST0);
3359
3360 value = ISP2X_PACK_2SHORT(arg->hist_k, arg->hist_min);
3361 rkisp_iowrite32(params_vdev, value, ISP_DHAZ_ADP_HIST1);
3362
3363 value = ISP2X_PACK_2SHORT(arg->hist_scale, arg->enhance_value);
3364 rkisp_iowrite32(params_vdev, value, ISP_DHAZ_HIST_ENH);
3365
3366 value = (arg->iir_wt_sigma & 0x07FF) << 16 |
3367 (arg->iir_sigma & 0xFF) << 8 |
3368 (arg->stab_fnum & 0x1F);
3369 rkisp_iowrite32(params_vdev, value, ISP_DHAZ_IIR0);
3370
3371 value = ISP2X_PACK_2SHORT(arg->iir_air_sigma, arg->iir_tmax_sigma);
3372 rkisp_iowrite32(params_vdev, value, ISP_DHAZ_IIR1);
3373
3374 value = (arg->cfg_wt & 0x01FF) << 16 |
3375 (arg->cfg_air & 0xFF) << 8 |
3376 (arg->cfg_alpha & 0xFF);
3377 rkisp_iowrite32(params_vdev, value, ISP_DHAZ_ALPHA0);
3378
3379 value = ISP2X_PACK_2SHORT(arg->cfg_tmax, arg->cfg_gratio);
3380 rkisp_iowrite32(params_vdev, value, ISP_DHAZ_ALPHA1);
3381
3382 value = ISP2X_PACK_2SHORT(arg->dc_thed, arg->dc_weitcur);
3383 rkisp_iowrite32(params_vdev, value, ISP_DHAZ_BI_DC);
3384
3385 value = ISP2X_PACK_4BYTE(arg->sw_dhaz_dc_bf_h0, arg->sw_dhaz_dc_bf_h1,
3386 arg->sw_dhaz_dc_bf_h2, arg->sw_dhaz_dc_bf_h3);
3387 rkisp_iowrite32(params_vdev, value, ISP_DHAZ_DC_BF0);
3388
3389 value = ISP2X_PACK_4BYTE(arg->sw_dhaz_dc_bf_h4, arg->sw_dhaz_dc_bf_h5, 0, 0);
3390 rkisp_iowrite32(params_vdev, value, ISP_DHAZ_DC_BF1);
3391
3392 value = ISP2X_PACK_2SHORT(arg->air_thed, arg->air_weitcur);
3393 rkisp_iowrite32(params_vdev, value, ISP_DHAZ_BI_AIR);
3394
3395 value = ISP2X_PACK_4BYTE(arg->air_bf_h0, arg->air_bf_h1, arg->air_bf_h2, 0);
3396 rkisp_iowrite32(params_vdev, value, ISP_DHAZ_AIR_BF);
3397
3398 value = ISP2X_PACK_4BYTE(arg->gaus_h0, arg->gaus_h1, arg->gaus_h2, 0);
3399 rkisp_iowrite32(params_vdev, value, ISP_DHAZ_GAUS);
3400
3401 value = (arg->conv_t0[5] & 0x0F) << 20 |
3402 (arg->conv_t0[4] & 0x0F) << 16 |
3403 (arg->conv_t0[3] & 0x0F) << 12 |
3404 (arg->conv_t0[2] & 0x0F) << 8 |
3405 (arg->conv_t0[1] & 0x0F) << 4 |
3406 (arg->conv_t0[0] & 0x0F);
3407 rkisp_iowrite32(params_vdev, value, ISP_DHAZ_HIST_CONV0);
3408
3409 value = (arg->conv_t1[5] & 0x0F) << 20 |
3410 (arg->conv_t1[4] & 0x0F) << 16 |
3411 (arg->conv_t1[3] & 0x0F) << 12 |
3412 (arg->conv_t1[2] & 0x0F) << 8 |
3413 (arg->conv_t1[1] & 0x0F) << 4 |
3414 (arg->conv_t1[0] & 0x0F);
3415 rkisp_iowrite32(params_vdev, value, ISP_DHAZ_HIST_CONV1);
3416
3417 value = (arg->conv_t2[5] & 0x0F) << 20 |
3418 (arg->conv_t2[4] & 0x0F) << 16 |
3419 (arg->conv_t2[3] & 0x0F) << 12 |
3420 (arg->conv_t2[2] & 0x0F) << 8 |
3421 (arg->conv_t2[1] & 0x0F) << 4 |
3422 (arg->conv_t2[0] & 0x0F);
3423 rkisp_iowrite32(params_vdev, value, ISP_DHAZ_HIST_CONV2);
3424 }
3425
3426 static void
isp_dhaz_enable(struct rkisp_isp_params_vdev * params_vdev,bool en)3427 isp_dhaz_enable(struct rkisp_isp_params_vdev *params_vdev,
3428 bool en)
3429 {
3430 u32 value;
3431
3432 value = rkisp_ioread32(params_vdev, ISP_DHAZ_CTRL);
3433 value &= ~ISP_DHAZ_ENMUX;
3434
3435 if (en)
3436 value |= ISP_DHAZ_ENMUX;
3437
3438 rkisp_iowrite32(params_vdev, value, ISP_DHAZ_CTRL);
3439 }
3440
3441 static void
isp_gain_config(struct rkisp_isp_params_vdev * params_vdev,const struct isp2x_gain_cfg * arg)3442 isp_gain_config(struct rkisp_isp_params_vdev *params_vdev,
3443 const struct isp2x_gain_cfg *arg)
3444 {
3445 struct rkisp_device *dev = params_vdev->dev;
3446 struct rkisp_isp_params_val_v2x *priv_val =
3447 (struct rkisp_isp_params_val_v2x *)params_vdev->priv_val;
3448 u32 value, i, gain_wsize;
3449 u8 mge_en;
3450
3451 if (dev->rd_mode != HDR_NORMAL &&
3452 dev->rd_mode != HDR_RDBK_FRAME1)
3453 mge_en = 1;
3454 else
3455 mge_en = 0;
3456
3457 gain_wsize = rkisp_ioread32(params_vdev, MI_GAIN_WR_SIZE);
3458 gain_wsize &= 0x0FFFFFF0;
3459 if (gain_wsize)
3460 value = (priv_val->dhaz_en & 0x01) << 16 |
3461 (priv_val->wdr_en & 0x01) << 12 |
3462 (priv_val->tmo_en & 0x01) << 8 |
3463 (priv_val->lsc_en & 0x01) << 4 |
3464 (mge_en & 0x01);
3465 else
3466 value = 0;
3467
3468 rkisp_iowrite32(params_vdev, value, ISP_GAIN_CTRL);
3469
3470 value = arg->mge_gain[0];
3471 rkisp_iowrite32(params_vdev, value, ISP_GAIN_G0);
3472
3473 value = ISP2X_PACK_2SHORT(arg->mge_gain[1], arg->mge_gain[2]);
3474 rkisp_iowrite32(params_vdev, value, ISP_GAIN_G1_G2);
3475
3476 for (i = 0; i < ISP2X_GAIN_IDX_NUM / 4; i++) {
3477 value = ISP2X_PACK_4BYTE(arg->idx[4 * i], arg->idx[4 * i + 1],
3478 arg->idx[4 * i + 2], arg->idx[4 * i + 3]);
3479 rkisp_iowrite32(params_vdev, value, ISP_GAIN_IDX0 + 4 * i);
3480 }
3481 value = ISP2X_PACK_4BYTE(arg->idx[4 * i], arg->idx[4 * i + 1],
3482 arg->idx[4 * i + 2], 0);
3483 rkisp_iowrite32(params_vdev, value, ISP_GAIN_IDX0 + 4 * i);
3484
3485 for (i = 0; i < ISP2X_GAIN_LUT_NUM / 2; i++) {
3486 value = ISP2X_PACK_2SHORT(arg->lut[2 * i], arg->lut[2 * i + 1]);
3487 rkisp_iowrite32(params_vdev, value, ISP_GAIN_LUT0 + 4 * i);
3488 }
3489 value = ISP2X_PACK_2SHORT(arg->lut[2 * i], 0);
3490 rkisp_iowrite32(params_vdev, value, ISP_GAIN_LUT0 + 4 * i);
3491 }
3492
3493 static void
isp_gain_enable(struct rkisp_isp_params_vdev * params_vdev,bool en)3494 isp_gain_enable(struct rkisp_isp_params_vdev *params_vdev,
3495 bool en)
3496 {
3497 }
3498
3499 static void
isp_3dlut_config(struct rkisp_isp_params_vdev * params_vdev,const struct isp2x_3dlut_cfg * arg)3500 isp_3dlut_config(struct rkisp_isp_params_vdev *params_vdev,
3501 const struct isp2x_3dlut_cfg *arg)
3502 {
3503 struct rkisp_isp_params_val_v2x *priv_val;
3504 u32 value, buf_idx, i;
3505 u32 *data;
3506
3507 priv_val = (struct rkisp_isp_params_val_v2x *)params_vdev->priv_val;
3508 buf_idx = (priv_val->buf_3dlut_idx++) % RKISP_PARAM_3DLUT_BUF_NUM;
3509
3510 data = (u32 *)priv_val->buf_3dlut[buf_idx].vaddr;
3511 for (i = 0; i < arg->actual_size; i++)
3512 data[i] = (arg->lut_b[i] & 0x3FF) |
3513 (arg->lut_g[i] & 0xFFF) << 10 |
3514 (arg->lut_r[i] & 0x3FF) << 22;
3515 rkisp_prepare_buffer(params_vdev->dev, &priv_val->buf_3dlut[buf_idx]);
3516 value = priv_val->buf_3dlut[buf_idx].dma_addr;
3517 rkisp_iowrite32(params_vdev, value, MI_LUT_3D_RD_BASE);
3518 rkisp_iowrite32(params_vdev, arg->actual_size, MI_LUT_3D_RD_WSIZE);
3519
3520 value = rkisp_ioread32(params_vdev, ISP_3DLUT_CTRL);
3521 value &= ISP_3DLUT_EN;
3522
3523 if (value)
3524 isp_param_set_bits(params_vdev, ISP_3DLUT_UPDATE, 0x01);
3525
3526 if (arg->bypass_en)
3527 value |= ISP_3DLUT_BYPASS;
3528
3529 rkisp_iowrite32(params_vdev, value, ISP_3DLUT_CTRL);
3530 }
3531
3532 static void
isp_3dlut_enable(struct rkisp_isp_params_vdev * params_vdev,bool en)3533 isp_3dlut_enable(struct rkisp_isp_params_vdev *params_vdev,
3534 bool en)
3535 {
3536 u32 value;
3537 bool en_state;
3538
3539 value = rkisp_ioread32(params_vdev, ISP_3DLUT_CTRL);
3540 en_state = (value & ISP_3DLUT_EN) ? true : false;
3541
3542 if (en == en_state)
3543 return;
3544
3545 if (en) {
3546 isp_param_set_bits(params_vdev, ISP_3DLUT_CTRL, 0x01);
3547 isp_param_set_bits(params_vdev, ISP_3DLUT_UPDATE, 0x01);
3548 } else {
3549 isp_param_clear_bits(params_vdev, ISP_3DLUT_CTRL, 0x01);
3550 isp_param_clear_bits(params_vdev, ISP_3DLUT_UPDATE, 0x01);
3551 }
3552 }
3553
3554 static void
isp_ldch_config(struct rkisp_isp_params_vdev * params_vdev,const struct isp2x_ldch_cfg * arg)3555 isp_ldch_config(struct rkisp_isp_params_vdev *params_vdev,
3556 const struct isp2x_ldch_cfg *arg)
3557 {
3558 struct rkisp_device *dev = params_vdev->dev;
3559 struct rkisp_isp_params_val_v2x *priv_val;
3560 struct isp2x_ldch_head *ldch_head;
3561 int buf_idx, i;
3562 u32 value, vsize;
3563
3564 priv_val = (struct rkisp_isp_params_val_v2x *)params_vdev->priv_val;
3565 for (i = 0; i < ISP2X_LDCH_BUF_NUM; i++) {
3566 if (arg->buf_fd == priv_val->buf_ldch[i].dma_fd)
3567 break;
3568 }
3569 if (i == ISP2X_LDCH_BUF_NUM) {
3570 dev_err(dev->dev, "cannot find ldch buf fd(%d)\n", arg->buf_fd);
3571 return;
3572 }
3573
3574 if (!priv_val->buf_ldch[i].vaddr) {
3575 dev_err(dev->dev, "no ldch buffer allocated\n");
3576 return;
3577 }
3578
3579 buf_idx = priv_val->buf_ldch_idx;
3580 ldch_head = (struct isp2x_ldch_head *)priv_val->buf_ldch[buf_idx].vaddr;
3581 ldch_head->stat = LDCH_BUF_INIT;
3582
3583 buf_idx = i;
3584 ldch_head = (struct isp2x_ldch_head *)priv_val->buf_ldch[buf_idx].vaddr;
3585 ldch_head->stat = LDCH_BUF_CHIPINUSE;
3586 priv_val->buf_ldch_idx = buf_idx;
3587
3588 vsize = arg->vsize;
3589 /* normal extend line for ldch mesh */
3590 if (dev->isp_ver == ISP_V20) {
3591 void *buf = priv_val->buf_ldch[buf_idx].vaddr + ldch_head->data_oft;
3592 u32 cnt = RKMODULE_EXTEND_LINE / 8;
3593
3594 value = arg->hsize * 4;
3595 memcpy(buf + value * vsize, buf + value * (vsize - cnt), cnt * value);
3596 if (dev->rd_mode == HDR_RDBK_FRAME1)
3597 vsize += cnt;
3598 }
3599 rkisp_prepare_buffer(dev, &priv_val->buf_ldch[buf_idx]);
3600 value = priv_val->buf_ldch[buf_idx].dma_addr + ldch_head->data_oft;
3601 rkisp_iowrite32(params_vdev, value, MI_LUT_LDCH_RD_BASE);
3602 rkisp_iowrite32(params_vdev, arg->hsize, MI_LUT_LDCH_RD_H_WSIZE);
3603 rkisp_iowrite32(params_vdev, vsize, MI_LUT_LDCH_RD_V_SIZE);
3604 }
3605
3606 static void
isp_ldch_enable(struct rkisp_isp_params_vdev * params_vdev,bool en)3607 isp_ldch_enable(struct rkisp_isp_params_vdev *params_vdev,
3608 bool en)
3609 {
3610 struct rkisp_device *dev = params_vdev->dev;
3611 struct rkisp_isp_params_val_v2x *priv_val;
3612 u32 buf_idx;
3613
3614 priv_val = (struct rkisp_isp_params_val_v2x *)params_vdev->priv_val;
3615 if (en) {
3616 buf_idx = priv_val->buf_ldch_idx;
3617 if (!priv_val->buf_ldch[buf_idx].vaddr) {
3618 dev_err(dev->dev, "no ldch buffer allocated\n");
3619 return;
3620 }
3621 isp_param_set_bits(params_vdev, ISP_LDCH_STS, 0x01);
3622 } else {
3623 isp_param_clear_bits(params_vdev, ISP_LDCH_STS, 0x01);
3624 }
3625 }
3626
3627 static void
isp_csm_config(struct rkisp_isp_params_vdev * params_vdev,bool full_range)3628 isp_csm_config(struct rkisp_isp_params_vdev *params_vdev,
3629 bool full_range)
3630 {
3631 const u16 full_range_coeff[] = {
3632 0x0026, 0x004b, 0x000f,
3633 0x01ea, 0x01d6, 0x0040,
3634 0x0040, 0x01ca, 0x01f6
3635 };
3636 const u16 limited_range_coeff[] = {
3637 0x0021, 0x0040, 0x000d,
3638 0x01ed, 0x01db, 0x0038,
3639 0x0038, 0x01d1, 0x01f7,
3640 };
3641 unsigned int i;
3642
3643 if (full_range) {
3644 for (i = 0; i < ARRAY_SIZE(full_range_coeff); i++)
3645 rkisp_iowrite32(params_vdev, full_range_coeff[i],
3646 ISP_CC_COEFF_0 + i * 4);
3647
3648 isp_param_set_bits(params_vdev, ISP_CTRL,
3649 CIF_ISP_CTRL_ISP_CSM_Y_FULL_ENA |
3650 CIF_ISP_CTRL_ISP_CSM_C_FULL_ENA);
3651 } else {
3652 for (i = 0; i < ARRAY_SIZE(limited_range_coeff); i++)
3653 rkisp_iowrite32(params_vdev, limited_range_coeff[i],
3654 CIF_ISP_CC_COEFF_0 + i * 4);
3655
3656 isp_param_clear_bits(params_vdev, ISP_CTRL,
3657 CIF_ISP_CTRL_ISP_CSM_Y_FULL_ENA |
3658 CIF_ISP_CTRL_ISP_CSM_C_FULL_ENA);
3659 }
3660 }
3661
3662 struct rkisp_isp_params_v2x_ops rkisp_v2x_isp_params_ops = {
3663 .dpcc_config = isp_dpcc_config,
3664 .dpcc_enable = isp_dpcc_enable,
3665 .bls_config = isp_bls_config,
3666 .bls_enable = isp_bls_enable,
3667 .sdg_config = isp_sdg_config,
3668 .sdg_enable = isp_sdg_enable,
3669 .sihst_config = isp_sihst_config,
3670 .sihst_enable = isp_sihst_enable,
3671 .lsc_config = isp_lsc_config,
3672 .lsc_enable = isp_lsc_enable,
3673 .awbgain_config = isp_awbgain_config,
3674 .awbgain_enable = isp_awbgain_enable,
3675 .debayer_config = isp_debayer_config,
3676 .debayer_enable = isp_debayer_enable,
3677 .ccm_config = isp_ccm_config,
3678 .ccm_enable = isp_ccm_enable,
3679 .goc_config = isp_goc_config,
3680 .goc_enable = isp_goc_enable,
3681 .cproc_config = isp_cproc_config,
3682 .cproc_enable = isp_cproc_enable,
3683 .siaf_config = isp_siaf_config,
3684 .siaf_enable = isp_siaf_enable,
3685 .siawb_config = isp_siawb_config,
3686 .siawb_enable = isp_siawb_enable,
3687 .ie_config = isp_ie_config,
3688 .ie_enable = isp_ie_enable,
3689 .yuvae_config = isp_yuvae_config,
3690 .yuvae_enable = isp_yuvae_enable,
3691 .wdr_config = isp_wdr_config,
3692 .wdr_enable = isp_wdr_enable,
3693 .iesharp_config = isp_iesharp_config,
3694 .iesharp_enable = isp_iesharp_enable,
3695 .rawaf_config = isp_rawaf_config,
3696 .rawaf_enable = isp_rawaf_enable,
3697 .rawae0_config = isp_rawaelite_config,
3698 .rawae0_enable = isp_rawaelite_enable,
3699 .rawae1_config = isp_rawae1_config,
3700 .rawae1_enable = isp_rawae1_enable,
3701 .rawae2_config = isp_rawae2_config,
3702 .rawae2_enable = isp_rawae2_enable,
3703 .rawae3_config = isp_rawae3_config,
3704 .rawae3_enable = isp_rawae3_enable,
3705 .rawawb_config = isp_rawawb_config,
3706 .rawawb_enable = isp_rawawb_enable,
3707 .rawhst0_config = isp_rawhstlite_config,
3708 .rawhst0_enable = isp_rawhstlite_enable,
3709 .rawhst1_config = isp_rawhst1_config,
3710 .rawhst1_enable = isp_rawhst1_enable,
3711 .rawhst2_config = isp_rawhst2_config,
3712 .rawhst2_enable = isp_rawhst2_enable,
3713 .rawhst3_config = isp_rawhst3_config,
3714 .rawhst3_enable = isp_rawhst3_enable,
3715 .hdrmge_config = isp_hdrmge_config,
3716 .hdrmge_enable = isp_hdrmge_enable,
3717 .rawnr_config = isp_rawnr_config,
3718 .rawnr_enable = isp_rawnr_enable,
3719 .hdrtmo_config = isp_hdrtmo_config,
3720 .hdrtmo_enable = isp_hdrtmo_enable,
3721 .gic_config = isp_gic_config,
3722 .gic_enable = isp_gic_enable,
3723 .dhaz_config = isp_dhaz_config,
3724 .dhaz_enable = isp_dhaz_enable,
3725 .gain_config = isp_gain_config,
3726 .gain_enable = isp_gain_enable,
3727 .isp3dlut_config = isp_3dlut_config,
3728 .isp3dlut_enable = isp_3dlut_enable,
3729 .ldch_config = isp_ldch_config,
3730 .ldch_enable = isp_ldch_enable,
3731 .csm_config = isp_csm_config,
3732 };
3733
3734 static __maybe_unused
__isp_isr_other_config(struct rkisp_isp_params_vdev * params_vdev,const struct isp2x_isp_params_cfg * new_params,enum rkisp_params_type type)3735 void __isp_isr_other_config(struct rkisp_isp_params_vdev *params_vdev,
3736 const struct isp2x_isp_params_cfg *new_params, enum rkisp_params_type type)
3737 {
3738 struct rkisp_isp_params_v2x_ops *ops =
3739 (struct rkisp_isp_params_v2x_ops *)params_vdev->priv_ops;
3740 u64 module_cfg_update = new_params->module_cfg_update;
3741
3742 if (type == RKISP_PARAMS_SHD) {
3743 if ((module_cfg_update & ISP2X_MODULE_HDRMGE))
3744 ops->hdrmge_config(params_vdev, &new_params->others.hdrmge_cfg, type);
3745
3746 if ((module_cfg_update & ISP2X_MODULE_HDRTMO))
3747 ops->hdrtmo_config(params_vdev, &new_params->others.hdrtmo_cfg, type);
3748
3749 return;
3750 }
3751
3752 if ((module_cfg_update & ISP2X_MODULE_DPCC))
3753 ops->dpcc_config(params_vdev, &new_params->others.dpcc_cfg);
3754
3755 if ((module_cfg_update & ISP2X_MODULE_BLS))
3756 ops->bls_config(params_vdev, &new_params->others.bls_cfg);
3757
3758 if ((module_cfg_update & ISP2X_MODULE_SDG))
3759 ops->sdg_config(params_vdev, &new_params->others.sdg_cfg);
3760
3761 if ((module_cfg_update & ISP2X_MODULE_LSC))
3762 ops->lsc_config(params_vdev, &new_params->others.lsc_cfg);
3763
3764 if ((module_cfg_update & ISP2X_MODULE_AWB_GAIN))
3765 ops->awbgain_config(params_vdev, &new_params->others.awb_gain_cfg);
3766
3767 if ((module_cfg_update & ISP2X_MODULE_DEBAYER))
3768 ops->debayer_config(params_vdev, &new_params->others.debayer_cfg);
3769
3770 if ((module_cfg_update & ISP2X_MODULE_CCM))
3771 ops->ccm_config(params_vdev, &new_params->others.ccm_cfg);
3772
3773 if ((module_cfg_update & ISP2X_MODULE_GOC))
3774 ops->goc_config(params_vdev, &new_params->others.gammaout_cfg);
3775
3776 if ((module_cfg_update & ISP2X_MODULE_CPROC))
3777 ops->cproc_config(params_vdev, &new_params->others.cproc_cfg);
3778
3779 if ((module_cfg_update & ISP2X_MODULE_IE))
3780 ops->ie_config(params_vdev, &new_params->others.ie_cfg);
3781
3782 if ((module_cfg_update & ISP2X_MODULE_WDR))
3783 ops->wdr_config(params_vdev, &new_params->others.wdr_cfg);
3784
3785 if ((module_cfg_update & ISP2X_MODULE_RK_IESHARP))
3786 ops->iesharp_config(params_vdev, &new_params->others.rkiesharp_cfg);
3787
3788 if ((module_cfg_update & ISP2X_MODULE_HDRMGE))
3789 ops->hdrmge_config(params_vdev, &new_params->others.hdrmge_cfg, type);
3790
3791 if ((module_cfg_update & ISP2X_MODULE_RAWNR))
3792 ops->rawnr_config(params_vdev, &new_params->others.rawnr_cfg);
3793
3794 if ((module_cfg_update & ISP2X_MODULE_HDRTMO))
3795 ops->hdrtmo_config(params_vdev, &new_params->others.hdrtmo_cfg, type);
3796
3797 if ((module_cfg_update & ISP2X_MODULE_GIC))
3798 ops->gic_config(params_vdev, &new_params->others.gic_cfg);
3799
3800 if ((module_cfg_update & ISP2X_MODULE_DHAZ))
3801 ops->dhaz_config(params_vdev, &new_params->others.dhaz_cfg);
3802
3803 if ((module_cfg_update & ISP2X_MODULE_3DLUT))
3804 ops->isp3dlut_config(params_vdev, &new_params->others.isp3dlut_cfg);
3805
3806 if ((module_cfg_update & ISP2X_MODULE_LDCH))
3807 ops->ldch_config(params_vdev, &new_params->others.ldch_cfg);
3808
3809 if ((module_cfg_update & ISP2X_MODULE_GAIN))
3810 ops->gain_config(params_vdev, &new_params->others.gain_cfg);
3811 }
3812
3813 static __maybe_unused
__isp_isr_other_en(struct rkisp_isp_params_vdev * params_vdev,const struct isp2x_isp_params_cfg * new_params,enum rkisp_params_type type)3814 void __isp_isr_other_en(struct rkisp_isp_params_vdev *params_vdev,
3815 const struct isp2x_isp_params_cfg *new_params, enum rkisp_params_type type)
3816 {
3817 struct rkisp_isp_params_v2x_ops *ops =
3818 (struct rkisp_isp_params_v2x_ops *)params_vdev->priv_ops;
3819 struct rkisp_isp_params_val_v2x *priv_val =
3820 (struct rkisp_isp_params_val_v2x *)params_vdev->priv_val;
3821 u64 module_en_update = new_params->module_en_update;
3822 u64 module_ens = new_params->module_ens;
3823
3824 if (type == RKISP_PARAMS_SHD)
3825 return;
3826
3827 if (module_en_update & ISP2X_MODULE_HDRMGE) {
3828 ops->hdrmge_enable(params_vdev, !!(module_ens & ISP2X_MODULE_HDRMGE));
3829 priv_val->mge_en = !!(module_ens & ISP2X_MODULE_HDRMGE);
3830 }
3831
3832 if (module_en_update & ISP2X_MODULE_HDRTMO) {
3833 ops->hdrtmo_enable(params_vdev, !!(module_ens & ISP2X_MODULE_HDRTMO));
3834 priv_val->tmo_en = !!(module_ens & ISP2X_MODULE_HDRTMO);
3835 }
3836
3837 if (module_en_update & ISP2X_MODULE_DPCC)
3838 ops->dpcc_enable(params_vdev, !!(module_ens & ISP2X_MODULE_DPCC));
3839
3840 if (module_en_update & ISP2X_MODULE_BLS)
3841 ops->bls_enable(params_vdev, !!(module_ens & ISP2X_MODULE_BLS));
3842
3843 if (module_en_update & ISP2X_MODULE_SDG)
3844 ops->sdg_enable(params_vdev, !!(module_ens & ISP2X_MODULE_SDG));
3845
3846 if (module_en_update & ISP2X_MODULE_LSC) {
3847 ops->lsc_enable(params_vdev, !!(module_ens & ISP2X_MODULE_LSC));
3848 priv_val->lsc_en = !!(module_ens & ISP2X_MODULE_LSC);
3849 }
3850
3851 if (module_en_update & ISP2X_MODULE_AWB_GAIN)
3852 ops->awbgain_enable(params_vdev, !!(module_ens & ISP2X_MODULE_AWB_GAIN));
3853
3854 if (module_en_update & ISP2X_MODULE_DEBAYER)
3855 ops->debayer_enable(params_vdev, !!(module_ens & ISP2X_MODULE_DEBAYER));
3856
3857 if (module_en_update & ISP2X_MODULE_CCM)
3858 ops->ccm_enable(params_vdev, !!(module_ens & ISP2X_MODULE_CCM));
3859
3860 if (module_en_update & ISP2X_MODULE_GOC)
3861 ops->goc_enable(params_vdev, !!(module_ens & ISP2X_MODULE_GOC));
3862
3863 if (module_en_update & ISP2X_MODULE_CPROC)
3864 ops->cproc_enable(params_vdev, !!(module_ens & ISP2X_MODULE_CPROC));
3865
3866 if (module_en_update & ISP2X_MODULE_IE)
3867 ops->ie_enable(params_vdev, !!(module_ens & ISP2X_MODULE_IE));
3868
3869 if (module_en_update & ISP2X_MODULE_WDR) {
3870 ops->wdr_enable(params_vdev, !!(module_ens & ISP2X_MODULE_WDR));
3871 priv_val->wdr_en = !!(module_ens & ISP2X_MODULE_WDR);
3872 }
3873
3874 if (module_en_update & ISP2X_MODULE_RK_IESHARP)
3875 ops->iesharp_enable(params_vdev, !!(module_ens & ISP2X_MODULE_RK_IESHARP));
3876
3877 if (module_en_update & ISP2X_MODULE_HDRMGE) {
3878 ops->hdrmge_enable(params_vdev, !!(module_ens & ISP2X_MODULE_HDRMGE));
3879 priv_val->mge_en = !!(module_ens & ISP2X_MODULE_HDRMGE);
3880 }
3881
3882 if (module_en_update & ISP2X_MODULE_RAWNR)
3883 ops->rawnr_enable(params_vdev, !!(module_ens & ISP2X_MODULE_RAWNR));
3884
3885 if (module_en_update & ISP2X_MODULE_HDRTMO) {
3886 ops->hdrtmo_enable(params_vdev, !!(module_ens & ISP2X_MODULE_HDRTMO));
3887 priv_val->tmo_en = !!(module_ens & ISP2X_MODULE_HDRTMO);
3888 }
3889
3890 if (module_en_update & ISP2X_MODULE_GIC)
3891 ops->gic_enable(params_vdev, !!(module_ens & ISP2X_MODULE_GIC));
3892
3893 if (module_en_update & ISP2X_MODULE_DHAZ) {
3894 ops->dhaz_enable(params_vdev, !!(module_ens & ISP2X_MODULE_DHAZ));
3895 priv_val->dhaz_en = !!(module_ens & ISP2X_MODULE_DHAZ);
3896 }
3897
3898 if (module_en_update & ISP2X_MODULE_3DLUT)
3899 ops->isp3dlut_enable(params_vdev, !!(module_ens & ISP2X_MODULE_3DLUT));
3900
3901 if (module_en_update & ISP2X_MODULE_LDCH) {
3902 /*
3903 * lsc read table from sram in mult-isp mode,
3904 * so don't delay in mult-isp mode.
3905 */
3906 if (params_vdev->first_cfg_params &&
3907 !!(module_ens & ISP2X_MODULE_LDCH) &&
3908 params_vdev->dev->hw_dev->is_single)
3909 priv_val->delay_en_ldch = true;
3910 else
3911 ops->ldch_enable(params_vdev,
3912 !!(module_ens & ISP2X_MODULE_LDCH));
3913 }
3914
3915 if (module_en_update & ISP2X_MODULE_GAIN)
3916 ops->gain_enable(params_vdev, !!(module_ens & ISP2X_MODULE_GAIN));
3917 }
3918
3919 static __maybe_unused
__isp_isr_meas_config(struct rkisp_isp_params_vdev * params_vdev,struct isp2x_isp_params_cfg * new_params,enum rkisp_params_type type)3920 void __isp_isr_meas_config(struct rkisp_isp_params_vdev *params_vdev,
3921 struct isp2x_isp_params_cfg *new_params, enum rkisp_params_type type)
3922 {
3923 struct rkisp_isp_params_v2x_ops *ops =
3924 (struct rkisp_isp_params_v2x_ops *)params_vdev->priv_ops;
3925 u64 module_cfg_update = new_params->module_cfg_update;
3926
3927 if (type == RKISP_PARAMS_SHD)
3928 return;
3929
3930 if ((module_cfg_update & ISP2X_MODULE_YUVAE))
3931 ops->yuvae_config(params_vdev, &new_params->meas.yuvae);
3932
3933 if ((module_cfg_update & ISP2X_MODULE_RAWAE0))
3934 ops->rawae0_config(params_vdev, &new_params->meas.rawae0);
3935
3936 if ((module_cfg_update & ISP2X_MODULE_RAWAE1))
3937 ops->rawae1_config(params_vdev, &new_params->meas.rawae1);
3938
3939 if ((module_cfg_update & ISP2X_MODULE_RAWAE2))
3940 ops->rawae2_config(params_vdev, &new_params->meas.rawae2);
3941
3942 if ((module_cfg_update & ISP2X_MODULE_RAWAE3))
3943 ops->rawae3_config(params_vdev, &new_params->meas.rawae3);
3944
3945 if ((module_cfg_update & ISP2X_MODULE_SIHST))
3946 ops->sihst_config(params_vdev, &new_params->meas.sihst);
3947
3948 if ((module_cfg_update & ISP2X_MODULE_RAWHIST0))
3949 ops->rawhst0_config(params_vdev, &new_params->meas.rawhist0);
3950
3951 if ((module_cfg_update & ISP2X_MODULE_RAWHIST1))
3952 ops->rawhst1_config(params_vdev, &new_params->meas.rawhist1);
3953
3954 if ((module_cfg_update & ISP2X_MODULE_RAWHIST2))
3955 ops->rawhst2_config(params_vdev, &new_params->meas.rawhist2);
3956
3957 if ((module_cfg_update & ISP2X_MODULE_RAWHIST3))
3958 ops->rawhst3_config(params_vdev, &new_params->meas.rawhist3);
3959
3960 if ((module_cfg_update & ISP2X_MODULE_SIAWB))
3961 ops->siawb_config(params_vdev, &new_params->meas.siawb);
3962
3963 if ((module_cfg_update & ISP2X_MODULE_RAWAWB))
3964 ops->rawawb_config(params_vdev, &new_params->meas.rawawb);
3965
3966 if ((module_cfg_update & ISP2X_MODULE_SIAF))
3967 ops->siaf_config(params_vdev, &new_params->meas.siaf);
3968
3969 if ((module_cfg_update & ISP2X_MODULE_RAWAF))
3970 ops->rawaf_config(params_vdev, &new_params->meas.rawaf);
3971 }
3972
3973 static __maybe_unused
__isp_isr_meas_en(struct rkisp_isp_params_vdev * params_vdev,struct isp2x_isp_params_cfg * new_params,enum rkisp_params_type type)3974 void __isp_isr_meas_en(struct rkisp_isp_params_vdev *params_vdev,
3975 struct isp2x_isp_params_cfg *new_params, enum rkisp_params_type type)
3976 {
3977 struct rkisp_isp_params_v2x_ops *ops =
3978 (struct rkisp_isp_params_v2x_ops *)params_vdev->priv_ops;
3979 u64 module_en_update = new_params->module_en_update;
3980 u64 module_ens = new_params->module_ens;
3981
3982 if (type == RKISP_PARAMS_SHD)
3983 return;
3984
3985 if (module_en_update & ISP2X_MODULE_YUVAE)
3986 ops->yuvae_enable(params_vdev, !!(module_ens & ISP2X_MODULE_YUVAE));
3987
3988 if (module_en_update & ISP2X_MODULE_RAWAE0)
3989 ops->rawae0_enable(params_vdev, !!(module_ens & ISP2X_MODULE_RAWAE0));
3990
3991 if (module_en_update & ISP2X_MODULE_RAWAE1)
3992 ops->rawae1_enable(params_vdev, !!(module_ens & ISP2X_MODULE_RAWAE1));
3993
3994 if (module_en_update & ISP2X_MODULE_RAWAE2)
3995 ops->rawae2_enable(params_vdev, !!(module_ens & ISP2X_MODULE_RAWAE2));
3996
3997 if (module_en_update & ISP2X_MODULE_RAWAE3)
3998 ops->rawae3_enable(params_vdev, !!(module_ens & ISP2X_MODULE_RAWAE3));
3999
4000 if (module_en_update & ISP2X_MODULE_SIHST)
4001 ops->sihst_enable(params_vdev, !!(module_ens & ISP2X_MODULE_SIHST));
4002
4003 if (module_en_update & ISP2X_MODULE_RAWHIST0)
4004 ops->rawhst0_enable(params_vdev, !!(module_ens & ISP2X_MODULE_RAWHIST0));
4005
4006 if (module_en_update & ISP2X_MODULE_RAWHIST1)
4007 ops->rawhst1_enable(params_vdev, !!(module_ens & ISP2X_MODULE_RAWHIST1));
4008
4009 if (module_en_update & ISP2X_MODULE_RAWHIST2)
4010 ops->rawhst2_enable(params_vdev, !!(module_ens & ISP2X_MODULE_RAWHIST2));
4011
4012 if (module_en_update & ISP2X_MODULE_RAWHIST3)
4013 ops->rawhst3_enable(params_vdev, !!(module_ens & ISP2X_MODULE_RAWHIST3));
4014
4015 if (module_en_update & ISP2X_MODULE_SIAWB)
4016 ops->siawb_enable(params_vdev, !!(module_ens & ISP2X_MODULE_SIAWB));
4017
4018 if (module_en_update & ISP2X_MODULE_RAWAWB)
4019 ops->rawawb_enable(params_vdev, !!(module_ens & ISP2X_MODULE_RAWAWB));
4020
4021 if (module_en_update & ISP2X_MODULE_SIAF)
4022 ops->siaf_enable(params_vdev, !!(module_ens & ISP2X_MODULE_SIAF));
4023
4024 if (module_en_update & ISP2X_MODULE_RAWAF)
4025 ops->rawaf_enable(params_vdev, !!(module_ens & ISP2X_MODULE_RAWAF));
4026 }
4027
4028 static __maybe_unused
__isp_config_hdrshd(struct rkisp_isp_params_vdev * params_vdev)4029 void __isp_config_hdrshd(struct rkisp_isp_params_vdev *params_vdev)
4030 {
4031 struct rkisp_isp_params_v2x_ops *ops =
4032 (struct rkisp_isp_params_v2x_ops *)params_vdev->priv_ops;
4033 struct rkisp_isp_params_val_v2x *priv_val =
4034 (struct rkisp_isp_params_val_v2x *)params_vdev->priv_val;
4035
4036 ops->hdrmge_config(params_vdev, &priv_val->last_hdrmge, RKISP_PARAMS_ALL);
4037 ops->hdrtmo_config(params_vdev, &priv_val->last_hdrtmo, RKISP_PARAMS_ALL);
4038 }
4039
4040 static
rkisp_params_cfgsram_v2x(struct rkisp_isp_params_vdev * params_vdev)4041 void rkisp_params_cfgsram_v2x(struct rkisp_isp_params_vdev *params_vdev)
4042 {
4043 struct isp2x_isp_params_cfg *params = params_vdev->isp2x_params;
4044
4045 isp_lsc_matrix_cfg_sram(params_vdev, ¶ms->others.lsc_cfg, true);
4046 isp_rawhstbig_cfg_sram(params_vdev, ¶ms->meas.rawhist1, 1, true);
4047 isp_rawhstbig_cfg_sram(params_vdev, ¶ms->meas.rawhist2, 2, true);
4048 isp_rawhstbig_cfg_sram(params_vdev, ¶ms->meas.rawhist3, 0, true);
4049 }
4050
4051 /* Not called when the camera active, thus not isr protection. */
4052 static void
rkisp_params_first_cfg_v2x(struct rkisp_isp_params_vdev * params_vdev)4053 rkisp_params_first_cfg_v2x(struct rkisp_isp_params_vdev *params_vdev)
4054 {
4055 struct device *dev = params_vdev->dev->dev;
4056 struct rkisp_isp_params_val_v2x *priv_val =
4057 (struct rkisp_isp_params_val_v2x *)params_vdev->priv_val;
4058
4059 spin_lock(¶ms_vdev->config_lock);
4060 /* override the default things */
4061 if (!params_vdev->isp2x_params->module_cfg_update &&
4062 !params_vdev->isp2x_params->module_en_update)
4063 dev_warn(dev, "can not get first iq setting in stream on\n");
4064
4065 priv_val->dhaz_en = 0;
4066 priv_val->wdr_en = 0;
4067 priv_val->tmo_en = 0;
4068 priv_val->lsc_en = 0;
4069 priv_val->mge_en = 0;
4070 priv_val->delay_en_ldch = false;
4071 params_vdev->first_cfg_params = true;
4072 __isp_isr_other_config(params_vdev, params_vdev->isp2x_params, RKISP_PARAMS_ALL);
4073 __isp_isr_other_en(params_vdev, params_vdev->isp2x_params, RKISP_PARAMS_ALL);
4074 __isp_isr_meas_config(params_vdev, params_vdev->isp2x_params, RKISP_PARAMS_ALL);
4075 __isp_isr_meas_en(params_vdev, params_vdev->isp2x_params, RKISP_PARAMS_ALL);
4076 params_vdev->first_cfg_params = false;
4077
4078 priv_val->cur_hdrtmo = params_vdev->isp2x_params->others.hdrtmo_cfg;
4079 priv_val->cur_hdrmge = params_vdev->isp2x_params->others.hdrmge_cfg;
4080 priv_val->last_hdrtmo = priv_val->cur_hdrtmo;
4081 priv_val->last_hdrmge = priv_val->cur_hdrmge;
4082 spin_unlock(¶ms_vdev->config_lock);
4083 }
4084
rkisp_save_first_param_v2x(struct rkisp_isp_params_vdev * params_vdev,void * param)4085 static void rkisp_save_first_param_v2x(struct rkisp_isp_params_vdev *params_vdev, void *param)
4086 {
4087 struct isp2x_isp_params_cfg *new_params;
4088
4089 new_params = (struct isp2x_isp_params_cfg *)param;
4090 *params_vdev->isp2x_params = *new_params;
4091 }
4092
rkisp_clear_first_param_v2x(struct rkisp_isp_params_vdev * params_vdev)4093 static void rkisp_clear_first_param_v2x(struct rkisp_isp_params_vdev *params_vdev)
4094 {
4095 params_vdev->isp2x_params->module_cfg_update = 0;
4096 params_vdev->isp2x_params->module_en_update = 0;
4097 }
4098
rkisp_get_ldch_meshsize(struct rkisp_isp_params_vdev * params_vdev,struct rkisp_ldchbuf_size * ldchsize)4099 static u32 rkisp_get_ldch_meshsize(struct rkisp_isp_params_vdev *params_vdev,
4100 struct rkisp_ldchbuf_size *ldchsize)
4101 {
4102 int mesh_w, mesh_h, map_align, height;
4103
4104 height = ldchsize->meas_height;
4105 if (params_vdev->dev->isp_ver == ISP_V20)
4106 height += RKMODULE_EXTEND_LINE;
4107
4108 mesh_w = ((ldchsize->meas_width + (1 << 4) - 1) >> 4) + 1;
4109 mesh_h = ((height + (1 << 3) - 1) >> 3) + 1;
4110
4111 map_align = ((mesh_w + 1) >> 1) << 1;
4112 return map_align * mesh_h;
4113 }
4114
rkisp_deinit_ldch_buf(struct rkisp_isp_params_vdev * params_vdev)4115 static void rkisp_deinit_ldch_buf(struct rkisp_isp_params_vdev *params_vdev)
4116 {
4117 struct rkisp_isp_params_val_v2x *priv_val;
4118 int i;
4119
4120 priv_val = params_vdev->priv_val;
4121 if (!priv_val)
4122 return;
4123
4124 for (i = 0; i < ISP2X_LDCH_BUF_NUM; i++)
4125 rkisp_free_buffer(params_vdev->dev, &priv_val->buf_ldch[i]);
4126 }
4127
rkisp_init_ldch_buf(struct rkisp_isp_params_vdev * params_vdev,struct rkisp_ldchbuf_size * ldchsize)4128 static int rkisp_init_ldch_buf(struct rkisp_isp_params_vdev *params_vdev,
4129 struct rkisp_ldchbuf_size *ldchsize)
4130 {
4131 struct device *dev = params_vdev->dev->dev;
4132 struct rkisp_isp_params_val_v2x *priv_val;
4133 struct isp2x_ldch_head *ldch_head;
4134 u32 mesh_size;
4135 int i, ret;
4136
4137 priv_val = params_vdev->priv_val;
4138 if (!priv_val) {
4139 dev_err(dev, "priv_val is NULL\n");
4140 return -EINVAL;
4141 }
4142
4143 priv_val->buf_ldch_idx = 0;
4144 mesh_size = rkisp_get_ldch_meshsize(params_vdev, ldchsize);
4145 for (i = 0; i < ISP2X_LDCH_BUF_NUM; i++) {
4146 priv_val->buf_ldch[i].is_need_vaddr = true;
4147 priv_val->buf_ldch[i].is_need_dbuf = true;
4148 priv_val->buf_ldch[i].is_need_dmafd = true;
4149 priv_val->buf_ldch[i].size =
4150 PAGE_ALIGN(mesh_size * sizeof(u16) + ALIGN(sizeof(struct isp2x_ldch_head), 16));
4151 ret = rkisp_alloc_buffer(params_vdev->dev, &priv_val->buf_ldch[i]);
4152 if (ret) {
4153 dev_err(dev, "can not alloc buffer\n");
4154 goto err;
4155 }
4156
4157 ldch_head = (struct isp2x_ldch_head *)priv_val->buf_ldch[i].vaddr;
4158 ldch_head->stat = LDCH_BUF_INIT;
4159 ldch_head->data_oft = ALIGN(sizeof(struct isp2x_ldch_head), 16);
4160 }
4161
4162 return 0;
4163
4164 err:
4165 rkisp_deinit_ldch_buf(params_vdev);
4166
4167 return -ENOMEM;
4168
4169 }
4170
4171 static void
rkisp_get_param_size_v2x(struct rkisp_isp_params_vdev * params_vdev,unsigned int sizes[])4172 rkisp_get_param_size_v2x(struct rkisp_isp_params_vdev *params_vdev,
4173 unsigned int sizes[])
4174 {
4175 sizes[0] = sizeof(struct isp2x_isp_params_cfg);
4176 }
4177
4178 static void
rkisp_params_get_ldchbuf_inf_v2x(struct rkisp_isp_params_vdev * params_vdev,void * buf)4179 rkisp_params_get_ldchbuf_inf_v2x(struct rkisp_isp_params_vdev *params_vdev,
4180 void *buf)
4181 {
4182 struct rkisp_isp_params_val_v2x *priv_val;
4183 struct rkisp_ldchbuf_info *ldchbuf = buf;
4184 int i;
4185
4186 priv_val = params_vdev->priv_val;
4187 for (i = 0; i < ISP2X_LDCH_BUF_NUM; i++) {
4188 ldchbuf->buf_fd[i] = priv_val->buf_ldch[i].dma_fd;
4189 ldchbuf->buf_size[i] = priv_val->buf_ldch[i].size;
4190 }
4191 }
4192
4193 static void
rkisp_params_set_ldchbuf_size_v2x(struct rkisp_isp_params_vdev * params_vdev,void * size)4194 rkisp_params_set_ldchbuf_size_v2x(struct rkisp_isp_params_vdev *params_vdev,
4195 void *size)
4196 {
4197 struct rkisp_ldchbuf_size *ldchsize = size;
4198
4199 rkisp_deinit_ldch_buf(params_vdev);
4200 rkisp_init_ldch_buf(params_vdev, ldchsize);
4201 }
4202
4203 static void
rkisp_params_fop_release_v2x(struct rkisp_isp_params_vdev * params_vdev)4204 rkisp_params_fop_release_v2x(struct rkisp_isp_params_vdev *params_vdev)
4205 {
4206 rkisp_deinit_ldch_buf(params_vdev);
4207 }
4208
4209 /* Not called when the camera active, thus not isr protection. */
4210 static void
rkisp_params_disable_isp_v2x(struct rkisp_isp_params_vdev * params_vdev)4211 rkisp_params_disable_isp_v2x(struct rkisp_isp_params_vdev *params_vdev)
4212 {
4213 struct rkisp_isp_params_v2x_ops *ops =
4214 (struct rkisp_isp_params_v2x_ops *)params_vdev->priv_ops;
4215
4216 ops->dpcc_enable(params_vdev, false);
4217 ops->bls_enable(params_vdev, false);
4218 ops->sdg_enable(params_vdev, false);
4219 ops->sihst_enable(params_vdev, false);
4220 ops->lsc_enable(params_vdev, false);
4221 ops->awbgain_enable(params_vdev, false);
4222 ops->debayer_enable(params_vdev, false);
4223 ops->ccm_enable(params_vdev, false);
4224 ops->goc_enable(params_vdev, false);
4225 ops->cproc_enable(params_vdev, false);
4226 ops->siaf_enable(params_vdev, false);
4227 ops->siawb_enable(params_vdev, false);
4228 ops->ie_enable(params_vdev, false);
4229 ops->yuvae_enable(params_vdev, false);
4230 ops->wdr_enable(params_vdev, false);
4231 ops->iesharp_enable(params_vdev, false);
4232 ops->rawaf_enable(params_vdev, false);
4233 ops->rawae0_enable(params_vdev, false);
4234 ops->rawae1_enable(params_vdev, false);
4235 ops->rawae2_enable(params_vdev, false);
4236 ops->rawae3_enable(params_vdev, false);
4237 ops->rawawb_enable(params_vdev, false);
4238 ops->rawhst0_enable(params_vdev, false);
4239 ops->rawhst1_enable(params_vdev, false);
4240 ops->rawhst2_enable(params_vdev, false);
4241 ops->rawhst3_enable(params_vdev, false);
4242 ops->hdrmge_enable(params_vdev, false);
4243 ops->rawnr_enable(params_vdev, false);
4244 ops->hdrtmo_enable(params_vdev, false);
4245 ops->gic_enable(params_vdev, false);
4246 ops->dhaz_enable(params_vdev, false);
4247 ops->isp3dlut_enable(params_vdev, false);
4248 }
4249
4250 static void
ldch_data_abandon(struct rkisp_isp_params_vdev * params_vdev,struct isp2x_isp_params_cfg * params)4251 ldch_data_abandon(struct rkisp_isp_params_vdev *params_vdev,
4252 struct isp2x_isp_params_cfg *params)
4253 {
4254 const struct isp2x_ldch_cfg *arg = ¶ms->others.ldch_cfg;
4255 struct rkisp_isp_params_val_v2x *priv_val;
4256 struct isp2x_ldch_head *ldch_head;
4257 int i;
4258
4259 priv_val = (struct rkisp_isp_params_val_v2x *)params_vdev->priv_val;
4260 for (i = 0; i < ISP2X_LDCH_BUF_NUM; i++) {
4261 if (arg->buf_fd == priv_val->buf_ldch[i].dma_fd &&
4262 priv_val->buf_ldch[i].vaddr) {
4263 ldch_head = (struct isp2x_ldch_head *)priv_val->buf_ldch[i].vaddr;
4264 ldch_head->stat = LDCH_BUF_CHIPINUSE;
4265 break;
4266 }
4267 }
4268 }
4269
4270 static void
rkisp_params_cfg_v2x(struct rkisp_isp_params_vdev * params_vdev,u32 frame_id,enum rkisp_params_type type)4271 rkisp_params_cfg_v2x(struct rkisp_isp_params_vdev *params_vdev,
4272 u32 frame_id, enum rkisp_params_type type)
4273 {
4274 struct isp2x_isp_params_cfg *new_params = NULL;
4275 struct rkisp_buffer *cur_buf = params_vdev->cur_buf;
4276 struct rkisp_device *dev = params_vdev->dev;
4277 struct rkisp_hw_dev *hw_dev = dev->hw_dev;
4278
4279 spin_lock(¶ms_vdev->config_lock);
4280 if (!params_vdev->streamon)
4281 goto unlock;
4282
4283 /* get buffer by frame_id */
4284 while (!list_empty(¶ms_vdev->params) && !cur_buf) {
4285 cur_buf = list_first_entry(¶ms_vdev->params,
4286 struct rkisp_buffer, queue);
4287
4288 new_params = (struct isp2x_isp_params_cfg *)(cur_buf->vaddr[0]);
4289 if (new_params->frame_id < frame_id) {
4290 list_del(&cur_buf->queue);
4291 if (list_empty(¶ms_vdev->params))
4292 break;
4293 else if (new_params->module_en_update) {
4294 /* update en immediately */
4295 __isp_isr_other_en(params_vdev, new_params, type);
4296 __isp_isr_meas_en(params_vdev, new_params, type);
4297 }
4298 if (new_params->module_cfg_update & ISP2X_MODULE_LDCH)
4299 ldch_data_abandon(params_vdev, new_params);
4300 vb2_buffer_done(&cur_buf->vb.vb2_buf, VB2_BUF_STATE_DONE);
4301 cur_buf = NULL;
4302 continue;
4303 } else if (new_params->frame_id == frame_id) {
4304 list_del(&cur_buf->queue);
4305 } else {
4306 cur_buf = NULL;
4307 }
4308 break;
4309 }
4310
4311 if (!cur_buf)
4312 goto unlock;
4313
4314 new_params = (struct isp2x_isp_params_cfg *)(cur_buf->vaddr[0]);
4315 __isp_isr_other_config(params_vdev, new_params, type);
4316 __isp_isr_other_en(params_vdev, new_params, type);
4317 __isp_isr_meas_config(params_vdev, new_params, type);
4318 __isp_isr_meas_en(params_vdev, new_params, type);
4319 if (!hw_dev->is_single && type != RKISP_PARAMS_SHD)
4320 __isp_config_hdrshd(params_vdev);
4321
4322 if (type != RKISP_PARAMS_IMD) {
4323 struct rkisp_isp_params_val_v2x *priv_val =
4324 (struct rkisp_isp_params_val_v2x *)params_vdev->priv_val;
4325
4326 priv_val->last_hdrtmo = priv_val->cur_hdrtmo;
4327 priv_val->last_hdrmge = priv_val->cur_hdrmge;
4328 priv_val->cur_hdrtmo = new_params->others.hdrtmo_cfg;
4329 priv_val->cur_hdrmge = new_params->others.hdrmge_cfg;
4330 vb2_buffer_done(&cur_buf->vb.vb2_buf, VB2_BUF_STATE_DONE);
4331 cur_buf = NULL;
4332 }
4333
4334 params_vdev->exposure = new_params->exposure;
4335 unlock:
4336 params_vdev->cur_buf = cur_buf;
4337 spin_unlock(¶ms_vdev->config_lock);
4338 }
4339
4340 static void
rkisp_params_isr_v2x(struct rkisp_isp_params_vdev * params_vdev,u32 isp_mis)4341 rkisp_params_isr_v2x(struct rkisp_isp_params_vdev *params_vdev,
4342 u32 isp_mis)
4343 {
4344 struct rkisp_device *dev = params_vdev->dev;
4345 u32 cur_frame_id;
4346
4347 rkisp_dmarx_get_frame(dev, &cur_frame_id, NULL, NULL, true);
4348 if (isp_mis & CIF_ISP_V_START) {
4349 if (params_vdev->rdbk_times)
4350 params_vdev->rdbk_times--;
4351 if (!params_vdev->cur_buf)
4352 return;
4353
4354 if (IS_HDR_RDBK(dev->rd_mode) && !params_vdev->rdbk_times) {
4355 struct rkisp_isp_params_val_v2x *priv_val =
4356 (struct rkisp_isp_params_val_v2x *)params_vdev->priv_val;
4357
4358 if (priv_val->delay_en_ldch) {
4359 struct rkisp_isp_params_v2x_ops *ops =
4360 (struct rkisp_isp_params_v2x_ops *)params_vdev->priv_ops;
4361
4362 ops->ldch_enable(params_vdev, true);
4363 priv_val->delay_en_ldch = false;
4364 }
4365
4366 rkisp_params_cfg_v2x(params_vdev, cur_frame_id, RKISP_PARAMS_SHD);
4367 return;
4368 }
4369 }
4370
4371 if ((isp_mis & CIF_ISP_FRAME) && !IS_HDR_RDBK(dev->rd_mode))
4372 rkisp_params_cfg_v2x(params_vdev, cur_frame_id + 1, RKISP_PARAMS_ALL);
4373 }
4374
4375 static struct rkisp_isp_params_ops rkisp_isp_params_ops_tbl = {
4376 .save_first_param = rkisp_save_first_param_v2x,
4377 .clear_first_param = rkisp_clear_first_param_v2x,
4378 .get_param_size = rkisp_get_param_size_v2x,
4379 .first_cfg = rkisp_params_first_cfg_v2x,
4380 .disable_isp = rkisp_params_disable_isp_v2x,
4381 .isr_hdl = rkisp_params_isr_v2x,
4382 .param_cfg = rkisp_params_cfg_v2x,
4383 .param_cfgsram = rkisp_params_cfgsram_v2x,
4384 .get_meshbuf_inf = rkisp_params_get_ldchbuf_inf_v2x,
4385 .set_meshbuf_size = rkisp_params_set_ldchbuf_size_v2x,
4386 .fop_release = rkisp_params_fop_release_v2x,
4387 };
4388
rkisp_init_params_vdev_v2x(struct rkisp_isp_params_vdev * params_vdev)4389 int rkisp_init_params_vdev_v2x(struct rkisp_isp_params_vdev *params_vdev)
4390 {
4391 struct device *dev = params_vdev->dev->dev;
4392 struct rkisp_isp_params_val_v2x *priv_val;
4393 int i, ret;
4394
4395 priv_val = kzalloc(sizeof(*priv_val), GFP_KERNEL);
4396 if (!priv_val) {
4397 dev_err(dev, "can not get memory\n");
4398 return -ENOMEM;
4399 }
4400
4401 params_vdev->isp2x_params = vmalloc(sizeof(*params_vdev->isp2x_params));
4402 if (!params_vdev->isp2x_params) {
4403 dev_err(dev, "call vmalloc failure\n");
4404 kfree(priv_val);
4405 return -ENOMEM;
4406 }
4407
4408 priv_val->buf_3dlut_idx = 0;
4409 for (i = 0; i < RKISP_PARAM_3DLUT_BUF_NUM; i++) {
4410 priv_val->buf_3dlut[i].is_need_vaddr = true;
4411 priv_val->buf_3dlut[i].size = RKISP_PARAM_3DLUT_BUF_SIZE;
4412 ret = rkisp_alloc_buffer(params_vdev->dev, &priv_val->buf_3dlut[i]);
4413 if (ret) {
4414 dev_err(dev, "can not alloc buffer\n");
4415 goto err;
4416 }
4417 }
4418
4419 priv_val->buf_lsclut_idx = 0;
4420 for (i = 0; i < RKISP_PARAM_LSC_LUT_BUF_NUM; i++) {
4421 priv_val->buf_lsclut[i].is_need_vaddr = true;
4422 priv_val->buf_lsclut[i].size = RKISP_PARAM_LSC_LUT_BUF_SIZE;
4423 ret = rkisp_alloc_buffer(params_vdev->dev, &priv_val->buf_lsclut[i]);
4424 if (ret) {
4425 dev_err(dev, "can not alloc buffer\n");
4426 goto err;
4427 }
4428 }
4429
4430 rkisp_clear_first_param_v2x(params_vdev);
4431 params_vdev->priv_val = (void *)priv_val;
4432 params_vdev->ops = &rkisp_isp_params_ops_tbl;
4433 params_vdev->priv_ops = &rkisp_v2x_isp_params_ops;
4434 return 0;
4435
4436 err:
4437 for (i = 0; i < RKISP_PARAM_3DLUT_BUF_NUM; i++)
4438 rkisp_free_buffer(params_vdev->dev, &priv_val->buf_3dlut[i]);
4439
4440 for (i = 0; i < RKISP_PARAM_LSC_LUT_BUF_NUM; i++)
4441 rkisp_free_buffer(params_vdev->dev, &priv_val->buf_lsclut[i]);
4442 vfree(params_vdev->isp2x_params);
4443
4444 return ret;
4445 }
4446
rkisp_uninit_params_vdev_v2x(struct rkisp_isp_params_vdev * params_vdev)4447 void rkisp_uninit_params_vdev_v2x(struct rkisp_isp_params_vdev *params_vdev)
4448 {
4449 struct rkisp_isp_params_val_v2x *priv_val;
4450 int i;
4451
4452 priv_val = params_vdev->priv_val;
4453 if (!priv_val)
4454 return;
4455
4456 rkisp_deinit_ldch_buf(params_vdev);
4457 for (i = 0; i < RKISP_PARAM_3DLUT_BUF_NUM; i++)
4458 rkisp_free_buffer(params_vdev->dev, &priv_val->buf_3dlut[i]);
4459
4460 for (i = 0; i < RKISP_PARAM_LSC_LUT_BUF_NUM; i++)
4461 rkisp_free_buffer(params_vdev->dev, &priv_val->buf_lsclut[i]);
4462 vfree(params_vdev->isp2x_params);
4463 kfree(priv_val);
4464 params_vdev->priv_val = NULL;
4465 }
4466