1 // SPDX-License-Identifier: GPL-2.0
2 /* Copyright (c) 2019 Fuzhou Rockchip Electronics Co., Ltd. */
3
4 #include <media/v4l2-common.h>
5 #include <media/v4l2-ioctl.h>
6 #include <media/videobuf2-core.h>
7 #include <media/videobuf2-vmalloc.h>
8 #include <media/v4l2-event.h>
9 #include <media/v4l2-mc.h>
10 #include <linux/rkisp1-config.h>
11 #include <uapi/linux/rk-video-format.h>
12 #include "dev.h"
13 #include "regs.h"
14
get_input_size(struct rkispp_params_vdev * params_vdev)15 static inline size_t get_input_size(struct rkispp_params_vdev *params_vdev)
16 {
17 struct rkispp_device *dev = params_vdev->dev;
18 struct rkispp_subdev *isp_sdev = &dev->ispp_sdev;
19
20 return isp_sdev->out_fmt.width * isp_sdev->out_fmt.height;
21 }
22
23
tnr_config(struct rkispp_params_vdev * params_vdev,struct rkispp_tnr_config * arg)24 static void tnr_config(struct rkispp_params_vdev *params_vdev,
25 struct rkispp_tnr_config *arg)
26 {
27 u32 i, val;
28
29 val = arg->opty_en << 2 | arg->optc_en << 3 |
30 arg->gain_en << 4;
31 rkispp_set_bits(params_vdev->dev, RKISPP_TNR_CORE_CTRL,
32 SW_TNR_OPTY_EN | SW_TNR_OPTC_EN |
33 SW_TNR_GLB_GAIN_EN, val);
34
35 val = ISPP_PACK_4BYTE(arg->pk0_y, arg->pk1_y,
36 arg->pk0_c, arg->pk1_c);
37 rkispp_write(params_vdev->dev, RKISPP_TNR_CORE_PK0, val);
38
39 val = ISPP_PACK_2SHORT(arg->glb_gain_cur, arg->glb_gain_nxt);
40 rkispp_write(params_vdev->dev, RKISPP_TNR_CORE_GLB_GAIN, val);
41 val = ISPP_PACK_2SHORT(arg->glb_gain_cur_div, arg->glb_gain_cur_sqrt);
42 rkispp_write(params_vdev->dev, RKISPP_TNR_CORE_GLB_GAIN_DIV, val);
43
44 for (i = 0; i < TNR_SIGMA_CURVE_SIZE - 1; i += 2)
45 rkispp_write(params_vdev->dev, RKISPP_TNR_CORE_SIG_Y01 + i * 2,
46 ISPP_PACK_2SHORT(arg->sigma_y[i], arg->sigma_y[i + 1]));
47 rkispp_write(params_vdev->dev, RKISPP_TNR_CORE_SIG_Y10, arg->sigma_y[16]);
48 rkispp_write(params_vdev->dev, RKISPP_TNR_CORE_SIG_X18,
49 ISPP_PACK_4BIT(arg->sigma_x[0], arg->sigma_x[1],
50 arg->sigma_x[2], arg->sigma_x[3],
51 arg->sigma_x[4], arg->sigma_x[5],
52 arg->sigma_x[6], arg->sigma_x[7]));
53 rkispp_write(params_vdev->dev, RKISPP_TNR_CORE_SIG_X910,
54 ISPP_PACK_4BIT(arg->sigma_x[8], arg->sigma_x[9],
55 arg->sigma_x[10], arg->sigma_x[11],
56 arg->sigma_x[12], arg->sigma_x[13],
57 arg->sigma_x[14], arg->sigma_x[15]));
58
59 for (i = 0; i < TNR_LUMA_CURVE_SIZE; i += 2) {
60 val = ISPP_PACK_2SHORT(arg->luma_curve[i], arg->luma_curve[i + 1]);
61 rkispp_write(params_vdev->dev, RKISPP_TNR_CORE_LUMACURVE_Y01 + i * 2, val);
62 }
63
64 val = ISPP_PACK_2SHORT(arg->txt_th0_y, arg->txt_th1_y);
65 rkispp_write(params_vdev->dev, RKISPP_TNR_CORE_TH_Y, val);
66 val = ISPP_PACK_2SHORT(arg->txt_th0_c, arg->txt_th1_c);
67 rkispp_write(params_vdev->dev, RKISPP_TNR_CORE_TH_C, val);
68 val = ISPP_PACK_2SHORT(arg->txt_thy_dlt, arg->txt_thc_dlt);
69 rkispp_write(params_vdev->dev, RKISPP_TNR_CORE_TH_DLT, val);
70
71 val = ISPP_PACK_4BYTE(arg->gfcoef_y0[0], arg->gfcoef_y0[1],
72 arg->gfcoef_y0[2], arg->gfcoef_y0[3]);
73 rkispp_write(params_vdev->dev, RKISPP_TNR_CORE_GFCOEF_Y0_0, val);
74 val = ISPP_PACK_4BYTE(arg->gfcoef_y0[4], arg->gfcoef_y0[5], 0, 0);
75 rkispp_write(params_vdev->dev, RKISPP_TNR_CORE_GFCOEF_Y0_1, val);
76 val = ISPP_PACK_4BYTE(arg->gfcoef_y1[0], arg->gfcoef_y1[1],
77 arg->gfcoef_y1[2], 0);
78 rkispp_write(params_vdev->dev, RKISPP_TNR_CORE_GFCOEF_Y1, val);
79 val = ISPP_PACK_4BYTE(arg->gfcoef_y2[0], arg->gfcoef_y2[1],
80 arg->gfcoef_y2[2], 0);
81 rkispp_write(params_vdev->dev, RKISPP_TNR_CORE_GFCOEF_Y2, val);
82 val = ISPP_PACK_4BYTE(arg->gfcoef_y3[0], arg->gfcoef_y3[1],
83 arg->gfcoef_y3[2], 0);
84 rkispp_write(params_vdev->dev, RKISPP_TNR_CORE_GFCOEF_Y3, val);
85
86 val = ISPP_PACK_4BYTE(arg->gfcoef_yg0[0], arg->gfcoef_yg0[1],
87 arg->gfcoef_yg0[2], arg->gfcoef_yg0[3]);
88 rkispp_write(params_vdev->dev, RKISPP_TNR_CORE_GFCOEF_YG0_0, val);
89 val = ISPP_PACK_4BYTE(arg->gfcoef_yg0[4], arg->gfcoef_yg0[5], 0, 0);
90 rkispp_write(params_vdev->dev, RKISPP_TNR_CORE_GFCOEF_YG0_1, val);
91 val = ISPP_PACK_4BYTE(arg->gfcoef_yg1[0], arg->gfcoef_yg1[1],
92 arg->gfcoef_yg1[2], 0);
93 rkispp_write(params_vdev->dev, RKISPP_TNR_CORE_GFCOEF_YG1, val);
94 val = ISPP_PACK_4BYTE(arg->gfcoef_yg2[0], arg->gfcoef_yg2[1],
95 arg->gfcoef_yg2[2], 0);
96 rkispp_write(params_vdev->dev, RKISPP_TNR_CORE_GFCOEF_YG2, val);
97 val = ISPP_PACK_4BYTE(arg->gfcoef_yg3[0], arg->gfcoef_yg3[1],
98 arg->gfcoef_yg3[2], 0);
99 rkispp_write(params_vdev->dev, RKISPP_TNR_CORE_GFCOEF_YG3, val);
100
101 val = ISPP_PACK_4BYTE(arg->gfcoef_yl0[0], arg->gfcoef_yl0[1],
102 arg->gfcoef_yl0[2], arg->gfcoef_yl0[3]);
103 rkispp_write(params_vdev->dev, RKISPP_TNR_CORE_GFCOEF_YL0_0, val);
104 val = ISPP_PACK_4BYTE(arg->gfcoef_yl0[4], arg->gfcoef_yl0[5], 0, 0);
105 rkispp_write(params_vdev->dev, RKISPP_TNR_CORE_GFCOEF_YL0_1, val);
106 val = ISPP_PACK_4BYTE(arg->gfcoef_yl1[0], arg->gfcoef_yl1[1],
107 arg->gfcoef_yl1[2], 0);
108 rkispp_write(params_vdev->dev, RKISPP_TNR_CORE_GFCOEF_YL1, val);
109 val = ISPP_PACK_4BYTE(arg->gfcoef_yl2[0], arg->gfcoef_yl2[1],
110 arg->gfcoef_yl2[2], 0);
111 rkispp_write(params_vdev->dev, RKISPP_TNR_CORE_GFCOEF_YL2, val);
112
113 val = ISPP_PACK_4BYTE(arg->gfcoef_cg0[0], arg->gfcoef_cg0[1],
114 arg->gfcoef_cg0[2], arg->gfcoef_cg0[3]);
115 rkispp_write(params_vdev->dev, RKISPP_TNR_CORE_GFCOEF_CG0_0, val);
116 val = ISPP_PACK_4BYTE(arg->gfcoef_cg0[4], arg->gfcoef_cg0[5], 0, 0);
117 rkispp_write(params_vdev->dev, RKISPP_TNR_CORE_GFCOEF_CG0_1, val);
118 val = ISPP_PACK_4BYTE(arg->gfcoef_cg1[0], arg->gfcoef_cg1[1],
119 arg->gfcoef_cg1[2], 0);
120 rkispp_write(params_vdev->dev, RKISPP_TNR_CORE_GFCOEF_CG1, val);
121 val = ISPP_PACK_4BYTE(arg->gfcoef_cg2[0], arg->gfcoef_cg2[1],
122 arg->gfcoef_cg2[2], 0);
123 rkispp_write(params_vdev->dev, RKISPP_TNR_CORE_GFCOEF_CG2, val);
124
125 val = ISPP_PACK_4BYTE(arg->gfcoef_cl0[0], arg->gfcoef_cl0[1],
126 arg->gfcoef_cl0[2], arg->gfcoef_cl0[3]);
127 rkispp_write(params_vdev->dev, RKISPP_TNR_CORE_GFCOEF_CL0_0, val);
128 val = ISPP_PACK_4BYTE(arg->gfcoef_cl0[4], arg->gfcoef_cl0[5], 0, 0);
129 rkispp_write(params_vdev->dev, RKISPP_TNR_CORE_GFCOEF_CL0_1, val);
130 val = ISPP_PACK_4BYTE(arg->gfcoef_cl1[0], arg->gfcoef_cl1[1],
131 arg->gfcoef_cl1[2], 0);
132 rkispp_write(params_vdev->dev, RKISPP_TNR_CORE_GFCOEF_CL1, val);
133
134 val = ISPP_PACK_2SHORT(arg->scale_yg[0], arg->scale_yg[1]);
135 rkispp_write(params_vdev->dev, RKISPP_TNR_CORE_SCALE_YG01, val);
136 val = ISPP_PACK_2SHORT(arg->scale_yg[2], arg->scale_yg[3]);
137 rkispp_write(params_vdev->dev, RKISPP_TNR_CORE_SCALE_YG23, val);
138 val = ISPP_PACK_2SHORT(arg->scale_yl[0], arg->scale_yl[1]);
139 rkispp_write(params_vdev->dev, RKISPP_TNR_CORE_SCALE_YL01, val);
140 rkispp_write(params_vdev->dev, RKISPP_TNR_CORE_SCALE_YL2, arg->scale_yl[2]);
141 val = ISPP_PACK_2SHORT(arg->scale_cg[0], arg->scale_y2cg[0]);
142 rkispp_write(params_vdev->dev, RKISPP_TNR_CORE_SCALE_CG0, val);
143 val = ISPP_PACK_2SHORT(arg->scale_cg[1], arg->scale_y2cg[1]);
144 rkispp_write(params_vdev->dev, RKISPP_TNR_CORE_SCALE_CG1, val);
145 val = ISPP_PACK_2SHORT(arg->scale_cg[2], arg->scale_y2cg[2]);
146 rkispp_write(params_vdev->dev, RKISPP_TNR_CORE_SCALE_CG2, val);
147 val = ISPP_PACK_2SHORT(arg->scale_cl[0], arg->scale_y2cl[0]);
148 rkispp_write(params_vdev->dev, RKISPP_TNR_CORE_SCALE_CL0, val);
149 val = ISPP_PACK_2SHORT(arg->scale_cl[1], arg->scale_y2cl[1]);
150 rkispp_write(params_vdev->dev, RKISPP_TNR_CORE_SCALE_CL1, val);
151 val = arg->scale_y2cl[2] << 16;
152 rkispp_write(params_vdev->dev, RKISPP_TNR_CORE_SCALE_CL2, val);
153 val = ISPP_PACK_4BYTE(arg->weight_y[0], arg->weight_y[1],
154 arg->weight_y[2], 0);
155 rkispp_write(params_vdev->dev, RKISPP_TNR_CORE_WEIGHT, val);
156 }
157
is_tnr_enable(struct rkispp_params_vdev * params_vdev)158 static bool is_tnr_enable(struct rkispp_params_vdev *params_vdev)
159 {
160 u32 cur_en;
161
162 cur_en = rkispp_read(params_vdev->dev, RKISPP_TNR_CORE_CTRL);
163 cur_en &= SW_TNR_EN;
164
165 return (!!cur_en);
166 }
167
tnr_enable(struct rkispp_params_vdev * params_vdev,bool en)168 static void tnr_enable(struct rkispp_params_vdev *params_vdev, bool en)
169 {
170 if (en && !is_tnr_enable(params_vdev))
171 rkispp_set_bits(params_vdev->dev, RKISPP_TNR_CTRL, 0, SW_TNR_1ST_FRM);
172 rkispp_set_bits(params_vdev->dev, RKISPP_TNR_CORE_CTRL, SW_TNR_EN, en);
173 }
174
nr_config(struct rkispp_params_vdev * params_vdev,struct rkispp_nr_config * arg)175 static void nr_config(struct rkispp_params_vdev *params_vdev,
176 struct rkispp_nr_config *arg)
177 {
178 u32 i, val;
179 u8 big_en, nobig_en, sd32_self_en = 0;
180
181 rkispp_write(params_vdev->dev, RKISPP_NR_UVNR_GAIN_1SIGMA,
182 arg->uvnr_gain_1sigma);
183 rkispp_write(params_vdev->dev, RKISPP_NR_UVNR_GAIN_OFFSET,
184 arg->uvnr_gain_offset);
185 val = ISPP_PACK_4BYTE(arg->uvnr_gain_uvgain[0],
186 arg->uvnr_gain_uvgain[1], arg->uvnr_gain_t2gen,
187 arg->uvnr_gain_iso);
188 rkispp_write(params_vdev->dev, RKISPP_NR_UVNR_GAIN_GBLGAIN, val);
189 rkispp_write(params_vdev->dev, RKISPP_NR_UVNR_T1GEN_M3ALPHA,
190 arg->uvnr_t1gen_m3alpha);
191 rkispp_write(params_vdev->dev, RKISPP_NR_UVNR_T1FLT_MODE,
192 arg->uvnr_t1flt_mode);
193 rkispp_write(params_vdev->dev, RKISPP_NR_UVNR_T1FLT_MSIGMA,
194 arg->uvnr_t1flt_msigma);
195 rkispp_write(params_vdev->dev, RKISPP_NR_UVNR_T1FLT_WTP,
196 arg->uvnr_t1flt_wtp);
197 for (i = 0; i < NR_UVNR_T1FLT_WTQ_SIZE; i += 4) {
198 val = ISPP_PACK_4BYTE(arg->uvnr_t1flt_wtq[i],
199 arg->uvnr_t1flt_wtq[i + 1], arg->uvnr_t1flt_wtq[i + 2],
200 arg->uvnr_t1flt_wtq[i + 3]);
201 rkispp_write(params_vdev->dev, RKISPP_NR_UVNR_T1FLT_WTQ0 + i, val);
202 }
203 rkispp_write(params_vdev->dev, RKISPP_NR_UVNR_T2GEN_M3ALPHA,
204 arg->uvnr_t2gen_m3alpha);
205 rkispp_write(params_vdev->dev, RKISPP_NR_UVNR_T2GEN_MSIGMA,
206 arg->uvnr_t2gen_msigma);
207 rkispp_write(params_vdev->dev, RKISPP_NR_UVNR_T2GEN_WTP,
208 arg->uvnr_t2gen_wtp);
209 val = ISPP_PACK_4BYTE(arg->uvnr_t2gen_wtq[0],
210 arg->uvnr_t2gen_wtq[1], arg->uvnr_t2gen_wtq[2],
211 arg->uvnr_t2gen_wtq[3]);
212 rkispp_write(params_vdev->dev, RKISPP_NR_UVNR_T2GEN_WTQ, val);
213 rkispp_write(params_vdev->dev, RKISPP_NR_UVNR_T2FLT_MSIGMA,
214 arg->uvnr_t2flt_msigma);
215 val = ISPP_PACK_4BYTE(arg->uvnr_t2flt_wtp,
216 arg->uvnr_t2flt_wt[0], arg->uvnr_t2flt_wt[1],
217 arg->uvnr_t2flt_wt[2]);
218 rkispp_write(params_vdev->dev, RKISPP_NR_UVNR_T2FLT_WT, val);
219
220 val = ISPP_PACK_4BIT(arg->ynr_sgm_dx[0], arg->ynr_sgm_dx[1],
221 arg->ynr_sgm_dx[2], arg->ynr_sgm_dx[3],
222 arg->ynr_sgm_dx[4], arg->ynr_sgm_dx[5],
223 arg->ynr_sgm_dx[6], arg->ynr_sgm_dx[7]);
224 rkispp_write(params_vdev->dev, RKISPP_NR_YNR_SGM_DX_1_8, val);
225 val = ISPP_PACK_4BIT(arg->ynr_sgm_dx[8], arg->ynr_sgm_dx[9],
226 arg->ynr_sgm_dx[10], arg->ynr_sgm_dx[11],
227 arg->ynr_sgm_dx[12], arg->ynr_sgm_dx[13],
228 arg->ynr_sgm_dx[14], arg->ynr_sgm_dx[15]);
229 rkispp_write(params_vdev->dev, RKISPP_NR_YNR_SGM_DX_9_16, val);
230
231 for (i = 0; i < NR_YNR_SGM_Y_SIZE - 1; i += 2) {
232 rkispp_write(params_vdev->dev, RKISPP_NR_YNR_LSGM_Y_0_1 + i * 2,
233 ISPP_PACK_2SHORT(arg->ynr_lsgm_y[i], arg->ynr_lsgm_y[i + 1]));
234
235 rkispp_write(params_vdev->dev, RKISPP_NR_YNR_HSGM_Y_0_1 + i * 2,
236 ISPP_PACK_2SHORT(arg->ynr_hsgm_y[i], arg->ynr_hsgm_y[i + 1]));
237 }
238 rkispp_write(params_vdev->dev, RKISPP_NR_YNR_LSGM_Y_16, arg->ynr_lsgm_y[16]);
239 rkispp_write(params_vdev->dev, RKISPP_NR_YNR_HSGM_Y_16, arg->ynr_hsgm_y[16]);
240
241 val = ISPP_PACK_4BYTE(arg->ynr_lci[0], arg->ynr_lci[1],
242 arg->ynr_lci[2], arg->ynr_lci[3]);
243 rkispp_write(params_vdev->dev, RKISPP_NR_YNR_LCI, val);
244 val = ISPP_PACK_4BYTE(arg->ynr_lgain_min[0], arg->ynr_lgain_min[1],
245 arg->ynr_lgain_min[2], arg->ynr_lgain_min[3]);
246 rkispp_write(params_vdev->dev, RKISPP_NR_YNR_LGAIN_DIRE_MIN, val);
247 rkispp_write(params_vdev->dev, RKISPP_NR_YNR_IGAIN_DIRE_MAX, arg->ynr_lgain_max);
248 val = ISPP_PACK_4BYTE(arg->ynr_lmerge_bound, arg->ynr_lmerge_ratio, 0, 0);
249 rkispp_write(params_vdev->dev, RKISPP_NR_YNR_LMERGE, val);
250 val = ISPP_PACK_4BYTE(arg->ynr_lweit_flt[0], arg->ynr_lweit_flt[1],
251 arg->ynr_lweit_flt[2], arg->ynr_lweit_flt[3]);
252 rkispp_write(params_vdev->dev, RKISPP_NR_YNR_LWEIT_FLT, val);
253 val = ISPP_PACK_4BYTE(arg->ynr_hlci[0], arg->ynr_hlci[1],
254 arg->ynr_hlci[2], arg->ynr_hlci[3]);
255 rkispp_write(params_vdev->dev, RKISPP_NR_YNR_HLCI, val);
256 val = ISPP_PACK_4BYTE(arg->ynr_lhci[0], arg->ynr_lhci[1],
257 arg->ynr_lhci[2], arg->ynr_lhci[3]);
258 rkispp_write(params_vdev->dev, RKISPP_NR_YNR_LHCI, val);
259 val = ISPP_PACK_4BYTE(arg->ynr_hhci[0], arg->ynr_hhci[1],
260 arg->ynr_hhci[2], arg->ynr_hhci[3]);
261 rkispp_write(params_vdev->dev, RKISPP_NR_YNR_HHCI, val);
262 val = ISPP_PACK_4BYTE(arg->ynr_hgain_sgm[0], arg->ynr_hgain_sgm[1],
263 arg->ynr_hgain_sgm[2], arg->ynr_hgain_sgm[3]);
264 rkispp_write(params_vdev->dev, RKISPP_NR_YNR_HGAIN_SGM, val);
265
266 for (i = 0; i < NR_YNR_HWEIT_D_SIZE; i += 4) {
267 val = ISPP_PACK_4BYTE(arg->ynr_hweit_d[i], arg->ynr_hweit_d[i + 1],
268 arg->ynr_hweit_d[i + 2], arg->ynr_hweit_d[i + 3]);
269 rkispp_write(params_vdev->dev, RKISPP_NR_YNR_HWEIT_D0 + i, val);
270 }
271
272 for (i = 0; i < NR_YNR_HGRAD_Y_SIZE; i += 4) {
273 val = ISPP_PACK_4BYTE(arg->ynr_hgrad_y[i], arg->ynr_hgrad_y[i + 1],
274 arg->ynr_hgrad_y[i + 2], arg->ynr_hgrad_y[i + 3]);
275 rkispp_write(params_vdev->dev, RKISPP_NR_YNR_HGRAD_Y0 + i, val);
276 }
277
278 val = ISPP_PACK_2SHORT(arg->ynr_hweit[0], arg->ynr_hweit[1]);
279 rkispp_write(params_vdev->dev, RKISPP_NR_YNR_HWEIT_1_2, val);
280 val = ISPP_PACK_2SHORT(arg->ynr_hweit[2], arg->ynr_hweit[3]);
281 rkispp_write(params_vdev->dev, RKISPP_NR_YNR_HWEIT_3_4, val);
282
283 rkispp_write(params_vdev->dev, RKISPP_NR_YNR_HMAX_ADJUST, arg->ynr_hmax_adjust);
284 rkispp_write(params_vdev->dev, RKISPP_NR_YNR_HSTRENGTH, arg->ynr_hstrength);
285
286 val = ISPP_PACK_4BYTE(arg->ynr_lweit_cmp[0], arg->ynr_lweit_cmp[1], 0, 0);
287 rkispp_write(params_vdev->dev, RKISPP_NR_YNR_LWEIT_CMP, val);
288 rkispp_write(params_vdev->dev, RKISPP_NR_YNR_LMAXGAIN_LV4, arg->ynr_lmaxgain_lv4);
289
290 for (i = 0; i < NR_YNR_HSTV_Y_SIZE - 1; i += 2) {
291 val = ISPP_PACK_2SHORT(arg->ynr_hstv_y[i], arg->ynr_hstv_y[i + 1]);
292 rkispp_write(params_vdev->dev, RKISPP_NR_YNR_HSTV_Y_0_1 + i * 2, val);
293 }
294 rkispp_write(params_vdev->dev, RKISPP_NR_YNR_HSTV_Y_16, arg->ynr_hstv_y[16]);
295
296 val = ISPP_PACK_2SHORT(arg->ynr_st_scale[0], arg->ynr_st_scale[1]);
297 rkispp_write(params_vdev->dev, RKISPP_NR_YNR_ST_SCALE_LV1_LV2, val);
298 rkispp_write(params_vdev->dev, RKISPP_NR_YNR_ST_SCALE_LV3, arg->ynr_st_scale[2]);
299
300 big_en = arg->uvnr_big_en & 0x01;
301 nobig_en = arg->uvnr_nobig_en & 0x01;
302 if (get_input_size(params_vdev) > ISPP_NOBIG_OVERFLOW_SIZE) {
303 big_en = 1;
304 nobig_en = 0;
305 }
306
307 if (params_vdev->dev->hw_dev->dev_num == 1)
308 sd32_self_en = arg->uvnr_sd32_self_en;
309 val = arg->uvnr_step1_en << 1 | arg->uvnr_step2_en << 2 |
310 arg->nr_gain_en << 3 | sd32_self_en << 4 |
311 nobig_en << 5 | big_en << 6;
312 rkispp_set_bits(params_vdev->dev, RKISPP_NR_UVNR_CTRL_PARA,
313 SW_UVNR_STEP1_ON | SW_UVNR_STEP2_ON |
314 SW_NR_GAIN_BYPASS | SW_UVNR_NOBIG_EN |
315 SW_UVNR_BIG_EN, val);
316 }
317
nr_enable(struct rkispp_params_vdev * params_vdev,bool en,struct rkispp_nr_config * arg)318 static void nr_enable(struct rkispp_params_vdev *params_vdev, bool en,
319 struct rkispp_nr_config *arg)
320 {
321 u8 big_en, nobig_en;
322 u32 val;
323
324 big_en = arg->uvnr_big_en & 0x01;
325 nobig_en = arg->uvnr_nobig_en & 0x01;
326 if (get_input_size(params_vdev) > ISPP_NOBIG_OVERFLOW_SIZE) {
327 big_en = 1;
328 nobig_en = 0;
329 }
330
331 val = arg->uvnr_step1_en << 1 | arg->uvnr_step2_en << 2 |
332 arg->nr_gain_en << 3 | nobig_en << 5 | big_en << 6;
333
334 if (en)
335 val |= SW_NR_EN;
336
337 rkispp_set_bits(params_vdev->dev, RKISPP_NR_UVNR_CTRL_PARA,
338 SW_UVNR_STEP1_ON | SW_UVNR_STEP2_ON |
339 SW_NR_GAIN_BYPASS | SW_UVNR_NOBIG_EN |
340 SW_UVNR_BIG_EN | SW_NR_EN, val);
341 }
342
shp_config(struct rkispp_params_vdev * params_vdev,struct rkispp_sharp_config * arg)343 static void shp_config(struct rkispp_params_vdev *params_vdev,
344 struct rkispp_sharp_config *arg)
345 {
346 u32 i, val;
347
348 rkispp_set_bits(params_vdev->dev, RKISPP_SHARP_CTRL,
349 SW_SHP_WR_ROT_MODE(3),
350 SW_SHP_WR_ROT_MODE(arg->rotation));
351
352 rkispp_write(params_vdev->dev, RKISPP_SHARP_SC_DOWN,
353 (arg->scl_down_v & 0x1) << 1 | (arg->scl_down_h & 0x1));
354
355 rkispp_write(params_vdev->dev, RKISPP_SHARP_TILE_IDX,
356 (arg->tile_ycnt & 0x1F) << 8 | (arg->tile_xcnt & 0xFF));
357
358 rkispp_write(params_vdev->dev, RKISPP_SHARP_HBF_FACTOR, arg->hbf_ratio |
359 arg->ehf_th << 16 | arg->pbf_ratio << 24);
360 rkispp_write(params_vdev->dev, RKISPP_SHARP_EDGE_TH, arg->edge_thed |
361 arg->dir_min << 8 | arg->smoth_th4 << 16);
362 val = ISPP_PACK_2SHORT(arg->l_alpha, arg->g_alpha);
363 rkispp_write(params_vdev->dev, RKISPP_SHARP_EDGE_ALPHA, val);
364 val = ISPP_PACK_4BYTE(arg->pbf_k[0], arg->pbf_k[1], arg->pbf_k[2], 0);
365 rkispp_write(params_vdev->dev, RKISPP_SHARP_PBF_KERNEL, val);
366 val = ISPP_PACK_4BYTE(arg->mrf_k[0], arg->mrf_k[1], arg->mrf_k[2], arg->mrf_k[3]);
367 rkispp_write(params_vdev->dev, RKISPP_SHARP_MRF_KERNEL0, val);
368 val = ISPP_PACK_4BYTE(arg->mrf_k[4], arg->mrf_k[5], 0, 0);
369 rkispp_write(params_vdev->dev, RKISPP_SHARP_MRF_KERNEL1, val);
370
371 for (i = 0; i < SHP_MBF_KERNEL_SIZE; i += 4) {
372 val = ISPP_PACK_4BYTE(arg->mbf_k[i], arg->mbf_k[i + 1],
373 arg->mbf_k[i + 2], arg->mbf_k[i + 3]);
374 rkispp_write(params_vdev->dev, RKISPP_SHARP_MBF_KERNEL0 + i, val);
375 }
376
377 val = ISPP_PACK_4BYTE(arg->hrf_k[0], arg->hrf_k[1], arg->hrf_k[2], arg->hrf_k[3]);
378 rkispp_write(params_vdev->dev, RKISPP_SHARP_HRF_KERNEL0, val);
379 val = ISPP_PACK_4BYTE(arg->hrf_k[4], arg->hrf_k[5], 0, 0);
380 rkispp_write(params_vdev->dev, RKISPP_SHARP_HRF_KERNEL1, val);
381 val = ISPP_PACK_4BYTE(arg->hbf_k[0], arg->hbf_k[1], arg->hbf_k[2], 0);
382 rkispp_write(params_vdev->dev, RKISPP_SHARP_HBF_KERNEL, val);
383
384 val = ISPP_PACK_4BYTE(arg->eg_coef[0], arg->eg_coef[1], arg->eg_coef[2], 0);
385 rkispp_write(params_vdev->dev, RKISPP_SHARP_EDGE_COEF, val);
386 val = ISPP_PACK_4BYTE(arg->eg_smoth[0], arg->eg_smoth[1], arg->eg_smoth[2], 0);
387 rkispp_write(params_vdev->dev, RKISPP_SHARP_EDGE_SMOTH, val);
388 val = ISPP_PACK_4BYTE(arg->eg_gaus[0], arg->eg_gaus[1], arg->eg_gaus[2], arg->eg_gaus[3]);
389 rkispp_write(params_vdev->dev, RKISPP_SHARP_EDGE_GAUS0, val);
390 val = ISPP_PACK_4BYTE(arg->eg_gaus[4], arg->eg_gaus[5], 0, 0);
391 rkispp_write(params_vdev->dev, RKISPP_SHARP_EDGE_GAUS1, val);
392
393 val = ISPP_PACK_4BYTE(arg->dog_k[0], arg->dog_k[1], arg->dog_k[2], arg->dog_k[3]);
394 rkispp_write(params_vdev->dev, RKISPP_SHARP_DOG_KERNEL0, val);
395 val = ISPP_PACK_4BYTE(arg->dog_k[4], arg->dog_k[5], 0, 0);
396 rkispp_write(params_vdev->dev, RKISPP_SHARP_DOG_KERNEL1, val);
397 val = ISPP_PACK_4BYTE(arg->lum_point[0], arg->lum_point[1],
398 arg->lum_point[2], arg->lum_point[3]);
399 rkispp_write(params_vdev->dev, RKISPP_SHARP_LUM_POINT0, val);
400 val = ISPP_PACK_4BYTE(arg->lum_point[4], arg->lum_point[5], 0, 0);
401 rkispp_write(params_vdev->dev, RKISPP_SHARP_LUM_POINT1, val);
402
403 val = ISPP_PACK_4BYTE(arg->pbf_shf_bits, arg->mbf_shf_bits, arg->hbf_shf_bits, 0);
404 rkispp_write(params_vdev->dev, RKISPP_SHARP_SHF_BITS, val);
405
406 for (i = 0; i < SHP_SIGMA_SIZE; i += 4) {
407 val = ISPP_PACK_4BYTE(arg->pbf_sigma[i], arg->pbf_sigma[i + 1],
408 arg->pbf_sigma[i + 2], arg->pbf_sigma[i + 3]);
409 rkispp_write(params_vdev->dev, RKISPP_SHARP_PBF_SIGMA_INV0 + i, val);
410 val = ISPP_PACK_4BYTE(arg->mbf_sigma[i], arg->mbf_sigma[i + 1],
411 arg->mbf_sigma[i + 2], arg->mbf_sigma[i + 3]);
412 rkispp_write(params_vdev->dev, RKISPP_SHARP_MBF_SIGMA_INV0 + i, val);
413 val = ISPP_PACK_4BYTE(arg->hbf_sigma[i], arg->hbf_sigma[i + 1],
414 arg->hbf_sigma[i + 2], arg->hbf_sigma[i + 3]);
415 rkispp_write(params_vdev->dev, RKISPP_SHARP_HBF_SIGMA_INV0 + i, val);
416 }
417
418 for (i = 0; i < SHP_LUM_CLP_SIZE; i += 4) {
419 val = ISPP_PACK_4BYTE(arg->lum_clp_m[i], arg->lum_clp_m[i + 1],
420 arg->lum_clp_m[i + 2], arg->lum_clp_m[i + 3]);
421 rkispp_write(params_vdev->dev, RKISPP_SHARP_LUM_CLP_M0 + i, val);
422 val = ISPP_PACK_4BYTE(arg->lum_clp_h[i], arg->lum_clp_h[i + 1],
423 arg->lum_clp_h[i + 2], arg->lum_clp_h[i + 3]);
424 rkispp_write(params_vdev->dev, RKISPP_SHARP_LUM_CLP_H0 + i, val);
425 }
426
427 for (i = 0; i < SHP_LUM_MIN_SIZE; i += 4) {
428 val = ISPP_PACK_4BYTE(arg->lum_min_m[i], arg->lum_min_m[i + 1],
429 arg->lum_min_m[i + 2], arg->lum_min_m[i + 3]);
430 rkispp_write(params_vdev->dev, RKISPP_SHARP_LUM_MIN_M0 + i, val);
431 }
432
433 for (i = 0; i < SHP_EDGE_LUM_THED_SIZE; i += 4) {
434 val = ISPP_PACK_4BYTE(arg->edge_lum_thed[i], arg->edge_lum_thed[i + 1],
435 arg->edge_lum_thed[i + 2], arg->edge_lum_thed[i + 3]);
436 rkispp_write(params_vdev->dev, RKISPP_SHARP_EDGE_LUM_THED0 + i, val);
437 }
438
439 for (i = 0; i < SHP_CLAMP_SIZE; i += 4) {
440 val = ISPP_PACK_4BYTE(arg->clamp_pos[i], arg->clamp_pos[i + 1],
441 arg->clamp_pos[i + 2], arg->clamp_pos[i + 3]);
442 rkispp_write(params_vdev->dev, RKISPP_SHARP_CLAMP_POS_DOG0 + i, val);
443 val = ISPP_PACK_4BYTE(arg->clamp_neg[i], arg->clamp_neg[i + 1],
444 arg->clamp_neg[i + 2], arg->clamp_neg[i + 3]);
445 rkispp_write(params_vdev->dev, RKISPP_SHARP_CLAMP_NEG_DOG0 + i, val);
446 }
447
448 for (i = 0; i < SHP_DETAIL_ALPHA_SIZE; i += 4) {
449 val = ISPP_PACK_4BYTE(arg->detail_alpha[i], arg->detail_alpha[i + 1],
450 arg->detail_alpha[i + 2], arg->detail_alpha[i + 3]);
451 rkispp_write(params_vdev->dev, RKISPP_SHARP_DETAIL_ALPHA_DOG0 + i, val);
452 }
453
454 val = ISPP_PACK_2SHORT(arg->rfl_ratio, arg->rfh_ratio);
455 rkispp_write(params_vdev->dev, RKISPP_SHARP_RF_RATIO, val);
456
457 val = ISPP_PACK_4BYTE(arg->m_ratio, arg->h_ratio, 0, 0);
458 rkispp_write(params_vdev->dev, RKISPP_SHARP_GRAD_RATIO, val);
459
460 val = arg->alpha_adp_en << 1 | arg->yin_flt_en << 3 |
461 arg->edge_avg_en << 4;
462 rkispp_set_bits(params_vdev->dev, RKISPP_SHARP_CORE_CTRL,
463 SW_SHP_ALPHA_ADP_EN | SW_SHP_YIN_FLT_EN |
464 SW_SHP_EDGE_AVG_EN, val);
465 }
466
shp_enable(struct rkispp_params_vdev * params_vdev,bool en,struct rkispp_sharp_config * arg)467 static void shp_enable(struct rkispp_params_vdev *params_vdev, bool en,
468 struct rkispp_sharp_config *arg)
469 {
470 u32 ens = params_vdev->dev->stream_vdev.module_ens;
471 u32 val;
472
473 if (en && !(ens & ISPP_MODULE_FEC)) {
474 rkispp_set_bits(params_vdev->dev, RKISPP_SCL0_CTRL,
475 SW_SCL_FIRST_MODE, SW_SCL_FIRST_MODE);
476 rkispp_set_bits(params_vdev->dev, RKISPP_SCL1_CTRL,
477 SW_SCL_FIRST_MODE, SW_SCL_FIRST_MODE);
478 rkispp_set_bits(params_vdev->dev, RKISPP_SCL2_CTRL,
479 SW_SCL_FIRST_MODE, SW_SCL_FIRST_MODE);
480 } else {
481 rkispp_clear_bits(params_vdev->dev, RKISPP_SCL0_CTRL, SW_SCL_FIRST_MODE);
482 rkispp_clear_bits(params_vdev->dev, RKISPP_SCL1_CTRL, SW_SCL_FIRST_MODE);
483 rkispp_clear_bits(params_vdev->dev, RKISPP_SCL2_CTRL, SW_SCL_FIRST_MODE);
484 }
485
486 val = arg->alpha_adp_en << 1 | arg->yin_flt_en << 3 |
487 arg->edge_avg_en << 4;
488 if (en)
489 val |= SW_SHP_EN;
490 rkispp_set_bits(params_vdev->dev, RKISPP_SHARP_CORE_CTRL,
491 SW_SHP_ALPHA_ADP_EN | SW_SHP_YIN_FLT_EN |
492 SW_SHP_EDGE_AVG_EN | SW_SHP_EN, val);
493 }
494
fec_config(struct rkispp_params_vdev * params_vdev,struct rkispp_fec_config * arg)495 static void fec_config(struct rkispp_params_vdev *params_vdev,
496 struct rkispp_fec_config *arg)
497 {
498 struct rkispp_device *dev = params_vdev->dev;
499 struct rkispp_fec_head *fec_data;
500 u32 width, height, mesh_size;
501 dma_addr_t dma_addr;
502 u32 val, i, buf_idx;
503
504 width = dev->ispp_sdev.out_fmt.width;
505 height = dev->ispp_sdev.out_fmt.height;
506 mesh_size = cal_fec_mesh(width, height, 0);
507 if (arg->mesh_size > mesh_size) {
508 v4l2_err(&dev->v4l2_dev,
509 "Input mesh size too large. mesh size 0x%x, 0x%x\n",
510 arg->mesh_size, mesh_size);
511 return;
512 }
513
514 for (i = 0; i < FEC_MESH_BUF_NUM; i++) {
515 if (arg->buf_fd == params_vdev->buf_fec[i].dma_fd)
516 break;
517 }
518 if (i == FEC_MESH_BUF_NUM) {
519 dev_err(dev->dev, "cannot find fec buf fd(%d)\n", arg->buf_fd);
520 return;
521 }
522
523 if (!params_vdev->buf_fec[i].vaddr) {
524 dev_err(dev->dev, "no fec buffer allocated\n");
525 return;
526 }
527
528 buf_idx = params_vdev->buf_fec_idx;
529 fec_data = (struct rkispp_fec_head *)params_vdev->buf_fec[buf_idx].vaddr;
530 fec_data->stat = FEC_BUF_INIT;
531
532 buf_idx = i;
533 fec_data = (struct rkispp_fec_head *)params_vdev->buf_fec[buf_idx].vaddr;
534 fec_data->stat = FEC_BUF_CHIPINUSE;
535 params_vdev->buf_fec_idx = buf_idx;
536
537 rkispp_prepare_buffer(dev, ¶ms_vdev->buf_fec[buf_idx]);
538
539 dma_addr = params_vdev->buf_fec[buf_idx].dma_addr;
540 val = dma_addr + fec_data->meshxf_oft;
541 rkispp_write(params_vdev->dev, RKISPP_FEC_MESH_XFRA_BASE, val);
542 val = dma_addr + fec_data->meshyf_oft;
543 rkispp_write(params_vdev->dev, RKISPP_FEC_MESH_YFRA_BASE, val);
544 val = dma_addr + fec_data->meshxi_oft;
545 rkispp_write(params_vdev->dev, RKISPP_FEC_MESH_XINT_BASE, val);
546 val = dma_addr + fec_data->meshyi_oft;
547 rkispp_write(params_vdev->dev, RKISPP_FEC_MESH_YINT_BASE, val);
548
549 val = 0;
550 if (arg->mesh_density)
551 val = SW_MESH_DENSITY;
552 rkispp_set_bits(params_vdev->dev, RKISPP_FEC_CORE_CTRL, SW_MESH_DENSITY, val);
553
554 rkispp_write(params_vdev->dev, RKISPP_FEC_MESH_SIZE, arg->mesh_size);
555
556 val = (arg->crop_height & 0x1FFFF) << 14 |
557 (arg->crop_width & 0x1FFFF) << 1 | (arg->crop_en & 0x01);
558 rkispp_write(params_vdev->dev, RKISPP_FEC_CROP, val);
559 }
560
fec_data_abandon(struct rkispp_params_vdev * vdev,struct rkispp_params_cfg * params)561 static void fec_data_abandon(struct rkispp_params_vdev *vdev,
562 struct rkispp_params_cfg *params)
563 {
564 struct rkispp_fec_head *data;
565 int i;
566
567 for (i = 0; i < FEC_MESH_BUF_NUM; i++) {
568 if (params->fec_cfg.buf_fd == vdev->buf_fec[i].dma_fd) {
569 data = (struct rkispp_fec_head *)vdev->buf_fec[i].vaddr;
570 if (data)
571 data->stat = FEC_BUF_INIT;
572 break;
573 }
574 }
575 }
576
fec_enable(struct rkispp_params_vdev * params_vdev,bool en)577 static void fec_enable(struct rkispp_params_vdev *params_vdev, bool en)
578 {
579 struct rkispp_device *dev = params_vdev->dev;
580 u32 buf_idx;
581
582 if (en) {
583 buf_idx = params_vdev->buf_fec_idx;
584 if (!params_vdev->buf_fec[buf_idx].vaddr) {
585 dev_err(dev->dev, "no fec buffer allocated\n");
586 return;
587 }
588 rkispp_clear_bits(params_vdev->dev, RKISPP_SCL0_CTRL, SW_SCL_FIRST_MODE);
589 rkispp_clear_bits(params_vdev->dev, RKISPP_SCL1_CTRL, SW_SCL_FIRST_MODE);
590 rkispp_clear_bits(params_vdev->dev, RKISPP_SCL2_CTRL, SW_SCL_FIRST_MODE);
591 }
592 rkispp_set_bits(params_vdev->dev, RKISPP_FEC_CORE_CTRL, SW_FEC_EN, en);
593 }
594
orb_config(struct rkispp_params_vdev * params_vdev,struct rkispp_orb_config * arg)595 static void orb_config(struct rkispp_params_vdev *params_vdev,
596 struct rkispp_orb_config *arg)
597 {
598 rkispp_write(params_vdev->dev, RKISPP_ORB_LIMIT_VALUE, arg->limit_value & 0xFF);
599 rkispp_write(params_vdev->dev, RKISPP_ORB_MAX_FEATURE, arg->max_feature & 0x1FFFFF);
600 }
601
orb_enable(struct rkispp_params_vdev * params_vdev,bool en)602 static void orb_enable(struct rkispp_params_vdev *params_vdev, bool en)
603 {
604 rkispp_set_bits(params_vdev->dev, RKISPP_ORB_CORE_CTRL, SW_ORB_EN, en);
605 }
606
rkispp_params_cfg(struct rkispp_params_vdev * params_vdev,u32 frame_id)607 static void rkispp_params_cfg(struct rkispp_params_vdev *params_vdev, u32 frame_id)
608 {
609 struct rkispp_params_cfg *new_params = NULL;
610 u32 module_en_update, module_cfg_update, module_ens;
611
612 spin_lock(¶ms_vdev->config_lock);
613 if (!params_vdev->streamon) {
614 spin_unlock(¶ms_vdev->config_lock);
615 return;
616 }
617
618 /* get buffer by frame_id */
619 while (!list_empty(¶ms_vdev->params) && !params_vdev->cur_buf) {
620 params_vdev->cur_buf = list_first_entry(¶ms_vdev->params,
621 struct rkispp_buffer, queue);
622
623 new_params = (struct rkispp_params_cfg *)(params_vdev->cur_buf->vaddr[0]);
624 if (new_params->frame_id < frame_id) {
625 if (new_params->module_cfg_update & ISPP_MODULE_FEC)
626 fec_data_abandon(params_vdev, new_params);
627 list_del(¶ms_vdev->cur_buf->queue);
628 vb2_buffer_done(¶ms_vdev->cur_buf->vb.vb2_buf, VB2_BUF_STATE_DONE);
629 params_vdev->cur_buf = NULL;
630 continue;
631 } else if (new_params->frame_id == frame_id) {
632 list_del(¶ms_vdev->cur_buf->queue);
633 } else {
634 params_vdev->cur_buf = NULL;
635 }
636 break;
637 }
638
639 if (!params_vdev->cur_buf) {
640 spin_unlock(¶ms_vdev->config_lock);
641 return;
642 }
643
644 new_params = (struct rkispp_params_cfg *)(params_vdev->cur_buf->vaddr[0]);
645
646 module_en_update = new_params->module_en_update;
647 module_cfg_update = new_params->module_cfg_update;
648 module_ens = new_params->module_ens;
649 if (params_vdev->dev->hw_dev->is_fec_ext) {
650 module_en_update &= ~ISPP_MODULE_FEC;
651 module_cfg_update &= ~ISPP_MODULE_FEC;
652 module_ens &= ~ISPP_MODULE_FEC;
653 }
654
655 if (module_cfg_update & ISPP_MODULE_TNR)
656 tnr_config(params_vdev,
657 &new_params->tnr_cfg);
658 if (module_en_update & ISPP_MODULE_TNR)
659 tnr_enable(params_vdev,
660 !!(module_ens & ISPP_MODULE_TNR));
661
662 if (module_cfg_update & ISPP_MODULE_NR)
663 nr_config(params_vdev,
664 &new_params->nr_cfg);
665 if (module_en_update & ISPP_MODULE_NR)
666 nr_enable(params_vdev,
667 !!(module_ens & ISPP_MODULE_NR),
668 &new_params->nr_cfg);
669
670 if (module_cfg_update & ISPP_MODULE_SHP)
671 shp_config(params_vdev,
672 &new_params->shp_cfg);
673 if (module_en_update & ISPP_MODULE_SHP)
674 shp_enable(params_vdev,
675 !!(module_ens & ISPP_MODULE_SHP),
676 &new_params->shp_cfg);
677
678 if (module_cfg_update & ISPP_MODULE_FEC)
679 fec_config(params_vdev,
680 &new_params->fec_cfg);
681 if (module_en_update & ISPP_MODULE_FEC)
682 fec_enable(params_vdev,
683 !!(module_ens & ISPP_MODULE_FEC));
684
685 if (module_cfg_update & ISPP_MODULE_ORB)
686 orb_config(params_vdev,
687 &new_params->orb_cfg);
688 if (module_en_update & ISPP_MODULE_ORB)
689 orb_enable(params_vdev,
690 !!(module_ens & ISPP_MODULE_ORB));
691
692 vb2_buffer_done(¶ms_vdev->cur_buf->vb.vb2_buf,
693 VB2_BUF_STATE_DONE);
694 params_vdev->cur_buf = NULL;
695
696 spin_unlock(¶ms_vdev->config_lock);
697 }
698
699
params_vb2_buf_queue(struct vb2_buffer * vb)700 static void params_vb2_buf_queue(struct vb2_buffer *vb)
701 {
702 struct vb2_v4l2_buffer *vbuf = to_vb2_v4l2_buffer(vb);
703 struct rkispp_buffer *params_buf = to_rkispp_buffer(vbuf);
704 struct vb2_queue *vq = vb->vb2_queue;
705 struct rkispp_params_vdev *params_vdev = vq->drv_priv;
706 struct rkispp_stream_vdev *stream_vdev = ¶ms_vdev->dev->stream_vdev;
707 struct rkispp_params_cfg *new_params;
708 unsigned long flags;
709
710 new_params = (struct rkispp_params_cfg *)vb2_plane_vaddr(vb, 0);
711 spin_lock_irqsave(¶ms_vdev->config_lock, flags);
712 if (params_vdev->first_params) {
713 params_vdev->first_params = false;
714 if (new_params->module_init_ens) {
715 if (params_vdev->dev->hw_dev->is_fec_ext)
716 new_params->module_init_ens &= ~ISPP_MODULE_FEC_ST;
717 stream_vdev->module_ens = new_params->module_init_ens;
718
719 }
720 wake_up(¶ms_vdev->dev->sync_onoff);
721 }
722 spin_unlock_irqrestore(¶ms_vdev->config_lock, flags);
723
724 new_params->module_init_ens = stream_vdev->module_ens;
725 params_buf->vaddr[0] = new_params;
726 spin_lock_irqsave(¶ms_vdev->config_lock, flags);
727 list_add_tail(¶ms_buf->queue, ¶ms_vdev->params);
728 spin_unlock_irqrestore(¶ms_vdev->config_lock, flags);
729 }
730
731 static struct rkispp_params_ops rkispp_params_ops = {
732 .rkispp_params_cfg = rkispp_params_cfg,
733 .rkispp_params_vb2_buf_queue = params_vb2_buf_queue,
734 };
735
rkispp_params_init_ops_v10(struct rkispp_params_vdev * params_vdev)736 void rkispp_params_init_ops_v10(struct rkispp_params_vdev *params_vdev)
737 {
738 params_vdev->params_ops = &rkispp_params_ops;
739 }
740