1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2 /*
3 * Copyright (c) 2019 Fuzhou Rockchip Electronics Co., Ltd
4 *
5 * author:
6 * Alpha Lin, alpha.lin@rock-chips.com
7 * Randy Li, randy.li@rock-chips.com
8 * Ding Wei, leo.ding@rock-chips.com
9 *
10 */
11 #include <asm/cacheflush.h>
12 #include <linux/delay.h>
13 #include <linux/iopoll.h>
14 #include <linux/interrupt.h>
15 #include <linux/module.h>
16 #include <linux/types.h>
17 #include <linux/of_platform.h>
18 #include <linux/slab.h>
19 #include <linux/seq_file.h>
20 #include <linux/uaccess.h>
21 #include <linux/regmap.h>
22 #include <linux/proc_fs.h>
23 #include <linux/nospec.h>
24 #include <soc/rockchip/pm_domains.h>
25
26 #include "mpp_debug.h"
27 #include "mpp_common.h"
28 #include "mpp_iommu.h"
29
30 #define VEPU1_DRIVER_NAME "mpp_vepu1"
31
32 #define VEPU1_SESSION_MAX_BUFFERS 20
33 /* The maximum registers number of all the version */
34 #define VEPU1_REG_NUM 164
35 #define VEPU1_REG_HW_ID_INDEX 0
36 #define VEPU1_REG_START_INDEX 0
37 #define VEPU1_REG_END_INDEX 163
38
39 #define VEPU1_REG_INT 0x004
40 #define VEPU1_REG_INT_INDEX (1)
41 #define VEPU1_INT_SLICE BIT(8)
42 #define VEPU1_INT_TIMEOUT BIT(6)
43 #define VEPU1_INT_BUF_FULL BIT(5)
44 #define VEPU1_INT_RESET BIT(4)
45 #define VEPU1_INT_BUS_ERROR BIT(3)
46 #define VEPU1_INT_RDY BIT(2)
47 #define VEPU1_IRQ_DIS BIT(1)
48 #define VEPU1_INT_RAW BIT(0)
49
50 #define VEPU1_REG_ENC_EN 0x038
51 #define VEPU1_REG_ENC_EN_INDEX (14)
52 #define VEPU1_INT_TIMEOUT_EN BIT(31)
53 #define VEPU1_INT_SLICE_EN BIT(28)
54 #define VEPU1_ENC_START BIT(0)
55
56 #define VEPU1_GET_FORMAT(x) (((x) >> 1) & 0x3)
57 #define VEPU1_FORMAT_MASK (0x06)
58
59 #define VEPU1_FMT_RESERVED (0)
60 #define VEPU1_FMT_VP8E (1)
61 #define VEPU1_FMT_JPEGE (2)
62 #define VEPU1_FMT_H264E (3)
63
64 #define VEPU1_REG_CLR_CACHE_BASE 0xc10
65
66 #define to_vepu_task(task) \
67 container_of(task, struct vepu_task, mpp_task)
68 #define to_vepu_dev(dev) \
69 container_of(dev, struct vepu_dev, mpp)
70
71 struct vepu_task {
72 struct mpp_task mpp_task;
73
74 enum MPP_CLOCK_MODE clk_mode;
75 u32 reg[VEPU1_REG_NUM];
76
77 struct reg_offset_info off_inf;
78 u32 irq_status;
79 /* req for current task */
80 u32 w_req_cnt;
81 struct mpp_request w_reqs[MPP_MAX_MSG_NUM];
82 u32 r_req_cnt;
83 struct mpp_request r_reqs[MPP_MAX_MSG_NUM];
84 };
85
86 struct vepu_session_priv {
87 struct rw_semaphore rw_sem;
88 /* codec info from user */
89 struct {
90 /* show mode */
91 u32 flag;
92 /* item data */
93 u64 val;
94 } codec_info[ENC_INFO_BUTT];
95 };
96
97 struct vepu_dev {
98 struct mpp_dev mpp;
99
100 struct mpp_clk_info aclk_info;
101 struct mpp_clk_info hclk_info;
102 #ifdef CONFIG_ROCKCHIP_MPP_PROC_FS
103 struct proc_dir_entry *procfs;
104 #endif
105 struct reset_control *rst_a;
106 struct reset_control *rst_h;
107 };
108
109 static struct mpp_hw_info vepu_v1_hw_info = {
110 .reg_num = VEPU1_REG_NUM,
111 .reg_id = VEPU1_REG_HW_ID_INDEX,
112 .reg_start = VEPU1_REG_START_INDEX,
113 .reg_end = VEPU1_REG_END_INDEX,
114 .reg_en = VEPU1_REG_ENC_EN_INDEX,
115 };
116
117 /*
118 * file handle translate information
119 */
120 static const u16 trans_tbl_default[] = {
121 5, 6, 7, 8, 9, 10, 11, 12, 13, 51
122 };
123
124 static const u16 trans_tbl_vp8e[] = {
125 5, 6, 7, 8, 9, 10, 11, 12, 13, 16, 17, 26, 51, 52, 58, 59, 71
126 };
127
128 static struct mpp_trans_info trans_rk_vepu1[] = {
129 [VEPU1_FMT_RESERVED] = {
130 .count = 0,
131 .table = NULL,
132 },
133 [VEPU1_FMT_VP8E] = {
134 .count = ARRAY_SIZE(trans_tbl_vp8e),
135 .table = trans_tbl_vp8e,
136 },
137 [VEPU1_FMT_JPEGE] = {
138 .count = ARRAY_SIZE(trans_tbl_default),
139 .table = trans_tbl_default,
140 },
141 [VEPU1_FMT_H264E] = {
142 .count = ARRAY_SIZE(trans_tbl_default),
143 .table = trans_tbl_default,
144 },
145 };
146
vepu_process_reg_fd(struct mpp_session * session,struct vepu_task * task,struct mpp_task_msgs * msgs)147 static int vepu_process_reg_fd(struct mpp_session *session,
148 struct vepu_task *task,
149 struct mpp_task_msgs *msgs)
150 {
151 int ret = 0;
152 int fmt = VEPU1_GET_FORMAT(task->reg[VEPU1_REG_ENC_EN_INDEX]);
153
154 ret = mpp_translate_reg_address(session, &task->mpp_task,
155 fmt, task->reg, &task->off_inf);
156 if (ret)
157 return ret;
158
159 mpp_translate_reg_offset_info(&task->mpp_task,
160 &task->off_inf, task->reg);
161
162 return 0;
163 }
164
vepu_extract_task_msg(struct vepu_task * task,struct mpp_task_msgs * msgs)165 static int vepu_extract_task_msg(struct vepu_task *task,
166 struct mpp_task_msgs *msgs)
167 {
168 u32 i;
169 int ret;
170 struct mpp_request *req;
171 struct mpp_hw_info *hw_info = task->mpp_task.hw_info;
172
173 for (i = 0; i < msgs->req_cnt; i++) {
174 u32 off_s, off_e;
175
176 req = &msgs->reqs[i];
177 if (!req->size)
178 continue;
179
180 switch (req->cmd) {
181 case MPP_CMD_SET_REG_WRITE: {
182 off_s = hw_info->reg_start * sizeof(u32);
183 off_e = hw_info->reg_end * sizeof(u32);
184 ret = mpp_check_req(req, 0, sizeof(task->reg),
185 off_s, off_e);
186 if (ret)
187 continue;
188 if (copy_from_user((u8 *)task->reg + req->offset,
189 req->data, req->size)) {
190 mpp_err("copy_from_user reg failed\n");
191 return -EIO;
192 }
193 memcpy(&task->w_reqs[task->w_req_cnt++],
194 req, sizeof(*req));
195 } break;
196 case MPP_CMD_SET_REG_READ: {
197 off_s = hw_info->reg_start * sizeof(u32);
198 off_e = hw_info->reg_end * sizeof(u32);
199 ret = mpp_check_req(req, 0, sizeof(task->reg),
200 off_s, off_e);
201 if (ret)
202 continue;
203 memcpy(&task->r_reqs[task->r_req_cnt++],
204 req, sizeof(*req));
205 } break;
206 case MPP_CMD_SET_REG_ADDR_OFFSET: {
207 mpp_extract_reg_offset_info(&task->off_inf, req);
208 } break;
209 default:
210 break;
211 }
212 }
213 mpp_debug(DEBUG_TASK_INFO, "w_req_cnt %d, r_req_cnt %d\n",
214 task->w_req_cnt, task->r_req_cnt);
215
216 return 0;
217 }
218
vepu_alloc_task(struct mpp_session * session,struct mpp_task_msgs * msgs)219 static void *vepu_alloc_task(struct mpp_session *session,
220 struct mpp_task_msgs *msgs)
221 {
222 int ret;
223 struct mpp_task *mpp_task = NULL;
224 struct vepu_task *task = NULL;
225 struct mpp_dev *mpp = session->mpp;
226
227 mpp_debug_enter();
228
229 task = kzalloc(sizeof(*task), GFP_KERNEL);
230 if (!task)
231 return NULL;
232
233 mpp_task = &task->mpp_task;
234 mpp_task_init(session, mpp_task);
235 mpp_task->hw_info = mpp->var->hw_info;
236 mpp_task->reg = task->reg;
237 /* extract reqs for current task */
238 ret = vepu_extract_task_msg(task, msgs);
239 if (ret)
240 goto fail;
241 /* process fd in register */
242 if (!(msgs->flags & MPP_FLAGS_REG_FD_NO_TRANS)) {
243 ret = vepu_process_reg_fd(session, task, msgs);
244 if (ret)
245 goto fail;
246 }
247 task->clk_mode = CLK_MODE_NORMAL;
248
249 mpp_debug_leave();
250
251 return mpp_task;
252
253 fail:
254 mpp_task_dump_mem_region(mpp, mpp_task);
255 mpp_task_dump_reg(mpp, mpp_task);
256 mpp_task_finalize(session, mpp_task);
257 kfree(task);
258 return NULL;
259 }
260
vepu_run(struct mpp_dev * mpp,struct mpp_task * mpp_task)261 static int vepu_run(struct mpp_dev *mpp,
262 struct mpp_task *mpp_task)
263 {
264 u32 i;
265 u32 reg_en;
266 struct vepu_task *task = to_vepu_task(mpp_task);
267
268 mpp_debug_enter();
269
270 /* clear cache */
271 mpp_write_relaxed(mpp, VEPU1_REG_CLR_CACHE_BASE, 1);
272 /* set registers for hardware */
273 reg_en = mpp_task->hw_info->reg_en;
274 /* First, flush correct encoder format */
275 mpp_write_relaxed(mpp, VEPU1_REG_ENC_EN,
276 task->reg[reg_en] & VEPU1_FORMAT_MASK);
277 /* Second, flush others register */
278 for (i = 0; i < task->w_req_cnt; i++) {
279 struct mpp_request *req = &task->w_reqs[i];
280 int s = req->offset / sizeof(u32);
281 int e = s + req->size / sizeof(u32);
282
283 mpp_write_req(mpp, task->reg, s, e, reg_en);
284 }
285 /* init current task */
286 mpp->cur_task = mpp_task;
287 /* Last, flush start registers */
288 wmb();
289 mpp_write(mpp, VEPU1_REG_ENC_EN,
290 task->reg[reg_en] | VEPU1_ENC_START);
291
292 mpp_debug_leave();
293
294 return 0;
295 }
296
vepu_irq(struct mpp_dev * mpp)297 static int vepu_irq(struct mpp_dev *mpp)
298 {
299 mpp->irq_status = mpp_read(mpp, VEPU1_REG_INT);
300 if (!(mpp->irq_status & VEPU1_INT_RAW))
301 return IRQ_NONE;
302
303 mpp_write(mpp, VEPU1_REG_INT, 0);
304
305 return IRQ_WAKE_THREAD;
306 }
307
vepu_isr(struct mpp_dev * mpp)308 static int vepu_isr(struct mpp_dev *mpp)
309 {
310 u32 err_mask;
311 struct vepu_task *task = NULL;
312 struct mpp_task *mpp_task = mpp->cur_task;
313
314 /* FIXME use a spin lock here */
315 if (!mpp_task) {
316 dev_err(mpp->dev, "no current task\n");
317 return IRQ_HANDLED;
318 }
319 mpp_time_diff(mpp_task);
320 mpp->cur_task = NULL;
321 task = to_vepu_task(mpp_task);
322 task->irq_status = mpp->irq_status;
323 mpp_debug(DEBUG_IRQ_STATUS, "irq_status: %08x\n",
324 task->irq_status);
325
326 err_mask = VEPU1_INT_TIMEOUT
327 | VEPU1_INT_BUF_FULL
328 | VEPU1_INT_BUS_ERROR;
329
330 if (err_mask & task->irq_status)
331 atomic_inc(&mpp->reset_request);
332
333 mpp_task_finish(mpp_task->session, mpp_task);
334
335 mpp_debug_leave();
336 return IRQ_HANDLED;
337 }
338
vepu_finish(struct mpp_dev * mpp,struct mpp_task * mpp_task)339 static int vepu_finish(struct mpp_dev *mpp,
340 struct mpp_task *mpp_task)
341 {
342 u32 i;
343 u32 s, e;
344 struct mpp_request *req;
345 struct vepu_task *task = to_vepu_task(mpp_task);
346
347 mpp_debug_enter();
348
349 /* read register after running */
350 for (i = 0; i < task->r_req_cnt; i++) {
351 req = &task->r_reqs[i];
352 s = req->offset / sizeof(u32);
353 e = s + req->size / sizeof(u32);
354 mpp_read_req(mpp, task->reg, s, e);
355 }
356 /* revert hack for irq status */
357 task->reg[VEPU1_REG_INT_INDEX] = task->irq_status;
358
359 mpp_debug_leave();
360
361 return 0;
362 }
363
vepu_result(struct mpp_dev * mpp,struct mpp_task * mpp_task,struct mpp_task_msgs * msgs)364 static int vepu_result(struct mpp_dev *mpp,
365 struct mpp_task *mpp_task,
366 struct mpp_task_msgs *msgs)
367 {
368 u32 i;
369 struct mpp_request *req;
370 struct vepu_task *task = to_vepu_task(mpp_task);
371
372 /* FIXME may overflow the kernel */
373 for (i = 0; i < task->r_req_cnt; i++) {
374 req = &task->r_reqs[i];
375
376 if (copy_to_user(req->data,
377 (u8 *)task->reg + req->offset,
378 req->size)) {
379 mpp_err("copy_to_user reg fail\n");
380 return -EIO;
381 }
382 }
383 return 0;
384 }
385
vepu_free_task(struct mpp_session * session,struct mpp_task * mpp_task)386 static int vepu_free_task(struct mpp_session *session,
387 struct mpp_task *mpp_task)
388 {
389 struct vepu_task *task = to_vepu_task(mpp_task);
390
391 mpp_task_finalize(session, mpp_task);
392 kfree(task);
393
394 return 0;
395 }
396
vepu_control(struct mpp_session * session,struct mpp_request * req)397 static int vepu_control(struct mpp_session *session, struct mpp_request *req)
398 {
399 switch (req->cmd) {
400 case MPP_CMD_SEND_CODEC_INFO: {
401 int i;
402 int cnt;
403 struct codec_info_elem elem;
404 struct vepu_session_priv *priv;
405
406 if (!session || !session->priv) {
407 mpp_err("session info null\n");
408 return -EINVAL;
409 }
410 priv = session->priv;
411
412 cnt = req->size / sizeof(elem);
413 cnt = (cnt > ENC_INFO_BUTT) ? ENC_INFO_BUTT : cnt;
414 mpp_debug(DEBUG_IOCTL, "codec info count %d\n", cnt);
415 down_write(&priv->rw_sem);
416 for (i = 0; i < cnt; i++) {
417 if (copy_from_user(&elem, req->data + i * sizeof(elem), sizeof(elem))) {
418 mpp_err("copy_from_user failed\n");
419 continue;
420 }
421 if (elem.type > ENC_INFO_BASE && elem.type < ENC_INFO_BUTT &&
422 elem.flag > CODEC_INFO_FLAG_NULL && elem.flag < CODEC_INFO_FLAG_BUTT) {
423 elem.type = array_index_nospec(elem.type, ENC_INFO_BUTT);
424 priv->codec_info[elem.type].flag = elem.flag;
425 priv->codec_info[elem.type].val = elem.data;
426 } else {
427 mpp_err("codec info invalid, type %d, flag %d\n",
428 elem.type, elem.flag);
429 }
430 }
431 up_write(&priv->rw_sem);
432 } break;
433 default: {
434 mpp_err("unknown mpp ioctl cmd %x\n", req->cmd);
435 } break;
436 }
437
438 return 0;
439 }
440
vepu_free_session(struct mpp_session * session)441 static int vepu_free_session(struct mpp_session *session)
442 {
443 if (session && session->priv) {
444 kfree(session->priv);
445 session->priv = NULL;
446 }
447
448 return 0;
449 }
450
vepu_init_session(struct mpp_session * session)451 static int vepu_init_session(struct mpp_session *session)
452 {
453 struct vepu_session_priv *priv;
454
455 if (!session) {
456 mpp_err("session is null\n");
457 return -EINVAL;
458 }
459
460 priv = kzalloc(sizeof(*priv), GFP_KERNEL);
461 if (!priv)
462 return -ENOMEM;
463
464 init_rwsem(&priv->rw_sem);
465 session->priv = priv;
466
467 return 0;
468 }
469
470 #ifdef CONFIG_ROCKCHIP_MPP_PROC_FS
vepu_procfs_remove(struct mpp_dev * mpp)471 static int vepu_procfs_remove(struct mpp_dev *mpp)
472 {
473 struct vepu_dev *enc = to_vepu_dev(mpp);
474
475 if (enc->procfs) {
476 proc_remove(enc->procfs);
477 enc->procfs = NULL;
478 }
479
480 return 0;
481 }
482
vepu_dump_session(struct mpp_session * session,struct seq_file * seq)483 static int vepu_dump_session(struct mpp_session *session, struct seq_file *seq)
484 {
485 int i;
486 struct vepu_session_priv *priv = session->priv;
487
488 down_read(&priv->rw_sem);
489 /* item name */
490 seq_puts(seq, "------------------------------------------------------");
491 seq_puts(seq, "------------------------------------------------------\n");
492 seq_printf(seq, "|%8s|", (const char *)"session");
493 seq_printf(seq, "%8s|", (const char *)"device");
494 for (i = ENC_INFO_BASE; i < ENC_INFO_BUTT; i++) {
495 bool show = priv->codec_info[i].flag;
496
497 if (show)
498 seq_printf(seq, "%8s|", enc_info_item_name[i]);
499 }
500 seq_puts(seq, "\n");
501 /* item data*/
502 seq_printf(seq, "|%8p|", session);
503 seq_printf(seq, "%8s|", mpp_device_name[session->device_type]);
504 for (i = ENC_INFO_BASE; i < ENC_INFO_BUTT; i++) {
505 u32 flag = priv->codec_info[i].flag;
506
507 if (!flag)
508 continue;
509 if (flag == CODEC_INFO_FLAG_NUMBER) {
510 u32 data = priv->codec_info[i].val;
511
512 seq_printf(seq, "%8d|", data);
513 } else if (flag == CODEC_INFO_FLAG_STRING) {
514 const char *name = (const char *)&priv->codec_info[i].val;
515
516 seq_printf(seq, "%8s|", name);
517 } else {
518 seq_printf(seq, "%8s|", (const char *)"null");
519 }
520 }
521 seq_puts(seq, "\n");
522 up_read(&priv->rw_sem);
523
524 return 0;
525 }
526
vepu_show_session_info(struct seq_file * seq,void * offset)527 static int vepu_show_session_info(struct seq_file *seq, void *offset)
528 {
529 struct mpp_session *session = NULL, *n;
530 struct mpp_dev *mpp = seq->private;
531
532 mutex_lock(&mpp->srv->session_lock);
533 list_for_each_entry_safe(session, n,
534 &mpp->srv->session_list,
535 session_link) {
536 if (session->device_type != MPP_DEVICE_VEPU1)
537 continue;
538 if (!session->priv)
539 continue;
540 if (mpp->dev_ops->dump_session)
541 mpp->dev_ops->dump_session(session, seq);
542 }
543 mutex_unlock(&mpp->srv->session_lock);
544
545 return 0;
546 }
547
vepu_procfs_init(struct mpp_dev * mpp)548 static int vepu_procfs_init(struct mpp_dev *mpp)
549 {
550 struct vepu_dev *enc = to_vepu_dev(mpp);
551
552 enc->procfs = proc_mkdir(mpp->dev->of_node->name, mpp->srv->procfs);
553 if (IS_ERR_OR_NULL(enc->procfs)) {
554 mpp_err("failed on open procfs\n");
555 enc->procfs = NULL;
556 return -EIO;
557 }
558 mpp_procfs_create_u32("aclk", 0644,
559 enc->procfs, &enc->aclk_info.debug_rate_hz);
560 mpp_procfs_create_u32("session_buffers", 0644,
561 enc->procfs, &mpp->session_max_buffers);
562 /* for show session info */
563 proc_create_single_data("sessions-info", 0444,
564 enc->procfs, vepu_show_session_info, mpp);
565
566 return 0;
567 }
568 #else
vepu_procfs_remove(struct mpp_dev * mpp)569 static inline int vepu_procfs_remove(struct mpp_dev *mpp)
570 {
571 return 0;
572 }
573
vepu_procfs_init(struct mpp_dev * mpp)574 static inline int vepu_procfs_init(struct mpp_dev *mpp)
575 {
576 return 0;
577 }
578
vepu_dump_session(struct mpp_session * session,struct seq_file * seq)579 static inline int vepu_dump_session(struct mpp_session *session, struct seq_file *seq)
580 {
581 return 0;
582 }
583 #endif
584
vepu_init(struct mpp_dev * mpp)585 static int vepu_init(struct mpp_dev *mpp)
586 {
587 int ret;
588 struct vepu_dev *enc = to_vepu_dev(mpp);
589
590 mpp->grf_info = &mpp->srv->grf_infos[MPP_DRIVER_VEPU1];
591
592 /* Get clock info from dtsi */
593 ret = mpp_get_clk_info(mpp, &enc->aclk_info, "aclk_vcodec");
594 if (ret)
595 mpp_err("failed on clk_get aclk_vcodec\n");
596 ret = mpp_get_clk_info(mpp, &enc->hclk_info, "hclk_vcodec");
597 if (ret)
598 mpp_err("failed on clk_get hclk_vcodec\n");
599 /* Set default rates */
600 mpp_set_clk_info_rate_hz(&enc->aclk_info, CLK_MODE_DEFAULT, 300 * MHZ);
601
602 /* Get reset control from dtsi */
603 enc->rst_a = mpp_reset_control_get(mpp, RST_TYPE_A, "video_a");
604 if (!enc->rst_a)
605 mpp_err("No aclk reset resource define\n");
606 enc->rst_h = mpp_reset_control_get(mpp, RST_TYPE_H, "video_h");
607 if (!enc->rst_h)
608 mpp_err("No hclk reset resource define\n");
609
610 return 0;
611 }
612
vepu_clk_on(struct mpp_dev * mpp)613 static int vepu_clk_on(struct mpp_dev *mpp)
614 {
615 struct vepu_dev *enc = to_vepu_dev(mpp);
616
617 mpp_clk_safe_enable(enc->aclk_info.clk);
618 mpp_clk_safe_enable(enc->hclk_info.clk);
619
620 return 0;
621 }
622
vepu_clk_off(struct mpp_dev * mpp)623 static int vepu_clk_off(struct mpp_dev *mpp)
624 {
625 struct vepu_dev *enc = to_vepu_dev(mpp);
626
627 mpp_clk_safe_disable(enc->aclk_info.clk);
628 mpp_clk_safe_disable(enc->hclk_info.clk);
629
630 return 0;
631 }
632
vepu_set_freq(struct mpp_dev * mpp,struct mpp_task * mpp_task)633 static int vepu_set_freq(struct mpp_dev *mpp,
634 struct mpp_task *mpp_task)
635 {
636 struct vepu_dev *enc = to_vepu_dev(mpp);
637 struct vepu_task *task = to_vepu_task(mpp_task);
638
639 mpp_clk_set_rate(&enc->aclk_info, task->clk_mode);
640
641 return 0;
642 }
643
vepu_reduce_freq(struct mpp_dev * mpp)644 static int vepu_reduce_freq(struct mpp_dev *mpp)
645 {
646 struct vepu_dev *enc = to_vepu_dev(mpp);
647
648 mpp_clk_set_rate(&enc->aclk_info, CLK_MODE_REDUCE);
649
650 return 0;
651 }
652
vepu_reset(struct mpp_dev * mpp)653 static int vepu_reset(struct mpp_dev *mpp)
654 {
655 struct vepu_dev *enc = to_vepu_dev(mpp);
656
657 if (enc->rst_a && enc->rst_h) {
658 /* Don't skip this or iommu won't work after reset */
659 mpp_pmu_idle_request(mpp, true);
660 mpp_safe_reset(enc->rst_a);
661 mpp_safe_reset(enc->rst_h);
662 udelay(5);
663 mpp_safe_unreset(enc->rst_a);
664 mpp_safe_unreset(enc->rst_h);
665 mpp_pmu_idle_request(mpp, false);
666 }
667 mpp_write(mpp, VEPU1_REG_ENC_EN, 0);
668
669 return 0;
670 }
671
672 static struct mpp_hw_ops vepu_v1_hw_ops = {
673 .init = vepu_init,
674 .clk_on = vepu_clk_on,
675 .clk_off = vepu_clk_off,
676 .set_freq = vepu_set_freq,
677 .reduce_freq = vepu_reduce_freq,
678 .reset = vepu_reset,
679 };
680
681 static struct mpp_dev_ops vepu_v1_dev_ops = {
682 .alloc_task = vepu_alloc_task,
683 .run = vepu_run,
684 .irq = vepu_irq,
685 .isr = vepu_isr,
686 .finish = vepu_finish,
687 .result = vepu_result,
688 .free_task = vepu_free_task,
689 .ioctl = vepu_control,
690 .init_session = vepu_init_session,
691 .free_session = vepu_free_session,
692 .dump_session = vepu_dump_session,
693 };
694
695 static const struct mpp_dev_var vepu_v1_data = {
696 .device_type = MPP_DEVICE_VEPU1,
697 .hw_info = &vepu_v1_hw_info,
698 .trans_info = trans_rk_vepu1,
699 .hw_ops = &vepu_v1_hw_ops,
700 .dev_ops = &vepu_v1_dev_ops,
701 };
702
703 static const struct of_device_id mpp_vepu1_dt_match[] = {
704 {
705 .compatible = "rockchip,vpu-encoder-v1",
706 .data = &vepu_v1_data,
707 },
708 {},
709 };
710
vepu_probe(struct platform_device * pdev)711 static int vepu_probe(struct platform_device *pdev)
712 {
713 int ret = 0;
714 struct device *dev = &pdev->dev;
715 struct vepu_dev *enc = NULL;
716 struct mpp_dev *mpp = NULL;
717 const struct of_device_id *match = NULL;
718
719 dev_info(dev, "probe device\n");
720 enc = devm_kzalloc(dev, sizeof(struct vepu_dev), GFP_KERNEL);
721 if (!enc)
722 return -ENOMEM;
723
724 mpp = &enc->mpp;
725 platform_set_drvdata(pdev, mpp);
726
727 if (pdev->dev.of_node) {
728 match = of_match_node(mpp_vepu1_dt_match, pdev->dev.of_node);
729 if (match)
730 mpp->var = (struct mpp_dev_var *)match->data;
731
732 mpp->core_id = of_alias_get_id(pdev->dev.of_node, "vepu");
733 }
734
735 ret = mpp_dev_probe(mpp, pdev);
736 if (ret) {
737 dev_err(dev, "probe sub driver failed\n");
738 return -EINVAL;
739 }
740
741 ret = devm_request_threaded_irq(dev, mpp->irq,
742 mpp_dev_irq,
743 mpp_dev_isr_sched,
744 IRQF_SHARED,
745 dev_name(dev), mpp);
746 if (ret) {
747 dev_err(dev, "register interrupter runtime failed\n");
748 return -EINVAL;
749 }
750
751 mpp->session_max_buffers = VEPU1_SESSION_MAX_BUFFERS;
752 vepu_procfs_init(mpp);
753 /* register current device to mpp service */
754 mpp_dev_register_srv(mpp, mpp->srv);
755 dev_info(dev, "probing finish\n");
756
757 return 0;
758 }
759
vepu_remove(struct platform_device * pdev)760 static int vepu_remove(struct platform_device *pdev)
761 {
762 struct device *dev = &pdev->dev;
763 struct mpp_dev *mpp = dev_get_drvdata(dev);
764
765 dev_info(dev, "remove device\n");
766 mpp_dev_remove(mpp);
767 vepu_procfs_remove(mpp);
768
769 return 0;
770 }
771
772 struct platform_driver rockchip_vepu1_driver = {
773 .probe = vepu_probe,
774 .remove = vepu_remove,
775 .shutdown = mpp_dev_shutdown,
776 .driver = {
777 .name = VEPU1_DRIVER_NAME,
778 .of_match_table = of_match_ptr(mpp_vepu1_dt_match),
779 },
780 };
781 EXPORT_SYMBOL(rockchip_vepu1_driver);
782