1 /* 2 * g2d_top/g2d_top.c 3 * 4 * Copyright (c) 2007-2019 Allwinnertech Co., Ltd. 5 * Author: zhengxiaobin <zhengxiaobin@allwinnertech.com> 6 * 7 * This software is licensed under the terms of the GNU General Public 8 * License version 2, as published by the Free Software Foundation, and 9 * may be copied, distributed, and modified under those terms. 10 * 11 * This program is distributed in the hope that it will be useful, 12 * but WITHOUT ANY WARRANTY; without even the implied warranty of 13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 14 * GNU General Public License for more details. 15 * 16 */ 17 18 #include "g2d_driver_i.h" 19 #include "g2d_top.h" 20 #include "g2d_top_type.h" 21 22 static volatile struct g2d_top_reg *g2d_top; 23 static volatile struct g2d_mixer_glb_reg *mixer_glb; 24 g2d_top_set_base(unsigned long base)25void g2d_top_set_base(unsigned long base) 26 { 27 g2d_top = (struct g2d_top_reg *)(base); 28 mixer_glb = (struct g2d_mixer_glb_reg *)(base + 0x0100); 29 } 30 g2d_mixer_scan_order_fun(__u32 scan_order)31void g2d_mixer_scan_order_fun(__u32 scan_order) 32 { 33 mixer_glb->mixer_ctrl.bits.scan_order = scan_order; 34 } 35 g2d_mixer_start(__u32 start)36void g2d_mixer_start(__u32 start) 37 { 38 mixer_glb->mixer_ctrl.bits.start = start; 39 } 40 g2d_mixer_irq_en(__u32 en)41void g2d_mixer_irq_en(__u32 en) 42 { 43 mixer_glb->mixer_interrupt.bits.finish_irq_en = en; 44 } 45 g2d_mixer_irq_query(void)46__s32 g2d_mixer_irq_query(void) 47 { 48 if (mixer_glb->mixer_interrupt.bits.mixer_irq & 0x1) { 49 mixer_glb->mixer_interrupt.bits.mixer_irq = 1; 50 return 1; 51 } 52 return 0; 53 } 54 g2d_bsp_open(void)55__s32 g2d_bsp_open(void) 56 { 57 g2d_top->sclk_gate.bits.mixer_sclk_gate = 1; 58 g2d_top->sclk_gate.bits.rot_sclk_gate = 1; 59 g2d_top->hclk_gate.bits.mixer_hclk_gate = 1; 60 g2d_top->hclk_gate.bits.rot_hclk_gate = 1; 61 g2d_top->ahb_rst.bits.mixer_ahb_rst = 1; 62 g2d_top->ahb_rst.bits.rot_ahb_rst = 1; 63 return 0; 64 } 65 g2d_bsp_close(void)66__s32 g2d_bsp_close(void) 67 { 68 g2d_top->sclk_gate.bits.mixer_sclk_gate = 0; 69 g2d_top->sclk_gate.bits.rot_sclk_gate = 0; 70 g2d_top->hclk_gate.bits.mixer_hclk_gate = 0; 71 g2d_top->hclk_gate.bits.rot_hclk_gate = 0; 72 g2d_top->ahb_rst.bits.mixer_ahb_rst = 0; 73 g2d_top->ahb_rst.bits.rot_ahb_rst = 0; 74 return 0; 75 } 76 g2d_bsp_reset(void)77__s32 g2d_bsp_reset(void) 78 { 79 g2d_top->ahb_rst.bits.mixer_ahb_rst = 0; 80 g2d_top->ahb_rst.bits.rot_ahb_rst = 0; 81 g2d_top->ahb_rst.bits.mixer_ahb_rst = 1; 82 g2d_top->ahb_rst.bits.rot_ahb_rst = 1; 83 return 0; 84 } 85 g2d_top_mixer_reset(void)86__s32 g2d_top_mixer_reset(void) 87 { 88 g2d_top->ahb_rst.bits.mixer_ahb_rst = 0; 89 g2d_top->ahb_rst.bits.mixer_ahb_rst = 1; 90 return 0; 91 } 92 g2d_top_rot_reset(void)93__s32 g2d_top_rot_reset(void) 94 { 95 g2d_top->ahb_rst.bits.rot_ahb_rst = 0; 96 g2d_top->ahb_rst.bits.rot_ahb_rst = 1; 97 return 0; 98 } 99 100 g2d_top_mixer_sclk_div(__u32 div)101__s32 g2d_top_mixer_sclk_div(__u32 div) 102 { 103 g2d_top->sclk_div.bits.mixer_sclk_div = div; 104 return 0; 105 } 106 g2d_top_rot_sclk_div(__u32 div)107__s32 g2d_top_rot_sclk_div(__u32 div) 108 { 109 g2d_top->sclk_div.bits.rot_sclk_div = div; 110 return 0; 111 } 112 g2d_top_rcq_irq_en(__u32 en)113void g2d_top_rcq_irq_en(__u32 en) 114 { 115 g2d_top->rcq_irq_ctl.bits.task_end_irq_en = en; 116 /*g2d_top->rcq_irq_ctl.bits.rcq_cfg_finish_irq_en = en;*/ 117 } 118 g2d_top_rcq_update_en(__u32 en)119void g2d_top_rcq_update_en(__u32 en) 120 { 121 g2d_top->rcq_ctrl.bits.update = en; 122 } 123 g2d_top_rcq_task_irq_query(void)124__s32 g2d_top_rcq_task_irq_query(void) 125 { 126 if (g2d_top->rcq_status.bits.task_end_irq & 0x1) { 127 g2d_top->rcq_status.bits.task_end_irq = 1; 128 return 1; 129 } 130 return 0; 131 } 132 g2d_top_rcq_cfg_irq_query(void)133__s32 g2d_top_rcq_cfg_irq_query(void) 134 { 135 if (g2d_top->rcq_status.bits.cfg_finish_irq & 0x1) { 136 g2d_top->rcq_status.bits.cfg_finish_irq = 1; 137 return 1; 138 } 139 return 0; 140 } 141 g2d_top_get_rcq_frame_cnt(void)142__u32 g2d_top_get_rcq_frame_cnt(void) 143 { 144 return g2d_top->rcq_status.bits.frame_cnt; 145 } 146 147 g2d_top_set_rcq_head(u64 addr,__u32 len)148void g2d_top_set_rcq_head(u64 addr, __u32 len) 149 { 150 __u32 haddr = (__u32)(addr >> 32); 151 152 g2d_top->rcq_header_low_addr = addr; 153 g2d_top->rcq_header_high_addr = haddr; 154 g2d_top->rcq_header_len.bits.rcq_header_len = len; 155 } 156 157