1 /* 2 * Definitions for ioctls to access DHD iovars. 3 * Based on wlioctl.h (for Broadcom 802.11abg driver). 4 * (Moves towards generic ioctls for BCM drivers/iovars.) 5 * 6 * Definitions subject to change without notice. 7 * 8 * Copyright (C) 1999-2017, Broadcom Corporation 9 * 10 * Unless you and Broadcom execute a separate written software license 11 * agreement governing use of this software, this software is licensed to you 12 * under the terms of the GNU General Public License version 2 (the "GPL"), 13 * available at http://www.broadcom.com/licenses/GPLv2.php, with the 14 * following added to such license: 15 * 16 * As a special exception, the copyright holders of this software give you 17 * permission to link this software with independent modules, and to copy and 18 * distribute the resulting executable under terms of your choice, provided that 19 * you also meet, for each linked independent module, the terms and conditions of 20 * the license of that module. An independent module is a module which is not 21 * derived from this software. The special exception does not apply to any 22 * modifications of the software. 23 * 24 * Notwithstanding the above, under no circumstances may you combine this 25 * software in any way with any other Broadcom software provided under a license 26 * other than the GPL, without Broadcom's express prior written consent. 27 * 28 * 29 * <<Broadcom-WL-IPTag/Open:>> 30 * 31 * $Id: dhdioctl.h 675190 2016-12-14 15:27:52Z $ 32 */ 33 34 #ifndef _dhdioctl_h_ 35 #define _dhdioctl_h_ 36 37 #include <typedefs.h> 38 39 40 /* Linux network driver ioctl encoding */ 41 typedef struct dhd_ioctl { 42 uint32 cmd; /* common ioctl definition */ 43 void *buf; /* pointer to user buffer */ 44 uint32 len; /* length of user buffer */ 45 uint32 set; /* get or set request boolean (optional) */ 46 uint32 used; /* bytes read or written (optional) */ 47 uint32 needed; /* bytes needed (optional) */ 48 uint32 driver; /* to identify target driver */ 49 } dhd_ioctl_t; 50 51 /* Underlying BUS definition */ 52 enum { 53 BUS_TYPE_USB = 0, /* for USB dongles */ 54 BUS_TYPE_SDIO, /* for SDIO dongles */ 55 BUS_TYPE_PCIE /* for PCIE dongles */ 56 }; 57 58 59 /* per-driver magic numbers */ 60 #define DHD_IOCTL_MAGIC 0x00444944 61 62 /* bump this number if you change the ioctl interface */ 63 #define DHD_IOCTL_VERSION 1 64 65 /* 66 * Increase the DHD_IOCTL_MAXLEN to 16K for supporting download of NVRAM files of size 67 * > 8K. In the existing implementation when NVRAM is to be downloaded via the "vars" 68 * DHD IOVAR, the NVRAM is copied to the DHD Driver memory. Later on when "dwnldstate" is 69 * invoked with FALSE option, the NVRAM gets copied from the DHD driver to the Dongle 70 * memory. The simple way to support this feature without modifying the DHD application, 71 * driver logic is to increase the DHD_IOCTL_MAXLEN size. This macro defines the "size" 72 * of the buffer in which data is exchanged between the DHD App and DHD driver. 73 */ 74 #define DHD_IOCTL_MAXLEN (16384) /* max length ioctl buffer required */ 75 #define DHD_IOCTL_SMLEN 256 /* "small" length ioctl buffer required */ 76 77 /* common ioctl definitions */ 78 #define DHD_GET_MAGIC 0 79 #define DHD_GET_VERSION 1 80 #define DHD_GET_VAR 2 81 #define DHD_SET_VAR 3 82 83 /* message levels */ 84 #define DHD_ERROR_VAL 0x0001 85 #define DHD_TRACE_VAL 0x0002 86 #define DHD_INFO_VAL 0x0004 87 #define DHD_DATA_VAL 0x0008 88 #define DHD_CTL_VAL 0x0010 89 #define DHD_TIMER_VAL 0x0020 90 #define DHD_HDRS_VAL 0x0040 91 #define DHD_BYTES_VAL 0x0080 92 #define DHD_INTR_VAL 0x0100 93 #define DHD_LOG_VAL 0x0200 94 #define DHD_GLOM_VAL 0x0400 95 #define DHD_EVENT_VAL 0x0800 96 #define DHD_BTA_VAL 0x1000 97 #define DHD_ISCAN_VAL 0x2000 98 #define DHD_ARPOE_VAL 0x4000 99 #define DHD_REORDER_VAL 0x8000 100 #define DHD_NOCHECKDIED_VAL 0x20000 /* UTF WAR */ 101 #define DHD_PNO_VAL 0x80000 102 #define DHD_RTT_VAL 0x100000 103 #define DHD_MSGTRACE_VAL 0x200000 104 #define DHD_FWLOG_VAL 0x400000 105 #define DHD_DBGIF_VAL 0x800000 106 #ifdef DHD_PCIE_NATIVE_RUNTIMEPM 107 #define DHD_RPM_VAL 0x1000000 108 #endif /* DHD_PCIE_NATIVE_RUNTIMEPM */ 109 #define DHD_PKT_MON_VAL 0x2000000 110 #define DHD_PKT_MON_DUMP_VAL 0x4000000 111 #define DHD_ERROR_MEM_VAL 0x8000000 112 #define DHD_ANDROID_VAL 0x10000 113 #define DHD_IW_VAL 0x20000 114 #define DHD_CFG_VAL 0x40000 115 #define DHD_CONFIG_VAL 0x80000 116 117 #ifdef SDTEST 118 /* For pktgen iovar */ 119 typedef struct dhd_pktgen { 120 uint32 version; /* To allow structure change tracking */ 121 uint32 freq; /* Max ticks between tx/rx attempts */ 122 uint32 count; /* Test packets to send/rcv each attempt */ 123 uint32 print; /* Print counts every <print> attempts */ 124 uint32 total; /* Total packets (or bursts) */ 125 uint32 minlen; /* Minimum length of packets to send */ 126 uint32 maxlen; /* Maximum length of packets to send */ 127 uint32 numsent; /* Count of test packets sent */ 128 uint32 numrcvd; /* Count of test packets received */ 129 uint32 numfail; /* Count of test send failures */ 130 uint32 mode; /* Test mode (type of test packets) */ 131 uint32 stop; /* Stop after this many tx failures */ 132 } dhd_pktgen_t; 133 134 /* Version in case structure changes */ 135 #define DHD_PKTGEN_VERSION 2 136 137 /* Type of test packets to use */ 138 #define DHD_PKTGEN_ECHO 1 /* Send echo requests */ 139 #define DHD_PKTGEN_SEND 2 /* Send discard packets */ 140 #define DHD_PKTGEN_RXBURST 3 /* Request dongle send N packets */ 141 #define DHD_PKTGEN_RECV 4 /* Continuous rx from continuous tx dongle */ 142 #endif /* SDTEST */ 143 144 /* Enter idle immediately (no timeout) */ 145 #define DHD_IDLE_IMMEDIATE (-1) 146 147 /* Values for idleclock iovar: other values are the sd_divisor to use when idle */ 148 #define DHD_IDLE_ACTIVE 0 /* Do not request any SD clock change when idle */ 149 #define DHD_IDLE_STOP (-1) /* Request SD clock be stopped (and use SD1 mode) */ 150 151 152 153 #endif /* _dhdioctl_h_ */ 154