1 /* 2 * Definitions for ioctls to access DHD iovars. 3 * Based on wlioctl.h (for Broadcom 802.11abg driver). 4 * (Moves towards generic ioctls for BCM drivers/iovars.) 5 * 6 * Definitions subject to change without notice. 7 * 8 * Copyright (C) 1999-2019, Broadcom. 9 * 10 * Unless you and Broadcom execute a separate written software license 11 * agreement governing use of this software, this software is licensed to you 12 * under the terms of the GNU General Public License version 2 (the "GPL"), 13 * available at http://www.broadcom.com/licenses/GPLv2.php, with the 14 * following added to such license: 15 * 16 * As a special exception, the copyright holders of this software give you 17 * permission to link this software with independent modules, and to copy and 18 * distribute the resulting executable under terms of your choice, provided that 19 * you also meet, for each linked independent module, the terms and conditions 20 * of the license of that module. An independent module is a module which is 21 * not derived from this software. The special exception does not apply to any 22 * modifications of the software. 23 * 24 * Notwithstanding the above, under no circumstances may you combine this 25 * software in any way with any other Broadcom software provided under a license 26 * other than the GPL, without Broadcom's express prior written consent. 27 * 28 * 29 * <<Broadcom-WL-IPTag/Open:>> 30 * 31 * $Id: dhdioctl.h 800512 2019-01-22 09:31:01Z $ 32 */ 33 34 #ifndef _dhdioctl_h_ 35 #define _dhdioctl_h_ 36 37 #include <typedefs.h> 38 39 /* Linux network driver ioctl encoding */ 40 typedef struct dhd_ioctl { 41 uint32 cmd; /* common ioctl definition */ 42 void *buf; /* pointer to user buffer */ 43 uint32 len; /* length of user buffer */ 44 uint32 set; /* get or set request boolean (optional) */ 45 uint32 used; /* bytes read or written (optional) */ 46 uint32 needed; /* bytes needed (optional) */ 47 uint32 driver; /* to identify target driver */ 48 } dhd_ioctl_t; 49 50 /* Underlying BUS definition */ 51 enum { 52 BUS_TYPE_USB = 0, /* for USB dongles */ 53 BUS_TYPE_SDIO, /* for SDIO dongles */ 54 BUS_TYPE_PCIE /* for PCIE dongles */ 55 }; 56 57 typedef enum { 58 DMA_XFER_SUCCESS = 0, 59 DMA_XFER_IN_PROGRESS, 60 DMA_XFER_FAILED 61 } dma_xfer_status_t; 62 63 typedef enum d11_lpbk_type { 64 M2M_DMA_LPBK = 0, 65 D11_LPBK = 1, 66 BMC_LPBK = 2, 67 M2M_NON_DMA_LPBK = 3, 68 D11_HOST_MEM_LPBK = 4, 69 BMC_HOST_MEM_LPBK = 5, 70 MAX_LPBK = 6 71 } dma_xfer_type_t; 72 73 typedef struct dmaxfer_info { 74 uint16 version; 75 uint16 length; 76 dma_xfer_status_t status; 77 dma_xfer_type_t type; 78 uint src_delay; 79 uint dest_delay; 80 uint should_wait; 81 uint core_num; 82 int error_code; 83 uint32 num_bytes; 84 uint64 time_taken; 85 uint64 tput; 86 } dma_xfer_info_t; 87 88 #define DHD_DMAXFER_VERSION 0x1 89 90 typedef struct tput_test { 91 uint16 version; 92 uint16 length; 93 uint8 direction; 94 uint8 tput_test_running; 95 uint8 mac_sta[6]; 96 uint8 mac_ap[6]; 97 uint8 PAD[2]; 98 uint32 payload_size; 99 uint32 num_pkts; 100 uint32 timeout_ms; 101 uint32 flags; 102 103 uint32 pkts_good; 104 uint32 pkts_bad; 105 uint32 pkts_cmpl; 106 uint64 time_ms; 107 uint64 tput_bps; 108 } tput_test_t; 109 110 typedef enum { TPUT_DIR_TX = 0, TPUT_DIR_RX } tput_dir_t; 111 112 #define TPUT_TEST_T_VER 1 113 #define TPUT_TEST_T_LEN 68 114 #define TPUT_TEST_MIN_PAYLOAD_SIZE 16 115 #define TPUT_TEST_USE_ETHERNET_HDR 0x1 116 #define TPUT_TEST_USE_802_11_HDR 0x2 117 118 /* per-driver magic numbers */ 119 #define DHD_IOCTL_MAGIC 0x00444944 120 121 /* bump this number if you change the ioctl interface */ 122 #define DHD_IOCTL_VERSION 1 123 124 /* 125 * Increase the DHD_IOCTL_MAXLEN to 16K for supporting download of NVRAM files 126 * of size > 8K. In the existing implementation when NVRAM is to be downloaded 127 * via the "vars" DHD IOVAR, the NVRAM is copied to the DHD Driver memory. Later 128 * on when "dwnldstate" is invoked with FALSE option, the NVRAM gets copied from 129 * the DHD driver to the Dongle memory. The simple way to support this feature 130 * without modifying the DHD application, driver logic is to increase the 131 * DHD_IOCTL_MAXLEN size. This macro defines the "size" of the buffer in which 132 * data is exchanged between the DHD App and DHD driver. 133 */ 134 #define DHD_IOCTL_MAXLEN (16384) /* max length ioctl buffer required */ 135 #define DHD_IOCTL_SMLEN 256 /* "small" length ioctl buffer required */ 136 137 /* common ioctl definitions */ 138 #define DHD_GET_MAGIC 0 139 #define DHD_GET_VERSION 1 140 #define DHD_GET_VAR 2 141 #define DHD_SET_VAR 3 142 143 /* message levels */ 144 #define DHD_ERROR_VAL 0x0001 145 #define DHD_TRACE_VAL 0x0002 146 #define DHD_INFO_VAL 0x0004 147 #define DHD_DATA_VAL 0x0008 148 #define DHD_CTL_VAL 0x0010 149 #define DHD_TIMER_VAL 0x0020 150 #define DHD_HDRS_VAL 0x0040 151 #define DHD_BYTES_VAL 0x0080 152 #define DHD_INTR_VAL 0x0100 153 #define DHD_LOG_VAL 0x0200 154 #define DHD_GLOM_VAL 0x0400 155 #define DHD_EVENT_VAL 0x0800 156 #define DHD_BTA_VAL 0x1000 157 #define DHD_ISCAN_VAL 0x2000 158 #define DHD_ARPOE_VAL 0x4000 159 #define DHD_REORDER_VAL 0x8000 160 #define DHD_NOCHECKDIED_VAL 0x20000 /* UTF WAR */ 161 #define DHD_PNO_VAL 0x80000 162 #define DHD_RTT_VAL 0x100000 163 #define DHD_MSGTRACE_VAL 0x200000 164 #define DHD_FWLOG_VAL 0x400000 165 #define DHD_DBGIF_VAL 0x800000 166 #ifdef DHD_PCIE_NATIVE_RUNTIMEPM 167 #define DHD_RPM_VAL 0x1000000 168 #endif /* DHD_PCIE_NATIVE_RUNTIMEPM */ 169 #define DHD_PKT_MON_VAL 0x2000000 170 #define DHD_PKT_MON_DUMP_VAL 0x4000000 171 #define DHD_ERROR_MEM_VAL 0x8000000 172 #define DHD_DNGL_IOVAR_SET_VAL \ 173 0x10000000 /**< logs the setting of dongle iovars */ 174 #define DHD_LPBKDTDUMP_VAL 0x20000000 175 #define DHD_PRSRV_MEM_VAL 0x40000000 176 #define DHD_IOVAR_MEM_VAL 0x80000000 177 #define DHD_ANDROID_VAL 0x10000 178 #define DHD_IW_VAL 0x20000 179 #define DHD_CFG_VAL 0x40000 180 #define DHD_CONFIG_VAL 0x80000 181 #define DHD_DUMP_VAL 0x100000 182 #define DUMP_EAPOL_VAL 0x0001 183 #define DUMP_ARP_VAL 0x0002 184 #define DUMP_DHCP_VAL 0x0004 185 #define DUMP_ICMP_VAL 0x0008 186 #define DUMP_DNS_VAL 0x0010 187 #define DUMP_TRX_VAL 0x0080 188 189 #ifdef SDTEST 190 /* For pktgen iovar */ 191 typedef struct dhd_pktgen { 192 uint32 version; /* To allow structure change tracking */ 193 uint32 freq; /* Max ticks between tx/rx attempts */ 194 uint32 count; /* Test packets to send/rcv each attempt */ 195 uint32 print; /* Print counts every <print> attempts */ 196 uint32 total; /* Total packets (or bursts) */ 197 uint32 minlen; /* Minimum length of packets to send */ 198 uint32 maxlen; /* Maximum length of packets to send */ 199 uint32 numsent; /* Count of test packets sent */ 200 uint32 numrcvd; /* Count of test packets received */ 201 uint32 numfail; /* Count of test send failures */ 202 uint32 mode; /* Test mode (type of test packets) */ 203 uint32 stop; /* Stop after this many tx failures */ 204 } dhd_pktgen_t; 205 206 /* Version in case structure changes */ 207 #define DHD_PKTGEN_VERSION 2 208 209 /* Type of test packets to use */ 210 #define DHD_PKTGEN_ECHO 1 /* Send echo requests */ 211 #define DHD_PKTGEN_SEND 2 /* Send discard packets */ 212 #define DHD_PKTGEN_RXBURST 3 /* Request dongle send N packets */ 213 #define DHD_PKTGEN_RECV 4 /* Continuous rx from continuous tx dongle */ 214 #endif /* SDTEST */ 215 216 /* Enter idle immediately (no timeout) */ 217 #define DHD_IDLE_IMMEDIATE (-1) 218 219 /* Values for idleclock iovar: other values are the sd_divisor to use when idle 220 */ 221 #define DHD_IDLE_ACTIVE 0 /* Do not request any SD clock change when idle */ 222 #define DHD_IDLE_STOP (-1) /* Request SD clock be stopped (and use SD1 mode) \ 223 */ 224 225 enum dhd_maclist_xtlv_type { 226 DHD_MACLIST_XTLV_R = 0x1, 227 DHD_MACLIST_XTLV_X = 0x2, 228 DHD_SVMPLIST_XTLV = 0x3 229 }; 230 231 typedef struct _dhd_maclist_t { 232 uint16 version; /* Version */ 233 uint16 234 bytes_len; /* Total bytes length of lists, XTLV headers and paddings */ 235 uint8 plist[1]; /* Pointer to the first list */ 236 } dhd_maclist_t; 237 238 typedef struct _dhd_pd11regs_param { 239 uint16 start_idx; 240 uint8 verbose; 241 uint8 pad; 242 uint8 plist[1]; 243 } dhd_pd11regs_param; 244 245 typedef struct _dhd_pd11regs_buf { 246 uint16 idx; 247 uint8 pad[2]; 248 uint8 pbuf[1]; 249 } dhd_pd11regs_buf; 250 251 /* BT logging and memory dump */ 252 253 #define BT_LOG_BUF_MAX_SIZE (DHD_IOCTL_MAXLEN - (2 * sizeof(int))) 254 #define BT_LOG_BUF_NOT_AVAILABLE 0 255 #define BT_LOG_NEXT_BUF_NOT_AVAIL 1 256 #define BT_LOG_NEXT_BUF_AVAIL 2 257 #define BT_LOG_NOT_READY 3 258 259 typedef struct bt_log_buf_info { 260 int availability; 261 int size; 262 char buf[BT_LOG_BUF_MAX_SIZE]; 263 } bt_log_buf_info_t; 264 265 /* request BT memory in chunks */ 266 typedef struct bt_mem_req { 267 int offset; /* offset from BT memory start */ 268 int buf_size; /* buffer size per chunk */ 269 } bt_mem_req_t; 270 271 /* max dest supported */ 272 #define DEBUG_BUF_DEST_MAX 4 273 274 /* debug buf dest stat */ 275 typedef struct debug_buf_dest_stat { 276 uint32 stat[DEBUG_BUF_DEST_MAX]; 277 } debug_buf_dest_stat_t; 278 279 #endif /* _dhdioctl_h_ */ 280