1 /******************************************************************************
2 *
3 * Copyright(c) 2007 - 2017 Realtek Corporation.
4 *
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms of version 2 of the GNU General Public License as
7 * published by the Free Software Foundation.
8 *
9 * This program is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
12 * more details.
13 *
14 * The full GNU General Public License is included in this distribution in the
15 * file called LICENSE.
16 *
17 * Contact Information:
18 * wlanfae <wlanfae@realtek.com>
19 * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
20 * Hsinchu 300, Taiwan.
21 *
22 * Larry Finger <Larry.Finger@lwfinger.net>
23 *
24 *****************************************************************************/
25
26 /*@************************************************************
27 * include files
28 ************************************************************/
29
30 #include "mp_precomp.h"
31 #include "phydm_precomp.h"
32
33 #define READ_AND_CONFIG_MP(ic, txt) (odm_read_and_config_mp_##ic##txt(dm))
34 #define READ_AND_CONFIG_TC(ic, txt) (odm_read_and_config_tc_##ic##txt(dm))
35
36 #if (PHYDM_TESTCHIP_SUPPORT == 1)
37 #define READ_AND_CONFIG(ic, txt) \
38 do { \
39 if (dm->is_mp_chip) \
40 READ_AND_CONFIG_MP(ic, txt); \
41 else \
42 READ_AND_CONFIG_TC(ic, txt); \
43 } while (0)
44 #else
45 #define READ_AND_CONFIG READ_AND_CONFIG_MP
46 #endif
47
48 #define GET_VERSION_MP(ic, txt) (odm_get_version_mp_##ic##txt())
49 #define GET_VERSION_TC(ic, txt) (odm_get_version_tc_##ic##txt())
50
51 #if (PHYDM_TESTCHIP_SUPPORT == 1)
52 #define GET_VERSION(ic, txt) (dm->is_mp_chip ? GET_VERSION_MP(ic, txt) : GET_VERSION_TC(ic, txt))
53 #else
54 #define GET_VERSION(ic, txt) GET_VERSION_MP(ic, txt)
55 #endif
56
57 enum hal_status
odm_config_rf_with_header_file(struct dm_struct * dm,enum odm_rf_config_type config_type,u8 e_rf_path)58 odm_config_rf_with_header_file(struct dm_struct *dm,
59 enum odm_rf_config_type config_type,
60 u8 e_rf_path)
61 {
62 #if (DM_ODM_SUPPORT_TYPE & ODM_WIN)
63 void *adapter = dm->adapter;
64 PMGNT_INFO mgnt_info = &((PADAPTER)adapter)->MgntInfo;
65 #endif
66 enum hal_status result = HAL_STATUS_SUCCESS;
67
68 PHYDM_DBG(dm, ODM_COMP_INIT, "===>%s (%s)\n", __func__,
69 (dm->is_mp_chip) ? "MPChip" : "TestChip");
70 PHYDM_DBG(dm, ODM_COMP_INIT,
71 "support_platform: 0x%X, support_interface: 0x%X, board_type: 0x%X\n",
72 dm->support_platform, dm->support_interface, dm->board_type);
73
74 /* @1 AP doesn't use PHYDM power tracking table in these ICs */
75 #if (DM_ODM_SUPPORT_TYPE != ODM_AP)
76 #if (RTL8812A_SUPPORT == 1)
77 if (dm->support_ic_type == ODM_RTL8812) {
78 if (config_type == CONFIG_RF_RADIO) {
79 if (e_rf_path == RF_PATH_A)
80 READ_AND_CONFIG_MP(8812a, _radioa);
81 else if (e_rf_path == RF_PATH_B)
82 READ_AND_CONFIG_MP(8812a, _radiob);
83 } else if (config_type == CONFIG_RF_TXPWR_LMT) {
84 #if (DM_ODM_SUPPORT_TYPE & ODM_WIN) && (DEV_BUS_TYPE == RT_PCI_INTERFACE)
85 HAL_DATA_TYPE * hal_data = GET_HAL_DATA(((PADAPTER)adapter));
86 if ((hal_data->EEPROMSVID == 0x17AA && hal_data->EEPROMSMID == 0xA811) ||
87 (hal_data->EEPROMSVID == 0x10EC && hal_data->EEPROMSMID == 0xA812) ||
88 (hal_data->EEPROMSVID == 0x10EC && hal_data->EEPROMSMID == 0x8812))
89 READ_AND_CONFIG_MP(8812a, _txpwr_lmt_hm812a03);
90 else
91 #endif
92 READ_AND_CONFIG_MP(8812a, _txpwr_lmt);
93 }
94 }
95 #endif
96 #if (RTL8821A_SUPPORT == 1)
97 if (dm->support_ic_type == ODM_RTL8821) {
98 if (config_type == CONFIG_RF_RADIO) {
99 if (e_rf_path == RF_PATH_A)
100 READ_AND_CONFIG_MP(8821a, _radioa);
101 } else if (config_type == CONFIG_RF_TXPWR_LMT) {
102 if (dm->support_interface == ODM_ITRF_USB) {
103 if (dm->ext_pa_5g || dm->ext_lna_5g)
104 READ_AND_CONFIG_MP(8821a, _txpwr_lmt_8811a_u_fem);
105 else
106 READ_AND_CONFIG_MP(8821a, _txpwr_lmt_8811a_u_ipa);
107 } else {
108 #if (DM_ODM_SUPPORT_TYPE & ODM_WIN)
109 if (mgnt_info->CustomerID == RT_CID_8821AE_ASUS_MB)
110 READ_AND_CONFIG_MP(8821a, _txpwr_lmt_8821a_sar_8mm);
111 else if (mgnt_info->CustomerID == RT_CID_ASUS_NB)
112 READ_AND_CONFIG_MP(8821a, _txpwr_lmt_8821a_sar_5mm);
113 else
114 #endif
115 READ_AND_CONFIG_MP(8821a, _txpwr_lmt_8821a);
116 }
117 }
118 }
119 #endif
120 #if (RTL8192E_SUPPORT == 1)
121 if (dm->support_ic_type == ODM_RTL8192E) {
122 if (config_type == CONFIG_RF_RADIO) {
123 if (e_rf_path == RF_PATH_A)
124 READ_AND_CONFIG_MP(8192e, _radioa);
125 else if (e_rf_path == RF_PATH_B)
126 READ_AND_CONFIG_MP(8192e, _radiob);
127 } else if (config_type == CONFIG_RF_TXPWR_LMT) {
128 #if (DM_ODM_SUPPORT_TYPE & ODM_WIN) && (DEV_BUS_TYPE == RT_PCI_INTERFACE) /*Refine by Vincent Lan for 5mm SAR pwr limit*/
129 HAL_DATA_TYPE * hal_data = GET_HAL_DATA(((PADAPTER)adapter));
130
131 if ((hal_data->EEPROMSVID == 0x11AD && hal_data->EEPROMSMID == 0x8192) ||
132 (hal_data->EEPROMSVID == 0x11AD && hal_data->EEPROMSMID == 0x8193))
133 READ_AND_CONFIG_MP(8192e, _txpwr_lmt_8192e_sar_5mm);
134 else
135 #endif
136 READ_AND_CONFIG_MP(8192e, _txpwr_lmt);
137 }
138 }
139 #endif
140 #if (RTL8723D_SUPPORT == 1)
141 if (dm->support_ic_type == ODM_RTL8723D) {
142 if (config_type == CONFIG_RF_RADIO) {
143 if (e_rf_path == RF_PATH_A)
144 READ_AND_CONFIG_MP(8723d, _radioa);
145 } else if (config_type == CONFIG_RF_TXPWR_LMT) {
146 READ_AND_CONFIG_MP(8723d, _txpwr_lmt);
147 }
148 }
149 #endif
150 /* @JJ ADD 20161014 */
151 #if (RTL8710B_SUPPORT == 1)
152 if (dm->support_ic_type == ODM_RTL8710B) {
153 if (config_type == CONFIG_RF_RADIO) {
154 if (e_rf_path == RF_PATH_A)
155 READ_AND_CONFIG_MP(8710b, _radioa);
156 } else if (config_type == CONFIG_RF_TXPWR_LMT)
157 READ_AND_CONFIG_MP(8710b, _txpwr_lmt);
158 }
159 #endif
160
161 #endif /* @(DM_ODM_SUPPORT_TYPE != ODM_AP) */
162 /* @1 All platforms support */
163 #if (RTL8188E_SUPPORT == 1)
164 if (dm->support_ic_type == ODM_RTL8188E) {
165 if (config_type == CONFIG_RF_RADIO) {
166 if (e_rf_path == RF_PATH_A)
167 READ_AND_CONFIG_MP(8188e, _radioa);
168 } else if (config_type == CONFIG_RF_TXPWR_LMT)
169 READ_AND_CONFIG_MP(8188e, _txpwr_lmt);
170 }
171 #endif
172 #if (RTL8723B_SUPPORT == 1)
173 if (dm->support_ic_type == ODM_RTL8723B) {
174 if (config_type == CONFIG_RF_RADIO)
175 READ_AND_CONFIG_MP(8723b, _radioa);
176 else if (config_type == CONFIG_RF_TXPWR_LMT)
177 READ_AND_CONFIG_MP(8723b, _txpwr_lmt);
178 }
179 #endif
180 #if (RTL8814A_SUPPORT == 1)
181 if (dm->support_ic_type == ODM_RTL8814A) {
182 if (config_type == CONFIG_RF_RADIO) {
183 if (e_rf_path == RF_PATH_A)
184 READ_AND_CONFIG_MP(8814a, _radioa);
185 else if (e_rf_path == RF_PATH_B)
186 READ_AND_CONFIG_MP(8814a, _radiob);
187 else if (e_rf_path == RF_PATH_C)
188 READ_AND_CONFIG_MP(8814a, _radioc);
189 else if (e_rf_path == RF_PATH_D)
190 READ_AND_CONFIG_MP(8814a, _radiod);
191 } else if (config_type == CONFIG_RF_TXPWR_LMT) {
192 if (dm->rfe_type == 0)
193 READ_AND_CONFIG_MP(8814a, _txpwr_lmt_type0);
194 else if (dm->rfe_type == 1)
195 READ_AND_CONFIG_MP(8814a, _txpwr_lmt_type1);
196 else if (dm->rfe_type == 2)
197 READ_AND_CONFIG_MP(8814a, _txpwr_lmt_type2);
198 else if (dm->rfe_type == 3)
199 READ_AND_CONFIG_MP(8814a, _txpwr_lmt_type3);
200 else if (dm->rfe_type == 5)
201 READ_AND_CONFIG_MP(8814a, _txpwr_lmt_type5);
202 else if (dm->rfe_type == 7)
203 READ_AND_CONFIG_MP(8814a, _txpwr_lmt_type7);
204 else if (dm->rfe_type == 8)
205 READ_AND_CONFIG_MP(8814a, _txpwr_lmt_type8);
206 else
207 READ_AND_CONFIG_MP(8814a, _txpwr_lmt);
208 }
209 }
210 #endif
211 #if (RTL8703B_SUPPORT == 1)
212 if (dm->support_ic_type == ODM_RTL8703B) {
213 if (config_type == CONFIG_RF_RADIO) {
214 if (e_rf_path == RF_PATH_A)
215 READ_AND_CONFIG_MP(8703b, _radioa);
216 }
217 }
218 #endif
219 #if (RTL8188F_SUPPORT == 1)
220 if (dm->support_ic_type == ODM_RTL8188F) {
221 if (config_type == CONFIG_RF_RADIO) {
222 if (e_rf_path == RF_PATH_A)
223 READ_AND_CONFIG_MP(8188f, _radioa);
224 } else if (config_type == CONFIG_RF_TXPWR_LMT)
225 READ_AND_CONFIG_MP(8188f, _txpwr_lmt);
226 }
227 #endif
228 #if (RTL8822B_SUPPORT == 1)
229 if (dm->support_ic_type == ODM_RTL8822B) {
230 if (config_type == CONFIG_RF_RADIO) {
231 if (e_rf_path == RF_PATH_A)
232 READ_AND_CONFIG_MP(8822b, _radioa);
233 else if (e_rf_path == RF_PATH_B)
234 READ_AND_CONFIG_MP(8822b, _radiob);
235 } else if (config_type == CONFIG_RF_TXPWR_LMT) {
236 if (dm->rfe_type == 5)
237 READ_AND_CONFIG_MP(8822b, _txpwr_lmt_type5);
238 else if (dm->rfe_type == 2)
239 READ_AND_CONFIG_MP(8822b, _txpwr_lmt_type2);
240 else if (dm->rfe_type == 3)
241 READ_AND_CONFIG_MP(8822b, _txpwr_lmt_type3);
242 else if (dm->rfe_type == 4)
243 READ_AND_CONFIG_MP(8822b, _txpwr_lmt_type4);
244 else if (dm->rfe_type == 12)
245 READ_AND_CONFIG_MP(8822b, _txpwr_lmt_type12);
246 else if (dm->rfe_type == 15)
247 READ_AND_CONFIG_MP(8822b, _txpwr_lmt_type15);
248 else if (dm->rfe_type == 16)
249 READ_AND_CONFIG_MP(8822b, _txpwr_lmt_type16);
250 else if (dm->rfe_type == 17)
251 READ_AND_CONFIG_MP(8822b, _txpwr_lmt_type17);
252 else if (dm->rfe_type == 18)
253 READ_AND_CONFIG_MP(8822b, _txpwr_lmt_type18);
254 //else if (dm->rfe_type == 19)
255 //READ_AND_CONFIG_MP(8822b, _txpwr_lmt_type19);
256 else
257 READ_AND_CONFIG_MP(8822b, _txpwr_lmt);
258 }
259 }
260 #endif
261
262 #if (RTL8197F_SUPPORT == 1)
263 if (dm->support_ic_type == ODM_RTL8197F) {
264 if (config_type == CONFIG_RF_RADIO) {
265 if (e_rf_path == RF_PATH_A)
266 READ_AND_CONFIG_MP(8197f, _radioa);
267 else if (e_rf_path == RF_PATH_B)
268 READ_AND_CONFIG_MP(8197f, _radiob);
269 }
270 }
271 #endif
272 /*@jj add 20170822*/
273 #if (RTL8192F_SUPPORT == 1)
274 if (dm->support_ic_type == ODM_RTL8192F) {
275 if (config_type == CONFIG_RF_RADIO) {
276 if (e_rf_path == RF_PATH_A)
277 READ_AND_CONFIG_MP(8192f, _radioa);
278 else if (e_rf_path == RF_PATH_B)
279 READ_AND_CONFIG_MP(8192f, _radiob);
280 } else if (config_type == CONFIG_RF_TXPWR_LMT) {
281 if (dm->rfe_type == 0)
282 READ_AND_CONFIG_MP(8192f, _txpwr_lmt_type0);
283 else if (dm->rfe_type == 1)
284 READ_AND_CONFIG_MP(8192f, _txpwr_lmt_type1);
285 else if (dm->rfe_type == 2)
286 READ_AND_CONFIG_MP(8192f, _txpwr_lmt_type2);
287 else if (dm->rfe_type == 3)
288 READ_AND_CONFIG_MP(8192f, _txpwr_lmt_type3);
289 else if (dm->rfe_type == 4)
290 READ_AND_CONFIG_MP(8192f, _txpwr_lmt_type4);
291 else if (dm->rfe_type == 5)
292 READ_AND_CONFIG_MP(8192f, _txpwr_lmt_type5);
293 else if (dm->rfe_type == 6)
294 READ_AND_CONFIG_MP(8192f, _txpwr_lmt_type6);
295 else if (dm->rfe_type == 7)
296 READ_AND_CONFIG_MP(8192f, _txpwr_lmt_type7);
297 else if (dm->rfe_type == 8)
298 READ_AND_CONFIG_MP(8192f, _txpwr_lmt_type8);
299 else if (dm->rfe_type == 9)
300 READ_AND_CONFIG_MP(8192f, _txpwr_lmt_type9);
301 else if (dm->rfe_type == 10)
302 READ_AND_CONFIG_MP(8192f, _txpwr_lmt_type10);
303 else if (dm->rfe_type == 11)
304 READ_AND_CONFIG_MP(8192f, _txpwr_lmt_type11);
305 else if (dm->rfe_type == 12)
306 READ_AND_CONFIG_MP(8192f, _txpwr_lmt_type12);
307 else if (dm->rfe_type == 13)
308 READ_AND_CONFIG_MP(8192f, _txpwr_lmt_type13);
309 else if (dm->rfe_type == 14)
310 READ_AND_CONFIG_MP(8192f, _txpwr_lmt_type14);
311 else if (dm->rfe_type == 15)
312 READ_AND_CONFIG_MP(8192f, _txpwr_lmt_type15);
313 else if (dm->rfe_type == 16)
314 READ_AND_CONFIG_MP(8192f, _txpwr_lmt_type16);
315 else if (dm->rfe_type == 17)
316 READ_AND_CONFIG_MP(8192f, _txpwr_lmt_type17);
317 else if (dm->rfe_type == 18)
318 READ_AND_CONFIG_MP(8192f, _txpwr_lmt_type18);
319 else if (dm->rfe_type == 19)
320 READ_AND_CONFIG_MP(8192f, _txpwr_lmt_type19);
321 else if (dm->rfe_type == 20)
322 READ_AND_CONFIG_MP(8192f, _txpwr_lmt_type20);
323 else if (dm->rfe_type == 21)
324 READ_AND_CONFIG_MP(8192f, _txpwr_lmt_type21);
325 else if (dm->rfe_type == 22)
326 READ_AND_CONFIG_MP(8192f, _txpwr_lmt_type22);
327 else if (dm->rfe_type == 23)
328 READ_AND_CONFIG_MP(8192f, _txpwr_lmt_type23);
329 else if (dm->rfe_type == 24)
330 READ_AND_CONFIG_MP(8192f, _txpwr_lmt_type24);
331 else if (dm->rfe_type == 25)
332 READ_AND_CONFIG_MP(8192f, _txpwr_lmt_type25);
333 else if (dm->rfe_type == 26)
334 READ_AND_CONFIG_MP(8192f, _txpwr_lmt_type26);
335 else if (dm->rfe_type == 27)
336 READ_AND_CONFIG_MP(8192f, _txpwr_lmt_type27);
337 else if (dm->rfe_type == 28)
338 READ_AND_CONFIG_MP(8192f, _txpwr_lmt_type28);
339 else if (dm->rfe_type == 29)
340 READ_AND_CONFIG_MP(8192f, _txpwr_lmt_type29);
341 else if (dm->rfe_type == 30)
342 READ_AND_CONFIG_MP(8192f, _txpwr_lmt_type30);
343 else if (dm->rfe_type == 31)
344 READ_AND_CONFIG_MP(8192f, _txpwr_lmt_type31);
345 else
346 READ_AND_CONFIG_MP(8192f, _txpwr_lmt);
347 }
348 }
349 #endif
350 #if (RTL8721D_SUPPORT == 1)
351 if (dm->support_ic_type == ODM_RTL8721D) {
352 if (config_type == CONFIG_RF_RADIO) {
353 if (e_rf_path == RF_PATH_A)
354 READ_AND_CONFIG_MP(8721d, _radioa);
355 } else if (config_type == CONFIG_RF_TXPWR_LMT) {
356 if (dm->power_voltage == ODM_POWER_18V)
357 READ_AND_CONFIG_MP(8721d, _txpwr_lmt_type0);
358 else
359 READ_AND_CONFIG_MP(8721d, _txpwr_lmt_type1);
360 }
361 }
362 #endif
363
364 #if (RTL8710C_SUPPORT == 1)
365 if (dm->support_ic_type == ODM_RTL8710C) {
366 if (config_type == CONFIG_RF_RADIO) {
367 if (e_rf_path == RF_PATH_A)
368 READ_AND_CONFIG_MP(8710c, _radioa);
369 } else if (config_type == CONFIG_RF_TXPWR_LMT)
370 READ_AND_CONFIG_MP(8710c, _txpwr_lmt);
371 }
372 #endif
373
374 #if (RTL8821C_SUPPORT == 1)
375 if (dm->support_ic_type == ODM_RTL8821C) {
376 if (config_type == CONFIG_RF_RADIO) {
377 if (e_rf_path == RF_PATH_A)
378 READ_AND_CONFIG(8821c, _radioa);
379 } else if (config_type == CONFIG_RF_TXPWR_LMT) {
380 READ_AND_CONFIG(8821c, _txpwr_lmt);
381 }
382 }
383 #endif
384 #if (RTL8195B_SUPPORT == 1)
385 if (dm->support_ic_type == ODM_RTL8195B) {
386 if (config_type == CONFIG_RF_RADIO) {
387 if (e_rf_path == RF_PATH_A)
388 READ_AND_CONFIG(8195b, _radioa);
389 } else if (config_type == CONFIG_RF_TXPWR_LMT) {
390 READ_AND_CONFIG(8195b, _txpwr_lmt);
391 }
392 }
393 #endif
394 #if (RTL8198F_SUPPORT == 1)
395 if (dm->support_ic_type == ODM_RTL8198F) {
396 if (config_type == CONFIG_RF_RADIO) {
397 if (e_rf_path == RF_PATH_A)
398 READ_AND_CONFIG_MP(8198f, _radioa);
399 else if (e_rf_path == RF_PATH_B)
400 READ_AND_CONFIG_MP(8198f, _radiob);
401 else if (e_rf_path == RF_PATH_C)
402 READ_AND_CONFIG_MP(8198f, _radioc);
403 else if (e_rf_path == RF_PATH_D)
404 READ_AND_CONFIG_MP(8198f, _radiod);
405 }
406 }
407 #endif
408 #if (RTL8822C_SUPPORT)
409 if (dm->support_ic_type == ODM_RTL8822C) {
410 if (config_type == CONFIG_RF_RADIO) {
411 if (e_rf_path == RF_PATH_A)
412 READ_AND_CONFIG_MP(8822c, _radioa);
413 else if (e_rf_path == RF_PATH_B)
414 READ_AND_CONFIG_MP(8822c, _radiob);
415 } else if (config_type == CONFIG_RF_TXPWR_LMT) {
416 if (dm->rfe_type == 5)
417 READ_AND_CONFIG_MP(8822c, _txpwr_lmt_type5);
418 else
419 READ_AND_CONFIG_MP(8822c, _txpwr_lmt);
420 }
421 }
422 #endif
423 #if (RTL8723F_SUPPORT)
424 if (dm->support_ic_type == ODM_RTL8723F) {
425 if (config_type == CONFIG_RF_RADIO) {
426 if (e_rf_path == RF_PATH_A)
427 READ_AND_CONFIG_MP(8723f, _radioa);
428 else if (e_rf_path == RF_PATH_B)
429 READ_AND_CONFIG_MP(8723f, _radiob);
430 } else if (config_type == CONFIG_RF_TXPWR_LMT) {
431 READ_AND_CONFIG_MP(8723f, _txpwr_lmt);
432 }
433 }
434 #endif
435 #if (RTL8812F_SUPPORT)
436 if (dm->support_ic_type == ODM_RTL8812F) {
437 if (config_type == CONFIG_RF_RADIO) {
438 if (e_rf_path == RF_PATH_A)
439 READ_AND_CONFIG_MP(8812f, _radioa);
440 else if (e_rf_path == RF_PATH_B)
441 READ_AND_CONFIG_MP(8812f, _radiob);
442 }
443 }
444 #endif
445 #if (RTL8197G_SUPPORT)
446 if (dm->support_ic_type == ODM_RTL8197G) {
447 if (config_type == CONFIG_RF_RADIO) {
448 if (e_rf_path == RF_PATH_A)
449 READ_AND_CONFIG_MP(8197g, _radioa);
450 else if (e_rf_path == RF_PATH_B)
451 READ_AND_CONFIG_MP(8197g, _radiob);
452 }
453 }
454 #endif
455
456 /*8814B need review, when phydm has related files*/
457 #if (RTL8814B_SUPPORT)
458 if (dm->support_ic_type == ODM_RTL8814B) {
459 if (config_type == CONFIG_RF_RADIO) {
460 if (e_rf_path == RF_PATH_A)
461 READ_AND_CONFIG_MP(8814b, _radioa);
462 else if (e_rf_path == RF_PATH_B)
463 READ_AND_CONFIG_MP(8814b, _radiob);
464 else if (e_rf_path == RF_PATH_C)
465 READ_AND_CONFIG_MP(8814b, _radioc);
466 else if (e_rf_path == RF_PATH_D)
467 READ_AND_CONFIG_MP(8814b, _radiod);
468 }
469 if (config_type == CONFIG_RF_SYN_RADIO) {
470 if (e_rf_path == RF_SYN0)
471 READ_AND_CONFIG_MP(8814b, _radiosyn0);
472 else if (e_rf_path == RF_SYN1)
473 READ_AND_CONFIG_MP(8814b, _radiosyn1);
474 } else if (config_type == CONFIG_RF_TXPWR_LMT) {
475 READ_AND_CONFIG_MP(8814b, _txpwr_lmt);
476 }
477 }
478 #endif
479 #if (RTL8814C_SUPPORT)
480 if (dm->support_ic_type == ODM_RTL8814C) {
481 if (config_type == CONFIG_RF_RADIO) {
482 if (e_rf_path == RF_PATH_A)
483 READ_AND_CONFIG_MP(8814c, _radioa);
484 else if (e_rf_path == RF_PATH_B)
485 READ_AND_CONFIG_MP(8814c, _radiob);
486 else if (e_rf_path == RF_PATH_C)
487 READ_AND_CONFIG_MP(8814c, _radioc);
488 else if (e_rf_path == RF_PATH_D)
489 READ_AND_CONFIG_MP(8814c, _radiod);
490 }
491 if (config_type == CONFIG_RF_SYN_RADIO) {
492 if (e_rf_path == RF_SYN0)
493 READ_AND_CONFIG_MP(8814c, _radiosyn0);
494 else if (e_rf_path == RF_SYN1)
495 READ_AND_CONFIG_MP(8814c, _radiosyn1);
496 } else if (config_type == CONFIG_RF_TXPWR_LMT) {
497 READ_AND_CONFIG_MP(8814c, _txpwr_lmt);
498 }
499 }
500 #endif
501
502 if (config_type == CONFIG_RF_RADIO) {
503 if (dm->fw_offload_ability & PHYDM_PHY_PARAM_OFFLOAD) {
504 result = phydm_set_reg_by_fw(dm,
505 PHYDM_HALMAC_CMD_END,
506 0,
507 0,
508 0,
509 (enum rf_path)0,
510 0);
511 PHYDM_DBG(dm, ODM_COMP_INIT,
512 "rf param offload end!result = %d", result);
513 }
514 }
515
516 return result;
517 }
518
519 enum hal_status
odm_config_rf_with_tx_pwr_track_header_file(struct dm_struct * dm)520 odm_config_rf_with_tx_pwr_track_header_file(struct dm_struct *dm)
521 {
522 PHYDM_DBG(dm, ODM_COMP_INIT, "===>%s (%s)\n", __func__,
523 (dm->is_mp_chip) ? "MPChip" : "TestChip");
524 PHYDM_DBG(dm, ODM_COMP_INIT,
525 "support_platform: 0x%X, support_interface: 0x%X, board_type: 0x%X\n",
526 dm->support_platform, dm->support_interface, dm->board_type);
527
528 /* @1 AP doesn't use PHYDM power tracking table in these ICs */
529 #if (DM_ODM_SUPPORT_TYPE != ODM_AP)
530 #if RTL8821A_SUPPORT
531 if (dm->support_ic_type == ODM_RTL8821) {
532 if (dm->support_interface == ODM_ITRF_PCIE)
533 READ_AND_CONFIG_MP(8821a, _txpowertrack_pcie);
534 else if (dm->support_interface == ODM_ITRF_USB)
535 READ_AND_CONFIG_MP(8821a, _txpowertrack_usb);
536 else if (dm->support_interface == ODM_ITRF_SDIO)
537 READ_AND_CONFIG_MP(8821a, _txpowertrack_sdio);
538 }
539 #endif
540 #if RTL8812A_SUPPORT
541 if (dm->support_ic_type == ODM_RTL8812) {
542 if (dm->support_interface == ODM_ITRF_PCIE)
543 READ_AND_CONFIG_MP(8812a, _txpowertrack_pcie);
544 else if (dm->support_interface == ODM_ITRF_USB) {
545 if (dm->rfe_type == 3 && dm->is_mp_chip)
546 READ_AND_CONFIG_MP(8812a, _txpowertrack_rfe3);
547 else
548 READ_AND_CONFIG_MP(8812a, _txpowertrack_usb);
549 }
550 }
551 #endif
552 #if RTL8192E_SUPPORT
553 if (dm->support_ic_type == ODM_RTL8192E) {
554 if (dm->support_interface == ODM_ITRF_PCIE)
555 READ_AND_CONFIG_MP(8192e, _txpowertrack_pcie);
556 else if (dm->support_interface == ODM_ITRF_USB)
557 READ_AND_CONFIG_MP(8192e, _txpowertrack_usb);
558 else if (dm->support_interface == ODM_ITRF_SDIO)
559 READ_AND_CONFIG_MP(8192e, _txpowertrack_sdio);
560 }
561 #endif
562 #if RTL8723D_SUPPORT
563 if (dm->support_ic_type == ODM_RTL8723D) {
564 if (dm->support_interface == ODM_ITRF_PCIE)
565 READ_AND_CONFIG_MP(8723d, _txpowertrack_pcie);
566 else if (dm->support_interface == ODM_ITRF_USB)
567 READ_AND_CONFIG_MP(8723d, _txpowertrack_usb);
568 else if (dm->support_interface == ODM_ITRF_SDIO)
569 READ_AND_CONFIG_MP(8723d, _txpowertrack_sdio);
570
571 READ_AND_CONFIG_MP(8723d, _txxtaltrack);
572 }
573 #endif
574 /* @JJ ADD 20161014 */
575 #if RTL8710B_SUPPORT
576 if (dm->support_ic_type == ODM_RTL8710B) {
577 if (dm->package_type == 1)
578 READ_AND_CONFIG_MP(8710b, _txpowertrack_qfn48m_smic);
579 else if (dm->package_type == 5)
580 READ_AND_CONFIG_MP(8710b, _txpowertrack_qfn48m_umc);
581
582 READ_AND_CONFIG_MP(8710b, _txxtaltrack);
583 }
584 #endif
585 #if RTL8188E_SUPPORT
586 if (dm->support_ic_type == ODM_RTL8188E) {
587 if (odm_get_mac_reg(dm, R_0xf0, 0xF000) >= 8) { /*@if 0xF0[15:12] >= 8, SMIC*/
588 if (dm->support_interface == ODM_ITRF_PCIE)
589 READ_AND_CONFIG_MP(8188e, _txpowertrack_pcie_icut);
590 else if (dm->support_interface == ODM_ITRF_USB)
591 READ_AND_CONFIG_MP(8188e, _txpowertrack_usb_icut);
592 else if (dm->support_interface == ODM_ITRF_SDIO)
593 READ_AND_CONFIG_MP(8188e, _txpowertrack_sdio_icut);
594 } else { /*@else 0xF0[15:12] < 8, TSMC*/
595 if (dm->support_interface == ODM_ITRF_PCIE)
596 READ_AND_CONFIG_MP(8188e, _txpowertrack_pcie);
597 else if (dm->support_interface == ODM_ITRF_USB)
598 READ_AND_CONFIG_MP(8188e, _txpowertrack_usb);
599 else if (dm->support_interface == ODM_ITRF_SDIO)
600 READ_AND_CONFIG_MP(8188e, _txpowertrack_sdio);
601 }
602 }
603 #endif
604 #endif /* @(DM_ODM_SUPPORT_TYPE != ODM_AP) */
605 /* @1 All platforms support */
606 #if RTL8723B_SUPPORT
607 if (dm->support_ic_type == ODM_RTL8723B) {
608 if (dm->support_interface == ODM_ITRF_PCIE)
609 READ_AND_CONFIG_MP(8723b, _txpowertrack_pcie);
610 else if (dm->support_interface == ODM_ITRF_USB)
611 READ_AND_CONFIG_MP(8723b, _txpowertrack_usb);
612 else if (dm->support_interface == ODM_ITRF_SDIO)
613 READ_AND_CONFIG_MP(8723b, _txpowertrack_sdio);
614 }
615 #endif
616 #if RTL8814A_SUPPORT
617 if (dm->support_ic_type == ODM_RTL8814A) {
618 if (dm->rfe_type == 0)
619 READ_AND_CONFIG_MP(8814a, _txpowertrack_type0);
620 else if (dm->rfe_type == 2)
621 READ_AND_CONFIG_MP(8814a, _txpowertrack_type2);
622 else if (dm->rfe_type == 5)
623 READ_AND_CONFIG_MP(8814a, _txpowertrack_type5);
624 else if (dm->rfe_type == 7)
625 READ_AND_CONFIG_MP(8814a, _txpowertrack_type7);
626 else if (dm->rfe_type == 8)
627 READ_AND_CONFIG_MP(8814a, _txpowertrack_type8);
628 else
629 READ_AND_CONFIG_MP(8814a, _txpowertrack);
630
631 READ_AND_CONFIG_MP(8814a, _txpowertssi);
632 }
633 #endif
634 #if RTL8703B_SUPPORT
635 if (dm->support_ic_type == ODM_RTL8703B) {
636 if (dm->support_interface == ODM_ITRF_USB)
637 READ_AND_CONFIG_MP(8703b, _txpowertrack_usb);
638 else if (dm->support_interface == ODM_ITRF_SDIO)
639 READ_AND_CONFIG_MP(8703b, _txpowertrack_sdio);
640
641 READ_AND_CONFIG_MP(8703b, _txxtaltrack);
642 }
643 #endif
644 #if RTL8188F_SUPPORT
645 if (dm->support_ic_type == ODM_RTL8188F) {
646 if (dm->support_interface == ODM_ITRF_USB)
647 READ_AND_CONFIG_MP(8188f, _txpowertrack_usb);
648 else if (dm->support_interface == ODM_ITRF_SDIO)
649 READ_AND_CONFIG_MP(8188f, _txpowertrack_sdio);
650 }
651 #endif
652 #if RTL8822B_SUPPORT
653 if (dm->support_ic_type == ODM_RTL8822B) {
654 if (dm->rfe_type == 0)
655 READ_AND_CONFIG_MP(8822b, _txpowertrack_type0);
656 else if (dm->rfe_type == 1)
657 READ_AND_CONFIG_MP(8822b, _txpowertrack_type1);
658 else if (dm->rfe_type == 2)
659 READ_AND_CONFIG_MP(8822b, _txpowertrack_type2);
660 else if ((dm->rfe_type == 3) || (dm->rfe_type == 5))
661 READ_AND_CONFIG_MP(8822b, _txpowertrack_type3_type5);
662 else if (dm->rfe_type == 4)
663 READ_AND_CONFIG_MP(8822b, _txpowertrack_type4);
664 else if (dm->rfe_type == 6)
665 READ_AND_CONFIG_MP(8822b, _txpowertrack_type6);
666 else if (dm->rfe_type == 7)
667 READ_AND_CONFIG_MP(8822b, _txpowertrack_type7);
668 else if (dm->rfe_type == 8)
669 READ_AND_CONFIG_MP(8822b, _txpowertrack_type8);
670 else if (dm->rfe_type == 9)
671 READ_AND_CONFIG_MP(8822b, _txpowertrack_type9);
672 else if (dm->rfe_type == 10)
673 READ_AND_CONFIG_MP(8822b, _txpowertrack_type10);
674 else if (dm->rfe_type == 11)
675 READ_AND_CONFIG_MP(8822b, _txpowertrack_type11);
676 else if (dm->rfe_type == 12)
677 READ_AND_CONFIG_MP(8822b, _txpowertrack_type12);
678 else if (dm->rfe_type == 13)
679 READ_AND_CONFIG_MP(8822b, _txpowertrack_type13);
680 else if (dm->rfe_type == 14)
681 READ_AND_CONFIG_MP(8822b, _txpowertrack_type14);
682 else if (dm->rfe_type == 15)
683 READ_AND_CONFIG_MP(8822b, _txpowertrack_type15);
684 else if (dm->rfe_type == 16)
685 READ_AND_CONFIG_MP(8822b, _txpowertrack_type16);
686 else if (dm->rfe_type == 17)
687 READ_AND_CONFIG_MP(8822b, _txpowertrack_type17);
688 else if (dm->rfe_type == 18)
689 READ_AND_CONFIG_MP(8822b, _txpowertrack_type18);
690 //else if (dm->rfe_type == 19)
691 //READ_AND_CONFIG_MP(8822b, _txpowertrack_type19);
692 else
693 READ_AND_CONFIG_MP(8822b, _txpowertrack);
694 }
695 #endif
696 #if RTL8197F_SUPPORT
697 if (dm->support_ic_type == ODM_RTL8197F) {
698 if (dm->rfe_type == 0)
699 READ_AND_CONFIG_MP(8197f, _txpowertrack_type0);
700 else if (dm->rfe_type == 1)
701 READ_AND_CONFIG_MP(8197f, _txpowertrack_type1);
702 else
703 READ_AND_CONFIG_MP(8197f, _txpowertrack);
704 }
705 #endif
706 /*@jj add 20170822*/
707 #if RTL8192F_SUPPORT
708 if (dm->support_ic_type == ODM_RTL8192F) {
709 if (dm->rfe_type == 0)
710 READ_AND_CONFIG_MP(8192f, _txpowertrack_type0);
711 else if (dm->rfe_type == 1)
712 READ_AND_CONFIG_MP(8192f, _txpowertrack_type1);
713 else if (dm->rfe_type == 2)
714 READ_AND_CONFIG_MP(8192f, _txpowertrack_type2);
715 else if (dm->rfe_type == 3)
716 READ_AND_CONFIG_MP(8192f, _txpowertrack_type3);
717 else if (dm->rfe_type == 4)
718 READ_AND_CONFIG_MP(8192f, _txpowertrack_type4);
719 else if (dm->rfe_type == 5)
720 READ_AND_CONFIG_MP(8192f, _txpowertrack_type5);
721 else if (dm->rfe_type == 6)
722 READ_AND_CONFIG_MP(8192f, _txpowertrack_type6);
723 else if (dm->rfe_type == 7)
724 READ_AND_CONFIG_MP(8192f, _txpowertrack_type7);
725 else if (dm->rfe_type == 8)
726 READ_AND_CONFIG_MP(8192f, _txpowertrack_type8);
727 else if (dm->rfe_type == 9)
728 READ_AND_CONFIG_MP(8192f, _txpowertrack_type9);
729 else if (dm->rfe_type == 10)
730 READ_AND_CONFIG_MP(8192f, _txpowertrack_type10);
731 else if (dm->rfe_type == 11)
732 READ_AND_CONFIG_MP(8192f, _txpowertrack_type11);
733 else if (dm->rfe_type == 12)
734 READ_AND_CONFIG_MP(8192f, _txpowertrack_type12);
735 else if (dm->rfe_type == 13)
736 READ_AND_CONFIG_MP(8192f, _txpowertrack_type13);
737 else if (dm->rfe_type == 14)
738 READ_AND_CONFIG_MP(8192f, _txpowertrack_type14);
739 else if (dm->rfe_type == 15)
740 READ_AND_CONFIG_MP(8192f, _txpowertrack_type15);
741 else if (dm->rfe_type == 16)
742 READ_AND_CONFIG_MP(8192f, _txpowertrack_type16);
743 else if (dm->rfe_type == 17)
744 READ_AND_CONFIG_MP(8192f, _txpowertrack_type17);
745 else if (dm->rfe_type == 18)
746 READ_AND_CONFIG_MP(8192f, _txpowertrack_type18);
747 else if (dm->rfe_type == 19)
748 READ_AND_CONFIG_MP(8192f, _txpowertrack_type19);
749 else if (dm->rfe_type == 20)
750 READ_AND_CONFIG_MP(8192f, _txpowertrack_type20);
751 else if (dm->rfe_type == 21)
752 READ_AND_CONFIG_MP(8192f, _txpowertrack_type21);
753 else if (dm->rfe_type == 22)
754 READ_AND_CONFIG_MP(8192f, _txpowertrack_type22);
755 else if (dm->rfe_type == 23)
756 READ_AND_CONFIG_MP(8192f, _txpowertrack_type23);
757 else if (dm->rfe_type == 24)
758 READ_AND_CONFIG_MP(8192f, _txpowertrack_type24);
759 else if (dm->rfe_type == 25)
760 READ_AND_CONFIG_MP(8192f, _txpowertrack_type25);
761 else if (dm->rfe_type == 26)
762 READ_AND_CONFIG_MP(8192f, _txpowertrack_type26);
763 else if (dm->rfe_type == 27)
764 READ_AND_CONFIG_MP(8192f, _txpowertrack_type27);
765 else if (dm->rfe_type == 28)
766 READ_AND_CONFIG_MP(8192f, _txpowertrack_type28);
767 else if (dm->rfe_type == 29)
768 READ_AND_CONFIG_MP(8192f, _txpowertrack_type29);
769 else if (dm->rfe_type == 30)
770 READ_AND_CONFIG_MP(8192f, _txpowertrack_type30);
771 else if (dm->rfe_type == 31)
772 READ_AND_CONFIG_MP(8192f, _txpowertrack_type31);
773 else
774 READ_AND_CONFIG_MP(8192f, _txpowertrack);
775
776 READ_AND_CONFIG_MP(8192f, _txxtaltrack);
777 }
778 #endif
779
780 #if RTL8721D_SUPPORT
781 if (dm->support_ic_type == ODM_RTL8721D) {
782 #if 0
783 if (dm->package_type == 1)
784 READ_AND_CONFIG_MP(8721d, _txpowertrack_qfn48m_smic);
785 else if (dm->package_type == 5)
786 READ_AND_CONFIG_MP(8721d, _txpowertrack_qfn48m_umc);
787 #endif
788 READ_AND_CONFIG_MP(8721d, _txpowertrack);
789 READ_AND_CONFIG_MP(8721d, _txxtaltrack);
790 }
791 #endif
792
793 #if RTL8710C_SUPPORT
794 if (dm->support_ic_type == ODM_RTL8710C) {
795 #if 0
796 if (dm->package_type == 1)
797 READ_AND_CONFIG_MP(8710c, _txpowertrack_qfn48m_smic);
798 else if (dm->package_type == 5)
799 READ_AND_CONFIG_MP(8710c, _txpowertrack_qfn48m_umc);
800 #endif
801 READ_AND_CONFIG_MP(8710c, _txpowertrack);
802 READ_AND_CONFIG_MP(8710c, _txxtaltrack);
803 }
804 #endif
805
806 #if RTL8821C_SUPPORT
807 if (dm->support_ic_type == ODM_RTL8821C) {
808 if (dm->rfe_type == 0x5)
809 READ_AND_CONFIG(8821c, _txpowertrack_type0x28);
810 else if (dm->rfe_type == 0x4)
811 READ_AND_CONFIG(8821c, _txpowertrack_type0x20);
812 else
813 READ_AND_CONFIG(8821c, _txpowertrack);
814 }
815 #endif
816
817 #if RTL8198F_SUPPORT
818 if (dm->support_ic_type == ODM_RTL8198F) {
819 if (dm->rfe_type == 0)
820 READ_AND_CONFIG_MP(8198f, _txpowertrack_type0);
821 else if (dm->rfe_type == 1)
822 READ_AND_CONFIG_MP(8198f, _txpowertrack_type1);
823 else if (dm->rfe_type == 3)
824 READ_AND_CONFIG_MP(8198f, _txpowertrack_type3);
825 else
826 READ_AND_CONFIG_MP(8198f, _txpowertrack);
827 }
828 #endif
829
830 #if RTL8195B_SUPPORT
831 if (dm->support_ic_type == ODM_RTL8195B) {
832 if (dm->package_type == 1) {
833 READ_AND_CONFIG_MP(8195b, _txpowertrack_pkg1);
834 READ_AND_CONFIG_MP(8195b, _txxtaltrack_pkg1);
835 } else {
836 READ_AND_CONFIG_MP(8195b, _txpowertrack);
837 READ_AND_CONFIG_MP(8195b, _txxtaltrack);
838 }
839 }
840 #endif
841
842 #if (RTL8822C_SUPPORT)
843 if (dm->support_ic_type == ODM_RTL8822C) {
844 if (dm->en_tssi_mode)
845 READ_AND_CONFIG_MP(8822c, _txpowertracktssi);
846 else
847 READ_AND_CONFIG_MP(8822c, _txpowertrack);
848 }
849 #endif
850
851 #if (RTL8723F_SUPPORT)
852 if (dm->support_ic_type == ODM_RTL8723F) {
853 if (dm->en_tssi_mode)
854 READ_AND_CONFIG_MP(8723f, _txpowertracktssi);
855 else
856 READ_AND_CONFIG_MP(8723f, _txpowertrack);
857 READ_AND_CONFIG_MP(8723f, _txxtaltrack);
858 }
859 #endif
860 #if (RTL8812F_SUPPORT)
861 if (dm->support_ic_type == ODM_RTL8812F) {
862 if (dm->rfe_type == 0)
863 READ_AND_CONFIG_MP(8812f, _txpowertrack_type0);
864 else if (dm->rfe_type == 1)
865 READ_AND_CONFIG_MP(8812f, _txpowertrack_type1);
866 else if (dm->rfe_type == 2)
867 READ_AND_CONFIG_MP(8812f, _txpowertrack_type2);
868 else if (dm->rfe_type == 3)
869 READ_AND_CONFIG_MP(8812f, _txpowertrack_type3);
870 else if (dm->rfe_type == 4)
871 READ_AND_CONFIG_MP(8812f, _txpowertrack_type4);
872 else if (dm->rfe_type == 5)
873 READ_AND_CONFIG_MP(8812f, _txpowertrack_type5);
874 else
875 READ_AND_CONFIG_MP(8812f, _txpowertrack);
876 }
877 #endif
878
879 #if (RTL8197G_SUPPORT)
880 if (dm->support_ic_type == ODM_RTL8197G)
881 READ_AND_CONFIG_MP(8197g, _txpowertrack);
882 #endif
883
884 #if (RTL8814B_SUPPORT)
885 if (dm->support_ic_type == ODM_RTL8814B) {
886 if (dm->rfe_type == 0)
887 READ_AND_CONFIG_MP(8814b, _txpowertrack_type0);
888 else if (dm->rfe_type == 1)
889 READ_AND_CONFIG_MP(8814b, _txpowertrack_type1);
890 else if (dm->rfe_type == 2)
891 READ_AND_CONFIG_MP(8814b, _txpowertrack_type2);
892 #if 0
893 else if (dm->rfe_type == 3)
894 READ_AND_CONFIG_MP(8814b, _txpowertrack_type3);
895 else if (dm->rfe_type == 6)
896 READ_AND_CONFIG_MP(8814b, _txpowertrack_type6);
897 #endif
898 else
899 READ_AND_CONFIG_MP(8814b, _txpowertrack);
900 }
901 #endif
902 #if (RTL8814C_SUPPORT)
903 if (dm->support_ic_type == ODM_RTL8814C) {
904 if (dm->rfe_type == 0)
905 READ_AND_CONFIG_MP(8814c, _txpowertrack_type0);
906 else if (dm->rfe_type == 1)
907 READ_AND_CONFIG_MP(8814c, _txpowertrack_type1);
908 else if (dm->rfe_type == 2)
909 READ_AND_CONFIG_MP(8814c, _txpowertrack_type2);
910 else
911 READ_AND_CONFIG_MP(8814c, _txpowertrack);
912 }
913 #endif
914
915 return HAL_STATUS_SUCCESS;
916 }
917
918 enum hal_status
odm_config_bb_with_header_file(struct dm_struct * dm,enum odm_bb_config_type config_type)919 odm_config_bb_with_header_file(struct dm_struct *dm,
920 enum odm_bb_config_type config_type)
921 {
922 #if (DM_ODM_SUPPORT_TYPE & ODM_WIN)
923 void *adapter = dm->adapter;
924 PMGNT_INFO mgnt_info = &((PADAPTER)adapter)->MgntInfo;
925 #endif
926 enum hal_status result = HAL_STATUS_SUCCESS;
927
928 /* @1 AP doesn't use PHYDM initialization in these ICs */
929 #if (DM_ODM_SUPPORT_TYPE != ODM_AP)
930 #if (RTL8812A_SUPPORT == 1)
931 if (dm->support_ic_type == ODM_RTL8812) {
932 if (config_type == CONFIG_BB_PHY_REG)
933 READ_AND_CONFIG_MP(8812a, _phy_reg);
934 else if (config_type == CONFIG_BB_AGC_TAB)
935 READ_AND_CONFIG_MP(8812a, _agc_tab);
936 else if (config_type == CONFIG_BB_PHY_REG_PG) {
937 if (dm->rfe_type == 3 && dm->is_mp_chip)
938 READ_AND_CONFIG_MP(8812a, _phy_reg_pg_asus);
939 #if (DM_ODM_SUPPORT_TYPE & ODM_WIN)
940 else if (mgnt_info->CustomerID == RT_CID_WNC_NEC && dm->is_mp_chip)
941 READ_AND_CONFIG_MP(8812a, _phy_reg_pg_nec);
942 #if RT_PLATFORM == PLATFORM_MACOSX
943 /*@{1827}{1024} for BUFFALO power by rate table. Isaiah 2013-11-29*/
944 else if (mgnt_info->CustomerID == RT_CID_DNI_BUFFALO)
945 READ_AND_CONFIG_MP(8812a, _phy_reg_pg_dni);
946 /* TP-Link T4UH, Isaiah 2015-03-16*/
947 else if (mgnt_info->CustomerID == RT_CID_TPLINK_HPWR) {
948 pr_debug("RT_CID_TPLINK_HPWR:: _PHY_REG_PG_TPLINK\n");
949 READ_AND_CONFIG_MP(8812a, _phy_reg_pg_tplink);
950 }
951 #endif
952 #endif
953 else
954 READ_AND_CONFIG_MP(8812a, _phy_reg_pg);
955 } else if (config_type == CONFIG_BB_PHY_REG_MP)
956 READ_AND_CONFIG_MP(8812a, _phy_reg_mp);
957 else if (config_type == CONFIG_BB_AGC_TAB_DIFF) {
958 dm->fw_offload_ability &= ~PHYDM_PHY_PARAM_OFFLOAD;
959 /*@AGC_TAB DIFF dont support FW offload*/
960 if ((*dm->channel >= 36) && (*dm->channel <= 64))
961 AGC_DIFF_CONFIG_MP(8812a, lb);
962 else if (*dm->channel >= 100)
963 AGC_DIFF_CONFIG_MP(8812a, hb);
964 }
965 }
966 #endif
967 #if (RTL8821A_SUPPORT == 1)
968 if (dm->support_ic_type == ODM_RTL8821) {
969 if (config_type == CONFIG_BB_PHY_REG)
970 READ_AND_CONFIG_MP(8821a, _phy_reg);
971 else if (config_type == CONFIG_BB_AGC_TAB)
972 READ_AND_CONFIG_MP(8821a, _agc_tab);
973 else if (config_type == CONFIG_BB_PHY_REG_PG) {
974 #if (DM_ODM_SUPPORT_TYPE & ODM_WIN)
975 #if (DEV_BUS_TYPE == RT_PCI_INTERFACE)
976 HAL_DATA_TYPE * hal_data = GET_HAL_DATA(((PADAPTER)adapter));
977
978 if ((hal_data->EEPROMSVID == 0x1043 && hal_data->EEPROMSMID == 0x207F))
979 READ_AND_CONFIG_MP(8821a, _phy_reg_pg_e202_sa);
980 else
981 #endif
982 #if (RT_PLATFORM == PLATFORM_MACOSX)
983 /*@ for BUFFALO pwr by rate table */
984 if (mgnt_info->CustomerID == RT_CID_DNI_BUFFALO) {
985 /*@ for BUFFALO pwr by rate table (JP/US)*/
986 if (mgnt_info->ChannelPlan == RT_CHANNEL_DOMAIN_US_2G_CANADA_5G)
987 READ_AND_CONFIG_MP(8821a, _phy_reg_pg_dni_us);
988 else
989 READ_AND_CONFIG_MP(8821a, _phy_reg_pg_dni_jp);
990 } else
991 #endif
992 #endif
993 READ_AND_CONFIG_MP(8821a, _phy_reg_pg);
994 }
995 }
996 #endif
997 #if (RTL8192E_SUPPORT == 1)
998 if (dm->support_ic_type == ODM_RTL8192E) {
999 if (config_type == CONFIG_BB_PHY_REG)
1000 READ_AND_CONFIG_MP(8192e, _phy_reg);
1001 else if (config_type == CONFIG_BB_AGC_TAB)
1002 READ_AND_CONFIG_MP(8192e, _agc_tab);
1003 else if (config_type == CONFIG_BB_PHY_REG_PG)
1004 READ_AND_CONFIG_MP(8192e, _phy_reg_pg);
1005 }
1006 #endif
1007 #if (RTL8723D_SUPPORT == 1)
1008 if (dm->support_ic_type == ODM_RTL8723D) {
1009 if (config_type == CONFIG_BB_PHY_REG)
1010 READ_AND_CONFIG_MP(8723d, _phy_reg);
1011 else if (config_type == CONFIG_BB_AGC_TAB)
1012 READ_AND_CONFIG_MP(8723d, _agc_tab);
1013 else if (config_type == CONFIG_BB_PHY_REG_PG)
1014 READ_AND_CONFIG_MP(8723d, _phy_reg_pg);
1015 }
1016 #endif
1017 /* @JJ ADD 20161014 */
1018 #if (RTL8710B_SUPPORT == 1)
1019 if (dm->support_ic_type == ODM_RTL8710B) {
1020 if (config_type == CONFIG_BB_PHY_REG)
1021 READ_AND_CONFIG_MP(8710b, _phy_reg);
1022 else if (config_type == CONFIG_BB_AGC_TAB)
1023 READ_AND_CONFIG_MP(8710b, _agc_tab);
1024 else if (config_type == CONFIG_BB_PHY_REG_PG)
1025 READ_AND_CONFIG_MP(8710b, _phy_reg_pg);
1026 }
1027 #endif
1028
1029 #endif /* @(DM_ODM_SUPPORT_TYPE != ODM_AP) */
1030 /* @1 All platforms support */
1031 #if (RTL8188E_SUPPORT == 1)
1032 if (dm->support_ic_type == ODM_RTL8188E) {
1033 if (config_type == CONFIG_BB_PHY_REG)
1034 READ_AND_CONFIG_MP(8188e, _phy_reg);
1035 else if (config_type == CONFIG_BB_AGC_TAB)
1036 READ_AND_CONFIG_MP(8188e, _agc_tab);
1037 else if (config_type == CONFIG_BB_PHY_REG_PG)
1038 READ_AND_CONFIG_MP(8188e, _phy_reg_pg);
1039 }
1040 #endif
1041 #if (RTL8723B_SUPPORT == 1)
1042 if (dm->support_ic_type == ODM_RTL8723B) {
1043 if (config_type == CONFIG_BB_PHY_REG)
1044 READ_AND_CONFIG_MP(8723b, _phy_reg);
1045 else if (config_type == CONFIG_BB_AGC_TAB)
1046 READ_AND_CONFIG_MP(8723b, _agc_tab);
1047 else if (config_type == CONFIG_BB_PHY_REG_PG)
1048 READ_AND_CONFIG_MP(8723b, _phy_reg_pg);
1049 }
1050 #endif
1051 #if (RTL8814A_SUPPORT == 1)
1052 if (dm->support_ic_type == ODM_RTL8814A) {
1053 if (config_type == CONFIG_BB_PHY_REG)
1054 READ_AND_CONFIG_MP(8814a, _phy_reg);
1055 else if (config_type == CONFIG_BB_AGC_TAB)
1056 READ_AND_CONFIG_MP(8814a, _agc_tab);
1057 else if (config_type == CONFIG_BB_PHY_REG_PG) {
1058 if (dm->rfe_type == 0)
1059 READ_AND_CONFIG_MP(8814a, _phy_reg_pg_type0);
1060 else if (dm->rfe_type == 2)
1061 READ_AND_CONFIG_MP(8814a, _phy_reg_pg_type2);
1062 else if (dm->rfe_type == 3)
1063 READ_AND_CONFIG_MP(8814a, _phy_reg_pg_type3);
1064 else if (dm->rfe_type == 4)
1065 READ_AND_CONFIG_MP(8814a, _phy_reg_pg_type4);
1066 else if (dm->rfe_type == 5)
1067 READ_AND_CONFIG_MP(8814a, _phy_reg_pg_type5);
1068 else if (dm->rfe_type == 7)
1069 READ_AND_CONFIG_MP(8814a, _phy_reg_pg_type7);
1070 else if (dm->rfe_type == 8)
1071 READ_AND_CONFIG_MP(8814a, _phy_reg_pg_type8);
1072 else
1073 READ_AND_CONFIG_MP(8814a, _phy_reg_pg);
1074 } else if (config_type == CONFIG_BB_PHY_REG_MP)
1075 READ_AND_CONFIG_MP(8814a, _phy_reg_mp);
1076 }
1077 #endif
1078 #if (RTL8703B_SUPPORT == 1)
1079 if (dm->support_ic_type == ODM_RTL8703B) {
1080 if (config_type == CONFIG_BB_PHY_REG)
1081 READ_AND_CONFIG_MP(8703b, _phy_reg);
1082 else if (config_type == CONFIG_BB_AGC_TAB)
1083 READ_AND_CONFIG_MP(8703b, _agc_tab);
1084 else if (config_type == CONFIG_BB_PHY_REG_PG)
1085 READ_AND_CONFIG_MP(8703b, _phy_reg_pg);
1086 }
1087 #endif
1088 #if (RTL8188F_SUPPORT == 1)
1089 if (dm->support_ic_type == ODM_RTL8188F) {
1090 if (config_type == CONFIG_BB_PHY_REG)
1091 READ_AND_CONFIG_MP(8188f, _phy_reg);
1092 else if (config_type == CONFIG_BB_AGC_TAB)
1093 READ_AND_CONFIG_MP(8188f, _agc_tab);
1094 else if (config_type == CONFIG_BB_PHY_REG_PG)
1095 READ_AND_CONFIG_MP(8188f, _phy_reg_pg);
1096 }
1097 #endif
1098 #if (RTL8822B_SUPPORT == 1)
1099 if (dm->support_ic_type == ODM_RTL8822B) {
1100 if (config_type == CONFIG_BB_PHY_REG) {
1101 READ_AND_CONFIG_MP(8822b, _phy_reg);
1102 } else if (config_type == CONFIG_BB_AGC_TAB) {
1103 READ_AND_CONFIG_MP(8822b, _agc_tab);
1104 } else if (config_type == CONFIG_BB_PHY_REG_PG) {
1105 if (dm->rfe_type == 2)
1106 READ_AND_CONFIG_MP(8822b, _phy_reg_pg_type2);
1107 else if (dm->rfe_type == 3)
1108 READ_AND_CONFIG_MP(8822b, _phy_reg_pg_type3);
1109 else if (dm->rfe_type == 4)
1110 READ_AND_CONFIG_MP(8822b, _phy_reg_pg_type4);
1111 else if (dm->rfe_type == 5)
1112 READ_AND_CONFIG_MP(8822b, _phy_reg_pg_type5);
1113 else if (dm->rfe_type == 12)
1114 READ_AND_CONFIG_MP(8822b, _phy_reg_pg_type12);
1115 else if (dm->rfe_type == 15)
1116 READ_AND_CONFIG_MP(8822b, _phy_reg_pg_type15);
1117 else if (dm->rfe_type == 16)
1118 READ_AND_CONFIG_MP(8822b, _phy_reg_pg_type16);
1119 else if (dm->rfe_type == 17)
1120 READ_AND_CONFIG_MP(8822b, _phy_reg_pg_type17);
1121 else if (dm->rfe_type == 18)
1122 READ_AND_CONFIG_MP(8822b, _phy_reg_pg_type18);
1123 //else if (dm->rfe_type == 19)
1124 //READ_AND_CONFIG_MP(8822b, _phy_reg_pg_type19);
1125 else
1126 READ_AND_CONFIG_MP(8822b, _phy_reg_pg);
1127 }
1128 }
1129 #endif
1130
1131 #if (RTL8197F_SUPPORT == 1)
1132 if (dm->support_ic_type == ODM_RTL8197F) {
1133 if (config_type == CONFIG_BB_PHY_REG) {
1134 READ_AND_CONFIG_MP(8197f, _phy_reg);
1135 if (dm->cut_version == ODM_CUT_A)
1136 phydm_phypara_a_cut(dm);
1137 } else if (config_type == CONFIG_BB_AGC_TAB)
1138 READ_AND_CONFIG_MP(8197f, _agc_tab);
1139 }
1140 #endif
1141 /*@jj add 20170822*/
1142 #if (RTL8192F_SUPPORT == 1)
1143 if (dm->support_ic_type == ODM_RTL8192F) {
1144 if (config_type == CONFIG_BB_PHY_REG) {
1145 READ_AND_CONFIG_MP(8192f, _phy_reg);
1146 } else if (config_type == CONFIG_BB_AGC_TAB) {
1147 READ_AND_CONFIG_MP(8192f, _agc_tab);
1148 } else if (config_type == CONFIG_BB_PHY_REG_PG) {
1149 if (dm->rfe_type == 0)
1150 READ_AND_CONFIG_MP(8192f, _phy_reg_pg_type0);
1151 else if (dm->rfe_type == 1)
1152 READ_AND_CONFIG_MP(8192f, _phy_reg_pg_type1);
1153 else if (dm->rfe_type == 2)
1154 READ_AND_CONFIG_MP(8192f, _phy_reg_pg_type2);
1155 else if (dm->rfe_type == 3)
1156 READ_AND_CONFIG_MP(8192f, _phy_reg_pg_type3);
1157 else if (dm->rfe_type == 4)
1158 READ_AND_CONFIG_MP(8192f, _phy_reg_pg_type4);
1159 else if (dm->rfe_type == 5)
1160 READ_AND_CONFIG_MP(8192f, _phy_reg_pg_type5);
1161 else if (dm->rfe_type == 6)
1162 READ_AND_CONFIG_MP(8192f, _phy_reg_pg_type6);
1163 else if (dm->rfe_type == 7)
1164 READ_AND_CONFIG_MP(8192f, _phy_reg_pg_type7);
1165 else if (dm->rfe_type == 8)
1166 READ_AND_CONFIG_MP(8192f, _phy_reg_pg_type8);
1167 else if (dm->rfe_type == 9)
1168 READ_AND_CONFIG_MP(8192f, _phy_reg_pg_type9);
1169 else if (dm->rfe_type == 10)
1170 READ_AND_CONFIG_MP(8192f, _phy_reg_pg_type10);
1171 else if (dm->rfe_type == 11)
1172 READ_AND_CONFIG_MP(8192f, _phy_reg_pg_type11);
1173 else if (dm->rfe_type == 12)
1174 READ_AND_CONFIG_MP(8192f, _phy_reg_pg_type12);
1175 else if (dm->rfe_type == 13)
1176 READ_AND_CONFIG_MP(8192f, _phy_reg_pg_type13);
1177 else if (dm->rfe_type == 14)
1178 READ_AND_CONFIG_MP(8192f, _phy_reg_pg_type14);
1179 else if (dm->rfe_type == 15)
1180 READ_AND_CONFIG_MP(8192f, _phy_reg_pg_type15);
1181 else if (dm->rfe_type == 16)
1182 READ_AND_CONFIG_MP(8192f, _phy_reg_pg_type16);
1183 else if (dm->rfe_type == 17)
1184 READ_AND_CONFIG_MP(8192f, _phy_reg_pg_type17);
1185 else if (dm->rfe_type == 18)
1186 READ_AND_CONFIG_MP(8192f, _phy_reg_pg_type18);
1187 else if (dm->rfe_type == 19)
1188 READ_AND_CONFIG_MP(8192f, _phy_reg_pg_type19);
1189 else if (dm->rfe_type == 20)
1190 READ_AND_CONFIG_MP(8192f, _phy_reg_pg_type20);
1191 else if (dm->rfe_type == 21)
1192 READ_AND_CONFIG_MP(8192f, _phy_reg_pg_type21);
1193 else if (dm->rfe_type == 22)
1194 READ_AND_CONFIG_MP(8192f, _phy_reg_pg_type22);
1195 else if (dm->rfe_type == 23)
1196 READ_AND_CONFIG_MP(8192f, _phy_reg_pg_type23);
1197 else if (dm->rfe_type == 24)
1198 READ_AND_CONFIG_MP(8192f, _phy_reg_pg_type24);
1199 else if (dm->rfe_type == 25)
1200 READ_AND_CONFIG_MP(8192f, _phy_reg_pg_type25);
1201 else if (dm->rfe_type == 26)
1202 READ_AND_CONFIG_MP(8192f, _phy_reg_pg_type26);
1203 else if (dm->rfe_type == 27)
1204 READ_AND_CONFIG_MP(8192f, _phy_reg_pg_type27);
1205 else if (dm->rfe_type == 28)
1206 READ_AND_CONFIG_MP(8192f, _phy_reg_pg_type28);
1207 else if (dm->rfe_type == 29)
1208 READ_AND_CONFIG_MP(8192f, _phy_reg_pg_type29);
1209 else if (dm->rfe_type == 30)
1210 READ_AND_CONFIG_MP(8192f, _phy_reg_pg_type30);
1211 else if (dm->rfe_type == 31)
1212 READ_AND_CONFIG_MP(8192f, _phy_reg_pg_type31);
1213 else
1214 READ_AND_CONFIG_MP(8192f, _phy_reg_pg);
1215 }
1216 }
1217 #endif
1218 #if (RTL8721D_SUPPORT == 1)
1219 if (dm->support_ic_type == ODM_RTL8721D) {
1220 if (config_type == CONFIG_BB_PHY_REG)
1221 READ_AND_CONFIG_MP(8721d, _phy_reg);
1222 else if (config_type == CONFIG_BB_AGC_TAB)
1223 READ_AND_CONFIG_MP(8721d, _agc_tab);
1224 else if (config_type == CONFIG_BB_PHY_REG_PG) {
1225 if (dm->power_voltage == ODM_POWER_18V)
1226 READ_AND_CONFIG_MP(8721d, _phy_reg_pg_type0);
1227 else
1228 READ_AND_CONFIG_MP(8721d, _phy_reg_pg_type1);
1229 }
1230 }
1231 #endif
1232
1233 #if (RTL8710C_SUPPORT == 1)
1234 if (dm->support_ic_type == ODM_RTL8710C) {
1235 if (config_type == CONFIG_BB_PHY_REG)
1236 READ_AND_CONFIG_MP(8710c, _phy_reg);
1237 else if (config_type == CONFIG_BB_AGC_TAB)
1238 READ_AND_CONFIG_MP(8710c, _agc_tab);
1239 else if (config_type == CONFIG_BB_PHY_REG_PG)
1240 READ_AND_CONFIG_MP(8710c, _phy_reg_pg);
1241 }
1242 #endif
1243
1244 #if (RTL8821C_SUPPORT == 1)
1245 if (dm->support_ic_type == ODM_RTL8821C) {
1246 if (config_type == CONFIG_BB_PHY_REG) {
1247 READ_AND_CONFIG(8821c, _phy_reg);
1248 } else if (config_type == CONFIG_BB_AGC_TAB) {
1249 READ_AND_CONFIG(8821c, _agc_tab);
1250 /* @According to RFEtype, choosing correct AGC table*/
1251 if (dm->default_rf_set_8821c == SWITCH_TO_BTG)
1252 AGC_DIFF_CONFIG_MP(8821c, btg);
1253 } else if (config_type == CONFIG_BB_PHY_REG_PG) {
1254 if (dm->rfe_type == 0x5)
1255 READ_AND_CONFIG(8821c, _phy_reg_pg_type0x28);
1256 else
1257 READ_AND_CONFIG(8821c, _phy_reg_pg);
1258 } else if (config_type == CONFIG_BB_AGC_TAB_DIFF) {
1259 dm->fw_offload_ability &= ~PHYDM_PHY_PARAM_OFFLOAD;
1260 /*@AGC_TAB DIFF dont support FW offload*/
1261 if (dm->current_rf_set_8821c == SWITCH_TO_BTG)
1262 AGC_DIFF_CONFIG_MP(8821c, btg);
1263 else if (dm->current_rf_set_8821c == SWITCH_TO_WLG)
1264 AGC_DIFF_CONFIG_MP(8821c, wlg);
1265 } else if (config_type == CONFIG_BB_PHY_REG_MP) {
1266 READ_AND_CONFIG(8821c, _phy_reg_mp);
1267 }
1268 }
1269 #endif
1270
1271 #if (RTL8195A_SUPPORT == 1)
1272 if (dm->support_ic_type == ODM_RTL8195A) {
1273 if (config_type == CONFIG_BB_PHY_REG)
1274 READ_AND_CONFIG(8195a, _phy_reg);
1275 else if (config_type == CONFIG_BB_AGC_TAB)
1276 READ_AND_CONFIG(8195a, _agc_tab);
1277 else if (config_type == CONFIG_BB_PHY_REG_PG)
1278 READ_AND_CONFIG(8195a, _phy_reg_pg);
1279 }
1280 #endif
1281 #if (RTL8195B_SUPPORT == 1)
1282 if (dm->support_ic_type == ODM_RTL8195B) {
1283 if (config_type == CONFIG_BB_PHY_REG) {
1284 READ_AND_CONFIG(8195b, _phy_reg);
1285 } else if (config_type == CONFIG_BB_AGC_TAB) {
1286 READ_AND_CONFIG(8195b, _agc_tab);
1287 } else if (config_type == CONFIG_BB_PHY_REG_PG) {
1288 READ_AND_CONFIG(8195b, _phy_reg_pg);
1289 } else if (config_type == CONFIG_BB_PHY_REG_MP) {
1290 if (dm->package_type == 1)
1291 odm_set_bb_reg(dm, R_0xaa8, 0x1f0000, 0x10);
1292 else
1293 odm_set_bb_reg(dm, R_0xaa8, 0x1f0000, 0x12);
1294 }
1295 }
1296 #endif
1297 #if (RTL8198F_SUPPORT == 1)
1298 if (dm->support_ic_type == ODM_RTL8198F) {
1299 if (config_type == CONFIG_BB_PHY_REG)
1300 READ_AND_CONFIG_MP(8198f, _phy_reg);
1301 else if (config_type == CONFIG_BB_AGC_TAB)
1302 READ_AND_CONFIG_MP(8198f, _agc_tab);
1303 }
1304 #endif
1305 #if (RTL8814B_SUPPORT == 1)
1306 if (dm->support_ic_type == ODM_RTL8814B) {
1307 if (config_type == CONFIG_BB_PHY_REG)
1308 READ_AND_CONFIG_MP(8814b, _phy_reg);
1309 else if (config_type == CONFIG_BB_AGC_TAB)
1310 READ_AND_CONFIG_MP(8814b, _agc_tab);
1311 else if (config_type == CONFIG_BB_PHY_REG_PG) {
1312 if (dm->rfe_type == 1)
1313 READ_AND_CONFIG(8814b, _phy_reg_pg_type1);
1314 else
1315 READ_AND_CONFIG(8814b, _phy_reg_pg);
1316 }
1317 }
1318 #endif
1319 #if (RTL8814C_SUPPORT == 1)
1320 if (dm->support_ic_type == ODM_RTL8814C) {
1321 if (config_type == CONFIG_BB_PHY_REG)
1322 READ_AND_CONFIG_MP(8814c, _phy_reg);
1323 else if (config_type == CONFIG_BB_AGC_TAB)
1324 READ_AND_CONFIG_MP(8814c, _agc_tab);
1325 else if (config_type == CONFIG_BB_PHY_REG_PG) {
1326 if (dm->rfe_type == 1)
1327 READ_AND_CONFIG(8814c, _phy_reg_pg_type1);
1328 else
1329 READ_AND_CONFIG(8814c, _phy_reg_pg);
1330 }
1331 }
1332 #endif
1333 #if (RTL8822C_SUPPORT)
1334 if (dm->support_ic_type == ODM_RTL8822C) {
1335 if (config_type == CONFIG_BB_PHY_REG)
1336 READ_AND_CONFIG_MP(8822c, _phy_reg);
1337 else if (config_type == CONFIG_BB_AGC_TAB)
1338 READ_AND_CONFIG_MP(8822c, _agc_tab);
1339 else if (config_type == CONFIG_BB_PHY_REG_PG)
1340 READ_AND_CONFIG(8822c, _phy_reg_pg);
1341 }
1342 #endif
1343 #if (RTL8723F_SUPPORT)
1344 if (dm->support_ic_type == ODM_RTL8723F) {
1345 if (config_type == CONFIG_BB_PHY_REG)
1346 READ_AND_CONFIG_MP(8723f, _phy_reg);
1347 else if (config_type == CONFIG_BB_AGC_TAB)
1348 READ_AND_CONFIG_MP(8723f, _agc_tab);
1349 else if (config_type == CONFIG_BB_PHY_REG_PG)
1350 READ_AND_CONFIG(8723f, _phy_reg_pg);
1351 }
1352 #endif
1353 #if (RTL8812F_SUPPORT)
1354 if (dm->support_ic_type == ODM_RTL8812F) {
1355 if (config_type == CONFIG_BB_PHY_REG)
1356 READ_AND_CONFIG_MP(8812f, _phy_reg);
1357 else if (config_type == CONFIG_BB_AGC_TAB)
1358 READ_AND_CONFIG_MP(8812f, _agc_tab);
1359 else if (config_type == CONFIG_BB_PHY_REG_PG)
1360 READ_AND_CONFIG(8812f, _phy_reg_pg);
1361 }
1362 #endif
1363 #if (RTL8197G_SUPPORT)
1364 if (dm->support_ic_type == ODM_RTL8197G) {
1365 if (config_type == CONFIG_BB_PHY_REG)
1366 READ_AND_CONFIG_MP(8197g, _phy_reg);
1367 else if (config_type == CONFIG_BB_AGC_TAB)
1368 READ_AND_CONFIG_MP(8197g, _agc_tab);
1369 else if (config_type == CONFIG_BB_PHY_REG_PG)
1370 READ_AND_CONFIG(8197g, _phy_reg_pg);
1371 }
1372 #endif
1373
1374 if (config_type == CONFIG_BB_PHY_REG ||
1375 config_type == CONFIG_BB_AGC_TAB)
1376 if (dm->fw_offload_ability & PHYDM_PHY_PARAM_OFFLOAD) {
1377 result = phydm_set_reg_by_fw(dm,
1378 PHYDM_HALMAC_CMD_END,
1379 0,
1380 0,
1381 0,
1382 (enum rf_path)0,
1383 0);
1384 PHYDM_DBG(dm, ODM_COMP_INIT,
1385 "phy param offload end!result = %d", result);
1386 }
1387
1388 return result;
1389 }
1390
1391 enum hal_status
odm_config_mac_with_header_file(struct dm_struct * dm)1392 odm_config_mac_with_header_file(struct dm_struct *dm)
1393 {
1394 enum hal_status result = HAL_STATUS_SUCCESS;
1395
1396 PHYDM_DBG(dm, ODM_COMP_INIT, "===>%s (%s)\n", __func__,
1397 (dm->is_mp_chip) ? "MPChip" : "TestChip");
1398 PHYDM_DBG(dm, ODM_COMP_INIT,
1399 "support_platform: 0x%X, support_interface: 0x%X, board_type: 0x%X\n",
1400 dm->support_platform, dm->support_interface, dm->board_type);
1401
1402 #ifdef PHYDM_IC_HALMAC_PARAM_SUPPORT
1403 if (dm->support_ic_type & PHYDM_IC_SUPPORT_HALMAC_PARAM_OFFLOAD) {
1404 PHYDM_DBG(dm, ODM_COMP_INIT, "MAC para-package in HALMAC\n");
1405 return result;
1406 }
1407 #endif
1408
1409 /* @1 AP doesn't use PHYDM initialization in these ICs */
1410 #if (DM_ODM_SUPPORT_TYPE != ODM_AP)
1411 #if (RTL8812A_SUPPORT == 1)
1412 if (dm->support_ic_type == ODM_RTL8812)
1413 READ_AND_CONFIG_MP(8812a, _mac_reg);
1414 #endif
1415 #if (RTL8821A_SUPPORT == 1)
1416 if (dm->support_ic_type == ODM_RTL8821)
1417 READ_AND_CONFIG_MP(8821a, _mac_reg);
1418 #endif
1419 #if (RTL8192E_SUPPORT == 1)
1420 if (dm->support_ic_type == ODM_RTL8192E)
1421 READ_AND_CONFIG_MP(8192e, _mac_reg);
1422 #endif
1423 #if (RTL8723D_SUPPORT == 1)
1424 if (dm->support_ic_type == ODM_RTL8723D)
1425 READ_AND_CONFIG_MP(8723d, _mac_reg);
1426 #endif
1427 #if (RTL8710B_SUPPORT == 1)
1428 if (dm->support_ic_type == ODM_RTL8710B)
1429 READ_AND_CONFIG_MP(8710b, _mac_reg);
1430 #endif
1431 #endif /* @(DM_ODM_SUPPORT_TYPE != ODM_AP) */
1432
1433 /* @1 All platforms support */
1434 #if (RTL8188E_SUPPORT == 1)
1435 if (dm->support_ic_type == ODM_RTL8188E)
1436 READ_AND_CONFIG_MP(8188e, _mac_reg);
1437 #endif
1438 #if (RTL8723B_SUPPORT == 1)
1439 if (dm->support_ic_type == ODM_RTL8723B)
1440 READ_AND_CONFIG_MP(8723b, _mac_reg);
1441 #endif
1442 #if (RTL8814A_SUPPORT == 1)
1443 if (dm->support_ic_type == ODM_RTL8814A)
1444 READ_AND_CONFIG_MP(8814a, _mac_reg);
1445 #endif
1446 #if (RTL8703B_SUPPORT == 1)
1447 if (dm->support_ic_type == ODM_RTL8703B)
1448 READ_AND_CONFIG_MP(8703b, _mac_reg);
1449 #endif
1450 #if (RTL8188F_SUPPORT == 1)
1451 if (dm->support_ic_type == ODM_RTL8188F)
1452 READ_AND_CONFIG_MP(8188f, _mac_reg);
1453 #endif
1454 #if (RTL8822B_SUPPORT == 1)
1455 if (dm->support_ic_type == ODM_RTL8822B)
1456 READ_AND_CONFIG_MP(8822b, _mac_reg);
1457 #endif
1458 #if (RTL8197F_SUPPORT == 1)
1459 if (dm->support_ic_type == ODM_RTL8197F)
1460 READ_AND_CONFIG_MP(8197f, _mac_reg);
1461 #endif
1462 #if (RTL8192F_SUPPORT == 1)
1463 if (dm->support_ic_type == ODM_RTL8192F)
1464 READ_AND_CONFIG_MP(8192f, _mac_reg);
1465 #endif
1466 #if (RTL8721D_SUPPORT == 1)
1467 if (dm->support_ic_type == ODM_RTL8721D)
1468 READ_AND_CONFIG_MP(8721d, _mac_reg);
1469 #endif
1470
1471 #if (RTL8710C_SUPPORT == 1)
1472 if (dm->support_ic_type == ODM_RTL8710C)
1473 READ_AND_CONFIG_MP(8710c, _mac_reg);
1474 #endif
1475
1476 #if (RTL8821C_SUPPORT == 1)
1477 if (dm->support_ic_type == ODM_RTL8821C)
1478 READ_AND_CONFIG(8821c, _mac_reg);
1479 #endif
1480 #if (RTL8195A_SUPPORT == 1)
1481 if (dm->support_ic_type == ODM_RTL8195A)
1482 READ_AND_CONFIG_MP(8195a, _mac_reg);
1483 #endif
1484 #if (RTL8195B_SUPPORT == 1)
1485 if (dm->support_ic_type == ODM_RTL8195B)
1486 READ_AND_CONFIG_MP(8195b, _mac_reg);
1487 #endif
1488 #if (RTL8198F_SUPPORT == 1)
1489 if (dm->support_ic_type == ODM_RTL8198F)
1490 READ_AND_CONFIG_MP(8198f, _mac_reg);
1491 #endif
1492 #if (RTL8197G_SUPPORT == 1)
1493 if (dm->support_ic_type == ODM_RTL8197G)
1494 READ_AND_CONFIG_MP(8197g, _mac_reg);
1495 #endif
1496
1497 if (dm->fw_offload_ability & PHYDM_PHY_PARAM_OFFLOAD) {
1498 result = phydm_set_reg_by_fw(dm,
1499 PHYDM_HALMAC_CMD_END,
1500 0,
1501 0,
1502 0,
1503 (enum rf_path)0,
1504 0);
1505 PHYDM_DBG(dm, ODM_COMP_INIT,
1506 "mac param offload end!result = %d", result);
1507 }
1508
1509 return result;
1510 }
1511
odm_get_hw_img_version(struct dm_struct * dm)1512 u32 odm_get_hw_img_version(struct dm_struct *dm)
1513 {
1514 u32 version = 0;
1515
1516 switch (dm->support_ic_type) {
1517 /* @1 AP doesn't use PHYDM initialization in these ICs */
1518 #if (DM_ODM_SUPPORT_TYPE != ODM_AP)
1519 #if (RTL8821A_SUPPORT)
1520 case ODM_RTL8821:
1521 version = odm_get_version_mp_8821a_phy_reg();
1522 break;
1523 #endif
1524 #if (RTL8192E_SUPPORT)
1525 case ODM_RTL8192E:
1526 version = odm_get_version_mp_8192e_phy_reg();
1527 break;
1528 #endif
1529 #if (RTL8812A_SUPPORT)
1530 case ODM_RTL8812:
1531 version = odm_get_version_mp_8812a_phy_reg();
1532 break;
1533 #endif
1534 #endif /* @(DM_ODM_SUPPORT_TYPE != ODM_AP) */
1535 #if (RTL8723D_SUPPORT)
1536 case ODM_RTL8723D:
1537 version = odm_get_version_mp_8723d_phy_reg();
1538 break;
1539 #endif
1540 #if (RTL8710B_SUPPORT)
1541 case ODM_RTL8710B:
1542 version = odm_get_version_mp_8710b_phy_reg();
1543 break;
1544 #endif
1545 #if (RTL8188E_SUPPORT)
1546 case ODM_RTL8188E:
1547 version = odm_get_version_mp_8188e_phy_reg();
1548 break;
1549 #endif
1550 #if (RTL8723B_SUPPORT)
1551 case ODM_RTL8723B:
1552 version = odm_get_version_mp_8723b_phy_reg();
1553 break;
1554 #endif
1555 #if (RTL8814A_SUPPORT)
1556 case ODM_RTL8814A:
1557 version = odm_get_version_mp_8814a_phy_reg();
1558 break;
1559 #endif
1560 #if (RTL8703B_SUPPORT)
1561 case ODM_RTL8703B:
1562 version = odm_get_version_mp_8703b_phy_reg();
1563 break;
1564 #endif
1565 #if (RTL8188F_SUPPORT)
1566 case ODM_RTL8188F:
1567 version = odm_get_version_mp_8188f_phy_reg();
1568 break;
1569 #endif
1570 #if (RTL8822B_SUPPORT)
1571 case ODM_RTL8822B:
1572 version = odm_get_version_mp_8822b_phy_reg();
1573 break;
1574 #endif
1575 #if (RTL8197F_SUPPORT)
1576 case ODM_RTL8197F:
1577 version = odm_get_version_mp_8197f_phy_reg();
1578 break;
1579 #endif
1580
1581 #if (RTL8192F_SUPPORT)
1582 case ODM_RTL8192F:
1583 version = odm_get_version_mp_8192f_phy_reg();
1584 break;
1585 #endif
1586 #if (RTL8721D_SUPPORT)
1587 case ODM_RTL8721D:
1588 version = odm_get_version_mp_8721d_phy_reg();
1589 break;
1590 #endif
1591 #if (RTL8710C_SUPPORT)
1592 case ODM_RTL8710C:
1593 version = GET_VERSION_MP(8710c, _mac_reg);
1594 #endif
1595 #if (RTL8821C_SUPPORT)
1596 case ODM_RTL8821C:
1597 version = odm_get_version_mp_8821c_phy_reg();
1598 break;
1599 #endif
1600 #if (RTL8195B_SUPPORT)
1601 case ODM_RTL8195B:
1602 version = odm_get_version_mp_8195b_phy_reg();
1603 break;
1604 #endif
1605 #if (RTL8198F_SUPPORT)
1606 case ODM_RTL8198F:
1607 version = odm_get_version_mp_8198f_phy_reg();
1608 break;
1609 #endif
1610 #if (RTL8822C_SUPPORT)
1611 case ODM_RTL8822C:
1612 version = odm_get_version_mp_8822c_phy_reg();
1613 break;
1614 #endif
1615 #if (RTL8812F_SUPPORT)
1616 case ODM_RTL8812F:
1617 version = odm_get_version_mp_8812f_phy_reg();
1618 break;
1619 #endif
1620 #if (RTL8197G_SUPPORT)
1621 case ODM_RTL8197G:
1622 version = odm_get_version_mp_8197g_phy_reg();
1623 break;
1624 #endif
1625 #if (RTL8723F_SUPPORT)
1626 case ODM_RTL8723F:
1627 version = odm_get_version_mp_8723f_phy_reg();
1628 break;
1629 #endif
1630 #if (RTL8814B_SUPPORT)
1631 case ODM_RTL8814B:
1632 version = odm_get_version_mp_8814b_phy_reg();
1633 break;
1634 #endif
1635 #if (RTL8814C_SUPPORT)
1636 case ODM_RTL8814C:
1637 version = odm_get_version_mp_8814c_phy_reg();
1638 break;
1639 #endif
1640 }
1641
1642 return version;
1643 }
1644
query_phydm_trx_capability(struct dm_struct * dm)1645 u32 query_phydm_trx_capability(struct dm_struct *dm)
1646 {
1647 u32 value32 = 0xFFFFFFFF;
1648
1649 #if (RTL8821C_SUPPORT == 1)
1650 if (dm->support_ic_type == ODM_RTL8821C)
1651 value32 = query_phydm_trx_capability_8821c(dm);
1652 #endif
1653 #if (RTL8195B_SUPPORT == 1)
1654 if (dm->support_ic_type == ODM_RTL8195B)
1655 value32 = query_phydm_trx_capability_8195b(dm);
1656 #endif
1657 return value32;
1658 }
1659
query_phydm_stbc_capability(struct dm_struct * dm)1660 u32 query_phydm_stbc_capability(struct dm_struct *dm)
1661 {
1662 u32 value32 = 0xFFFFFFFF;
1663
1664 #if (RTL8821C_SUPPORT == 1)
1665 if (dm->support_ic_type == ODM_RTL8821C)
1666 value32 = query_phydm_stbc_capability_8821c(dm);
1667 #endif
1668 #if (RTL8195B_SUPPORT == 1)
1669 if (dm->support_ic_type == ODM_RTL8195B)
1670 value32 = query_phydm_stbc_capability_8195b(dm);
1671 #endif
1672
1673 return value32;
1674 }
1675
query_phydm_ldpc_capability(struct dm_struct * dm)1676 u32 query_phydm_ldpc_capability(struct dm_struct *dm)
1677 {
1678 u32 value32 = 0xFFFFFFFF;
1679
1680 #if (RTL8821C_SUPPORT == 1)
1681 if (dm->support_ic_type == ODM_RTL8821C)
1682 value32 = query_phydm_ldpc_capability_8821c(dm);
1683 #endif
1684 #if (RTL8195B_SUPPORT == 1)
1685 if (dm->support_ic_type == ODM_RTL8195B)
1686 value32 = query_phydm_ldpc_capability_8195b(dm);
1687 #endif
1688 return value32;
1689 }
1690
query_phydm_txbf_parameters(struct dm_struct * dm)1691 u32 query_phydm_txbf_parameters(struct dm_struct *dm)
1692 {
1693 u32 value32 = 0xFFFFFFFF;
1694
1695 #if (RTL8821C_SUPPORT == 1)
1696 if (dm->support_ic_type == ODM_RTL8821C)
1697 value32 = query_phydm_txbf_parameters_8821c(dm);
1698 #endif
1699 #if (RTL8195B_SUPPORT == 1)
1700 if (dm->support_ic_type == ODM_RTL8195B)
1701 value32 = query_phydm_txbf_parameters_8195b(dm);
1702 #endif
1703 return value32;
1704 }
1705
query_phydm_txbf_capability(struct dm_struct * dm)1706 u32 query_phydm_txbf_capability(struct dm_struct *dm)
1707 {
1708 u32 value32 = 0xFFFFFFFF;
1709
1710 #if (RTL8821C_SUPPORT == 1)
1711 if (dm->support_ic_type == ODM_RTL8821C)
1712 value32 = query_phydm_txbf_capability_8821c(dm);
1713 #endif
1714 #if (RTL8195B_SUPPORT == 1)
1715 if (dm->support_ic_type == ODM_RTL8195B)
1716 value32 = query_phydm_txbf_capability_8195b(dm);
1717 #endif
1718 return value32;
1719 }
1720