1 /******************************************************************************
2 *
3 * Copyright(c) 2015 - 2017 Realtek Corporation.
4 *
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms of version 2 of the GNU General Public License as
7 * published by the Free Software Foundation.
8 *
9 * This program is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
12 * more details.
13 *
14 *****************************************************************************/
15 #define _RTL8822C_OPS_C_
16
17 #include <drv_types.h> /* basic_types.h, rtw_io.h and etc. */
18 #include <rtw_xmit.h> /* struct xmit_priv */
19 #ifdef DBG_CONFIG_ERROR_DETECT
20 #include <rtw_sreset.h>
21 #endif /* DBG_CONFIG_ERROR_DETECT */
22 #include <hal_data.h> /* PHAL_DATA_TYPE, GET_HAL_DATA() */
23 #include <hal_com.h> /* dump_chip_info() and etc. */
24 #include "../hal_halmac.h" /* GET_RX_DESC_XXX_8822C() */
25 #include "rtl8822c.h"
26 #include "rtl8822c_hal.h"
27
28
29 static const struct hw_port_reg port_cfg[] = {
30 /*port 0*/
31 {
32 .net_type = (REG_CR_8822C + 2),
33 .net_type_shift = 0,
34 .macaddr = REG_MACID_8822C,
35 .bssid = REG_BSSID_8822C,
36 .bcn_ctl = REG_BCN_CTRL_8822C,
37 .tsf_rst = REG_DUAL_TSF_RST,
38 .tsf_rst_bit = BIT_TSFTR_RST_8822C,
39 .bcn_space = REG_MBSSID_BCN_SPACE_8822C,
40 .bcn_space_shift = 0,
41 .bcn_space_mask = 0xffff,
42 .ps_aid = REG_BCN_PSR_RPT_8822C,
43 .ta = REG_TRANSMIT_ADDRSS_0_8822C,
44 },
45 /*port 1*/
46 {
47 .net_type = (REG_CR_8822C + 2),
48 .net_type_shift = 2,
49 .macaddr = REG_MACID1_8822C,
50 .bssid = REG_BSSID1_8822C,
51 .bcn_ctl = REG_BCN_CTRL_CLINT0_8822C,
52 .tsf_rst = REG_DUAL_TSF_RST,
53 .tsf_rst_bit = BIT_TSFTR_CLI0_RST_8822C,
54 .bcn_space = REG_MBSSID_BCN_SPACE_8822C,
55 .bcn_space_shift = 16,
56 .bcn_space_mask = 0xfff,
57 .ps_aid = REG_BCN_PSR_RPT1_8822C,
58 .ta = REG_TRANSMIT_ADDRSS_1_8822C,
59 },
60 /*port 2*/
61 {
62 .net_type = REG_CR_EXT_8822C,
63 .net_type_shift = 0,
64 .macaddr = REG_MACID2_8822C,
65 .bssid = REG_BSSID2_8822C,
66 .bcn_ctl = REG_BCN_CTRL_CLINT1_8822C,
67 .tsf_rst = REG_DUAL_TSF_RST,
68 .tsf_rst_bit = BIT_TSFTR_CLI1_RST_8822C,
69 .bcn_space = REG_MBSSID_BCN_SPACE2_8822C,
70 .bcn_space_shift = 0,
71 .bcn_space_mask = 0xfff,
72 .ps_aid = REG_BCN_PSR_RPT2_8822C,
73 .ta = REG_TRANSMIT_ADDRSS_2_8822C,
74 },
75 /*port 3*/
76 {
77 .net_type = REG_CR_EXT_8822C,
78 .net_type_shift = 2,
79 .macaddr = REG_MACID3_8822C,
80 .bssid = REG_BSSID3_8822C,
81 .bcn_ctl = REG_BCN_CTRL_CLINT2_8822C,
82 .tsf_rst = REG_DUAL_TSF_RST,
83 .tsf_rst_bit = BIT_TSFTR_CLI2_RST_8822C,
84 .bcn_space = REG_MBSSID_BCN_SPACE2_8822C,
85 .bcn_space_shift = 16,
86 .bcn_space_mask = 0xfff,
87 .ps_aid = REG_BCN_PSR_RPT3_8822C,
88 .ta = REG_TRANSMIT_ADDRSS_3_8822C,
89 },
90 /*port 4*/
91 {
92 .net_type = REG_CR_EXT_8822C,
93 .net_type_shift = 4,
94 .macaddr = REG_MACID4_8822C,
95 .bssid = REG_BSSID4_8822C,
96 .bcn_ctl = REG_BCN_CTRL_CLINT3_8822C,
97 .tsf_rst = REG_DUAL_TSF_RST,
98 .tsf_rst_bit = BIT_TSFTR_CLI3_RST_8822C,
99 .bcn_space = REG_MBSSID_BCN_SPACE3_8822C,
100 .bcn_space_shift = 0,
101 .bcn_space_mask = 0xfff,
102 .ps_aid = REG_BCN_PSR_RPT4_8822C,
103 .ta = REG_TRANSMIT_ADDRSS_4_8822C,
104 },
105 };
106
hw_bcn_ctrl_addr(_adapter * adapter,u8 hw_port)107 static u32 hw_bcn_ctrl_addr(_adapter *adapter, u8 hw_port)
108 {
109 struct hal_spec_t *hal_spec = GET_HAL_SPEC(adapter);
110 u32 addr = 0;
111
112 if (hw_port >= hal_spec->port_num) {
113 RTW_ERR(FUNC_ADPT_FMT" HW Port(%d) invalid\n", FUNC_ADPT_ARG(adapter), hw_port);
114 rtw_warn_on(1);
115 goto exit;
116 }
117
118 addr = port_cfg[hw_port].bcn_ctl;
119
120 exit:
121 return addr;
122 }
123 #ifdef CONFIG_CLIENT_PORT_CFG
hw_bcn_ctrl_set(_adapter * adapter,u8 hw_port,u8 bcn_ctl_val)124 static void hw_bcn_ctrl_set(_adapter *adapter, u8 hw_port, u8 bcn_ctl_val)
125 {
126 u32 bcn_ctl_addr = 0;
127
128 if (hw_port >= MAX_HW_PORT) {
129 RTW_ERR(FUNC_ADPT_FMT" HW Port(%d) invalid\n", FUNC_ADPT_ARG(adapter), hw_port);
130 rtw_warn_on(1);
131 return;
132 }
133
134 bcn_ctl_addr = port_cfg[hw_port].bcn_ctl;
135 rtw_write8(adapter, bcn_ctl_addr, bcn_ctl_val);
136 }
137 #endif
hw_bcn_ctrl_add(_adapter * adapter,u8 hw_port,u8 bcn_ctl_val)138 static void hw_bcn_ctrl_add(_adapter *adapter, u8 hw_port, u8 bcn_ctl_val)
139 {
140 u32 bcn_ctl_addr = 0;
141 u8 val8 = 0;
142
143 if (hw_port >= MAX_HW_PORT) {
144 RTW_ERR(FUNC_ADPT_FMT" HW Port(%d) invalid\n", FUNC_ADPT_ARG(adapter), hw_port);
145 rtw_warn_on(1);
146 return;
147 }
148
149 bcn_ctl_addr = port_cfg[hw_port].bcn_ctl;
150 val8 = rtw_read8(adapter, bcn_ctl_addr) | bcn_ctl_val;
151 rtw_write8(adapter, bcn_ctl_addr, val8);
152 }
153
hw_bcn_ctrl_clr(_adapter * adapter,u8 hw_port,u8 bcn_ctl_val)154 static void hw_bcn_ctrl_clr(_adapter *adapter, u8 hw_port, u8 bcn_ctl_val)
155 {
156 u32 bcn_ctl_addr = 0;
157 u8 val8 = 0;
158
159 if (hw_port >= MAX_HW_PORT) {
160 RTW_ERR(FUNC_ADPT_FMT" HW Port(%d) invalid\n", FUNC_ADPT_ARG(adapter), hw_port);
161 rtw_warn_on(1);
162 return;
163 }
164
165 bcn_ctl_addr = port_cfg[hw_port].bcn_ctl;
166 val8 = rtw_read8(adapter, bcn_ctl_addr);
167 val8 &= ~bcn_ctl_val;
168 rtw_write8(adapter, bcn_ctl_addr, val8);
169 }
170
read_chip_version(PADAPTER adapter)171 static void read_chip_version(PADAPTER adapter)
172 {
173 PHAL_DATA_TYPE hal;
174 u32 value32;
175
176
177 hal = GET_HAL_DATA(adapter);
178
179 value32 = rtw_read32(adapter, REG_SYS_CFG1_8822C);
180 hal->version_id.ICType = CHIP_8822C;
181 hal->version_id.ChipType = ((value32 & BIT_RTL_ID_8822C) ? TEST_CHIP : NORMAL_CHIP);
182 hal->version_id.CUTVersion = BIT_GET_CHIP_VER_8822C(value32);
183 hal->version_id.VendorType = BIT_GET_VENDOR_ID_8822C(value32);
184 hal->version_id.VendorType >>= 2;
185 switch (hal->version_id.VendorType) {
186 case 0:
187 hal->version_id.VendorType = CHIP_VENDOR_TSMC;
188 break;
189 case 1:
190 hal->version_id.VendorType = CHIP_VENDOR_SMIC;
191 break;
192 case 2:
193 hal->version_id.VendorType = CHIP_VENDOR_UMC;
194 break;
195 }
196
197 hal->version_id.RFType = ((value32 & BIT_RF_TYPE_ID_8822C) ? RF_TYPE_2T2R : RF_TYPE_1T1R);
198
199 /* refer to sd7 code base*/
200 hal->RegulatorMode = ((value32 & BIT_INTERNAL_EXTERNAL_SWR_8822C) ? RT_LDO_REGULATOR : RT_SWITCHING_REGULATOR);
201
202 value32 = rtw_read32(adapter, REG_SYS_STATUS1_8822C);
203 hal->version_id.ROMVer = BIT_GET_RF_RL_ID_8822C(value32);
204
205 /* For multi-function consideration. */
206 hal->MultiFunc = RT_MULTI_FUNC_NONE;
207 value32 = rtw_read32(adapter, REG_WL_BT_PWR_CTRL_8822C);
208 hal->MultiFunc |= ((value32 & BIT_WL_FUNC_EN_8822C) ? RT_MULTI_FUNC_WIFI : 0);
209 hal->MultiFunc |= ((value32 & BIT_BT_FUNC_EN_8822C) ? RT_MULTI_FUNC_BT : 0);
210 hal->PolarityCtl = ((value32 & BIT_WL_HWPDN_SL_8822C) ? RT_POLARITY_HIGH_ACT : RT_POLARITY_LOW_ACT);
211
212 dump_chip_info(hal->version_id);
213 }
214
215 /*
216 * Return:
217 * _TRUE valid ID
218 * _FALSE invalid ID
219 */
Hal_EfuseParseIDCode(PADAPTER adapter,u8 * map)220 static u8 Hal_EfuseParseIDCode(PADAPTER adapter, u8 *map)
221 {
222 u16 EEPROMId;
223
224
225 /* Check 0x8129 again for making sure autoload status!! */
226 EEPROMId = le16_to_cpu(*(u16 *)map);
227 RTW_INFO("EEPROM ID = 0x%04x\n", EEPROMId);
228 if (EEPROMId == RTL_EEPROM_ID)
229 return _TRUE;
230
231 RTW_WARN("EEPROM ID is invalid!!\n");
232 return _FALSE;
233 }
234
Hal_EfuseParseEEPROMVer(PADAPTER adapter,u8 * map,u8 mapvalid)235 static void Hal_EfuseParseEEPROMVer(PADAPTER adapter, u8 *map, u8 mapvalid)
236 {
237 PHAL_DATA_TYPE hal = GET_HAL_DATA(adapter);
238
239
240 if (_TRUE == mapvalid)
241 hal->EEPROMVersion = map[EEPROM_VERSION_8822C];
242 else
243 hal->EEPROMVersion = 1;
244
245 RTW_INFO("EEPROM Version = %d\n", hal->EEPROMVersion);
246 }
247
Hal_EfuseParseTxPowerInfo(PADAPTER adapter,u8 * map,u8 mapvalid)248 static int Hal_EfuseParseTxPowerInfo(PADAPTER adapter, u8 *map, u8 mapvalid)
249 {
250 PHAL_DATA_TYPE hal = GET_HAL_DATA(adapter);
251 u8 tpt_mode = (map[EEPROM_TX_PWR_CALIBRATE_RATE_8822C] & 0xF0) >> 4;
252 int ret = _FAIL;
253
254 if (GetRegPowerTrackingType(adapter) != 64) {
255 tpt_mode = GetRegPowerTrackingType(adapter);
256 RTW_INFO("%s force tpt_mode=%u\n", __func__, tpt_mode);
257 }
258
259 #ifdef CONFIG_TXPWR_PG_WITH_PWR_IDX
260 if (tpt_mode <= 3) { /* 0~3: thermal */
261 hal->txpwr_pg_mode = TXPWR_PG_WITH_PWR_IDX;
262 goto parse_tpt_mode_done;
263 }
264 #endif
265
266 #ifdef CONFIG_TXPWR_PG_WITH_TSSI_OFFSET
267 if (tpt_mode >= 4 && tpt_mode <= 7) { /* 4~7: TSSI */
268 hal->txpwr_pg_mode = TXPWR_PG_WITH_TSSI_OFFSET;
269 goto parse_tpt_mode_done;
270 }
271 #endif
272
273 RTW_ERR("%s unknown tpt_mode=%u\n", __func__, tpt_mode);
274 goto exit;
275
276 parse_tpt_mode_done:
277 RTW_INFO("%s tpt_mode=%u, PG with %s\n", __func__
278 , tpt_mode, txpwr_pg_mode_str(hal->txpwr_pg_mode));
279
280 if ((_TRUE == mapvalid) && (map[EEPROM_RF_BOARD_OPTION_8822C] != 0xFF))
281 hal->EEPROMRegulatory = map[EEPROM_RF_BOARD_OPTION_8822C] & 0x3; /* bit0~1 */
282 else
283 hal->EEPROMRegulatory = EEPROM_DEFAULT_BOARD_OPTION & 0x3; /* bit0~1 */
284 RTW_INFO("EEPROM Regulatory=0x%02x\n", hal->EEPROMRegulatory);
285
286 ret = _SUCCESS;
287
288 exit:
289 return ret;
290 }
291
Hal_EfuseParseBoardType(PADAPTER adapter,u8 * map,u8 mapvalid)292 static void Hal_EfuseParseBoardType(PADAPTER adapter, u8 *map, u8 mapvalid)
293 {
294 PHAL_DATA_TYPE hal = GET_HAL_DATA(adapter);
295
296
297 if ((_TRUE == mapvalid) && (map[EEPROM_RF_BOARD_OPTION_8822C] != 0xFF))
298 hal->InterfaceSel = (map[EEPROM_RF_BOARD_OPTION_8822C] & 0xE0) >> 5;
299 else
300 hal->InterfaceSel = (EEPROM_DEFAULT_BOARD_OPTION & 0xE0) >> 5;
301
302 RTW_INFO("EEPROM Board Type=0x%02x\n", hal->InterfaceSel);
303
304 if (mapvalid) {
305 if (map[EEPROM_RF_BOARD_OPTION_8822C] & BIT2) {
306 /* de-featured to 1 Tx/stream */
307 hal->eeprom_max_tx_cnt = 1;
308 RTW_INFO("EEPROM 0xC1[2]=1, de-featured to 1 Tx/stream\n");
309 }
310 if (map[EEPROM_RF_BOARD_OPTION_8822C] & BIT3) {
311 /* de-featured to 1 Rx/stream */
312 /* TODO, how and necessary? */
313 }
314 }
315 }
316
Hal_EfuseParseBTCoexistInfo(PADAPTER adapter,u8 * map,u8 mapvalid)317 static void Hal_EfuseParseBTCoexistInfo(PADAPTER adapter, u8 *map, u8 mapvalid)
318 {
319 PHAL_DATA_TYPE hal = GET_HAL_DATA(adapter);
320 u8 setting;
321 u32 tmpu4;
322
323 if ((_TRUE == mapvalid) && (map[EEPROM_RF_BOARD_OPTION_8822C] != 0xFF)) {
324 /* 0xc1[7:5] = 0x01 */
325 if (((map[EEPROM_RF_BOARD_OPTION_8822C] & 0xe0) >> 5) == 0x01)
326 hal->EEPROMBluetoothCoexist = _TRUE;
327 else
328 hal->EEPROMBluetoothCoexist = _FALSE;
329 } else
330 hal->EEPROMBluetoothCoexist = _FALSE;
331
332 hal->EEPROMBluetoothType = BT_RTL8822C;
333
334 setting = map[EEPROM_RF_BT_SETTING_8822C];
335 if ((_TRUE == mapvalid) && (setting != 0xFF)) {
336 hal->EEPROMBluetoothAntNum = setting & BIT(0);
337 /*
338 * EFUSE_0xC3[6] == 0, S1(Main)-RF_PATH_A;
339 * EFUSE_0xC3[6] == 1, S0(Aux)-RF_PATH_B
340 */
341 hal->ant_path = (setting & BIT(6)) ? RF_PATH_B : RF_PATH_A;
342 } else {
343 hal->EEPROMBluetoothAntNum = Ant_x2;
344 hal->ant_path = RF_PATH_A;
345 }
346
347 RTW_INFO("EEPROM %s BT-coex, ant_num=%d\n",
348 hal->EEPROMBluetoothCoexist == _TRUE ? "Enable" : "Disable",
349 hal->EEPROMBluetoothAntNum == Ant_x2 ? 2 : 1);
350 }
351
Hal_EfuseParseChnlPlan(PADAPTER adapter,u8 * map,u8 autoloadfail)352 static void Hal_EfuseParseChnlPlan(PADAPTER adapter, u8 *map, u8 autoloadfail)
353 {
354 hal_com_config_channel_plan(
355 adapter,
356 map ? &map[EEPROM_COUNTRY_CODE_8822C] : NULL,
357 map ? map[EEPROM_ChannelPlan_8822C] : 0xFF,
358 RTW_CHPLAN_6G_NULL,
359 autoloadfail
360 );
361 }
362
363 #ifdef CONFIG_RTL8822C_XCAP_NEW_POLICY
364 #define GET_XCAP_VALUE_B9_8822C(x) (x & 0x7F)
365 #define GET_XCAP_VALUE_110_8822C(x) (x & 0x7F)
366 #define GET_XCAP_VALUE_111_8822C(x) ((x & 0x7F00) >> 8)
367 #define EFUSE_XCAP_VALID_CHK_B9_8822C(x) \
368 (!(GET_XCAP_VALUE_B9_8822C(x) == 0x7F))
369 #define EFUSE_XCAP_VALID_CHK_110_8822C(x) \
370 (!((GET_XCAP_VALUE_110_8822C(x) == EEPROM_Default_CrystalCap_110_8822C) || (GET_XCAP_VALUE_110_8822C(x) == 0x7F)))
371 #define EFUSE_XCAP_VALID_CHK_111_8822C(x) \
372 (!((GET_XCAP_VALUE_111_8822C(x) == EEPROM_Default_CrystalCap_111_8822C) || (GET_XCAP_VALUE_111_8822C(x) == 0x7F)))
hal_efuse_search_xtal_cap(PADAPTER adapter,u8 h_xcap_b9,u16 f_xcap_110_111,u8 f_xcap_b9)373 static s16 hal_efuse_search_xtal_cap(PADAPTER adapter, u8 h_xcap_b9, u16 f_xcap_110_111, u8 f_xcap_b9)
374 {
375 enum {
376 XCAP_SRC_H_EFUSE_B9_8822C = 0,
377 XCAP_SRC_F_EFUSE_110_8822C,
378 XCAP_SRC_F_EFUSE_B9_8822C,
379 XCAP_SRC_8822C_MAX
380 };
381
382 const char *const xcap_src_8822c_str[XCAP_SRC_8822C_MAX] = {
383 "XCAP_SRC_H_EFUSE_B9",
384 "XCAP_SRC_F_EFUSE_110",
385 "XCAP_SRC_F_EFUSE_B9"
386 };
387
388 /* this declaration also controls the priority while searching xcap value from the candidates,
389 the prior element in the array implies the higher priority, fill -1 to bypass the element */
390 s8 xcap_src_8822c[XCAP_SRC_8822C_MAX] =
391 {XCAP_SRC_F_EFUSE_B9_8822C, XCAP_SRC_F_EFUSE_110_8822C, XCAP_SRC_H_EFUSE_B9_8822C};
392
393 int i = 0;
394 s8 xcap_found = -1;
395 s16 xcap_value = -1;
396
397 /* search for the valid xcap value from candidates */
398 for (i = 0; i < XCAP_SRC_8822C_MAX; i++) {
399 switch (xcap_src_8822c[i]) {
400 case XCAP_SRC_H_EFUSE_B9_8822C:
401 if (EFUSE_XCAP_VALID_CHK_B9_8822C(h_xcap_b9)) {
402 xcap_value = ((GET_XCAP_VALUE_B9_8822C(h_xcap_b9) << 8) | GET_XCAP_VALUE_B9_8822C(h_xcap_b9));
403 xcap_found = XCAP_SRC_H_EFUSE_B9_8822C;
404 }
405 break;
406 case XCAP_SRC_F_EFUSE_110_8822C:
407 if ((EFUSE_XCAP_VALID_CHK_110_8822C(f_xcap_110_111 )) && (EFUSE_XCAP_VALID_CHK_111_8822C(f_xcap_110_111 ))) {
408 xcap_value = (f_xcap_110_111 & 0x7F7F);
409 xcap_found = XCAP_SRC_F_EFUSE_110_8822C;
410 }
411 break;
412 case XCAP_SRC_F_EFUSE_B9_8822C:
413 if (EFUSE_XCAP_VALID_CHK_B9_8822C(f_xcap_b9)) {
414 xcap_value = ((GET_XCAP_VALUE_B9_8822C(f_xcap_b9) << 8) | GET_XCAP_VALUE_B9_8822C(f_xcap_b9));
415 xcap_found = XCAP_SRC_F_EFUSE_B9_8822C;
416 }
417 break;
418 case -1:
419 break;
420 }
421
422 if (xcap_found >= 0)
423 break;
424 }
425
426 if (xcap_found == -1)
427 RTW_INFO("valid crystall_cap value is not found in all sources!\n");
428 else
429 RTW_INFO("valid crystal_cap value 0x%04X is found in %s!\n", xcap_value, xcap_src_8822c_str[xcap_found]);
430
431 return xcap_value;
432 }
433
hal_efuse_parse_xtal_cap_new(PADAPTER adapter,u16 h_xcap_110_111,u8 h_xcap_b9,u16 f_xcap_110_111,u8 f_xcap_b9,u8 mapvalid)434 static void hal_efuse_parse_xtal_cap_new(PADAPTER adapter, u16 h_xcap_110_111, u8 h_xcap_b9,
435 u16 f_xcap_110_111, u8 f_xcap_b9, u8 mapvalid)
436 {
437 PHAL_DATA_TYPE hal = GET_HAL_DATA(adapter);
438 s16 xcap_value = -1;
439 u16 xcap_value_to_h_efuse = 0;
440
441 if (mapvalid == _FALSE) {
442 hal->crystal_cap = EEPROM_Default_CrystalCap_110_8822C;
443 goto exit;
444 }
445
446 if (adapter->registrypriv.rtw_8822c_xcap_overwrite == 1) {
447 xcap_value = hal_efuse_search_xtal_cap(adapter, h_xcap_b9, f_xcap_110_111, f_xcap_b9);
448 if (xcap_value != -1) {
449 if (xcap_value != (h_xcap_110_111 & 0x7F7F)) {
450 xcap_value_to_h_efuse = ((h_xcap_110_111 & 0x8080) | xcap_value);
451 rtw_efuse_map_write(adapter, EEPROM_XTAL_110_8822C, 2, (u8*)&xcap_value_to_h_efuse);
452 RTW_INFO("update crystal_cap = 0x%02X into hw efuse!\n", xcap_value);
453 }
454
455 hal->crystal_cap = GET_XCAP_VALUE_110_8822C(xcap_value);
456 }
457 else {
458 if ((EFUSE_XCAP_VALID_CHK_110_8822C(h_xcap_110_111)) && (EFUSE_XCAP_VALID_CHK_111_8822C(h_xcap_110_111)))
459 hal->crystal_cap = GET_XCAP_VALUE_110_8822C(h_xcap_110_111);
460 else
461 hal->crystal_cap = EEPROM_Default_CrystalCap_110_8822C;
462 }
463 }
464 else {
465 if ((EFUSE_XCAP_VALID_CHK_110_8822C(h_xcap_110_111)) && (EFUSE_XCAP_VALID_CHK_111_8822C(h_xcap_110_111)))
466 hal->crystal_cap = GET_XCAP_VALUE_110_8822C(h_xcap_110_111);
467 else {
468 xcap_value = hal_efuse_search_xtal_cap(adapter, h_xcap_b9, f_xcap_110_111, f_xcap_b9);
469 if (xcap_value != -1) {
470 xcap_value_to_h_efuse = ((h_xcap_110_111 & 0x8080) | xcap_value);
471 rtw_efuse_map_write(adapter, EEPROM_XTAL_110_8822C, 2, (u8*)&xcap_value_to_h_efuse);
472 RTW_INFO("update crystal_cap = 0x%02X into hw efuse!\n", xcap_value);
473 hal->crystal_cap = GET_XCAP_VALUE_110_8822C(xcap_value);
474 }
475 else
476 hal->crystal_cap = EEPROM_Default_CrystalCap_110_8822C;
477 }
478 }
479
480 exit:
481 RTW_INFO("EEPROM crystal_cap=0x%02x\n", hal->crystal_cap);
482
483 }
484 #endif
Hal_EfuseParseXtal(PADAPTER adapter,u8 * map,u8 mapvalid)485 static void Hal_EfuseParseXtal(PADAPTER adapter, u8 *map, u8 mapvalid)
486 {
487 PHAL_DATA_TYPE hal = GET_HAL_DATA(adapter);
488
489
490 if ((_TRUE == mapvalid) && map[EEPROM_XTAL_B9_8822C] != 0xFF)
491 hal->crystal_cap = map[EEPROM_XTAL_B9_8822C];
492 else
493 hal->crystal_cap = EEPROM_Default_CrystalCap_B9_8822C;
494
495 RTW_INFO("EEPROM crystal_cap=0x%02x\n", hal->crystal_cap);
496 }
497
Hal_EfuseParseThermalMeter(PADAPTER adapter,u8 * map,u8 mapvalid)498 static void Hal_EfuseParseThermalMeter(PADAPTER adapter, u8 *map, u8 mapvalid)
499 {
500 PHAL_DATA_TYPE hal = GET_HAL_DATA(adapter);
501
502
503 /* ThermalMeter from EEPROM */
504 if ((_TRUE == mapvalid) && (map[EEPROM_THERMAL_METER_A_8822C] != 0xFF) \
505 && (map[EEPROM_THERMAL_METER_B_8822C] != 0xFF)) {
506 /* suggested by James@RF */
507 u8 eeprom_thermal_meter_a = map[EEPROM_THERMAL_METER_A_8822C];
508 u8 eeprom_thermal_meter_b = map[EEPROM_THERMAL_METER_B_8822C];
509 hal->eeprom_thermal_meter = (eeprom_thermal_meter_a + eeprom_thermal_meter_b)/2;
510 } else {
511 hal->eeprom_thermal_meter = EEPROM_Default_ThermalMeter;
512 hal->odmpriv.rf_calibrate_info.is_apk_thermal_meter_ignore = _TRUE;
513 }
514
515 RTW_INFO("EEPROM ThermalMeter=0x%02x\n", hal->eeprom_thermal_meter);
516 }
517
Hal_EfuseParsePathSelection(PADAPTER adapter,u8 * map,u8 mapvalid)518 static void Hal_EfuseParsePathSelection(PADAPTER adapter, u8 *map, u8 mapvalid)
519 {
520 PHAL_DATA_TYPE hal = GET_HAL_DATA(adapter);
521 u8 trx_path_bmp = map[EEPROM_RF_ANTENNA_OPT_8822C];
522
523 if (!mapvalid)
524 return;
525
526 switch (trx_path_bmp) {
527 case 0x33: /* 2T2R - TX:AB, RX:AB */
528 case 0x13: /* 1T2R - TX:A, RX:AB */
529 case 0x23: /* 1T2R - TX:B, RX:AB */
530 case 0x11: /* 1T1R - TX:A, RX:A */
531 case 0x22: /* 1T1R - TX:B, RX:B */
532 hal->eeprom_trx_path_bmp = trx_path_bmp;
533 RTW_INFO("EEPROM efuse[0x%x]=0x%02x is valid\n"
534 , EEPROM_RF_ANTENNA_OPT_8822C, trx_path_bmp);
535 break;
536 default:
537 RTW_INFO("EEPROM efuse[0x%x]=0x%02x is unknown type\n"
538 , EEPROM_RF_ANTENNA_OPT_8822C, trx_path_bmp);
539 }
540 }
541
Hal_EfuseParseCustomerID(PADAPTER adapter,u8 * map,u8 mapvalid)542 static void Hal_EfuseParseCustomerID(PADAPTER adapter, u8 *map, u8 mapvalid)
543 {
544 PHAL_DATA_TYPE hal = GET_HAL_DATA(adapter);
545
546
547 if (_TRUE == mapvalid)
548 hal->EEPROMCustomerID = map[EEPROM_CustomID_8822C];
549 else
550 hal->EEPROMCustomerID = 0;
551 RTW_INFO("EEPROM Customer ID=0x%02x\n", hal->EEPROMCustomerID);
552 }
553
Hal_DetectWoWMode(PADAPTER adapter)554 static void Hal_DetectWoWMode(PADAPTER adapter)
555 {
556 #if defined(CONFIG_WOWLAN) || defined(CONFIG_AP_WOWLAN)
557 adapter_to_pwrctl(adapter)->bSupportRemoteWakeup = _TRUE;
558 #else /* !(CONFIG_WOWLAN || CONFIG_AP_WOWLAN) */
559 adapter_to_pwrctl(adapter)->bSupportRemoteWakeup = _FALSE;
560 #endif /* !(CONFIG_WOWLAN || CONFIG_AP_WOWLAN) */
561
562 RTW_INFO("EEPROM SupportRemoteWakeup=%d\n", adapter_to_pwrctl(adapter)->bSupportRemoteWakeup);
563 }
564
hal_ReadPAType(PADAPTER adapter,u8 * map,u8 mapvalid)565 static void hal_ReadPAType(PADAPTER adapter, u8 *map, u8 mapvalid)
566 {
567 PHAL_DATA_TYPE hal = GET_HAL_DATA(adapter);
568
569 if (mapvalid) {
570 /* AUTO */
571 if (GetRegAmplifierType2G(adapter) == 0) {
572 hal->PAType_2G = ReadLE1Byte(&map[EEPROM_2G_5G_PA_TYPE_8822C]);
573 hal->LNAType_2G = ReadLE1Byte(&map[EEPROM_2G_LNA_TYPE_GAIN_SEL_AB_8822C]);
574
575 if (hal->PAType_2G == 0xFF)
576 hal->PAType_2G = 0;
577
578 if (hal->LNAType_2G == 0xFF)
579 hal->LNAType_2G = 0;
580
581 hal->ExternalPA_2G = (hal->PAType_2G & BIT4) ? 1 : 0;
582 hal->ExternalLNA_2G = (hal->LNAType_2G & BIT3) ? 1 : 0;
583 } else {
584 hal->ExternalPA_2G = (GetRegAmplifierType2G(adapter) & ODM_BOARD_EXT_PA) ? 1 : 0;
585 hal->ExternalLNA_2G = (GetRegAmplifierType2G(adapter) & ODM_BOARD_EXT_LNA) ? 1 : 0;
586 }
587
588 /* AUTO */
589 if (GetRegAmplifierType5G(adapter) == 0) {
590 hal->PAType_5G = ReadLE1Byte(&map[EEPROM_2G_5G_PA_TYPE_8822C]);
591 hal->LNAType_5G = ReadLE1Byte(&map[EEPROM_5G_LNA_TYPE_GAIN_SEL_AB_8822C]);
592 if (hal->PAType_5G == 0xFF)
593 hal->PAType_5G = 0;
594 if (hal->LNAType_5G == 0xFF)
595 hal->LNAType_5G = 0;
596
597 hal->external_pa_5g = (hal->PAType_5G & BIT0) ? 1 : 0;
598 hal->external_lna_5g = (hal->LNAType_5G & BIT3) ? 1 : 0;
599 } else {
600 hal->external_pa_5g = (GetRegAmplifierType5G(adapter) & ODM_BOARD_EXT_PA_5G) ? 1 : 0;
601 hal->external_lna_5g = (GetRegAmplifierType5G(adapter) & ODM_BOARD_EXT_LNA_5G) ? 1 : 0;
602 }
603 } else {
604 hal->ExternalPA_2G = EEPROM_Default_PAType;
605 hal->external_pa_5g = 0xFF;
606 hal->ExternalLNA_2G = EEPROM_Default_LNAType;
607 hal->external_lna_5g = 0xFF;
608
609 /* AUTO */
610 if (GetRegAmplifierType2G(adapter) == 0) {
611 hal->ExternalPA_2G = 0;
612 hal->ExternalLNA_2G = 0;
613 } else {
614 hal->ExternalPA_2G = (GetRegAmplifierType2G(adapter) & ODM_BOARD_EXT_PA) ? 1 : 0;
615 hal->ExternalLNA_2G = (GetRegAmplifierType2G(adapter) & ODM_BOARD_EXT_LNA) ? 1 : 0;
616 }
617
618 /* AUTO */
619 if (GetRegAmplifierType5G(adapter) == 0) {
620 hal->external_pa_5g = 0;
621 hal->external_lna_5g = 0;
622 } else {
623 hal->external_pa_5g = (GetRegAmplifierType5G(adapter) & ODM_BOARD_EXT_PA_5G) ? 1 : 0;
624 hal->external_lna_5g = (GetRegAmplifierType5G(adapter) & ODM_BOARD_EXT_LNA_5G) ? 1 : 0;
625 }
626 }
627
628 RTW_INFO("EEPROM PAType_2G is 0x%x, ExternalPA_2G = %d\n", hal->PAType_2G, hal->ExternalPA_2G);
629 RTW_INFO("EEPROM PAType_5G is 0x%x, external_pa_5g = %d\n", hal->PAType_5G, hal->external_pa_5g);
630 RTW_INFO("EEPROM LNAType_2G is 0x%x, ExternalLNA_2G = %d\n", hal->LNAType_2G, hal->ExternalLNA_2G);
631 RTW_INFO("EEPROM LNAType_5G is 0x%x, external_lna_5g = %d\n", hal->LNAType_5G, hal->external_lna_5g);
632 }
633
Hal_ReadAmplifierType(PADAPTER adapter,u8 * map,u8 mapvalid)634 static void Hal_ReadAmplifierType(PADAPTER adapter, u8 *map, u8 mapvalid)
635 {
636 PHAL_DATA_TYPE hal = GET_HAL_DATA(adapter);
637 u8 extTypePA_2G_A = (map[EEPROM_2G_LNA_TYPE_GAIN_SEL_AB_8822C] & BIT2) >> 2;
638 u8 extTypePA_2G_B = (map[EEPROM_2G_LNA_TYPE_GAIN_SEL_AB_8822C] & BIT6) >> 6;
639 u8 extTypePA_5G_A = (map[EEPROM_5G_LNA_TYPE_GAIN_SEL_AB_8822C] & BIT2) >> 2;
640 u8 extTypePA_5G_B = (map[EEPROM_5G_LNA_TYPE_GAIN_SEL_AB_8822C] & BIT6) >> 6;
641 u8 extTypeLNA_2G_A = (map[EEPROM_2G_LNA_TYPE_GAIN_SEL_AB_8822C] & (BIT1 | BIT0)) >> 0;
642 u8 extTypeLNA_2G_B = (map[EEPROM_2G_LNA_TYPE_GAIN_SEL_AB_8822C] & (BIT5 | BIT4)) >> 4;
643 u8 extTypeLNA_5G_A = (map[EEPROM_5G_LNA_TYPE_GAIN_SEL_AB_8822C] & (BIT1 | BIT0)) >> 0;
644 u8 extTypeLNA_5G_B = (map[EEPROM_5G_LNA_TYPE_GAIN_SEL_AB_8822C] & (BIT5 | BIT4)) >> 4;
645
646 hal_ReadPAType(adapter, map, mapvalid);
647
648 /* [2.4G] Path A and B are both extPA */
649 if ((hal->PAType_2G & (BIT5 | BIT4)) == (BIT5 | BIT4))
650 hal->TypeGPA = extTypePA_2G_B << 2 | extTypePA_2G_A;
651
652 /* [5G] Path A and B are both extPA */
653 if ((hal->PAType_5G & (BIT1 | BIT0)) == (BIT1 | BIT0))
654 hal->TypeAPA = extTypePA_5G_B << 2 | extTypePA_5G_A;
655
656 /* [2.4G] Path A and B are both extLNA */
657 if ((hal->LNAType_2G & (BIT7 | BIT3)) == (BIT7 | BIT3))
658 hal->TypeGLNA = extTypeLNA_2G_B << 2 | extTypeLNA_2G_A;
659
660 /* [5G] Path A and B are both extLNA */
661 if ((hal->LNAType_5G & (BIT7 | BIT3)) == (BIT7 | BIT3))
662 hal->TypeALNA = extTypeLNA_5G_B << 2 | extTypeLNA_5G_A;
663
664 RTW_INFO("EEPROM TypeGPA = 0x%X\n", hal->TypeGPA);
665 RTW_INFO("EEPROM TypeAPA = 0x%X\n", hal->TypeAPA);
666 RTW_INFO("EEPROM TypeGLNA = 0x%X\n", hal->TypeGLNA);
667 RTW_INFO("EEPROM TypeALNA = 0x%X\n", hal->TypeALNA);
668 }
669
Hal_ReadRFEType(PADAPTER adapter,u8 * map,u8 mapvalid)670 static u8 Hal_ReadRFEType(PADAPTER adapter, u8 *map, u8 mapvalid)
671 {
672 PHAL_DATA_TYPE hal = GET_HAL_DATA(adapter);
673
674
675 /* check registry value */
676 if (GetRegRFEType(adapter) != CONFIG_RTW_RFE_TYPE) {
677 hal->rfe_type = GetRegRFEType(adapter);
678 goto exit;
679 }
680
681 if (mapvalid) {
682 /* check efuse map */
683 hal->rfe_type = ReadLE1Byte(&map[EEPROM_RFE_OPTION_8822C]);
684 if (0xFF != hal->rfe_type)
685 goto exit;
686 }
687
688 /* error handle */
689 hal->rfe_type = 0;
690
691 /* If ignore incorrect rfe_type may cause card drop. */
692 /* it's DIFFICULT do debug especially on COB project */
693 RTW_ERR("\n\nEmpty EFUSE with unknown REF type!!\n\n");
694 RTW_ERR("please program efuse or specify correct RFE type.\n");
695 RTW_ERR("cmd: insmod rtl8822cx.ko rtw_RFE_type=<rfe_type>\n\n");
696
697 return _FAIL;
698
699 exit:
700 RTW_INFO("EEPROM rfe_type=0x%x\n", hal->rfe_type);
701 return _SUCCESS;
702 }
703
Hal_EfuseParsePackageType(PADAPTER adapter,u8 * map,u8 mapvalid)704 static void Hal_EfuseParsePackageType(PADAPTER adapter, u8 *map, u8 mapvalid)
705 {
706 }
707
708 #if 0
709 static void Hal_EfuseParsePABias(PADAPTER adapter)
710 {
711 struct hal_com_data *hal;
712 u8 data[2] = {0xFF, 0xFF};
713 u8 ret;
714
715
716 ret = rtw_efuse_access(adapter, 0, 0x3D7, 2, data);
717 if (_FAIL == ret) {
718 RTW_ERR("%s: Fail to read PA Bias from eFuse!\n", __FUNCTION__);
719 return;
720 }
721
722 hal = GET_HAL_DATA(adapter);
723 hal->efuse0x3d7 = data[0]; /* efuse[0x3D7] */
724 hal->efuse0x3d8 = data[1]; /* efuse[0x3D8] */
725
726 RTW_INFO("EEPROM efuse[0x3D7]=0x%x\n", hal->efuse0x3d7);
727 RTW_INFO("EEPROM efuse[0x3D8]=0x%x\n", hal->efuse0x3d8);
728 }
729 #endif
730
731 #ifdef CONFIG_USB_HCI
Hal_ReadUsbModeSwitch(PADAPTER adapter,u8 * map,u8 mapvalid)732 static void Hal_ReadUsbModeSwitch(PADAPTER adapter, u8 *map, u8 mapvalid)
733 {
734 PHAL_DATA_TYPE hal = GET_HAL_DATA(adapter);
735
736 if (_TRUE == mapvalid)
737 /* check efuse 0x06 bit7 */
738 hal->EEPROMUsbSwitch = (map[EEPROM_USB_MODE_8822CU] & BIT7) >> 7;
739 else
740 hal->EEPROMUsbSwitch = _FALSE;
741
742 RTW_INFO("EEPROM USB Switch=%d\n", hal->EEPROMUsbSwitch);
743 }
744
hal_read_usb_pid_vid(PADAPTER adapter,u8 * map,u8 mapvalid)745 static void hal_read_usb_pid_vid(PADAPTER adapter, u8 *map, u8 mapvalid)
746 {
747 PHAL_DATA_TYPE hal = GET_HAL_DATA(adapter);
748
749 if (_TRUE == mapvalid) {
750 /* VID, PID */
751 hal->EEPROMVID = ReadLE2Byte(&map[EEPROM_VID_8822CU]);
752 hal->EEPROMPID = ReadLE2Byte(&map[EEPROM_PID_8822CU]);
753 } else {
754 hal->EEPROMVID = EEPROM_Default_VID;
755 hal->EEPROMPID = EEPROM_Default_PID;
756 }
757
758 RTW_INFO("EEPROM VID = 0x%04X, PID = 0x%04X\n", hal->EEPROMVID, hal->EEPROMPID);
759 }
760
761 #endif /* CONFIG_USB_HCI */
762
763 /*
764 * Description:
765 * Collect all information from efuse or files.
766 * This function will do
767 * 1. Read registers to check hardware efuse available or not
768 * 2. Read Efuse/EEPROM
769 * 3. Read file if necessary
770 * 4. Parsing Efuse data
771 */
rtl8822c_read_efuse(PADAPTER adapter)772 u8 rtl8822c_read_efuse(PADAPTER adapter)
773 {
774 PHAL_DATA_TYPE hal;
775 u8 val8;
776 u8 *efuse_map = NULL;
777 u8 valid;
778 #ifdef CONFIG_RTL8822C_XCAP_NEW_POLICY
779 u8 h_efuse_xcap_b9 = 0xFF;
780 u16 h_efuse_xcap_110_111 = 0xFFFF;
781 u8 f_efuse_xcap_b9 = 0xFF;
782 u16 f_efuse_xcap_110_111 = 0xFFFF;
783 #endif
784 u8 ret = _FAIL;
785
786 hal = GET_HAL_DATA(adapter);
787 efuse_map = hal->efuse_eeprom_data;
788
789 /* 1. Read registers to check hardware eFuse available or not */
790 val8 = rtw_read8(adapter, REG_SYS_EEPROM_CTRL_8822C);
791 hal->EepromOrEfuse = (val8 & BIT_EERPOMSEL_8822C) ? _TRUE : _FALSE;
792 hal->bautoload_fail_flag = (val8 & BIT_AUTOLOAD_SUS_8822C) ? _FALSE : _TRUE;
793 if (hal->bautoload_fail_flag == _TRUE)
794 RTW_ERR("%s: HW %s AUTO LOAD FAIL!!\n", __func__, hal->EepromOrEfuse ? "EEPROM" : "EFUSE");
795
796 /*
797 * In 8822C, bautoload_fail_flag is used to present eFuse map is valid
798 * or not, no matter the map comes from hardware or files.
799 */
800
801 /* 2. Read eFuse */
802 EFUSE_ShadowMapUpdate(adapter, EFUSE_WIFI, 0);
803
804 #ifdef CONFIG_RTL8822C_XCAP_NEW_POLICY
805 h_efuse_xcap_b9 = efuse_map[EEPROM_XTAL_B9_8822C];
806 h_efuse_xcap_110_111 = ((efuse_map[EEPROM_XTAL_111_8822C] << 8) | efuse_map[EEPROM_XTAL_110_8822C]);
807 #endif
808
809 /* 3. Read Efuse file if necessary */
810 #ifdef CONFIG_EFUSE_CONFIG_FILE
811 if (check_phy_efuse_tx_power_info_valid(adapter) == _FALSE) {
812 if (Hal_readPGDataFromConfigFile(adapter) != _SUCCESS)
813 RTW_WARN("%s: invalid phy efuse and read from file fail, will use driver default!!\n", __FUNCTION__);
814 #ifdef CONFIG_RTL8822C_XCAP_NEW_POLICY
815 else {
816 f_efuse_xcap_b9 = efuse_map[EEPROM_XTAL_B9_8822C];
817 f_efuse_xcap_110_111 = ((efuse_map[EEPROM_XTAL_111_8822C] << 8) | efuse_map[EEPROM_XTAL_110_8822C]);
818 }
819 #endif
820 }
821 #endif /* CONFIG_EFUSE_CONFIG_FILE */
822
823 /* 4. Parse Efuse data */
824 valid = Hal_EfuseParseIDCode(adapter, efuse_map);
825 if (_TRUE == valid)
826 hal->bautoload_fail_flag = _FALSE;
827 else
828 hal->bautoload_fail_flag = _TRUE;
829
830 Hal_EfuseParseEEPROMVer(adapter, efuse_map, valid);
831 hal_config_macaddr(adapter, hal->bautoload_fail_flag);
832 if (Hal_EfuseParseTxPowerInfo(adapter, efuse_map, valid) != _SUCCESS)
833 goto exit;
834 Hal_EfuseParseBoardType(adapter, efuse_map, valid);
835 Hal_EfuseParseBTCoexistInfo(adapter, efuse_map, valid);
836 Hal_EfuseParseChnlPlan(adapter, efuse_map, hal->bautoload_fail_flag);
837
838 #ifdef CONFIG_RTL8822C_XCAP_NEW_POLICY
839 if ((adapter->registrypriv.mp_mode == 0) && (hal->EEPROMBluetoothCoexist == _TRUE))
840 hal_efuse_parse_xtal_cap_new(adapter, h_efuse_xcap_110_111, h_efuse_xcap_b9, f_efuse_xcap_110_111, f_efuse_xcap_b9, valid);
841 else
842 #endif
843 Hal_EfuseParseXtal(adapter, efuse_map, valid);
844
845 Hal_EfuseParseThermalMeter(adapter, efuse_map, valid);
846 Hal_EfuseParsePathSelection(adapter, efuse_map, valid);
847 Hal_EfuseParseCustomerID(adapter, efuse_map, valid);
848 Hal_DetectWoWMode(adapter);
849 Hal_ReadAmplifierType(adapter, efuse_map, valid);
850 if (Hal_ReadRFEType(adapter, efuse_map, valid) != _SUCCESS)
851 goto exit;
852
853 /* Data out of Efuse Map */
854 Hal_EfuseParsePackageType(adapter, efuse_map, valid);
855 /* Hal_EfuseParsePABias(adapter); */
856
857 #ifdef CONFIG_USB_HCI
858 Hal_ReadUsbModeSwitch(adapter, efuse_map, valid);
859 hal_read_usb_pid_vid(adapter, efuse_map, valid);
860 #endif /* CONFIG_USB_HCI */
861
862 /* set coex. ant info once efuse parsing is done */
863 rtw_btcoex_set_ant_info(adapter);
864
865 hal_read_mac_hidden_rpt(adapter);
866 {
867 struct hal_spec_t *hal_spec = GET_HAL_SPEC(adapter);
868
869 if (hal_spec->hci_type <= 3 && hal_spec->hci_type >= 1) {
870 hal->EEPROMBluetoothCoexist = _FALSE;
871 RTW_INFO("EEPROM Disable BT-coex by hal_spec\n");
872 rtw_btcoex_wifionly_AntInfoSetting(adapter);
873 }
874 }
875
876 rtw_phydm_read_efuse(adapter);
877
878 ret = _SUCCESS;
879
880 exit:
881 return ret;
882 }
883
rtl8822c_run_thread(PADAPTER adapter)884 void rtl8822c_run_thread(PADAPTER adapter)
885 {
886 }
887
rtl8822c_cancel_thread(PADAPTER adapter)888 void rtl8822c_cancel_thread(PADAPTER adapter)
889 {
890 }
891
892 /*
893 * Description:
894 * Using 0x100 to check the power status of FW.
895 */
check_ips_status(PADAPTER adapter)896 static u8 check_ips_status(PADAPTER adapter)
897 {
898 u8 val8;
899
900
901 RTW_INFO(FUNC_ADPT_FMT ": Read 0x100=0x%02x 0x86=0x%02x\n",
902 FUNC_ADPT_ARG(adapter),
903 rtw_read8(adapter, 0x100), rtw_read8(adapter, 0x86));
904
905 val8 = rtw_read8(adapter, 0x100);
906 if (val8 == 0xEA)
907 return _TRUE;
908
909 return _FALSE;
910 }
911
InitBeaconParameters(PADAPTER adapter)912 static void InitBeaconParameters(PADAPTER adapter)
913 {
914 PHAL_DATA_TYPE hal = GET_HAL_DATA(adapter);
915 u16 val16;
916 u8 val8;
917
918
919 val8 = BIT_DIS_TSF_UDT_8822C;
920 val16 = val8 | (val8 << 8); /* port0 and port1 */
921 #ifdef CONFIG_BT_COEXIST
922 if (hal->EEPROMBluetoothCoexist)
923 /* Enable port0 beacon function for PSTDMA under BTCOEX */
924 val16 |= EN_BCN_FUNCTION;
925 #endif
926 rtw_write16(adapter, REG_BCN_CTRL_8822C, val16);
927
928 /* TBTT setup time */
929 rtw_write8(adapter, REG_TBTT_PROHIBIT_8822C, TBTT_PROHIBIT_SETUP_TIME);
930
931 /* TBTT hold time: 0x540[19:8] */
932 rtw_write8(adapter, REG_TBTT_PROHIBIT_8822C + 1, TBTT_PROHIBIT_HOLD_TIME_STOP_BCN & 0xFF);
933 rtw_write8(adapter, REG_TBTT_PROHIBIT_8822C + 2,
934 (rtw_read8(adapter, REG_TBTT_PROHIBIT_8822C + 2) & 0xF0) | (TBTT_PROHIBIT_HOLD_TIME_STOP_BCN >> 8));
935
936 rtw_write8(adapter, REG_DRVERLYINT_8822C, DRIVER_EARLY_INT_TIME_8822C); /* 5ms */
937 rtw_write8(adapter, REG_BCNDMATIM_8822C, BCN_DMA_ATIME_INT_TIME_8822C); /* 2ms */
938
939 /*
940 * Suggested by designer timchen. Change beacon AIFS to the largest number
941 * beacause test chip does not contension before sending beacon.
942 */
943 rtw_write16(adapter, REG_BCNTCFG_8822C, 0x4413);
944 }
945
beacon_function_enable(PADAPTER adapter,u8 Enable,u8 Linked)946 static void beacon_function_enable(PADAPTER adapter, u8 Enable, u8 Linked)
947 {
948 u8 val8;
949 u32 bcn_ctrl_reg;
950
951 /* port0 */
952 bcn_ctrl_reg = REG_BCN_CTRL_8822C;
953 val8 = BIT_DIS_TSF_UDT_8822C | BIT_EN_BCN_FUNCTION_8822C;
954 #ifdef CONFIG_CONCURRENT_MODE
955 /* port1 */
956 if (adapter->hw_port == HW_PORT1) {
957 bcn_ctrl_reg = REG_BCN_CTRL_CLINT0_8822C;
958 val8 = BIT_CLI0_DIS_TSF_UDT_8822C | BIT_CLI0_EN_BCN_FUNCTION_8822C;
959 }
960 #endif
961
962 rtw_write8(adapter, bcn_ctrl_reg, val8);
963 rtw_write8(adapter, REG_RD_CTRL_8822C + 1, 0x6F);
964 }
965
set_beacon_related_registers(PADAPTER adapter)966 static void set_beacon_related_registers(PADAPTER adapter)
967 {
968 u8 val8;
969 u32 value32;
970 PHAL_DATA_TYPE hal = GET_HAL_DATA(adapter);
971 struct mlme_ext_priv *pmlmeext = &adapter->mlmeextpriv;
972 struct mlme_ext_info *pmlmeinfo = &pmlmeext->mlmext_info;
973 u32 bcn_ctrl_reg, bcn_interval_reg;
974
975
976 /* reset TSF, enable update TSF, correcting TSF On Beacon */
977 /*
978 * REG_MBSSID_BCN_SPACE
979 * REG_BCNDMATIM
980 * REG_ATIMWND
981 * REG_TBTT_PROHIBIT
982 * REG_DRVERLYINT
983 * REG_BCN_MAX_ERR
984 * REG_BCNTCFG (0x510)
985 * REG_DUAL_TSF_RST
986 * REG_BCN_CTRL (0x550)
987 */
988
989 bcn_ctrl_reg = REG_BCN_CTRL_8822C;
990 #ifdef CONFIG_CONCURRENT_MODE
991 if (adapter->hw_port == HW_PORT1)
992 bcn_ctrl_reg = REG_BCN_CTRL_CLINT0_8822C;
993 #endif
994
995 /*
996 * ATIM window
997 */
998 rtw_write16(adapter, REG_ATIMWND_8822C, 2);
999
1000 /*
1001 * Beacon interval (in unit of TU).
1002 */
1003 rtw_hal_set_hwreg(adapter, HW_VAR_BEACON_INTERVAL, (u8 *)&pmlmeinfo->bcn_interval);
1004
1005 InitBeaconParameters(adapter);
1006
1007 rtw_write8(adapter, REG_SLOT_8822C, 0x09);
1008
1009 /* Reset TSF Timer to zero */
1010 val8 = BIT_TSFTR_RST_8822C;
1011 #ifdef CONFIG_CONCURRENT_MODE
1012 if (adapter->hw_port == HW_PORT1)
1013 val8 = BIT_TSFTR_CLI0_RST_8822C;
1014 #endif
1015 rtw_write8(adapter, REG_DUAL_TSF_RST_8822C, val8);
1016 val8 = BIT_TSFTR_RST_8822C;
1017 rtw_write8(adapter, REG_DUAL_TSF_RST_8822C, val8);
1018
1019 rtw_write8(adapter, REG_RXTSF_OFFSET_CCK_8822C, 0x50);
1020 rtw_write8(adapter, REG_RXTSF_OFFSET_OFDM_8822C, 0x50);
1021
1022 beacon_function_enable(adapter, _TRUE, _TRUE);
1023
1024 ResumeTxBeacon(adapter);
1025 }
1026
1027 #ifdef DBG_CONFIG_ERROR_DETECT
xmit_status_check(PADAPTER p)1028 static void xmit_status_check(PADAPTER p)
1029 {
1030 PHAL_DATA_TYPE hal = GET_HAL_DATA(p);
1031 struct sreset_priv *psrtpriv = &hal->srestpriv;
1032 struct xmit_priv *pxmitpriv = &p->xmitpriv;
1033 systime current_time = 0;
1034 unsigned int diff_time = 0;
1035 u32 txdma_status = 0;
1036
1037 txdma_status = rtw_read32(p, REG_TXDMA_STATUS_8822C);
1038 if (txdma_status != 0x00) {
1039 RTW_INFO("%s REG_TXDMA_STATUS:0x%08x\n", __FUNCTION__, txdma_status);
1040 psrtpriv->tx_dma_status_cnt++;
1041 psrtpriv->self_dect_case = 4;
1042 rtw_hal_sreset_reset(p);
1043 }
1044 #ifdef CONFIG_USB_HCI
1045 current_time = rtw_get_current_time();
1046
1047 if (0 == pxmitpriv->free_xmitbuf_cnt || 0 == pxmitpriv->free_xmit_extbuf_cnt) {
1048 diff_time = rtw_get_passing_time_ms(psrtpriv->last_tx_time);
1049
1050 if (diff_time > 2000) {
1051 if (psrtpriv->last_tx_complete_time == 0)
1052 psrtpriv->last_tx_complete_time = current_time;
1053 else {
1054 diff_time = rtw_get_passing_time_ms(psrtpriv->last_tx_complete_time);
1055 if (diff_time > 4000) {
1056
1057 RTW_INFO("%s tx hang %s\n", __FUNCTION__,
1058 !adapter_to_rfctl(p)->adaptivity_en ? "" :
1059 rtw_edcca_mode_str(rtw_get_edcca_mode(adapter_to_dvobj(p), hal->current_band_type)));
1060
1061 if (!adapter_to_rfctl(p)->adaptivity_en) {
1062 psrtpriv->self_dect_tx_cnt++;
1063 psrtpriv->self_dect_case = 1;
1064 rtw_hal_sreset_reset(p);
1065 }
1066 }
1067 }
1068 }
1069 }
1070 #endif /* CONFIG_USB_HCI */
1071
1072 if (psrtpriv->dbg_trigger_point == SRESET_TGP_XMIT_STATUS) {
1073 psrtpriv->dbg_trigger_point = SRESET_TGP_NULL;
1074 rtw_hal_sreset_reset(p);
1075 return;
1076 }
1077 }
1078
1079 #ifdef CONFIG_USB_HCI
check_rx_count(PADAPTER p)1080 static void check_rx_count(PADAPTER p)
1081 {
1082 PHAL_DATA_TYPE hal = GET_HAL_DATA(p);
1083 struct sreset_priv *psrtpriv = &hal->srestpriv;
1084 u16 cur_mac_rxff_ptr;
1085
1086 cur_mac_rxff_ptr = rtw_read16(p, REG_RXFF_PTR_V1_8822C);
1087
1088 #if 0
1089 RTW_INFO("%s,psrtpriv->last_mac_rxff_ptr = %d , cur_mac_rxff_ptr = %d\n", __func__, psrtpriv->last_mac_rxff_ptr, cur_mac_rxff_ptr);
1090 #endif
1091
1092 if (psrtpriv->last_mac_rxff_ptr == cur_mac_rxff_ptr) {
1093 psrtpriv->rx_cnt++;
1094 #if 0
1095 RTW_INFO("%s,MAC case rx_cnt=%d\n", __func__, psrtpriv->rx_cnt);
1096 #endif
1097 goto exit;
1098 }
1099
1100 psrtpriv->rx_cnt = 0;
1101
1102 exit:
1103
1104 psrtpriv->last_mac_rxff_ptr = cur_mac_rxff_ptr;
1105
1106 if (psrtpriv->rx_cnt > 3) {
1107 psrtpriv->self_dect_case = 2;
1108 psrtpriv->self_dect_rx_cnt++;
1109 rtw_hal_sreset_reset(p);
1110 }
1111 }
1112 #endif/*#ifdef CONFIG_USB_HCI*/
1113
linked_status_check(PADAPTER p)1114 static void linked_status_check(PADAPTER p)
1115 {
1116 PHAL_DATA_TYPE hal = GET_HAL_DATA(p);
1117 struct sreset_priv *psrtpriv = &hal->srestpriv;
1118 struct pwrctrl_priv *pwrpriv = adapter_to_pwrctl(p);
1119 u32 rx_dma_status = 0;
1120
1121 rx_dma_status = rtw_read32(p, REG_RXDMA_STATUS_8822C);
1122 if (rx_dma_status != 0x00) {
1123 RTW_INFO("%s REG_RXDMA_STATUS:0x%08x\n", __FUNCTION__, rx_dma_status);
1124 psrtpriv->rx_dma_status_cnt++;
1125 psrtpriv->self_dect_case = 5;
1126 #ifdef CONFIG_USB_HCI
1127 rtw_hal_sreset_reset(p);
1128 #endif /* CONFIG_USB_HCI */
1129 }
1130
1131 if (psrtpriv->self_dect_fw) {
1132 psrtpriv->self_dect_case = 3;
1133 #if defined(CONFIG_USB_HCI) || defined(CONFIG_PCI_HCI)
1134 rtw_hal_sreset_reset(p);
1135 #endif /* CONFIG_USB_HCI || CONFIG_PCI_HCI */
1136 }
1137
1138 #ifdef CONFIG_USB_HCI
1139 check_rx_count(p);
1140 #endif /* CONFIG_USB_HCI */
1141
1142 if (psrtpriv->dbg_trigger_point == SRESET_TGP_LINK_STATUS) {
1143 psrtpriv->dbg_trigger_point = SRESET_TGP_NULL;
1144 rtw_hal_sreset_reset(p);
1145 return;
1146 }
1147 }
1148 #endif /* DBG_CONFIG_ERROR_DETECT */
1149
set_opmode_monitor(PADAPTER adapter)1150 static void set_opmode_monitor(PADAPTER adapter)
1151 {
1152 #ifdef CONFIG_WIFI_MONITOR
1153 u8 tmp_8bit;
1154 u32 tmp_32bit;
1155 struct net_device *ndev = adapter->pnetdev;
1156 struct mon_reg_backup *mon = &GET_HAL_DATA(adapter)->mon_backup;
1157
1158 mon->known_rcr = 1;
1159 rtw_hal_get_hwreg(adapter, HW_VAR_RCR, (u8 *)& mon->rcr);
1160
1161 /* Receive all type */
1162 tmp_32bit = BIT_AAP_8822C | BIT_APP_PHYSTS_8822C;
1163
1164 if (ndev->type == ARPHRD_IEEE80211_RADIOTAP) {
1165 /* Append FCS */
1166 tmp_32bit |= BIT_APP_FCS_8822C;
1167 }
1168
1169 rtw_hal_set_hwreg(adapter, HW_VAR_RCR, (u8 *)& tmp_32bit);
1170
1171 if (1)
1172 rtw_halmac_config_rx_info(adapter_to_dvobj(adapter),
1173 HALMAC_DRV_INFO_PHY_SNIFFER);
1174 else
1175 rtw_halmac_config_rx_info(adapter_to_dvobj(adapter),
1176 HALMAC_DRV_INFO_PHY_PLCP);
1177
1178 tmp_8bit = rtw_read8(adapter, REG_RX_DRVINFO_SZ_8822C);
1179 rtw_write8(adapter, REG_RX_DRVINFO_SZ_8822C, (tmp_8bit | 0x80));
1180
1181 /* Receive all data frames */
1182 mon->known_rxfilter = 1;
1183 mon->rxfilter0 = rtw_read16(adapter, REG_RXFLTMAP0_8822C);
1184 mon->rxfilter1 = rtw_read16(adapter, REG_RXFLTMAP1_8822C);
1185 mon->rxfilter2 = rtw_read16(adapter, REG_RXFLTMAP2_8822C);
1186 rtw_write16(adapter, REG_RXFLTMAP0_8822C, 0xFFFF);
1187 rtw_write16(adapter, REG_RXFLTMAP1_8822C, 0xFFFF);
1188 rtw_write16(adapter, REG_RXFLTMAP2_8822C, 0xFFFF);
1189 #endif /* CONFIG_WIFI_MONITOR */
1190 }
1191 #ifndef CONFIG_MI_WITH_MBSSID_CAM
set_opmode_port0(PADAPTER adapter,u8 mode)1192 static void set_opmode_port0(PADAPTER adapter, u8 mode)
1193 {
1194 u8 is_tx_bcn;
1195 u8 val8;
1196 u16 val16;
1197 u32 val32;
1198
1199
1200 #ifdef CONFIG_CONCURRENT_MODE
1201 is_tx_bcn = rtw_mi_get_ap_num(adapter) || rtw_mi_get_mesh_num(adapter);
1202 #else /* !CONFIG_CONCURRENT_MODE */
1203 is_tx_bcn = 0;
1204 #endif /* !CONFIG_CONCURRENT_MODE */
1205
1206 /* disable Port0 TSF update */
1207 rtw_iface_disable_tsf_update(adapter);
1208
1209 Set_MSR(adapter, mode);
1210
1211 RTW_INFO(FUNC_ADPT_FMT ": hw_port(%d) mode=%d\n",
1212 FUNC_ADPT_ARG(adapter), adapter->hw_port, mode);
1213
1214 switch (mode) {
1215 case _HW_STATE_NOLINK_:
1216 case _HW_STATE_STATION_:
1217 if (!is_tx_bcn) {
1218 StopTxBeacon(adapter);
1219 #ifdef CONFIG_PCI_HCI
1220 UpdateInterruptMask8822CE(adapter, 0, 0, RT_BCN_INT_MASKS, 0);
1221 #endif /* CONFIG_PCI_HCI */
1222 }
1223
1224 /* disable beacon function */
1225 val8 = BIT_DIS_TSF_UDT_8822C | BIT_EN_BCN_FUNCTION_8822C;
1226 rtw_write8(adapter, REG_BCN_CTRL_8822C, val8);
1227
1228 /* disable atim wnd(only for Port0) */
1229 val8 = rtw_read8(adapter, REG_DIS_ATIM_8822C);
1230 val8 |= BIT_DIS_ATIM_ROOT_8822C;
1231 rtw_write8(adapter, REG_DIS_ATIM_8822C, val8);
1232 break;
1233
1234 case _HW_STATE_ADHOC_:
1235 ResumeTxBeacon(adapter);
1236 val8 = BIT_DIS_TSF_UDT_8822C | BIT_EN_BCN_FUNCTION_8822C;
1237 rtw_write8(adapter, REG_BCN_CTRL_8822C, val8);
1238 break;
1239
1240 case _HW_STATE_AP_:
1241 #ifdef CONFIG_PCI_HCI
1242 UpdateInterruptMask8822CE(adapter, RT_BCN_INT_MASKS, 0, 0, 0);
1243 #endif /* CONFIG_PCI_HCI */
1244
1245 /*
1246 * enable BCN0 Function for if1
1247 * disable update TSF0 for if1
1248 * enable TX BCN report:
1249 * Reg REG_FWHW_TXQ_CTRL_8822C [2] = 1
1250 * Reg REG_BCN_CTRL_8822C[3][5] = 1
1251 * Enable ATIM
1252 * Enable HW seq for BCN
1253 */
1254 /* enable TX BCN report */
1255 /* disable RX BCN report */
1256 val8 = rtw_read8(adapter, REG_FWHW_TXQ_CTRL_8822C);
1257 val8 |= BIT_EN_BCN_TRXRPT_V1_8822C;
1258 rtw_write8(adapter, REG_FWHW_TXQ_CTRL_8822C, val8);
1259
1260 /* enable BCN0 Function */
1261 val8 = rtw_read8(adapter, REG_BCN_CTRL_8822C);
1262 val8 |= BIT_EN_BCN_FUNCTION_8822C | BIT_DIS_TSF_UDT_8822C | BIT_P0_EN_TXBCN_RPT_8822C;
1263 val8 &= (~BIT_P0_EN_RXBCN_RPT_8822C);
1264 rtw_write8(adapter, REG_BCN_CTRL_8822C, val8);
1265
1266 /* Enable ATIM */
1267 val8 = rtw_read8(adapter, REG_DIS_ATIM_8822C);
1268 val8 &= ~BIT_DIS_ATIM_ROOT_8822C;
1269 rtw_write8(adapter, REG_DIS_ATIM_8822C, val8);
1270
1271 /* Enable HW seq for BCN
1272 0x4FC[0]: EN_HWSEQ
1273 0x4FC[1]: EN_HWSEQEXT
1274 According TX desc
1275 */
1276 rtw_write8(adapter, REG_DUMMY_PAGE4_V1_8822C, 0x01);
1277
1278 /* enable to rx data frame */
1279 rtw_write16(adapter, REG_RXFLTMAP2_8822C, 0xFFFF);
1280 /* enable to rx ps-poll */
1281 val16 = rtw_read16(adapter, REG_RXFLTMAP1_8822C);
1282 val16 |= BIT_CTRLFLT10EN_8822C;
1283 rtw_write16(adapter, REG_RXFLTMAP1_8822C, val16);
1284
1285 /* Beacon Control related register for first time */
1286 rtw_write8(adapter, REG_BCNDMATIM_8822C, 0x02); /* 2ms */
1287
1288 rtw_write8(adapter, REG_ATIMWND_8822C, 0x0c); /* 12ms */
1289
1290
1291 rtw_write16(adapter, REG_TSFTR_SYN_OFFSET_8822C, 0x7fff); /* +32767 (~32ms) */
1292
1293 /* reset TSF */
1294 rtw_write8(adapter, REG_DUAL_TSF_RST_8822C, BIT_TSFTR_RST_8822C);
1295
1296 /* SW_BCN_SEL - Port0 */
1297 rtw_hal_set_hwreg(adapter, HW_VAR_DL_BCN_SEL, NULL);
1298
1299 /* select BCN on port 0 */
1300 val8 = rtw_read8(adapter, REG_CCK_CHECK_8822C);
1301 val8 &= ~BIT_BCN_PORT_SEL_8822C;
1302 rtw_write8(adapter, REG_CCK_CHECK_8822C, val8);
1303 break;
1304 }
1305 }
set_opmode_port1(PADAPTER adapter,u8 mode)1306 static void set_opmode_port1(PADAPTER adapter, u8 mode)
1307 {
1308 #ifdef CONFIG_CONCURRENT_MODE
1309 u8 is_tx_bcn;
1310 u8 val8;
1311
1312 is_tx_bcn = rtw_mi_get_ap_num(adapter) || rtw_mi_get_mesh_num(adapter);
1313
1314 /* disable Port1 TSF update */
1315 rtw_iface_disable_tsf_update(adapter);
1316
1317 Set_MSR(adapter, mode);
1318
1319 RTW_INFO(FUNC_ADPT_FMT ": hw_port(%d) mode=%d\n",
1320 FUNC_ADPT_ARG(adapter), adapter->hw_port, mode);
1321
1322 switch (mode) {
1323 case _HW_STATE_NOLINK_:
1324 case _HW_STATE_STATION_:
1325 if (!is_tx_bcn) {
1326 StopTxBeacon(adapter);
1327 #ifdef CONFIG_PCI_HCI
1328 UpdateInterruptMask8822CE(adapter, 0, 0, RT_BCN_INT_MASKS, 0);
1329 #endif /* CONFIG_PCI_HCI */
1330 }
1331
1332 /* disable beacon function */
1333 val8 = BIT_CLI0_DIS_TSF_UDT_8822C | BIT_CLI0_EN_BCN_FUNCTION_8822C;
1334 rtw_write8(adapter, REG_BCN_CTRL_CLINT0_8822C, val8);
1335 break;
1336
1337 case _HW_STATE_ADHOC_:
1338 ResumeTxBeacon(adapter);
1339 val8 = BIT_CLI0_DIS_TSF_UDT_8822C | BIT_CLI0_EN_BCN_FUNCTION_8822C;
1340 rtw_write8(adapter, REG_BCN_CTRL_CLINT0_8822C, val8);
1341 break;
1342
1343 case _HW_STATE_AP_:
1344 #ifdef CONFIG_PCI_HCI
1345 UpdateInterruptMask8822CE(adapter, RT_BCN_INT_MASKS, 0, 0, 0);
1346 #endif /* CONFIG_PCI_HCI */
1347
1348 /* ToDo */
1349 break;
1350 }
1351 #endif /* CONFIG_CONCURRENT_MODE */
1352 }
1353 #endif /* !CONFIG_MI_WITH_MBSSID_CAM */
1354
hw_tsf_reset(_adapter * adapter)1355 void hw_tsf_reset(_adapter *adapter)
1356 {
1357 u8 hw_port = rtw_hal_get_port(adapter);
1358 u32 tsf_rst_addr = 0;
1359 u8 tsf_rst_bit = 0;
1360
1361 if (hw_port >= MAX_HW_PORT) {
1362 RTW_ERR(FUNC_ADPT_FMT" HW Port(%d) invalid\n", FUNC_ADPT_ARG(adapter), hw_port);
1363 rtw_warn_on(1);
1364 return;
1365 }
1366
1367 tsf_rst_addr = port_cfg[hw_port].tsf_rst;
1368 tsf_rst_bit = port_cfg[hw_port].tsf_rst_bit;
1369 rtw_write8(adapter, tsf_rst_addr, tsf_rst_bit);
1370 }
hw_set_ta(_adapter * adapter,u8 hw_port,u8 * val)1371 void hw_set_ta(_adapter *adapter, u8 hw_port, u8 *val)
1372 {
1373 u8 idx = 0;
1374 u32 reg = port_cfg[hw_port].ta;
1375
1376 for (idx = 0 ; idx < ETH_ALEN; idx++)
1377 rtw_write8(adapter, (reg + idx), val[idx]);
1378
1379 RTW_INFO("%s("ADPT_FMT") hw port -%d TA: "MAC_FMT"\n",
1380 __func__, ADPT_ARG(adapter), hw_port, MAC_ARG(val));
1381 }
hw_set_aid(_adapter * adapter,u8 hw_port,u8 aid)1382 void hw_set_aid(_adapter *adapter, u8 hw_port, u8 aid)
1383 {
1384 rtw_write16(adapter, port_cfg[hw_port].ps_aid, (0xF800 | aid));
1385 RTW_INFO("%s("ADPT_FMT") hw port -%d AID: %d\n",
1386 __func__, ADPT_ARG(adapter), hw_port, aid);
1387 }
1388 #ifdef CONFIG_CLIENT_PORT_CFG
rtw_hw_client_port_cfg(_adapter * adapter)1389 void rtw_hw_client_port_cfg(_adapter *adapter)
1390 {
1391 struct mlme_ext_priv *pmlmeext = &adapter->mlmeextpriv;
1392 struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info);
1393 u8 clt_port = get_clt_port(adapter);
1394
1395 if (clt_port == CLT_PORT_INVALID)
1396 return;
1397 RTW_INFO("%s ("ADPT_FMT")\n", __func__, ADPT_ARG(adapter));
1398
1399 /*Network type*/
1400 rtw_halmac_set_network_type(adapter_to_dvobj(adapter), clt_port, _HW_STATE_STATION_);
1401 /*A1*/
1402 rtw_halmac_set_mac_address(adapter_to_dvobj(adapter), clt_port, adapter_mac_addr(adapter));
1403 /*A2*/
1404 hw_set_ta(adapter, clt_port, pmlmeinfo->network.MacAddress);
1405 /*A3*/
1406 rtw_halmac_set_bssid(adapter_to_dvobj(adapter), clt_port, pmlmeinfo->network.MacAddress);
1407 /*Beacon space*/
1408 rtw_halmac_set_bcn_interval(adapter_to_dvobj(adapter), clt_port, pmlmeinfo->bcn_interval);
1409 /*AID*/
1410 hw_set_aid(adapter, clt_port, pmlmeinfo->aid);
1411 /*Beacon control*/
1412 hw_bcn_ctrl_set(adapter, clt_port, (BIT_P0_EN_RXBCN_RPT | BIT_EN_BCN_FUNCTION));
1413
1414 RTW_INFO("%s ("ADPT_FMT") clt_port:%d\n", __func__, ADPT_ARG(adapter), clt_port);
1415 }
1416
1417 /*#define DBG_TSF_MONITOR*/
rtw_hw_client_port_clr(_adapter * adapter)1418 void rtw_hw_client_port_clr(_adapter *adapter)
1419 {
1420 u8 null_addr[ETH_ALEN] = {0};
1421 u8 clt_port = get_clt_port(adapter);
1422
1423 if (clt_port == CLT_PORT_INVALID)
1424 return;
1425 RTW_INFO("%s ("ADPT_FMT") ==> \n", __func__, ADPT_ARG(adapter));
1426
1427 #ifdef DBG_TSF_MONITOR
1428 /*Beacon control*/
1429 hw_bcn_ctrl_clr(adapter, clt_port, BIT_EN_BCN_FUNCTION);
1430 hw_tsf_reset(adapter);
1431 #endif
1432
1433 /*Network type*/
1434 rtw_halmac_set_network_type(adapter_to_dvobj(adapter), clt_port, _HW_STATE_NOLINK_);
1435 /*A1*/
1436 rtw_halmac_set_mac_address(adapter_to_dvobj(adapter), clt_port, null_addr);
1437 /*A2*/
1438 hw_set_ta(adapter, clt_port, null_addr);
1439 /*A3*/
1440 rtw_halmac_set_bssid(adapter_to_dvobj(adapter), clt_port, null_addr);
1441
1442 #ifdef DBG_TSF_MONITOR
1443 if (0)
1444 #endif
1445 /*Beacon control*/
1446 hw_bcn_ctrl_set(adapter, clt_port, (BIT_DIS_TSF_UDT | BIT_EN_BCN_FUNCTION));
1447
1448 /*AID*/
1449 hw_set_aid(adapter, clt_port, 0);
1450 RTW_INFO("%s("ADPT_FMT") clt_port:%d\n", __func__, ADPT_ARG(adapter), clt_port);
1451 }
1452 #endif
1453
hw_var_set_opmode(PADAPTER adapter,u8 mode)1454 static void hw_var_set_opmode(PADAPTER adapter, u8 mode)
1455 {
1456 static u8 isMonitor = _FALSE;
1457
1458 if (isMonitor == _TRUE) {
1459 #ifdef CONFIG_WIFI_MONITOR
1460 struct mon_reg_backup *backup = &GET_HAL_DATA(adapter)->mon_backup;
1461
1462 if (backup->known_rcr) {
1463 backup->known_rcr = 0;
1464 rtw_hal_set_hwreg(adapter, HW_VAR_RCR, (u8 *)&backup->rcr);
1465
1466 if (!!(backup->rcr &= BIT_APP_PHYSTS_8822C))
1467 rtw_halmac_config_rx_info(adapter_to_dvobj(adapter),
1468 HALMAC_DRV_INFO_PHY_STATUS);
1469 else
1470 rtw_halmac_config_rx_info(adapter_to_dvobj(adapter),
1471 HALMAC_DRV_INFO_NONE);
1472
1473 rtw_hal_rcr_set_chk_bssid(adapter, MLME_ACTION_NONE);
1474 }
1475 if (backup->known_rxfilter) {
1476 backup->known_rxfilter = 0;
1477 rtw_write16(adapter, REG_RXFLTMAP0_8822C, backup->rxfilter0);
1478 rtw_write16(adapter, REG_RXFLTMAP1_8822C, backup->rxfilter1);
1479 rtw_write16(adapter, REG_RXFLTMAP2_8822C, backup->rxfilter2);
1480 }
1481 #endif /* CONFIG_WIFI_MONITOR */
1482 isMonitor = _FALSE;
1483 }
1484
1485 if (mode == _HW_STATE_MONITOR_) {
1486 isMonitor = _TRUE;
1487
1488 Set_MSR(adapter, _HW_STATE_NOLINK_);
1489 set_opmode_monitor(adapter);
1490 return;
1491 }
1492
1493 /* clear crc bit */
1494 if (rtw_hal_rcr_check(adapter, BIT_ACRC32_8822C))
1495 rtw_hal_rcr_clear(adapter, BIT_ACRC32_8822C);
1496
1497 #ifdef CONFIG_MI_WITH_MBSSID_CAM /*For Port0 - MBSS CAM*/
1498 if (adapter->hw_port != HW_PORT0) {
1499 RTW_ERR(ADPT_FMT ": Configure MBSSID cam on HW_PORT%d\n", ADPT_ARG(adapter), adapter->hw_port);
1500 rtw_warn_on(1);
1501 } else
1502 hw_var_set_opmode_mbid(adapter, mode);
1503 #else
1504
1505 switch (adapter->hw_port) {
1506 case HW_PORT0:
1507 set_opmode_port0(adapter, mode);
1508 break;
1509
1510 case HW_PORT1:
1511 set_opmode_port1(adapter, mode);
1512 break;
1513
1514 default:
1515 break;
1516 }
1517 #endif
1518 }
1519
hw_var_hw_port_cfg(_adapter * adapter,u8 enable)1520 static void hw_var_hw_port_cfg(_adapter *adapter, u8 enable)
1521 {
1522 if (enable)
1523 hw_bcn_ctrl_add(adapter, get_hw_port(adapter), (BIT_P0_EN_RXBCN_RPT | BIT_DIS_TSF_UDT | BIT_EN_BCN_FUNCTION));
1524 else
1525 hw_bcn_ctrl_clr(adapter, get_hw_port(adapter), BIT_EN_BCN_FUNCTION);
1526 }
1527
hw_var_set_bcn_func(PADAPTER adapter,u8 enable)1528 static void hw_var_set_bcn_func(PADAPTER adapter, u8 enable)
1529 {
1530 u8 val8 = 0;
1531
1532 if (enable) {
1533 /* enable TX BCN report
1534 * Reg REG_FWHW_TXQ_CTRL_8822C[2] = 1
1535 * Reg REG_BCN_CTRL_8822C[3][5] = 1
1536 */
1537 val8 = rtw_read8(adapter, REG_FWHW_TXQ_CTRL_8822C);
1538 val8 |= BIT_EN_BCN_TRXRPT_V1_8822C;
1539 rtw_write8(adapter, REG_FWHW_TXQ_CTRL_8822C, val8);
1540
1541
1542 switch (adapter->hw_port) {
1543 case HW_PORT0:
1544 val8 = BIT_EN_BCN_FUNCTION_8822C | BIT_P0_EN_TXBCN_RPT_8822C;
1545 hw_bcn_ctrl_clr(adapter, get_hw_port(adapter), BIT_P0_EN_RXBCN_RPT_8822C);
1546 break;
1547 #ifdef CONFIG_CONCURRENT_MODE
1548 case HW_PORT1:
1549 val8 = BIT_CLI0_EN_BCN_FUNCTION_8822C;
1550 hw_bcn_ctrl_clr(adapter, get_hw_port(adapter), BIT_CLI0_EN_RXBCN_RPT_8822C);
1551 break;
1552 case HW_PORT2:
1553 val8 = BIT_CLI1_EN_BCN_FUNCTION_8822C;
1554 hw_bcn_ctrl_clr(adapter, get_hw_port(adapter), BIT_CLI1_EN_RXBCN_RPT_8822C);
1555 break;
1556 case HW_PORT3:
1557 val8 = BIT_CLI2_EN_BCN_FUNCTION_8822C;
1558 hw_bcn_ctrl_clr(adapter, get_hw_port(adapter), BIT_CLI2_EN_RXBCN_RPT_8822C);
1559 break;
1560 case HW_PORT4:
1561 val8 = BIT_CLI3_EN_BCN_FUNCTION_8822C;
1562 hw_bcn_ctrl_clr(adapter, get_hw_port(adapter), BIT_CLI3_EN_RXBCN_RPT_8822C);
1563 break;
1564 #endif /* CONFIG_CONCURRENT_MODE */
1565 default:
1566 RTW_ERR(FUNC_ADPT_FMT" Unknow hw port(%d) \n", FUNC_ADPT_ARG(adapter), adapter->hw_port);
1567 rtw_warn_on(1);
1568 break;
1569
1570 }
1571 hw_bcn_ctrl_add(adapter, get_hw_port(adapter), val8);
1572 } else {
1573
1574 switch (adapter->hw_port) {
1575 case HW_PORT0:
1576 val8 = BIT_EN_BCN_FUNCTION_8822C | BIT_P0_EN_TXBCN_RPT_8822C;
1577 #ifdef CONFIG_BT_COEXIST
1578 /* Always enable port0 beacon function for PSTDMA */
1579 if (GET_HAL_DATA(adapter)->EEPROMBluetoothCoexist)
1580 val8 = BIT_P0_EN_TXBCN_RPT_8822C;
1581 #endif /* CONFIG_BT_COEXIST */
1582 break;
1583 #ifdef CONFIG_CONCURRENT_MODE
1584 case HW_PORT1:
1585 val8 = BIT_CLI0_EN_BCN_FUNCTION_8822C;
1586 break;
1587 case HW_PORT2:
1588 val8 = BIT_CLI1_EN_BCN_FUNCTION_8822C;
1589 break;
1590 case HW_PORT3:
1591 val8 = BIT_CLI2_EN_BCN_FUNCTION_8822C;
1592 break;
1593 case HW_PORT4:
1594 val8 = BIT_CLI3_EN_BCN_FUNCTION_8822C;
1595 break;
1596 #endif /* CONFIG_CONCURRENT_MODE */
1597 default:
1598 RTW_ERR(FUNC_ADPT_FMT" Unknow hw port(%d) \n", FUNC_ADPT_ARG(adapter), adapter->hw_port);
1599 rtw_warn_on(1);
1600 break;
1601 }
1602
1603 hw_bcn_ctrl_clr(adapter, get_hw_port(adapter), val8);
1604 }
1605 }
1606
hw_var_set_mlme_disconnect(PADAPTER adapter)1607 static void hw_var_set_mlme_disconnect(PADAPTER adapter)
1608 {
1609 u8 val8;
1610 struct mi_state mstate;
1611
1612 #ifdef CONFIG_CONCURRENT_MODE
1613 if (rtw_mi_check_status(adapter, MI_LINKED) == _FALSE)
1614 #endif
1615 /* reject all data frames under not link state */
1616 rtw_write16(adapter, REG_RXFLTMAP2_8822C, 0);
1617
1618 #ifdef CONFIG_CONCURRENT_MODE
1619 if (adapter->hw_port == HW_PORT1) {
1620 /* reset TSF1(CLINT0) */
1621 rtw_write8(adapter, REG_DUAL_TSF_RST_8822C, BIT_TSFTR_CLI0_RST_8822C);
1622
1623 /* disable update TSF1(CLINT0) */
1624 rtw_iface_disable_tsf_update(adapter);
1625
1626 /* disable Port1's beacon function */
1627 val8 = rtw_read8(adapter, REG_BCN_CTRL_CLINT0_8822C);
1628 val8 &= ~BIT_CLI0_EN_BCN_FUNCTION_8822C;
1629 rtw_write8(adapter, REG_BCN_CTRL_CLINT0_8822C, val8);
1630 } else
1631 #endif
1632 {
1633 /* reset TSF */
1634 rtw_write8(adapter, REG_DUAL_TSF_RST_8822C, BIT_TSFTR_RST_8822C);
1635
1636 /* disable update TSF */
1637 rtw_iface_disable_tsf_update(adapter);
1638 }
1639
1640 rtw_mi_status_no_self(adapter, &mstate);
1641
1642 /* clear update TSF only BSSID match for no linked station */
1643 if (MSTATE_STA_LD_NUM(&mstate) == 0 && MSTATE_STA_LG_NUM(&mstate) == 0)
1644 rtl8822c_rx_tsf_addr_filter_config(adapter, 0);
1645
1646 #ifdef CONFIG_CLIENT_PORT_CFG
1647 if (MLME_IS_STA(adapter))
1648 rtw_hw_client_port_clr(adapter);
1649 #endif
1650
1651 }
1652
hw_var_set_mlme_sitesurvey(PADAPTER adapter,u8 enable)1653 static void hw_var_set_mlme_sitesurvey(PADAPTER adapter, u8 enable)
1654 {
1655 struct dvobj_priv *dvobj;
1656 PHAL_DATA_TYPE hal;
1657 struct mlme_priv *pmlmepriv;
1658 PADAPTER iface;
1659 u32 reg_bcn_ctl;
1660 u16 value_rxfltmap2;
1661 u8 val8, i;
1662
1663
1664 dvobj = adapter_to_dvobj(adapter);
1665 hal = GET_HAL_DATA(adapter);
1666 pmlmepriv = &adapter->mlmepriv;
1667
1668 #ifdef CONFIG_FIND_BEST_CHANNEL
1669 /* Receive all data frames */
1670 value_rxfltmap2 = 0xFFFF;
1671 #else
1672 /* not to receive data frame */
1673 value_rxfltmap2 = 0;
1674 #endif
1675
1676 if (enable) {
1677 /*
1678 * 1. configure REG_RXFLTMAP2
1679 * 2. config RCR to receive different BSSID BCN or probe rsp
1680 */
1681
1682 rtw_write16(adapter, REG_RXFLTMAP2_8822C, value_rxfltmap2);
1683
1684 rtw_hal_rcr_set_chk_bssid(adapter, MLME_SCAN_ENTER);
1685
1686 if (rtw_mi_get_ap_num(adapter) || rtw_mi_get_mesh_num(adapter))
1687 StopTxBeacon(adapter);
1688 } else {
1689 /* sitesurvey done
1690 * 1. enable rx data frame
1691 * 2. config RCR not to receive different BSSID BCN or probe rsp
1692 */
1693
1694 if (rtw_mi_check_fwstate(adapter, WIFI_ASOC_STATE | WIFI_AP_STATE | WIFI_MESH_STATE))
1695 /* enable to rx data frame */
1696 rtw_write16(adapter, REG_RXFLTMAP2_8822C, 0xFFFF);
1697
1698 rtw_hal_rcr_set_chk_bssid(adapter, MLME_SCAN_DONE);
1699
1700 #ifdef CONFIG_AP_MODE
1701 if (rtw_mi_get_ap_num(adapter) || rtw_mi_get_mesh_num(adapter)) {
1702 ResumeTxBeacon(adapter);
1703 rtw_mi_tx_beacon_hdl(adapter);
1704 }
1705 #endif
1706 }
1707 }
1708
hw_var_set_mlme_join(PADAPTER adapter,u8 type)1709 static void hw_var_set_mlme_join(PADAPTER adapter, u8 type)
1710 {
1711 u8 val8;
1712 u16 val16;
1713 u32 val32;
1714 u8 RetryLimit;
1715 PHAL_DATA_TYPE hal;
1716 struct mlme_priv *pmlmepriv;
1717
1718 RetryLimit = RL_VAL_STA;
1719 hal = GET_HAL_DATA(adapter);
1720 pmlmepriv = &adapter->mlmepriv;
1721
1722
1723 #ifdef CONFIG_CONCURRENT_MODE
1724 if (type == 0) {
1725 /* prepare to join */
1726 if (rtw_mi_get_ap_num(adapter) || rtw_mi_get_mesh_num(adapter))
1727 StopTxBeacon(adapter);
1728
1729 /* enable to rx data frame.Accept all data frame */
1730 rtw_write16(adapter, REG_RXFLTMAP2_8822C, 0xFFFF);
1731
1732 if (check_fwstate(pmlmepriv, WIFI_STATION_STATE) == _TRUE)
1733 RetryLimit = (hal->CustomerID == RT_CID_CCX) ? RL_VAL_AP : RL_VAL_STA;
1734 else /* Ad-hoc Mode */
1735 RetryLimit = RL_VAL_AP;
1736
1737 /*
1738 * for 8822C, must enable BCN function if BIT_CBSSID_BCN_8822C(bit 7) of REG_RCR(0x608) is enable to recv BSSID bcn
1739 */
1740 hw_var_set_bcn_func(adapter, _TRUE);
1741
1742 /* update TSF only BSSID match for station mode */
1743 rtl8822c_rx_tsf_addr_filter_config(adapter, BIT_CHK_TSF_EN_8822C | BIT_CHK_TSF_CBSSID_8822C);
1744 #ifdef CONFIG_CLIENT_PORT_CFG
1745 rtw_hw_client_port_cfg(adapter);
1746 #endif
1747
1748 rtw_iface_enable_tsf_update(adapter);
1749
1750 } else if (type == 1) {
1751 /* joinbss_event call back when join res < 0 */
1752 if (rtw_mi_check_status(adapter, MI_LINKED) == _FALSE)
1753 rtw_write16(adapter, REG_RXFLTMAP2_8822C, 0x00);
1754
1755 rtw_iface_disable_tsf_update(adapter);
1756
1757 if (rtw_mi_get_ap_num(adapter) || rtw_mi_get_mesh_num(adapter)) {
1758 ResumeTxBeacon(adapter);
1759
1760 /* reset TSF 1/2 after resume_tx_beacon */
1761 val8 = BIT_TSFTR_RST_8822C | BIT_TSFTR_CLI0_RST_8822C;
1762 rtw_write8(adapter, REG_DUAL_TSF_RST_8822C, val8);
1763 }
1764 #ifdef CONFIG_CLIENT_PORT_CFG
1765 if (MLME_IS_STA(adapter))
1766 rtw_hw_client_port_clr(adapter);
1767 #endif
1768
1769 } else if (type == 2) {
1770 /* sta add event callback */
1771 if (check_fwstate(pmlmepriv, WIFI_ADHOC_STATE | WIFI_ADHOC_MASTER_STATE)) {
1772 rtw_write8(adapter, 0x542, 0x02);
1773 RetryLimit = RL_VAL_AP;
1774 }
1775
1776 if (rtw_mi_get_ap_num(adapter) || rtw_mi_get_mesh_num(adapter)) {
1777 ResumeTxBeacon(adapter);
1778
1779 /* reset TSF 1/2 after resume_tx_beacon */
1780 rtw_write8(adapter, REG_DUAL_TSF_RST_8822C, BIT_TSFTR_RST_8822C | BIT_TSFTR_CLI0_RST_8822C);
1781 }
1782 }
1783
1784 val16 = BIT_LRL_8822C(RetryLimit) | BIT_SRL_8822C(RetryLimit);
1785 rtw_write16(adapter, REG_RETRY_LIMIT_8822C, val16);
1786 #else /* !CONFIG_CONCURRENT_MODE */
1787 if (type == 0) {
1788 /* prepare to join */
1789
1790 /* enable to rx data frame. Accept all data frame */
1791 rtw_write16(adapter, REG_RXFLTMAP2_8822C, 0xFFFF);
1792
1793 /*
1794 * for 8822C, must enable BCN function if BIT_CBSSID_BCN_8822C(bit 7) of REG_RCR(0x608) is enabled to recv BSSID bcn
1795 */
1796 hw_var_set_bcn_func(adapter, _TRUE);
1797
1798 /* update TSF only BSSID match for station mode */
1799 rtl8822c_rx_tsf_addr_filter_config(adapter, BIT_CHK_TSF_EN_8822C | BIT_CHK_TSF_CBSSID_8822C);
1800
1801 if (check_fwstate(pmlmepriv, WIFI_STATION_STATE) == _TRUE)
1802 RetryLimit = (hal->CustomerID == RT_CID_CCX) ? RL_VAL_AP : RL_VAL_STA;
1803 else /* Ad-hoc Mode */
1804 RetryLimit = RL_VAL_AP;
1805
1806 rtw_iface_enable_tsf_update(adapter);
1807
1808 } else if (type == 1) {
1809 /* joinbss_event call back when join res < 0 */
1810 rtw_write16(adapter, REG_RXFLTMAP2_8822C, 0x00);
1811
1812 rtw_iface_disable_tsf_update(adapter);
1813
1814 } else if (type == 2) {
1815 /* sta add event callback */
1816 if (check_fwstate(pmlmepriv, WIFI_ADHOC_STATE | WIFI_ADHOC_MASTER_STATE))
1817 RetryLimit = RL_VAL_AP;
1818 }
1819
1820 val16 = BIT_LRL_8822C(RetryLimit) | BIT_SRL_8822C(RetryLimit);
1821 rtw_write16(adapter, REG_RETRY_LIMIT_8822C, val16);
1822 #endif /* !CONFIG_CONCURRENT_MODE */
1823 }
1824
hw_var_set_acm_ctrl(PADAPTER adapter,u8 ctrl)1825 static void hw_var_set_acm_ctrl(PADAPTER adapter, u8 ctrl)
1826 {
1827 u8 hwctrl = 0;
1828
1829 if (ctrl) {
1830 hwctrl |= BIT_ACMHWEN_8822C;
1831
1832 if (ctrl & BIT(1)) /* BE */
1833 hwctrl |= BIT_BEQ_ACM_EN_8822C;
1834 else
1835 hwctrl &= (~BIT_BEQ_ACM_EN_8822C);
1836
1837 if (ctrl & BIT(2)) /* VI */
1838 hwctrl |= BIT_VIQ_ACM_EN_8822C;
1839 else
1840 hwctrl &= (~BIT_VIQ_ACM_EN_8822C);
1841
1842 if (ctrl & BIT(3)) /* VO */
1843 hwctrl |= BIT_VOQ_ACM_EN_8822C;
1844 else
1845 hwctrl &= (~BIT_VOQ_ACM_EN_8822C);
1846 }
1847
1848 RTW_INFO("[HW_VAR_ACM_CTRL] Write 0x%02X\n", hwctrl);
1849 rtw_write8(adapter, REG_ACMHWCTRL_8822C, hwctrl);
1850 }
1851
hw_var_lps_rfon_chk(_adapter * adapter,u8 rfon_ctrl)1852 void hw_var_lps_rfon_chk(_adapter *adapter, u8 rfon_ctrl)
1853 {
1854 #ifdef CONFIG_LPS_ACK
1855 struct pwrctrl_priv *pwrpriv = adapter_to_pwrctl(adapter);
1856
1857 if (rfon_ctrl == rf_on) {
1858 if (rtw_sctx_wait(&pwrpriv->lps_ack_sctx, __func__)) {
1859 if (pwrpriv->lps_ack_status > 0)
1860 RTW_INFO(FUNC_ADPT_FMT" RF_ON function is not ready !!!\n", FUNC_ADPT_ARG(adapter));
1861 } else {
1862 RTW_WARN("LPS RFON sctx query timeout, operation abort!!\n");
1863 }
1864 pwrpriv->lps_ack_status = -1;
1865 }
1866 #endif
1867 }
1868
hw_var_set_sec_dk_cfg(PADAPTER adapter,u8 enable)1869 static void hw_var_set_sec_dk_cfg(PADAPTER adapter, u8 enable)
1870 {
1871 struct security_priv *sec = &adapter->securitypriv;
1872 u8 reg_scr = rtw_read8(adapter, REG_SECCFG_8822C);
1873
1874 if (enable) {
1875 /* Enable default key related setting */
1876 reg_scr |= BIT_TXBCUSEDK_8822C;
1877 if (sec->dot11AuthAlgrthm != dot11AuthAlgrthm_8021X)
1878 reg_scr |= BIT_RXUHUSEDK_8822C | BIT_TXUHUSEDK_8822C;
1879 } else {
1880 /* Disable default key related setting */
1881 reg_scr &= ~(BIT_RXBCUSEDK_8822C | BIT_TXBCUSEDK_8822C | BIT_RXUHUSEDK_8822C | BIT_TXUHUSEDK_8822C);
1882 }
1883
1884 rtw_write8(adapter, REG_SECCFG_8822C, reg_scr);
1885
1886 RTW_INFO("%s: [HW_VAR_SEC_DK_CFG] 0x%x=0x%08x\n", __FUNCTION__,
1887 REG_SECCFG_8822C, rtw_read32(adapter, REG_SECCFG_8822C));
1888 }
1889
hw_var_set_bcn_valid(PADAPTER adapter)1890 static void hw_var_set_bcn_valid(PADAPTER adapter)
1891 {
1892 u8 val8 = 0;
1893
1894 /* only port 0 can TX BCN */
1895 val8 = rtw_read8(adapter, REG_FIFOPAGE_CTRL_2_8822C + 1);
1896 val8 = val8 | BIT(7);
1897 rtw_write8(adapter, REG_FIFOPAGE_CTRL_2_8822C + 1, val8);
1898 }
1899
hw_var_set_ack_preamble(PADAPTER adapter,u8 bShortPreamble)1900 static void hw_var_set_ack_preamble(PADAPTER adapter, u8 bShortPreamble)
1901 {
1902 u8 val8 = 0;
1903
1904
1905 val8 = rtw_read8(adapter, REG_WMAC_TRXPTCL_CTL_8822C + 2);
1906 val8 |= BIT(4) | BIT(5);
1907
1908 if (bShortPreamble)
1909 val8 |= BIT1;
1910 else
1911 val8 &= (~BIT1);
1912
1913 rtw_write8(adapter, REG_WMAC_TRXPTCL_CTL_8822C + 2, val8);
1914 }
1915
hw_var_set_dl_rsvd_page(PADAPTER adapter,u8 mstatus)1916 void hw_var_set_dl_rsvd_page(PADAPTER adapter, u8 mstatus)
1917 {
1918 PHAL_DATA_TYPE hal = GET_HAL_DATA(adapter);
1919 struct mlme_ext_priv *pmlmeext = &adapter->mlmeextpriv;
1920 struct mlme_ext_info *pmlmeinfo = &pmlmeext->mlmext_info;
1921 struct pwrctrl_priv *pwrpriv = adapter_to_pwrctl(adapter);
1922 u8 bcn_valid = _FALSE;
1923 u8 DLBcnCount = 0;
1924 u32 poll = 0;
1925 u8 val8;
1926 u8 restore[3];
1927 u8 hw_port = rtw_hal_get_port(adapter);
1928
1929 RTW_INFO(FUNC_ADPT_FMT ":+ hw_port=%d mstatus(%x)\n",
1930 FUNC_ADPT_ARG(adapter), hw_port, mstatus);
1931
1932 if (mstatus == RT_MEDIA_CONNECT) {
1933 #if 0
1934 u8 bRecover = _FALSE;
1935 #endif
1936 u8 v8;
1937
1938 /* We should set AID, correct TSF, HW seq enable before set JoinBssReport to Fw in 8822C. */
1939 rtw_write16(adapter, port_cfg[hw_port].ps_aid, (0xF800 | pmlmeinfo->aid));
1940
1941 /* Enable SW TX beacon */
1942 v8 = rtw_read8(adapter, REG_CR_8822C + 1);
1943 restore[0] = v8;
1944 v8 |= (BIT_ENSWBCN_8822C >> 8);
1945 rtw_write8(adapter, REG_CR_8822C + 1, v8);
1946
1947 /*
1948 * Disable Hw protection for a time which revserd for Hw sending beacon.
1949 * Fix download reserved page packet fail that access collision with the protection time.
1950 */
1951 val8 = rtw_read8(adapter, REG_BCN_CTRL_8822C);
1952 restore[1] = val8;
1953 /* val8 &= ~BIT_EN_BCN_FUNCTION_8822C; */
1954 restore[2] = rtw_read8(adapter, REG_FWHW_TXQ_CTRL_8822C + 2);
1955 if (restore[2] & BIT(6)) {
1956 rtw_write8(adapter, REG_FWHW_TXQ_CTRL_8822C + 2,
1957 (restore[2] & ~BIT(6)));
1958 }
1959 val8 |= BIT_DIS_TSF_UDT_8822C;
1960 rtw_write8(adapter, REG_BCN_CTRL_8822C, val8);
1961
1962 #if 0
1963 /* Set FWHW_TXQ_CTRL 0x422[6]=0 to tell Hw the packet is not a real beacon frame. */
1964 RegFwHwTxQCtrl = rtw_read8(adapter, REG_FWHW_TXQ_CTRL_8822C + 2);
1965
1966 if (RegFwHwTxQCtrl & BIT(6))
1967 bRecover = _TRUE;
1968
1969 /* To tell Hw the packet is not a real beacon frame. */
1970 RegFwHwTxQCtrl &= ~BIT(6);
1971 rtw_write8(adapter, REG_FWHW_TXQ_CTRL_8822C + 2, RegFwHwTxQCtrl);
1972 #endif
1973
1974 /* Clear beacon valid check bit. */
1975 rtw_hal_set_hwreg(adapter, HW_VAR_BCN_VALID, NULL);
1976 rtw_hal_set_hwreg(adapter, HW_VAR_DL_BCN_SEL, NULL);
1977
1978 DLBcnCount = 0;
1979 poll = 0;
1980 do {
1981 /* download rsvd page. */
1982 rtw_hal_set_fw_rsvd_page(adapter, _FALSE);
1983 DLBcnCount++;
1984 do {
1985 rtw_yield_os();
1986
1987 /* check rsvd page download OK. */
1988 rtw_hal_get_hwreg(adapter, HW_VAR_BCN_VALID, (u8 *)&bcn_valid);
1989 poll++;
1990 } while (!bcn_valid && (poll % 10) != 0 && !RTW_CANNOT_RUN(adapter));
1991
1992 } while (!bcn_valid && DLBcnCount <= 100 && !RTW_CANNOT_RUN(adapter));
1993
1994 if (RTW_CANNOT_RUN(adapter))
1995 ;
1996 else if (!bcn_valid)
1997 RTW_INFO(FUNC_ADPT_FMT ": DL RSVD page failed! DLBcnCount:%u, poll:%u\n",
1998 FUNC_ADPT_ARG(adapter), DLBcnCount, poll);
1999 else {
2000 struct pwrctrl_priv *pwrctl = adapter_to_pwrctl(adapter);
2001
2002 pwrctl->fw_psmode_iface_id = adapter->iface_id;
2003 rtw_hal_set_fw_rsvd_page(adapter, _TRUE);
2004 RTW_INFO(ADPT_FMT ": DL RSVD page success! DLBcnCount:%u, poll:%u\n",
2005 ADPT_ARG(adapter), DLBcnCount, poll);
2006 }
2007
2008 rtw_write8(adapter, REG_FWHW_TXQ_CTRL_8822C + 2, restore[2]);
2009 rtw_write8(adapter, REG_BCN_CTRL, restore[1]);
2010 rtw_write8(adapter, REG_CR + 1, restore[0]);
2011 #if 0
2012 /*
2013 * To make sure that if there exists an adapter which would like to send beacon.
2014 * If exists, the origianl value of 0x422[6] will be 1, we should check this to
2015 * prevent from setting 0x422[6] to 0 after download reserved page, or it will cause
2016 * the beacon cannot be sent by HW.
2017 */
2018 if (bRecover) {
2019 RegFwHwTxQCtrl |= BIT(6);
2020 rtw_write8(adapter, REG_FWHW_TXQ_CTRL_8822C + 2, RegFwHwTxQCtrl);
2021 }
2022 #endif
2023 #ifndef CONFIG_PCI_HCI
2024 /* Clear CR[8] or beacon packet will not be send to TxBuf anymore. */
2025 v8 = rtw_read8(adapter, REG_CR_8822C + 1);
2026 v8 &= ~BIT(0); /* ~ENSWBCN */
2027 rtw_write8(adapter, REG_CR_8822C + 1, v8);
2028 #endif /* !CONFIG_PCI_HCI */
2029 }
2030 }
2031
hw_var_set_h2c_fw_joinbssrpt(PADAPTER adapter,u8 mstatus)2032 static void hw_var_set_h2c_fw_joinbssrpt(PADAPTER adapter, u8 mstatus)
2033 {
2034 if (mstatus == RT_MEDIA_CONNECT)
2035 hw_var_set_dl_rsvd_page(adapter, RT_MEDIA_CONNECT);
2036 }
2037
2038 #ifdef CONFIG_WOWLAN
hw_var_vendor_wow_mode(_adapter * adapter,u8 en)2039 static void hw_var_vendor_wow_mode(_adapter *adapter, u8 en)
2040 {
2041 #ifdef CONFIG_CONCURRENT_MODE
2042 _adapter *iface = NULL;
2043 struct dvobj_priv *dvobj = adapter_to_dvobj(adapter);
2044 struct mlme_priv *pmlmepriv = &adapter->mlmepriv;
2045 u8 igi = 0, mac_addr[ETH_ALEN];
2046
2047 RTW_INFO("%s: en(%d)--->\n", __func__, en);
2048 if (en) {
2049 rtw_hal_get_hwreg(adapter, HW_VAR_MAC_ADDR, mac_addr);
2050 /* RTW_INFO("suspend mac addr: "MAC_FMT"\n", MAC_ARG(mac_addr)); */
2051 rtw_halmac_set_bssid(dvobj, HW_PORT4, mac_addr);
2052 dvobj->rxfltmap2_bf_suspend = rtw_read16(adapter, REG_RXFLTMAP2);
2053 dvobj->bcn_ctrl_clint3_bf_suspend = rtw_read8(adapter, REG_BCN_CTRL_CLINT3);
2054 dvobj->rcr_bf_suspend = rtw_read32(adapter, REG_RCR);
2055 dvobj->cr_ext_bf_suspend = rtw_read32(adapter, REG_CR_EXT);
2056 /*RTW_INFO("RCR: 0x%02x, REG_CR_EXT: 0x%02x , REG_BCN_CTRL_CLINT3: 0x%02x, REG_RXFLTMAP2:0x%02x, REG_MACID_DROP0_8822B:0x%02x\n"
2057 , rtw_read32(adapter, REG_RCR), rtw_read8(adapter, REG_CR_EXT), rtw_read8(adapter, REG_BCN_CTRL_CLINT3)
2058 , rtw_read32(adapter, REG_RXFLTMAP2), rtw_read8(adapter, REG_MACID_DROP0_8822B)); */
2059 rtw_write32(adapter, REG_RCR, (rtw_read32(adapter, REG_RCR) & (~(RCR_AM))) | RCR_CBSSID_DATA | RCR_CBSSID_BCN);
2060 /* set PORT4 to ad hoc mode to filter not necessary Beacons */
2061 rtw_write8(adapter, REG_CR_EXT, (rtw_read8(adapter, REG_CR_EXT)& (~BIT5)) | BIT4);
2062 rtw_write8(adapter, REG_BCN_CTRL_CLINT3, rtw_read8(adapter, REG_BCN_CTRL_CLINT3) | BIT3);
2063 rtw_write16(adapter, REG_RXFLTMAP2, 0xffff);
2064 /* RTW_INFO("RCR: 0x%02x, REG_CR_EXT: 0x%02x , REG_BCN_CTRL_CLINT3: 0x%02x, REG_RXFLTMAP2:0x%02x, REG_MACID_DROP0_8822B:0x%02x\n"
2065 , rtw_read32(adapter, REG_RCR), rtw_read8(adapter, REG_CR_EXT), rtw_read8(adapter, REG_BCN_CTRL_CLINT3)
2066 , rtw_read32(adapter, REG_RXFLTMAP2), rtw_read8(adapter, REG_MACID_DROP0_8822B)); */
2067
2068 /* The WRC's RSSI is weak. Set the IGI to lower */
2069 odm_write_dig(adapter_to_phydm(adapter), 0x24);
2070 } else {
2071 /* restore the rcr, port ctrol setting */
2072 rtw_write32(adapter, REG_CR_EXT, dvobj->cr_ext_bf_suspend);
2073 rtw_write32(adapter, REG_RCR, dvobj->rcr_bf_suspend);
2074 rtw_write8(adapter, REG_BCN_CTRL_CLINT3, dvobj->bcn_ctrl_clint3_bf_suspend);
2075 rtw_write16(adapter, REG_RXFLTMAP2, dvobj->rxfltmap2_bf_suspend);
2076
2077 /* RTW_INFO("RCR: 0x%02x, REG_CR_EXT: 0x%02x , REG_BCN_CTRL_CLINT3: 0x%02x, REG_RXFLTMAP2:0x%02x, REG_MACID_DROP0_8822B:0x%02x\n"
2078 , rtw_read32(adapter, REG_RCR), rtw_read8(adapter, REG_CR_EXT), rtw_read8(adapter, REG_BCN_CTRL_CLINT3)
2079 , rtw_read32(adapter, REG_RXFLTMAP2), rtw_read8(adapter, REG_MACID_DROP0_8822B)); */
2080 }
2081 #endif /* CONFIG_CONCURRENT_MODE */
2082 }
2083 #endif /* CONFIG_WOWLAN */
2084
2085
2086 /*
2087 * Parameters:
2088 * adapter
2089 * enable _TRUE: enable; _FALSE: disable
2090 */
rx_agg_switch(PADAPTER adapter,u8 enable)2091 static u8 rx_agg_switch(PADAPTER adapter, u8 enable)
2092 {
2093 int err;
2094
2095 err = rtw_halmac_rx_agg_switch(adapter_to_dvobj(adapter), enable);
2096 if (err)
2097 return _FAIL;
2098
2099 return _SUCCESS;
2100 }
2101
2102
2103 #ifdef CONFIG_AP_PORT_SWAP
2104 /*
2105 * Parameters:
2106 * if_ap ap interface
2107 * if_port0 port0 interface
2108 */
2109
hw_port_reconfig(_adapter * if_ap,_adapter * if_port0)2110 static void hw_port_reconfig(_adapter * if_ap, _adapter *if_port0)
2111 {
2112 struct hal_spec_t *hal_spec = GET_HAL_SPEC(if_port0);
2113 struct mlme_ext_priv *pmlmeext = &if_port0->mlmeextpriv;
2114 struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info);
2115 u32 bssid_offset = 0;
2116 u8 bssid[6] = {0};
2117 u8 vnet_type = 0;
2118 u8 vbcn_ctrl = 0;
2119 u8 i;
2120 u8 port = if_ap->hw_port;
2121
2122 if (port > (hal_spec->port_num - 1)) {
2123 RTW_INFO("[WARN] "ADPT_FMT"- hw_port : %d,will switch to invalid port-%d\n",
2124 ADPT_ARG(if_port0), if_port0->hw_port, port);
2125 rtw_warn_on(1);
2126 }
2127
2128 RTW_PRINT(ADPT_FMT" - hw_port : %d,will switch to port-%d\n",
2129 ADPT_ARG(if_port0), if_port0->hw_port, port);
2130
2131 /*backup*/
2132 GetHwReg(if_port0, HW_VAR_MEDIA_STATUS, &vnet_type);
2133 vbcn_ctrl = rtw_read8(if_port0, port_cfg[if_port0->hw_port].bcn_ctl);
2134
2135 if (is_client_associated_to_ap(if_port0)) {
2136 RTW_INFO("port0-iface("ADPT_FMT") is STA mode and linked\n", ADPT_ARG(if_port0));
2137 bssid_offset = port_cfg[if_port0->hw_port].bssid;
2138 for (i = 0; i < 6; i++)
2139 bssid[i] = rtw_read8(if_port0, bssid_offset + i);
2140 }
2141
2142 /*reconfigure*/
2143 if_port0->hw_port = port;
2144 /* adapter mac addr switch to port mac addr */
2145 rtw_hal_set_hwreg(if_port0, HW_VAR_MAC_ADDR, adapter_mac_addr(if_port0));
2146 Set_MSR(if_port0, vnet_type);
2147 rtw_write8(if_port0, port_cfg[if_port0->hw_port].bcn_ctl, vbcn_ctrl);
2148
2149 if (is_client_associated_to_ap(if_port0)) {
2150 rtw_hal_set_hwreg(if_port0, HW_VAR_BSSID, bssid);
2151 #ifdef CONFIG_FW_MULTI_PORT_SUPPORT
2152 rtw_set_default_port_id(if_port0);
2153 #endif
2154 }
2155
2156 #if defined(CONFIG_BT_COEXIST) && defined(CONFIG_FW_MULTI_PORT_SUPPORT)
2157 if (GET_HAL_DATA(if_port0)->EEPROMBluetoothCoexist == _TRUE)
2158 rtw_hal_set_wifi_btc_port_id_cmd(if_port0);
2159 #endif
2160
2161 if_ap->hw_port =HW_PORT0;
2162 /* port mac addr switch to adapter mac addr */
2163 rtw_hal_set_hwreg(if_ap, HW_VAR_MAC_ADDR, adapter_mac_addr(if_ap));
2164 }
2165
hw_var_ap_port_switch(_adapter * adapter,u8 mode)2166 static void hw_var_ap_port_switch(_adapter *adapter, u8 mode)
2167 {
2168 u8 hw_port = get_hw_port(adapter);
2169 struct dvobj_priv *dvobj = adapter_to_dvobj(adapter);
2170 u8 ap_nums = 0;
2171 _adapter *if_port0 = NULL;
2172 int i;
2173
2174 RTW_INFO(ADPT_FMT ": hw_port(%d) will set mode to %d\n", ADPT_ARG(adapter), hw_port, mode);
2175 #if 0
2176 #ifdef CONFIG_P2P
2177 if (!rtw_p2p_chk_state(&adapter->wdinfo, P2P_STATE_NONE)) {
2178 RTW_INFO("%s, role=%d, p2p_state=%d, pre_p2p_state=%d\n", __func__,
2179 rtw_p2p_role(&adapter->wdinfo), rtw_p2p_state(&adapter->wdinfo), rtw_p2p_pre_state(&adapter->wdinfo));
2180 }
2181 #endif
2182 #endif
2183
2184 if (mode != _HW_STATE_AP_)
2185 return;
2186
2187 if (hw_port == HW_PORT0)
2188 return;
2189
2190 /*check and prepare switch port to port0 for AP mode's BCN function*/
2191 ap_nums = rtw_mi_get_ap_num(adapter);
2192 if (ap_nums > 0) {
2193 RTW_ERR("SortAP mode numbers:%d, must move setting to MBSSID CAM, not support yet\n", ap_nums);
2194 rtw_warn_on(1);
2195 return;
2196 }
2197
2198 /*Get iface of port-0*/
2199 for (i = 0; i < dvobj->iface_nums; i++) {
2200 if (get_hw_port(dvobj->padapters[i]) == HW_PORT0) {
2201 if_port0 = dvobj->padapters[i];
2202 break;
2203 }
2204 }
2205
2206 if (if_port0 == NULL) {
2207 RTW_ERR("%s if_port0 == NULL\n", __func__);
2208 rtw_warn_on(1);
2209 return;
2210 }
2211 /* if_port0 switch to hw_port */
2212 hw_port_reconfig(adapter, if_port0);
2213 RTW_INFO(ADPT_FMT ": Cfg SoftAP mode to hw_port(%d) done\n", ADPT_ARG(adapter), adapter->hw_port);
2214
2215 }
2216 #endif
2217
rtl8822c_sethwreg(PADAPTER adapter,u8 variable,u8 * val)2218 u8 rtl8822c_sethwreg(PADAPTER adapter, u8 variable, u8 *val)
2219 {
2220 PHAL_DATA_TYPE hal = GET_HAL_DATA(adapter);
2221 u8 ret = _SUCCESS;
2222 u8 val8;
2223 u16 val16;
2224 u32 val32;
2225
2226
2227 switch (variable) {
2228 case HW_VAR_SET_OPMODE:
2229 hw_var_set_opmode(adapter, *val);
2230 break;
2231 /*
2232 case HW_VAR_INIT_RTS_RATE:
2233 break;
2234 */
2235 case HW_VAR_BASIC_RATE:
2236 rtw_var_set_basic_rate(adapter, val);
2237 break;
2238
2239 case HW_VAR_TXPAUSE:
2240 rtw_write8(adapter, REG_TXPAUSE_8822C, *val);
2241 break;
2242
2243 case HW_VAR_BCN_FUNC:
2244 hw_var_set_bcn_func(adapter, *val);
2245 break;
2246
2247 case HW_VAR_PORT_CFG:
2248 hw_var_hw_port_cfg(adapter, *val);
2249 break;
2250
2251 case HW_VAR_MLME_DISCONNECT:
2252 hw_var_set_mlme_disconnect(adapter);
2253 break;
2254
2255 case HW_VAR_MLME_SITESURVEY:
2256 hw_var_set_mlme_sitesurvey(adapter, *val);
2257 #ifdef CONFIG_BT_COEXIST
2258 if (hal->EEPROMBluetoothCoexist)
2259 rtw_btcoex_ScanNotify(adapter, *val ? _TRUE : _FALSE);
2260 else
2261 #endif /* CONFIG_BT_COEXIST */
2262 rtw_btcoex_wifionly_scan_notify(adapter);
2263 break;
2264
2265 case HW_VAR_MLME_JOIN:
2266 hw_var_set_mlme_join(adapter, *val);
2267 break;
2268
2269 case HW_VAR_RCR:
2270 ret = rtl8822c_rcr_config(adapter, *((u32 *)val));
2271 break;
2272
2273 case HW_VAR_SLOT_TIME:
2274 rtw_write8(adapter, REG_SLOT_8822C, *val);
2275 break;
2276
2277 case HW_VAR_RESP_SIFS:
2278 /* RESP_SIFS for CCK */
2279 rtw_write8(adapter, REG_RESP_SIFS_CCK_8822C, 0x08);
2280 rtw_write8(adapter, REG_RESP_SIFS_CCK_8822C + 1, 0x08);
2281 /* RESP_SIFS for OFDM */
2282 rtw_write8(adapter, REG_RESP_SIFS_OFDM_8822C, 0x0a);
2283 rtw_write8(adapter, REG_RESP_SIFS_OFDM_8822C + 1, 0x0a);
2284 break;
2285
2286 case HW_VAR_ACK_PREAMBLE:
2287 hw_var_set_ack_preamble(adapter, *val);
2288 break;
2289
2290 /*
2291 case HW_VAR_SEC_CFG:
2292 follow hal_com.c
2293 break;
2294 */
2295
2296 case HW_VAR_SEC_DK_CFG:
2297 if (val)
2298 hw_var_set_sec_dk_cfg(adapter, _TRUE);
2299 else
2300 hw_var_set_sec_dk_cfg(adapter, _FALSE);
2301 break;
2302
2303 case HW_VAR_BCN_VALID:
2304 hw_var_set_bcn_valid(adapter);
2305 break;
2306
2307 case HW_VAR_CAM_INVALID_ALL:
2308 val32 = BIT_SECCAM_POLLING_8822C | BIT_SECCAM_CLR_8822C;
2309 rtw_write32(adapter, REG_CAMCMD_8822C, val32);
2310 break;
2311
2312 case HW_VAR_AC_PARAM_VO:
2313 rtw_write32(adapter, REG_EDCA_VO_PARAM_8822C, *(u32 *)val);
2314 break;
2315
2316 case HW_VAR_AC_PARAM_VI:
2317 rtw_write32(adapter, REG_EDCA_VI_PARAM_8822C, *(u32 *)val);
2318 break;
2319
2320 case HW_VAR_AC_PARAM_BE:
2321 hal->ac_param_be = *(u32 *)val;
2322 rtw_write32(adapter, REG_EDCA_BE_PARAM_8822C, *(u32 *)val);
2323 break;
2324
2325 case HW_VAR_AC_PARAM_BK:
2326 rtw_write32(adapter, REG_EDCA_BK_PARAM_8822C, *(u32 *)val);
2327 break;
2328
2329 case HW_VAR_ACM_CTRL:
2330 hw_var_set_acm_ctrl(adapter, *val);
2331 break;
2332 /*
2333 case HW_VAR_AMPDU_MIN_SPACE:
2334 break;
2335 */
2336 #ifdef CONFIG_80211N_HT
2337 case HW_VAR_AMPDU_FACTOR: {
2338 u32 AMPDULen = *val; /* enum AGGRE_SIZE */
2339
2340 AMPDULen = (0x2000 << AMPDULen) - 1;
2341 rtw_write32(adapter, REG_AMPDU_MAX_LENGTH_HT_8822C, AMPDULen);
2342 }
2343 break;
2344 #endif /* CONFIG_80211N_HT */
2345 case HW_VAR_RXDMA_AGG_PG_TH:
2346 /*
2347 * TH=1 => invalidate RX DMA aggregation
2348 * TH=0 => validate RX DMA aggregation, use init value.
2349 */
2350 if (*val == 0)
2351 /* enable RXDMA aggregation */
2352 rx_agg_switch(adapter, _TRUE);
2353 else
2354 /* disable RXDMA aggregation */
2355 rx_agg_switch(adapter, _FALSE);
2356 break;
2357 /*
2358 case HW_VAR_SET_RPWM:
2359 case HW_VAR_CPWM:
2360 break;
2361 */
2362 case HW_VAR_H2C_FW_PWRMODE:
2363 rtl8822c_set_FwPwrMode_cmd(adapter, *val);
2364 break;
2365
2366 case HW_VAR_H2C_FW_PWRMODE_RFON_CTRL:
2367 rtl8822c_set_FwPwrMode_rfon_ctrl_cmd(adapter, *val);
2368 break;
2369
2370 case HW_VAR_LPS_RFON_CHK:
2371 hw_var_lps_rfon_chk(adapter, *val);
2372 break;
2373 /*
2374 case HW_VAR_H2C_PS_TUNE_PARAM:
2375 break;
2376 */
2377 case HW_VAR_H2C_INACTIVE_IPS:
2378 #ifdef CONFIG_WOWLAN
2379 rtl8822c_set_fw_pwrmode_inips_cmd_wowlan(adapter, *val);
2380 #endif /* CONFIG_WOWLAN */
2381 break;
2382 case HW_VAR_H2C_FW_JOINBSSRPT:
2383 hw_var_set_h2c_fw_joinbssrpt(adapter, *val);
2384 break;
2385 #ifdef CONFIG_WOWLAN
2386 case HW_VAR_VENDOR_WOW_MODE:
2387 hw_var_vendor_wow_mode(adapter, *(u8 *)val);
2388 break;
2389 #endif /* CONFIG_WOWLAN */
2390 case HW_VAR_DL_RSVD_PAGE:
2391 #ifdef CONFIG_BT_COEXIST
2392 if (check_fwstate(&adapter->mlmepriv, WIFI_AP_STATE) == _TRUE)
2393 rtl8822c_download_BTCoex_AP_mode_rsvd_page(adapter);
2394 #endif
2395 break;
2396 #ifdef CONFIG_P2P_PS
2397 case HW_VAR_H2C_FW_P2P_PS_OFFLOAD:
2398 #ifdef CONFIG_FW_MULTI_PORT_SUPPORT
2399 if (*val == P2P_PS_ENABLE)
2400 rtw_set_default_port_id(adapter);
2401 #endif
2402 rtw_set_p2p_ps_offload_cmd(adapter, *val);
2403 break;
2404 #endif /* CONFIG_P2P_PS */
2405 /*
2406 case HW_VAR_TRIGGER_GPIO_0:
2407 case HW_VAR_BT_SET_COEXIST:
2408 case HW_VAR_BT_ISSUE_DELBA:
2409 case HW_VAR_SWITCH_EPHY_WoWLAN:
2410 case HW_VAR_EFUSE_USAGE:
2411 case HW_VAR_EFUSE_BYTES:
2412 case HW_VAR_EFUSE_BT_USAGE:
2413 case HW_VAR_EFUSE_BT_BYTES:
2414 break;
2415 */
2416 case HW_VAR_FIFO_CLEARN_UP: {
2417 struct pwrctrl_priv *pwrpriv = adapter_to_pwrctl(adapter);
2418 u8 trycnt = 100;
2419 u32 reg_hw_ssn;
2420
2421 /* pause tx */
2422 rtw_write8(adapter, REG_TXPAUSE_8822C, 0xff);
2423
2424 /* keep hw sn */
2425 if (adapter->xmitpriv.hw_ssn_seq_no == 1)
2426 reg_hw_ssn = REG_HW_SEQ1_8822C;
2427 else if (adapter->xmitpriv.hw_ssn_seq_no == 2)
2428 reg_hw_ssn = REG_HW_SEQ2_8822C;
2429 else if (adapter->xmitpriv.hw_ssn_seq_no == 3)
2430 reg_hw_ssn = REG_HW_SEQ3_8822C;
2431 else
2432 reg_hw_ssn = REG_HW_SEQ0_8822C;
2433
2434 adapter->xmitpriv.nqos_ssn = rtw_read16(adapter, reg_hw_ssn);
2435
2436 if (pwrpriv->bkeepfwalive != _TRUE) {
2437 /* RX DMA stop */
2438 val32 = rtw_read32(adapter, REG_RXPKT_NUM_8822C);
2439 val32 |= BIT_RW_RELEASE_EN;
2440 rtw_write32(adapter, REG_RXPKT_NUM_8822C, val32);
2441 do {
2442 val32 = rtw_read32(adapter, REG_RXPKT_NUM_8822C);
2443 val32 &= BIT_RXDMA_IDLE_8822C;
2444 if (val32)
2445 break;
2446
2447 RTW_INFO("[HW_VAR_FIFO_CLEARN_UP] val=%x times:%d\n", val32, trycnt);
2448 rtw_yield_os();
2449 } while (--trycnt);
2450 if (trycnt == 0)
2451 RTW_INFO("[HW_VAR_FIFO_CLEARN_UP] Stop RX DMA failed!\n");
2452 #if 0
2453 /* RQPN Load 0 */
2454 rtw_write16(adapter, REG_RQPN_NPQ, 0);
2455 rtw_write32(adapter, REG_RQPN, 0x80000000);
2456 rtw_mdelay_os(2);
2457 #endif
2458 }
2459 }
2460 break;
2461
2462 case HW_VAR_RESTORE_HW_SEQ:
2463 {
2464 /* restore Sequence No. */
2465 u32 reg_hw_ssn;
2466
2467 if (adapter->xmitpriv.hw_ssn_seq_no == 1)
2468 reg_hw_ssn = REG_HW_SEQ1_8822C;
2469 else if (adapter->xmitpriv.hw_ssn_seq_no == 2)
2470 reg_hw_ssn = REG_HW_SEQ2_8822C;
2471 else if (adapter->xmitpriv.hw_ssn_seq_no == 3)
2472 reg_hw_ssn = REG_HW_SEQ3_8822C;
2473 else
2474 reg_hw_ssn = REG_HW_SEQ0_8822C;
2475
2476 rtw_write8(adapter, reg_hw_ssn, adapter->xmitpriv.nqos_ssn);
2477 }
2478 break;
2479
2480 case HW_VAR_CHECK_TXBUF: {
2481 u16 rtylmtorg;
2482 u8 RetryLimit = 0x01;
2483 systime start;
2484 u32 passtime;
2485 u32 timelmt = 2000; /* ms */
2486 int err;
2487 u8 empty;
2488
2489
2490 rtylmtorg = rtw_read16(adapter, REG_RETRY_LIMIT_8822C);
2491
2492 val16 = BIT_LRL_8822C(RetryLimit) | BIT_SRL_8822C(RetryLimit);
2493 rtw_write16(adapter, REG_RETRY_LIMIT_8822C, val16);
2494
2495 /* Check TX FIFO empty or not */
2496 empty = _FALSE;
2497 start = rtw_get_current_time();
2498 err = rtw_halmac_txfifo_wait_empty(adapter_to_dvobj(adapter), timelmt);
2499 if (!err)
2500 empty = _TRUE;
2501 passtime = rtw_get_passing_time_ms(start);
2502
2503 if (_TRUE == empty)
2504 RTW_INFO("[HW_VAR_CHECK_TXBUF] Empty in %d ms\n", passtime);
2505 else if (RTW_CANNOT_RUN(adapter))
2506 RTW_WARN("[HW_VAR_CHECK_TXBUF] bDriverStopped or bSurpriseRemoved\n");
2507 else {
2508 RTW_ERR("[HW_VAR_CHECK_TXBUF] NOT empty in %d ms\n", passtime);
2509
2510 }
2511 rtw_write16(adapter, REG_RETRY_LIMIT_8822C, rtylmtorg);
2512 }
2513 break;
2514 /*
2515 case HW_VAR_PCIE_STOP_TX_DMA:
2516 case HW_VAR_APFM_ON_MAC
2517 case HW_VAR_HCI_SUS_STATE:
2518 #if defined(CONFIG_WOWLAN) || defined(CONFIG_AP_WOWLAN)
2519 case HW_VAR_WOWLAN:
2520 case HW_VAR_WAKEUP_REASON:
2521 #endif
2522 case HW_VAR_RPWM_TOG:
2523 break;
2524 */
2525 #ifdef CONFIG_GPIO_WAKEUP
2526 case HW_SET_GPIO_WL_CTRL: {
2527 struct pwrctrl_priv *pwrpriv = adapter_to_pwrctl(adapter);
2528 u8 enable = *val;
2529 u8 value = 0;
2530 u8 addr = REG_PAD_CTRL1_8822C + 3;
2531
2532 if (pwrpriv->wowlan_gpio_index == 6) {
2533 value = rtw_read8(adapter, addr);
2534
2535 if (enable == _TRUE && (value & BIT(1)))
2536 /* set 0x64[25] = 0 to control GPIO 6 */
2537 rtw_write8(adapter, addr, value & (~BIT(1)));
2538 else if (enable == _FALSE)
2539 rtw_write8(adapter, addr, value | BIT(1));
2540
2541 RTW_INFO("[HW_SET_GPIO_WL_CTRL] 0x%02X=0x%02X\n",
2542 addr, rtw_read8(adapter, addr));
2543 }
2544 }
2545 break;
2546 #endif
2547 /*
2548 case HW_VAR_SYS_CLKR:
2549 break;
2550 */
2551 case HW_VAR_NAV_UPPER: {
2552 #define HAL_NAV_UPPER_UNIT 128 /* micro-second */
2553 u32 usNavUpper = *(u32 *)val;
2554
2555 if (usNavUpper > HAL_NAV_UPPER_UNIT * 0xFF) {
2556 RTW_INFO(FUNC_ADPT_FMT ": [HW_VAR_NAV_UPPER] value(0x%08X us) is larger than (%d * 0xFF)!!!\n",
2557 FUNC_ADPT_ARG(adapter), usNavUpper, HAL_NAV_UPPER_UNIT);
2558 break;
2559 }
2560
2561 usNavUpper = (usNavUpper + HAL_NAV_UPPER_UNIT - 1) / HAL_NAV_UPPER_UNIT;
2562 rtw_write8(adapter, REG_NAV_CTRL_8822C + 2, (u8)usNavUpper);
2563 }
2564 break;
2565
2566 /*
2567 case HW_VAR_RPT_TIMER_SETTING:
2568 case HW_VAR_TX_RPT_MAX_MACID:
2569 case HW_VAR_CHK_HI_QUEUE_EMPTY:
2570 case HW_VAR_AMPDU_MAX_TIME:
2571 case HW_VAR_USB_MODE:
2572 break;
2573 */
2574 #ifdef CONFIG_AP_PORT_SWAP
2575 case HW_VAR_PORT_SWITCH:
2576 {
2577 u8 mode = *((u8 *)val);
2578
2579 hw_var_ap_port_switch(adapter, mode);
2580 }
2581 break;
2582 #endif
2583
2584 #ifdef CONFIG_BEAMFORMING
2585 case HW_VAR_SOUNDING_ENTER:
2586 rtl8822c_phy_bf_enter(adapter, (struct sta_info*)val);
2587 break;
2588
2589 case HW_VAR_SOUNDING_LEAVE:
2590 rtl8822c_phy_bf_leave(adapter, val);
2591 break;
2592 /*
2593 case HW_VAR_SOUNDING_RATE:
2594 break;
2595 */
2596 case HW_VAR_SOUNDING_STATUS:
2597 rtl8822c_phy_bf_sounding_status(adapter, *val);
2598 break;
2599 /*
2600 case HW_VAR_SOUNDING_FW_NDPA:
2601 case HW_VAR_SOUNDING_CLK:
2602 break;
2603 */
2604 case HW_VAR_SOUNDING_SET_GID_TABLE:
2605 rtl8822c_phy_bf_set_gid_table(adapter, (struct beamformer_entry*)val);
2606 break;
2607 #endif /* CONFIG_BEAMFORMING */
2608 /*
2609 case HW_VAR_HW_REG_TIMER_INIT:
2610 case HW_VAR_HW_REG_TIMER_RESTART:
2611 case HW_VAR_HW_REG_TIMER_START:
2612 case HW_VAR_HW_REG_TIMER_STOP:
2613 break;
2614 */
2615
2616 /*
2617 case HW_VAR_MACID_LINK:
2618 case HW_VAR_MACID_NOLINK:
2619 case HW_VAR_DUMP_MAC_QUEUE_INFO:
2620 case HW_VAR_ASIX_IOT:
2621 case HW_VAR_EN_HW_UPDATE_TSF:
2622 case HW_VAR_CH_SW_NEED_TO_TAKE_CARE_IQK_INFO:
2623 case HW_VAR_CH_SW_IQK_INFO_BACKUP:
2624 case HW_VAR_CH_SW_IQK_INFO_RESTORE:
2625 break;
2626 */
2627
2628 case HW_VAR_FREECNT:
2629
2630 val8 = (u8)*val;
2631
2632 if (val8==0) {
2633 /* disable free run counter set 0x577[3]=0 */
2634 rtw_write8(adapter, REG_MISC_CTRL,
2635 rtw_read8(adapter, REG_MISC_CTRL)&(~BIT_EN_FREECNT));
2636
2637 /* reset FREE_RUN_COUNTER set 0x553[5]=1 */
2638 val8 = rtw_read8(adapter, REG_DUAL_TSF_RST);
2639 val8 |= BIT_FREECNT_RST;
2640 rtw_write8(adapter, REG_DUAL_TSF_RST, val8);
2641
2642 } else if (val8==1){
2643
2644 /* enable free run counter */
2645
2646 /* disable first set 0x577[3]=0 */
2647 rtw_write8(adapter, REG_MISC_CTRL,
2648 rtw_read8(adapter, REG_MISC_CTRL)&(~BIT_EN_FREECNT));
2649
2650 /* reset FREE_RUN_COUNTER set 0x553[5]=1 */
2651 val8 = rtw_read8(adapter, REG_DUAL_TSF_RST);
2652 val8 |= BIT_FREECNT_RST;
2653 rtw_write8(adapter, REG_DUAL_TSF_RST, val8);
2654
2655 /* enable free run counter 0x577[3]=1 */
2656 rtw_write8(adapter, REG_MISC_CTRL,
2657 rtw_read8(adapter, REG_MISC_CTRL)|BIT_EN_FREECNT);
2658 }
2659 break;
2660
2661 case HW_VAR_SET_SOML_PARAM:
2662 #ifdef CONFIG_DYNAMIC_SOML
2663 rtw_dyn_soml_para_set(adapter, 4, 20, 1, 0);
2664 #endif
2665 break;
2666
2667 #ifdef CONFIG_WAKE_ON_BT
2668 case HW_VAR_WAKE_ON_BT_GPIO_SWITCH: {
2669 int status = 0;
2670 u8 enable = *val;
2671
2672 if (enable) {
2673 /* Should disable wl_led control at first
2674 halmac will check if wl_led is enabled before switch BT wake GPIO */
2675 status = rtw_halmac_led_cfg(adapter_to_dvobj(adapter), _FALSE, 3);
2676 status = rtw_halmac_bt_wake_cfg(adapter_to_dvobj(adapter), *val);
2677 if (status)
2678 RTW_INFO("[WakeOnBT] Enable BT control fail, status: %d\n", status);
2679 } else {
2680 status = rtw_halmac_bt_wake_cfg(adapter_to_dvobj(adapter), *val);
2681 status = rtw_halmac_led_cfg(adapter_to_dvobj(adapter), _TRUE, 3);
2682 }
2683 }
2684 break;
2685 #endif
2686 default:
2687 ret = SetHwReg(adapter, variable, val);
2688 break;
2689 }
2690
2691 return ret;
2692 }
2693
2694 #ifdef CONFIG_PROC_DEBUG
2695 struct qinfo {
2696 u32 head:11;
2697 u32 tail:11;
2698 u32 empty:1;
2699 u32 ac:2;
2700 u32 macid:7;
2701 };
2702
2703 struct bcn_qinfo {
2704 u16 head:12;
2705 u16 rsvd:4;
2706 };
2707
dump_qinfo(void * sel,struct qinfo * info,u32 pkt_num,const char * tag)2708 static void dump_qinfo(void *sel, struct qinfo *info, u32 pkt_num, const char *tag)
2709 {
2710 RTW_PRINT_SEL(sel, "%shead:0x%02x, tail:0x%02x, pkt_num:%u, macid:%u, ac:%u\n",
2711 tag ? tag : "", info->head, info->tail, pkt_num, info->macid, info->ac);
2712 }
2713
dump_bcn_qinfo(void * sel,struct bcn_qinfo * info,u32 pkt_num,const char * tag)2714 static void dump_bcn_qinfo(void *sel, struct bcn_qinfo *info, u32 pkt_num, const char *tag)
2715 {
2716 RTW_PRINT_SEL(sel, "%shead:0x%02x, pkt_num:%u\n",
2717 tag ? tag : "", info->head, pkt_num);
2718 }
2719
dump_mac_qinfo(void * sel,_adapter * adapter)2720 static void dump_mac_qinfo(void *sel, _adapter *adapter)
2721 {
2722 u32 q0_info;
2723 u32 q1_info;
2724 u32 q2_info;
2725 u32 q3_info;
2726 u32 q4_info;
2727 u32 q5_info;
2728 u32 q6_info;
2729 u32 q7_info;
2730 u32 mg_q_info;
2731 u32 hi_q_info;
2732 u16 bcn_q_info;
2733 u32 q0_q1_info;
2734 u32 q2_q3_info;
2735 u32 q4_q5_info;
2736 u32 q6_q7_info;
2737 u32 mg_hi_q_info;
2738 u32 cmd_bcn_q_info;
2739
2740 q0_info = rtw_read32(adapter, REG_Q0_INFO_8822C);
2741 q1_info = rtw_read32(adapter, REG_Q1_INFO_8822C);
2742 q2_info = rtw_read32(adapter, REG_Q2_INFO_8822C);
2743 q3_info = rtw_read32(adapter, REG_Q3_INFO_8822C);
2744 q4_info = rtw_read32(adapter, REG_Q4_INFO_8822C);
2745 q5_info = rtw_read32(adapter, REG_Q5_INFO_8822C);
2746 q6_info = rtw_read32(adapter, REG_Q6_INFO_8822C);
2747 q7_info = rtw_read32(adapter, REG_Q7_INFO_8822C);
2748 mg_q_info = rtw_read32(adapter, REG_MGQ_INFO_8822C);
2749 hi_q_info = rtw_read32(adapter, REG_HIQ_INFO_8822C);
2750 bcn_q_info = rtw_read16(adapter, REG_BCNQ_INFO_8822C);
2751
2752 q0_q1_info = rtw_read32(adapter, REG_Q0_Q1_INFO_8822C);
2753 q2_q3_info = rtw_read32(adapter, REG_Q2_Q3_INFO_8822C);
2754 q4_q5_info = rtw_read32(adapter, REG_Q4_Q5_INFO_8822C);
2755 q6_q7_info = rtw_read32(adapter, REG_Q6_Q7_INFO_8822C);
2756 mg_hi_q_info = rtw_read32(adapter, REG_MGQ_HIQ_INFO_8822C);
2757 cmd_bcn_q_info = rtw_read32(adapter, REG_CMDQ_BCNQ_INFO_8822C);
2758
2759 dump_qinfo(sel, (struct qinfo *)&q0_info, q0_q1_info&0xFFF, "Q0 ");
2760 dump_qinfo(sel, (struct qinfo *)&q1_info, (q0_q1_info>>15)&0xFFF, "Q1 ");
2761 dump_qinfo(sel, (struct qinfo *)&q2_info, q2_q3_info&0xFFF, "Q2 ");
2762 dump_qinfo(sel, (struct qinfo *)&q3_info, (q2_q3_info>>15)&0xFFF, "Q3 ");
2763 dump_qinfo(sel, (struct qinfo *)&q4_info, q4_q5_info&0xFFF, "Q4 ");
2764 dump_qinfo(sel, (struct qinfo *)&q5_info, (q4_q5_info>>15)&0xFFF, "Q5 ");
2765 dump_qinfo(sel, (struct qinfo *)&q6_info, q6_q7_info&0xFFF, "Q6 ");
2766 dump_qinfo(sel, (struct qinfo *)&q7_info, (q6_q7_info>>15)&0xFFF, "Q7 ");
2767 dump_qinfo(sel, (struct qinfo *)&mg_q_info, mg_hi_q_info&0xFFF, "MG ");
2768 dump_qinfo(sel, (struct qinfo *)&hi_q_info, (mg_hi_q_info>>15)&0xFFF, "HI ");
2769 dump_bcn_qinfo(sel, (struct bcn_qinfo *)&bcn_q_info, cmd_bcn_q_info&0xFFF, "BCN ");
2770
2771 }
2772
dump_mac_txfifo(void * sel,_adapter * adapter)2773 static void dump_mac_txfifo(void *sel, _adapter *adapter)
2774 {
2775 u32 hpq, lpq, npq, epq, pubq;
2776
2777 hpq = rtw_read32(adapter, REG_FIFOPAGE_INFO_1_8822C);
2778 lpq = rtw_read32(adapter, REG_FIFOPAGE_INFO_2_8822C);
2779 npq = rtw_read32(adapter, REG_FIFOPAGE_INFO_3_8822C);
2780 epq = rtw_read32(adapter, REG_FIFOPAGE_INFO_4_8822C);
2781 pubq = rtw_read32(adapter, REG_FIFOPAGE_INFO_5_8822C);
2782
2783 hpq = (hpq & 0xFFF0000)>>16;
2784 lpq = (lpq & 0xFFF0000)>>16;
2785 npq = (npq & 0xFFF0000)>>16;
2786 epq = (epq & 0xFFF0000)>>16;
2787 pubq = (pubq & 0xFFF0000)>>16;
2788
2789 RTW_PRINT_SEL(sel, "Tx: available page num: ");
2790 if ((hpq == 0xAEA) && (hpq == lpq) && (hpq == pubq))
2791 RTW_PRINT_SEL(sel, "N/A (reg val = 0xea)\n");
2792 else
2793 RTW_PRINT_SEL(sel, "HPQ: %d, LPQ: %d, NPQ: %d, EPQ: %d, PUBQ: %d\n"
2794 , hpq, lpq, npq, epq, pubq);
2795 }
2796 #endif
2797
hw_var_get_bcn_valid(PADAPTER adapter)2798 static u8 hw_var_get_bcn_valid(PADAPTER adapter)
2799 {
2800 u8 val8 = 0;
2801 u8 ret = _FALSE;
2802
2803 /* only port 0 can TX BCN */
2804 val8 = rtw_read8(adapter, REG_FIFOPAGE_CTRL_2_8822C + 1);
2805 ret = (BIT(7) & val8) ? _TRUE : _FALSE;
2806
2807 return ret;
2808 }
2809
rtl8822c_read_wmmedca_reg(PADAPTER adapter,u16 * vo_params,u16 * vi_params,u16 * be_params,u16 * bk_params)2810 void rtl8822c_read_wmmedca_reg(PADAPTER adapter, u16 *vo_params, u16 *vi_params, u16 *be_params, u16 *bk_params)
2811 {
2812 u8 vo_reg_params[4];
2813 u8 vi_reg_params[4];
2814 u8 be_reg_params[4];
2815 u8 bk_reg_params[4];
2816
2817 rtl8822c_gethwreg(adapter, HW_VAR_AC_PARAM_VO, vo_reg_params);
2818 rtl8822c_gethwreg(adapter, HW_VAR_AC_PARAM_VI, vi_reg_params);
2819 rtl8822c_gethwreg(adapter, HW_VAR_AC_PARAM_BE, be_reg_params);
2820 rtl8822c_gethwreg(adapter, HW_VAR_AC_PARAM_BK, bk_reg_params);
2821
2822 vo_params[0] = vo_reg_params[0];
2823 vo_params[1] = vo_reg_params[1] & 0x0F;
2824 vo_params[2] = (vo_reg_params[1] & 0xF0) >> 4;
2825 vo_params[3] = ((vo_reg_params[3] << 8) | (vo_reg_params[2])) * 32;
2826
2827 vi_params[0] = vi_reg_params[0];
2828 vi_params[1] = vi_reg_params[1] & 0x0F;
2829 vi_params[2] = (vi_reg_params[1] & 0xF0) >> 4;
2830 vi_params[3] = ((vi_reg_params[3] << 8) | (vi_reg_params[2])) * 32;
2831
2832 be_params[0] = be_reg_params[0];
2833 be_params[1] = be_reg_params[1] & 0x0F;
2834 be_params[2] = (be_reg_params[1] & 0xF0) >> 4;
2835 be_params[3] = ((be_reg_params[3] << 8) | (be_reg_params[2])) * 32;
2836
2837 bk_params[0] = bk_reg_params[0];
2838 bk_params[1] = bk_reg_params[1] & 0x0F;
2839 bk_params[2] = (bk_reg_params[1] & 0xF0) >> 4;
2840 bk_params[3] = ((bk_reg_params[3] << 8) | (bk_reg_params[2])) * 32;
2841
2842 vo_params[1] = (1 << vo_params[1]) - 1;
2843 vo_params[2] = (1 << vo_params[2]) - 1;
2844 vi_params[1] = (1 << vi_params[1]) - 1;
2845 vi_params[2] = (1 << vi_params[2]) - 1;
2846 be_params[1] = (1 << be_params[1]) - 1;
2847 be_params[2] = (1 << be_params[2]) - 1;
2848 bk_params[1] = (1 << bk_params[1]) - 1;
2849 bk_params[2] = (1 << bk_params[2]) - 1;
2850 }
2851
rtl8822c_gethwreg(PADAPTER adapter,u8 variable,u8 * val)2852 void rtl8822c_gethwreg(PADAPTER adapter, u8 variable, u8 *val)
2853 {
2854 PHAL_DATA_TYPE hal;
2855 u8 val8;
2856 u16 val16;
2857 u32 val32;
2858 u64 val64;
2859
2860
2861 hal = GET_HAL_DATA(adapter);
2862
2863 switch (variable) {
2864 /*
2865 case HW_VAR_INIT_RTS_RATE:
2866 case HW_VAR_BASIC_RATE:
2867 break;
2868 */
2869 case HW_VAR_TXPAUSE:
2870 *val = rtw_read8(adapter, REG_TXPAUSE_8822C);
2871 break;
2872 /*
2873 case HW_VAR_BCN_FUNC:
2874 case HW_VAR_MLME_DISCONNECT:
2875 case HW_VAR_MLME_SITESURVEY:
2876 case HW_VAR_MLME_JOIN:
2877 case HW_VAR_BEACON_INTERVAL:
2878 case HW_VAR_SLOT_TIME:
2879 case HW_VAR_RESP_SIFS:
2880 case HW_VAR_ACK_PREAMBLE:
2881 case HW_VAR_SEC_CFG:
2882 case HW_VAR_SEC_DK_CFG:
2883 break;
2884 */
2885 case HW_VAR_BCN_VALID:
2886 *val = hw_var_get_bcn_valid(adapter);
2887 break;
2888
2889 case HW_VAR_FREECNT:
2890 /* free run counter 0x577[3]=1 means running */
2891 *val = rtw_read8(adapter, REG_MISC_CTRL)&BIT_EN_FREECNT;
2892 break;
2893 /*
2894 case HW_VAR_CAM_INVALID_ALL:
2895 */
2896 case HW_VAR_AC_PARAM_VO:
2897 val32 = rtw_read32(adapter, REG_EDCA_VO_PARAM);
2898 val[0] = val32 & 0xFF;
2899 val[1] = (val32 >> 8) & 0xFF;
2900 val[2] = (val32 >> 16) & 0xFF;
2901 val[3] = (val32 >> 24) & 0x07;
2902 break;
2903
2904 case HW_VAR_AC_PARAM_VI:
2905 val32 = rtw_read32(adapter, REG_EDCA_VI_PARAM);
2906 val[0] = val32 & 0xFF;
2907 val[1] = (val32 >> 8) & 0xFF;
2908 val[2] = (val32 >> 16) & 0xFF;
2909 val[3] = (val32 >> 24) & 0x07;
2910 break;
2911
2912 case HW_VAR_AC_PARAM_BE:
2913 val32 = rtw_read32(adapter, REG_EDCA_BE_PARAM);
2914 val[0] = val32 & 0xFF;
2915 val[1] = (val32 >> 8) & 0xFF;
2916 val[2] = (val32 >> 16) & 0xFF;
2917 val[3] = (val32 >> 24) & 0x07;
2918 break;
2919
2920 case HW_VAR_AC_PARAM_BK:
2921 val32 = rtw_read32(adapter, REG_EDCA_BK_PARAM);
2922 val[0] = val32 & 0xFF;
2923 val[1] = (val32 >> 8) & 0xFF;
2924 val[2] = (val32 >> 16) & 0xFF;
2925 val[3] = (val32 >> 24) & 0x07;
2926 break;
2927 /*
2928 case HW_VAR_ACM_CTRL:
2929 case HW_VAR_AMPDU_MIN_SPACE:
2930 case HW_VAR_AMPDU_FACTOR:
2931 case HW_VAR_RXDMA_AGG_PG_TH:
2932 case HW_VAR_SET_RPWM:
2933 case HW_VAR_CPWM:
2934 case HW_VAR_H2C_FW_PWRMODE:
2935 case HW_VAR_H2C_PS_TUNE_PARAM:
2936 case HW_VAR_H2C_FW_JOINBSSRPT:
2937 break;
2938 */
2939 case HW_VAR_FWLPS_RF_ON:
2940 /* When we halt NIC, we should check if FW LPS is leave. */
2941 if (rtw_is_surprise_removed(adapter) ||
2942 (adapter_to_pwrctl(adapter)->rf_pwrstate == rf_off)) {
2943 /*
2944 * If it is in HW/SW Radio OFF or IPS state,
2945 * we do not check Fw LPS Leave,
2946 * because Fw is unload.
2947 */
2948 *val = _TRUE;
2949 } else {
2950 rtw_hal_get_hwreg(adapter, HW_VAR_RCR, (u8 *)&val32);
2951
2952 if (adapter_to_pwrctl(adapter)->wowlan_mode == _TRUE)
2953 val32 &= (BIT_UC_MD_EN_8822C | BIT_BC_MD_EN_8822C);
2954 else
2955 val32 &= (BIT_UC_MD_EN_8822C | BIT_BC_MD_EN_8822C | BIT_TIM_PARSER_EN_8822C);
2956
2957 if (val32)
2958 *val = _FALSE;
2959 else
2960 *val = _TRUE;
2961 }
2962 break;
2963 /*
2964 case HW_VAR_H2C_FW_P2P_PS_OFFLOAD:
2965 case HW_VAR_TRIGGER_GPIO_0:
2966 case HW_VAR_BT_SET_COEXIST:
2967 case HW_VAR_BT_ISSUE_DELBA:
2968 case HW_VAR_SWITCH_EPHY_WoWLAN:
2969 case HW_VAR_EFUSE_USAGE:
2970 case HW_VAR_EFUSE_BYTES:
2971 case HW_VAR_EFUSE_BT_USAGE:
2972 case HW_VAR_EFUSE_BT_BYTES:
2973 case HW_VAR_FIFO_CLEARN_UP:
2974 case HW_VAR_RESTORE_HW_SEQ:
2975 case HW_VAR_CHECK_TXBUF:
2976 case HW_VAR_PCIE_STOP_TX_DMA:
2977 break;
2978 */
2979
2980 /*
2981 case HW_VAR_HCI_SUS_STATE:
2982 break;
2983 */
2984 #if defined(CONFIG_WOWLAN) || defined(CONFIG_AP_WOWLAN)
2985 /*
2986 case HW_VAR_WOWLAN:
2987 break;
2988
2989 case HW_VAR_WAKEUP_REASON:
2990 rtw_halmac_get_wow_reason(adapter_to_dvobj(adapter), val);
2991 break;
2992
2993 case HW_VAR_RPWM_TOG:
2994 break;
2995 */
2996 #endif
2997 /*
2998 #ifdef CONFIG_GPIO_WAKEUP
2999 case HW_SET_GPIO_WL_CTRL:
3000 break;
3001 #endif
3002 */
3003 case HW_VAR_SYS_CLKR:
3004 *val = rtw_read8(adapter, REG_SYS_CLK_CTRL_8822C);
3005 break;
3006 /*
3007 case HW_VAR_NAV_UPPER:
3008 case HW_VAR_RPT_TIMER_SETTING:
3009 case HW_VAR_TX_RPT_MAX_MACID:
3010 break;
3011 */
3012 case HW_VAR_CHK_HI_QUEUE_EMPTY:
3013 val16 = rtw_read16(adapter, REG_TXPKT_EMPTY_8822C);
3014 *val = (val16 & BIT_HQQ_EMPTY_8822C) ? _TRUE : _FALSE;
3015 break;
3016 case HW_VAR_CHK_MGQ_CPU_EMPTY:
3017 val16 = rtw_read16(adapter, REG_TXPKT_EMPTY_8822C);
3018 *val = (val16 & BIT_MGQ_CPU_EMPTY_8822C) ? _TRUE : _FALSE;
3019 break;
3020 /*
3021 case HW_VAR_DL_BCN_SEL:
3022 case HW_VAR_AMPDU_MAX_TIME:
3023 case HW_VAR_USB_MODE:
3024 case HW_VAR_PORT_SWITCH:
3025 case HW_VAR_DO_IQK:
3026 case HW_VAR_SOUNDING_ENTER:
3027 case HW_VAR_SOUNDING_LEAVE:
3028 case HW_VAR_SOUNDING_RATE:
3029 case HW_VAR_SOUNDING_STATUS:
3030 case HW_VAR_SOUNDING_FW_NDPA:
3031 case HW_VAR_SOUNDING_CLK:
3032 case HW_VAR_HW_REG_TIMER_INIT:
3033 case HW_VAR_HW_REG_TIMER_RESTART:
3034 case HW_VAR_HW_REG_TIMER_START:
3035 case HW_VAR_HW_REG_TIMER_STOP:
3036 case HW_VAR_MACID_LINK:
3037 case HW_VAR_MACID_NOLINK:
3038 break;
3039 */
3040 case HW_VAR_FW_PS_STATE:
3041 /* driver read REG_SYS_CFG5 - BIT_LPS_STATUS REG_1070[3] to get hw ps state */
3042 *((u16 *)val) = rtw_read8(adapter, REG_SYS_CFG5);
3043 break;
3044 #ifdef CONFIG_PROC_DEBUG
3045 case HW_VAR_DUMP_MAC_QUEUE_INFO:
3046 dump_mac_qinfo(val, adapter);
3047 break;
3048
3049 case HW_VAR_DUMP_MAC_TXFIFO:
3050 dump_mac_txfifo(val, adapter);
3051 break;
3052 #endif
3053 /*
3054 case HW_VAR_ASIX_IOT:
3055 case HW_VAR_EN_HW_UPDATE_TSF:
3056 case HW_VAR_CH_SW_NEED_TO_TAKE_CARE_IQK_INFO:
3057 case HW_VAR_CH_SW_IQK_INFO_BACKUP:
3058 case HW_VAR_CH_SW_IQK_INFO_RESTORE:
3059 #ifdef CONFIG_TDLS
3060 #ifdef CONFIG_TDLS_CH_SW
3061 case HW_VAR_BCN_EARLY_C2H_RPT:
3062 #endif
3063 #endif
3064 break;
3065 */
3066
3067 case HW_VAR_BCN_CTRL_ADDR:
3068 *((u32 *)val) = hw_bcn_ctrl_addr(adapter, adapter->hw_port);
3069 break;
3070
3071 default:
3072 GetHwReg(adapter, variable, val);
3073 break;
3074 }
3075 }
3076
3077 /*
3078 * Description:
3079 * Change default setting of specified variable.
3080 */
rtl8822c_sethaldefvar(PADAPTER adapter,HAL_DEF_VARIABLE variable,void * pval)3081 u8 rtl8822c_sethaldefvar(PADAPTER adapter, HAL_DEF_VARIABLE variable, void *pval)
3082 {
3083 PHAL_DATA_TYPE hal;
3084 u8 bResult;
3085
3086
3087 hal = GET_HAL_DATA(adapter);
3088 bResult = _SUCCESS;
3089
3090 switch (variable) {
3091 /*
3092 case HAL_DEF_UNDERCORATEDSMOOTHEDPWDB:
3093 case HAL_DEF_IS_SUPPORT_ANT_DIV:
3094 case HAL_DEF_DRVINFO_SZ:
3095 case HAL_DEF_MAX_RECVBUF_SZ:
3096 case HAL_DEF_RX_PACKET_OFFSET:
3097 case HAL_DEF_RX_DMA_SZ_WOW:
3098 case HAL_DEF_RX_DMA_SZ:
3099 case HAL_DEF_RX_PAGE_SIZE:
3100 case HAL_DEF_DBG_DUMP_RXPKT:
3101 case HAL_DEF_RA_DECISION_RATE:
3102 case HAL_DEF_RA_SGI:
3103 case HAL_DEF_PT_PWR_STATUS:
3104 case HAL_DEF_TX_LDPC:
3105 case HAL_DEF_RX_LDPC:
3106 case HAL_DEF_TX_STBC:
3107 case HAL_DEF_RX_STBC:
3108 case HAL_DEF_EXPLICIT_BEAMFORMER:
3109 case HAL_DEF_EXPLICIT_BEAMFORMEE:
3110 case HAL_DEF_VHT_MU_BEAMFORMER:
3111 case HAL_DEF_VHT_MU_BEAMFORMEE:
3112 case HAL_DEF_BEAMFORMER_CAP:
3113 case HAL_DEF_BEAMFORMEE_CAP:
3114 case HW_VAR_MAX_RX_AMPDU_FACTOR:
3115 case HAL_DEF_DBG_DUMP_TXPKT:
3116 case HAL_DEF_TX_PAGE_SIZE:
3117 case HAL_DEF_TX_PAGE_BOUNDARY:
3118 case HAL_DEF_TX_PAGE_BOUNDARY_WOWLAN:
3119 case HAL_DEF_ANT_DETECT:
3120 case HAL_DEF_PCI_SUUPORT_L1_BACKDOOR:
3121 case HAL_DEF_PCI_AMD_L1_SUPPORT:
3122 case HAL_DEF_PCI_ASPM_OSC:
3123 case HAL_DEF_EFUSE_USAGE:
3124 case HAL_DEF_EFUSE_BYTES:
3125 case HW_VAR_BEST_AMPDU_DENSITY:
3126 break;
3127 */
3128 default:
3129 bResult = SetHalDefVar(adapter, variable, pval);
3130 break;
3131 }
3132
3133 return bResult;
3134 }
rtl8822c_ra_info_dump(_adapter * padapter,void * sel)3135 void rtl8822c_ra_info_dump(_adapter *padapter, void *sel)
3136 {
3137 u8 mac_id;
3138 struct sta_info *psta;
3139 u32 rate_mask1, rate_mask2;
3140 struct dvobj_priv *dvobj = adapter_to_dvobj(padapter);
3141 struct macid_ctl_t *macid_ctl = dvobj_to_macidctl(dvobj);
3142
3143 for (mac_id = 0; mac_id < macid_ctl->num; mac_id++) {
3144 if (rtw_macid_is_used(macid_ctl, mac_id) && !rtw_macid_is_bmc(macid_ctl, mac_id)) {
3145 psta = macid_ctl->sta[mac_id];
3146 if (!psta)
3147 continue;
3148
3149 dump_sta_info(sel, psta);
3150 rate_mask1 = macid_ctl->rate_bmp0[mac_id];
3151 rate_mask2 = macid_ctl->rate_bmp1[mac_id];
3152 _RTW_PRINT_SEL(sel, "rate_mask2:0x%08x, rate_mask1:0x%08x\n", rate_mask2, rate_mask1);
3153 }
3154 }
3155 }
3156 /*
3157 * Description:
3158 * Query setting of specified variable.
3159 */
rtl8822c_gethaldefvar(PADAPTER adapter,HAL_DEF_VARIABLE variable,void * pval)3160 u8 rtl8822c_gethaldefvar(PADAPTER adapter, HAL_DEF_VARIABLE variable, void *pval)
3161 {
3162 PHAL_DATA_TYPE hal;
3163 struct dvobj_priv *d;
3164 u8 bResult;
3165 u8 val8 = 0;
3166 u32 val32 = 0;
3167
3168
3169 d = adapter_to_dvobj(adapter);
3170 hal = GET_HAL_DATA(adapter);
3171 bResult = _SUCCESS;
3172
3173 switch (variable) {
3174 /*
3175 case HAL_DEF_UNDERCORATEDSMOOTHEDPWDB:
3176 break;
3177 */
3178 case HAL_DEF_IS_SUPPORT_ANT_DIV:
3179 #ifdef CONFIG_ANTENNA_DIVERSITY
3180 *(u8 *)pval = _TRUE;
3181 #else
3182 *(u8 *)pval = _FALSE;
3183 #endif
3184 break;
3185
3186 /*
3187 case HAL_DEF_DRVINFO_SZ:
3188 break;
3189 */
3190 case HAL_DEF_MAX_RECVBUF_SZ:
3191 *((u32 *)pval) = MAX_RECVBUF_SZ;
3192 break;
3193
3194 case HAL_DEF_RX_PACKET_OFFSET:
3195 val32 = rtl8822c_get_rx_desc_size(adapter);
3196 val8 = rtl8822c_get_rx_drv_info_size(adapter);
3197 *((u32 *)pval) = val32 + val8;
3198 break;
3199 /*
3200 case HAL_DEF_RX_DMA_SZ_WOW:
3201 case HAL_DEF_RX_DMA_SZ:
3202 case HAL_DEF_RX_PAGE_SIZE:
3203 case HAL_DEF_DBG_DUMP_RXPKT:
3204 case HAL_DEF_RA_DECISION_RATE:
3205 case HAL_DEF_RA_SGI:
3206 break;
3207 */
3208 /* only for 8188E */
3209 case HAL_DEF_PT_PWR_STATUS:
3210 break;
3211
3212 case HAL_DEF_TX_LDPC:
3213 case HAL_DEF_RX_LDPC:
3214 *(u8 *)pval = _TRUE;
3215 break;
3216
3217 /* support 1RX for STBC */
3218 case HAL_DEF_RX_STBC:
3219 *(u8 *)pval = 1;
3220 break;
3221
3222 /* support Explicit TxBF for HT/VHT */
3223 case HAL_DEF_EXPLICIT_BEAMFORMER:
3224 case HAL_DEF_EXPLICIT_BEAMFORMEE:
3225 case HAL_DEF_VHT_MU_BEAMFORMER:
3226 case HAL_DEF_VHT_MU_BEAMFORMEE:
3227 *(u8 *)pval = _TRUE;
3228 break;
3229
3230 case HAL_DEF_BEAMFORMER_CAP:
3231 val8 = GET_HAL_TX_NSS(adapter);
3232 *(u8 *)pval = (val8 - 1);
3233 break;
3234
3235 case HAL_DEF_BEAMFORMEE_CAP:
3236 *(u8 *)pval = 3;
3237 break;
3238
3239 case HW_VAR_MAX_RX_AMPDU_FACTOR:
3240 /* 8822C RX FIFO is 24KB */
3241 *(HT_CAP_AMPDU_FACTOR *)pval = MAX_AMPDU_FACTOR_16K;
3242 break;
3243
3244 case HW_DEF_RA_INFO_DUMP:
3245 rtl8822c_ra_info_dump(adapter, pval);
3246 break;
3247 /*
3248 case HAL_DEF_DBG_DUMP_TXPKT:
3249 case HAL_DEF_TX_PAGE_SIZE:
3250 case HAL_DEF_TX_PAGE_BOUNDARY:
3251 case HAL_DEF_TX_PAGE_BOUNDARY_WOWLAN:
3252 case HAL_DEF_ANT_DETECT:
3253 case HAL_DEF_PCI_SUUPORT_L1_BACKDOOR:
3254 case HAL_DEF_PCI_AMD_L1_SUPPORT:
3255 case HAL_DEF_PCI_ASPM_OSC:
3256 case HAL_DEF_EFUSE_USAGE:
3257 case HAL_DEF_EFUSE_BYTES:
3258 break;
3259 */
3260 case HW_VAR_BEST_AMPDU_DENSITY:
3261 *((u32 *)pval) = AMPDU_DENSITY_VALUE_4;
3262 break;
3263
3264 default:
3265 bResult = GetHalDefVar(adapter, variable, pval);
3266 break;
3267 }
3268
3269 return bResult;
3270 }
3271
rtl8822c_fill_txdesc_sectype(struct pkt_attrib * pattrib,u8 * ptxdesc)3272 void rtl8822c_fill_txdesc_sectype(struct pkt_attrib *pattrib, u8 *ptxdesc)
3273 {
3274 if ((pattrib->encrypt > 0) && !pattrib->bswenc) {
3275 /* SEC_TYPE : 0:NO_ENC,1:WEP40/TKIP,2:WAPI,3:AES */
3276 switch (pattrib->encrypt) {
3277 case _WEP40_:
3278 case _WEP104_:
3279 case _TKIP_:
3280 case _TKIP_WTMIC_:
3281 SET_TX_DESC_SEC_TYPE_8822C(ptxdesc, 0x1);
3282 break;
3283 #ifdef CONFIG_WAPI_SUPPORT
3284 case _SMS4_:
3285 SET_TX_DESC_SEC_TYPE_8822C(ptxdesc, 0x2);
3286 break;
3287 #endif
3288 case _AES_:
3289 SET_TX_DESC_SEC_TYPE_8822C(ptxdesc, 0x3);
3290 break;
3291 case _CCMP_256_:
3292 case _GCMP_:
3293 case _GCMP_256_:
3294 SET_TX_DESC_SEC_TYPE_8822C(ptxdesc, 0x2);
3295 break;
3296 case _NO_PRIVACY_:
3297 default:
3298 SET_TX_DESC_SEC_TYPE_8822C(ptxdesc, 0x0);
3299 break;
3300 }
3301 }
3302 }
3303
rtl8822c_fill_txdesc_vcs(PADAPTER adapter,struct pkt_attrib * pattrib,u8 * ptxdesc)3304 void rtl8822c_fill_txdesc_vcs(PADAPTER adapter, struct pkt_attrib *pattrib, u8 *ptxdesc)
3305 {
3306 struct mlme_ext_priv *pmlmeext = &adapter->mlmeextpriv;
3307 struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info);
3308
3309
3310 if (pattrib->vcs_mode) {
3311 switch (pattrib->vcs_mode) {
3312 case RTS_CTS:
3313 SET_TX_DESC_RTSEN_8822C(ptxdesc, 1);
3314 break;
3315 case CTS_TO_SELF:
3316 SET_TX_DESC_CTS2SELF_8822C(ptxdesc, 1);
3317 break;
3318 case NONE_VCS:
3319 default:
3320 break;
3321 }
3322
3323 if (pmlmeinfo->preamble_mode == PREAMBLE_SHORT)
3324 SET_TX_DESC_RTS_SHORT_8822C(ptxdesc, 1);
3325
3326 /* RTS Rate=24M */
3327 SET_TX_DESC_RTSRATE_8822C(ptxdesc, 0x8);
3328
3329 /* compatibility for MCC consideration, use pmlmeext->cur_channel */
3330 if (pmlmeext->cur_channel > 14)
3331 /* RTS retry to rate OFDM 6M for 5G */
3332 SET_TX_DESC_RTS_RTY_LOWEST_RATE_8822C(ptxdesc, 4);
3333 else
3334 /* RTS retry to rate CCK 1M for 2.4G */
3335 SET_TX_DESC_RTS_RTY_LOWEST_RATE_8822C(ptxdesc, 0);
3336 }
3337 }
3338
rtl8822c_bw_mapping(PADAPTER adapter,struct pkt_attrib * pattrib)3339 u8 rtl8822c_bw_mapping(PADAPTER adapter, struct pkt_attrib *pattrib)
3340 {
3341 u8 BWSettingOfDesc = 0;
3342 PHAL_DATA_TYPE hal = GET_HAL_DATA(adapter);
3343
3344
3345 if (hal->current_channel_bw == CHANNEL_WIDTH_80) {
3346 if (pattrib->bwmode == CHANNEL_WIDTH_80)
3347 BWSettingOfDesc = 2;
3348 else if (pattrib->bwmode == CHANNEL_WIDTH_40)
3349 BWSettingOfDesc = 1;
3350 else
3351 BWSettingOfDesc = 0;
3352 } else if (hal->current_channel_bw == CHANNEL_WIDTH_40) {
3353 if ((pattrib->bwmode == CHANNEL_WIDTH_40) || (pattrib->bwmode == CHANNEL_WIDTH_80))
3354 BWSettingOfDesc = 1;
3355 else
3356 BWSettingOfDesc = 0;
3357 } else
3358 BWSettingOfDesc = 0;
3359
3360 return BWSettingOfDesc;
3361 }
3362
rtl8822c_sc_mapping(PADAPTER adapter,struct pkt_attrib * pattrib)3363 u8 rtl8822c_sc_mapping(PADAPTER adapter, struct pkt_attrib *pattrib)
3364 {
3365 u8 SCSettingOfDesc = 0;
3366 PHAL_DATA_TYPE hal = GET_HAL_DATA(adapter);
3367
3368
3369 if (hal->current_channel_bw == CHANNEL_WIDTH_80) {
3370 if (pattrib->bwmode == CHANNEL_WIDTH_80)
3371 SCSettingOfDesc = VHT_DATA_SC_DONOT_CARE;
3372 else if (pattrib->bwmode == CHANNEL_WIDTH_40) {
3373 if (hal->nCur80MhzPrimeSC == HAL_PRIME_CHNL_OFFSET_LOWER)
3374 SCSettingOfDesc = VHT_DATA_SC_40_LOWER_OF_80MHZ;
3375 else if (hal->nCur80MhzPrimeSC == HAL_PRIME_CHNL_OFFSET_UPPER)
3376 SCSettingOfDesc = VHT_DATA_SC_40_UPPER_OF_80MHZ;
3377 else
3378 RTW_INFO("SCMapping: DONOT CARE Mode Setting\n");
3379 } else {
3380 if ((hal->nCur40MhzPrimeSC == HAL_PRIME_CHNL_OFFSET_LOWER) && (hal->nCur80MhzPrimeSC == HAL_PRIME_CHNL_OFFSET_LOWER))
3381 SCSettingOfDesc = VHT_DATA_SC_20_LOWEST_OF_80MHZ;
3382 else if ((hal->nCur40MhzPrimeSC == HAL_PRIME_CHNL_OFFSET_UPPER) && (hal->nCur80MhzPrimeSC == HAL_PRIME_CHNL_OFFSET_LOWER))
3383 SCSettingOfDesc = VHT_DATA_SC_20_LOWER_OF_80MHZ;
3384 else if ((hal->nCur40MhzPrimeSC == HAL_PRIME_CHNL_OFFSET_LOWER) && (hal->nCur80MhzPrimeSC == HAL_PRIME_CHNL_OFFSET_UPPER))
3385 SCSettingOfDesc = VHT_DATA_SC_20_UPPER_OF_80MHZ;
3386 else if ((hal->nCur40MhzPrimeSC == HAL_PRIME_CHNL_OFFSET_UPPER) && (hal->nCur80MhzPrimeSC == HAL_PRIME_CHNL_OFFSET_UPPER))
3387 SCSettingOfDesc = VHT_DATA_SC_20_UPPERST_OF_80MHZ;
3388 else
3389 RTW_INFO("SCMapping: DONOT CARE Mode Setting\n");
3390 }
3391 } else if (hal->current_channel_bw == CHANNEL_WIDTH_40) {
3392 if (pattrib->bwmode == CHANNEL_WIDTH_40)
3393 SCSettingOfDesc = VHT_DATA_SC_DONOT_CARE;
3394 else if (pattrib->bwmode == CHANNEL_WIDTH_20) {
3395 if (hal->nCur40MhzPrimeSC == HAL_PRIME_CHNL_OFFSET_UPPER)
3396 SCSettingOfDesc = VHT_DATA_SC_20_UPPER_OF_80MHZ;
3397 else if (hal->nCur40MhzPrimeSC == HAL_PRIME_CHNL_OFFSET_LOWER)
3398 SCSettingOfDesc = VHT_DATA_SC_20_LOWER_OF_80MHZ;
3399 else
3400 SCSettingOfDesc = VHT_DATA_SC_DONOT_CARE;
3401 }
3402 } else
3403 SCSettingOfDesc = VHT_DATA_SC_DONOT_CARE;
3404
3405 return SCSettingOfDesc;
3406 }
3407
rtl8822c_fill_txdesc_phy(PADAPTER adapter,struct pkt_attrib * pattrib,u8 * ptxdesc)3408 void rtl8822c_fill_txdesc_phy(PADAPTER adapter, struct pkt_attrib *pattrib, u8 *ptxdesc)
3409 {
3410 if (pattrib->ht_en) {
3411 /* Set Bandwidth and sub-channel settings. */
3412 SET_TX_DESC_DATA_BW_8822C(ptxdesc, rtl8822c_bw_mapping(adapter, pattrib));
3413 SET_TX_DESC_DATA_SC_8822C(ptxdesc, rtl8822c_sc_mapping(adapter, pattrib));
3414 }
3415 }
3416
3417 /**
3418 * rtl8822c_fill_txdesc_tx_rate() - Set rate in tx description
3419 * @adapter struct _ADAPTER*
3420 * @attrib packet attribute
3421 * @rate DESC_RATE*
3422 * @shrt 1/0 means short/long PLCP for CCK, short/long GI for HT/VHT
3423 * @fallback enable rate fallback or not
3424 * @desc buffer of tx description
3425 *
3426 * Fill rate related fields of tx description when driver want to use specific
3427 * data rate to send this packet.
3428 */
rtl8822c_fill_txdesc_tx_rate(struct _ADAPTER * adapter,struct pkt_attrib * attrib,u8 rate,u8 shrt,u8 fallback,u8 * desc)3429 static void rtl8822c_fill_txdesc_tx_rate(struct _ADAPTER *adapter,
3430 struct pkt_attrib *attrib,
3431 u8 rate, u8 shrt, u8 fallback, u8 *desc)
3432 {
3433 u8 disfb;
3434 u8 bw;
3435
3436
3437 rate = rate & 0x7F;
3438 shrt = shrt ? 1 : 0;
3439 disfb = fallback ? 0 : 1;
3440
3441 SET_TX_DESC_USE_RATE_8822C(desc, 1);
3442 SET_TX_DESC_DATARATE_8822C(desc, rate);
3443 SET_TX_DESC_DATA_SHORT_8822C(desc, shrt);
3444 SET_TX_DESC_DISDATAFB_8822C(desc, disfb);
3445
3446 /* HT MCS rate can't support bandwidth higher than 40MHz */
3447 bw = GET_TX_DESC_DATA_BW_8822C(desc);
3448 if (((rate >= DESC_RATEMCS0) && (rate <= DESC_RATEMCS31)) && (bw > 1)) {
3449 RTW_WARN(FUNC_ADPT_FMT ": Use HT rate(%s) on bandwidth "
3450 "higher than 40MHz(%u>%u) is illegal, "
3451 "switch bandwidth to 40MHz!\n",
3452 FUNC_ADPT_ARG(adapter),
3453 HDATA_RATE(rate), attrib->bwmode,
3454 CHANNEL_WIDTH_40);
3455
3456 if (attrib->bwmode > CHANNEL_WIDTH_40)
3457 attrib->bwmode = CHANNEL_WIDTH_40;
3458 rtl8822c_fill_txdesc_phy(adapter, attrib, desc);
3459 }
3460 }
3461
rtl8822c_fill_txdesc_force_bmc_camid(struct pkt_attrib * pattrib,u8 * ptxdesc)3462 void rtl8822c_fill_txdesc_force_bmc_camid(struct pkt_attrib *pattrib, u8 *ptxdesc)
3463 {
3464 if ((pattrib->encrypt > 0) && (!pattrib->bswenc)
3465 && (pattrib->bmc_camid != INVALID_SEC_MAC_CAM_ID)) {
3466 SET_TX_DESC_EN_DESC_ID_8822C(ptxdesc, 1);
3467 SET_TX_DESC_MACID_8822C(ptxdesc, pattrib->bmc_camid);
3468 }
3469 }
3470
rtl8822c_fill_txdesc_bmc_tx_rate(struct pkt_attrib * pattrib,u8 * ptxdesc)3471 void rtl8822c_fill_txdesc_bmc_tx_rate(struct pkt_attrib *pattrib, u8 *ptxdesc)
3472 {
3473 SET_TX_DESC_USE_RATE_8822C(ptxdesc, 1);
3474 SET_TX_DESC_DATARATE_8822C(ptxdesc, MRateToHwRate(pattrib->rate));
3475 SET_TX_DESC_DISDATAFB_8822C(ptxdesc, 1);
3476 }
3477
3478 /*
3479 * Description:
3480 * Fill tx description for beamforming packets
3481 */
rtl8822c_fill_txdesc_bf(struct xmit_frame * frame,u8 * desc)3482 void rtl8822c_fill_txdesc_bf(struct xmit_frame *frame, u8 *desc)
3483 {
3484 #ifndef CONFIG_BEAMFORMING
3485 return;
3486 #else /* CONFIG_BEAMFORMING */
3487 struct pkt_attrib *attrib;
3488 struct _ADAPTER *padapter = frame->padapter;
3489 struct hal_com_data *pHalData = GET_HAL_DATA(padapter);
3490 u8 init_rate;
3491
3492 attrib = &frame->attrib;
3493 init_rate = pHalData->INIDATA_RATE[attrib->mac_id] & 0x7F;
3494
3495 SET_TX_DESC_G_ID_8822C(desc, attrib->txbf_g_id);
3496 SET_TX_DESC_P_AID_8822C(desc, attrib->txbf_p_aid);
3497
3498 SET_TX_DESC_MU_DATARATE_8822C(desc, init_rate);
3499 /*SET_TX_DESC_MU_RC_8822C(desc, 0);*/
3500
3501 /* Force to disable STBC when txbf is enabled */
3502 if (attrib->txbf_p_aid && attrib->stbc)
3503 SET_TX_DESC_DATA_STBC_8822C(desc, 0);
3504 #endif /* CONFIG_BEAMFORMING */
3505 }
3506
3507 /*
3508 * Description:
3509 * Fill tx description for beamformer,
3510 * include following management packets:
3511 * 1. VHT NDPA
3512 * 2. HT NDPA
3513 * 3. Beamforming Report Poll
3514 */
rtl8822c_fill_txdesc_mgnt_bf(struct xmit_frame * frame,u8 * desc)3515 void rtl8822c_fill_txdesc_mgnt_bf(struct xmit_frame *frame, u8 *desc)
3516 {
3517 #ifndef CONFIG_BEAMFORMING
3518 return;
3519 #else /* CONFIG_BEAMFORMING */
3520 PADAPTER adapter;
3521 struct pkt_attrib *attrib;
3522 u8 ndpa = 0;
3523 u8 ht_ndpa = 0;
3524 u8 report_poll = 0;
3525
3526
3527 adapter = frame->padapter;
3528 attrib = &frame->attrib;
3529
3530 if (attrib->subtype == WIFI_NDPA)
3531 ndpa = 1;
3532 if ((attrib->subtype == WIFI_ACTION_NOACK) && (attrib->order == 1))
3533 ht_ndpa = 1;
3534 if (attrib->subtype == WIFI_BF_REPORT_POLL)
3535 report_poll = 1;
3536
3537 if ((!ndpa) && (!ht_ndpa) && (!report_poll))
3538 return;
3539
3540 /*SET_TX_DESC_TXPKTSIZE_8822C(desc, pattrib->last_txcmdsz);*/
3541 /*SET_TX_DESC_OFFSET_8822C(desc, HALMAC_TX_DESC_SIZE_8822C);*/
3542 SET_TX_DESC_DISRTSFB_8822C(desc, 1);
3543 SET_TX_DESC_DISDATAFB(desc, 1);
3544 /*SET_TX_DESC_SW_SEQ_8822C(desc, pattrib->seqnum);*/
3545 SET_TX_DESC_DATA_BW_8822C(desc, rtl8822c_bw_mapping(adapter, attrib));
3546 SET_TX_DESC_SIGNALING_TA_PKT_SC_8822C(desc,
3547 rtl8822c_sc_mapping(adapter, attrib));
3548 /*SET_TX_DESC_RTY_LMT_EN_8822C(ptxdesc, 1);*/
3549 SET_TX_DESC_RTS_DATA_RTY_LMT_8822C(desc, 5);
3550 SET_TX_DESC_NDPA_8822C(desc, 1);
3551 SET_TX_DESC_NAVUSEHDR_8822C(desc, 1);
3552 /*SET_TX_DESC_QSEL_8822C(desc, QSLT_MGNT);*/
3553 /*
3554 * NSS2MCS0 for VHT
3555 * MCS8 for HT
3556 */
3557 SET_TX_DESC_DATARATE_8822C(desc, MRateToHwRate(attrib->rate));
3558 /*SET_TX_DESC_USE_RATE_8822C(desc, 1);*/
3559 /*SET_TX_DESC_MACID_8822C(desc, pattrib->mac_id);*/ /* ad-hoc mode */
3560 /*SET_TX_DESC_G_ID_8822C(desc, 63);*/
3561 /*
3562 * partial AID of 1st STA, at infrastructure mode, either SU or MU;
3563 * MACID, at ad-hoc mode
3564 *
3565 * For WMAC to restore the received CSI report of STA1.
3566 * WMAC would set p_aid field to 0 in PLCP header for MU.
3567 */
3568 /*SET_TX_DESC_P_AID_8822C(desc, pattrib->txbf_p_aid);*/
3569 SET_TX_DESC_SND_PKT_SEL_8822C(desc, attrib->bf_pkt_type);
3570 #endif /* CONFIG_BEAMFORMING */
3571 }
3572
rtl8822c_cal_txdesc_chksum(PADAPTER adapter,u8 * ptxdesc)3573 void rtl8822c_cal_txdesc_chksum(PADAPTER adapter, u8 *ptxdesc)
3574 {
3575 struct halmac_adapter *halmac;
3576 struct halmac_api *api;
3577
3578
3579 halmac = adapter_to_halmac(adapter);
3580 api = HALMAC_GET_API(halmac);
3581
3582 api->halmac_fill_txdesc_checksum(halmac, ptxdesc);
3583 }
3584
3585
3586 #ifdef CONFIG_MP_INCLUDED
rtl8822c_prepare_mp_txdesc(PADAPTER adapter,struct mp_priv * pmp_priv)3587 void rtl8822c_prepare_mp_txdesc(PADAPTER adapter, struct mp_priv *pmp_priv)
3588 {
3589 u8 *desc;
3590 struct pkt_attrib *attrib;
3591 u32 pkt_size;
3592 s32 bmcast;
3593 u32 desc_size;
3594 u8 data_rate, pwr_status, offset;
3595
3596
3597 desc = pmp_priv->tx.desc;
3598 attrib = &pmp_priv->tx.attrib;
3599 pkt_size = attrib->last_txcmdsz;
3600 bmcast = IS_MCAST(attrib->ra);
3601 desc_size = rtl8822c_get_tx_desc_size(adapter);
3602
3603 SET_TX_DESC_LS_8822C(desc, 1);
3604 SET_TX_DESC_TXPKTSIZE_8822C(desc, pkt_size);
3605
3606 offset = desc_size;
3607 SET_TX_DESC_OFFSET_8822C(desc, offset);
3608 #if defined(CONFIG_PCI_HCI)
3609 SET_TX_DESC_PKT_OFFSET_8822C(desc, 0); /* 8822CE pkt_offset is 0 */
3610 #else
3611 SET_TX_DESC_PKT_OFFSET_8822C(desc, 1);
3612 #endif
3613
3614 if (bmcast)
3615 SET_TX_DESC_BMC_8822C(desc, 1);
3616
3617 SET_TX_DESC_MACID_8822C(desc, attrib->mac_id);
3618 SET_TX_DESC_RATE_ID_8822C(desc, attrib->raid);
3619 SET_TX_DESC_QSEL_8822C(desc, attrib->qsel);
3620
3621 if (pmp_priv->preamble)
3622 SET_TX_DESC_DATA_SHORT_8822C(desc, 1);
3623
3624 if (!attrib->qos_en)
3625 SET_TX_DESC_EN_HWSEQ_8822C(desc, 1);
3626 else
3627 SET_TX_DESC_SW_SEQ_8822C(desc, attrib->seqnum);
3628
3629 if (pmp_priv->bandwidth <= CHANNEL_WIDTH_160)
3630 SET_TX_DESC_DATA_BW_8822C(desc, pmp_priv->bandwidth);
3631 else {
3632 RTW_ERR("%s: unknown bandwidth %d, use 20M\n",
3633 __FUNCTION__, pmp_priv->bandwidth);
3634 SET_TX_DESC_DATA_BW_8822C(desc, CHANNEL_WIDTH_20);
3635 }
3636
3637 SET_TX_DESC_DISDATAFB_8822C(desc, 1);
3638 SET_TX_DESC_USE_RATE_8822C(desc, 1);
3639 SET_TX_DESC_DATARATE_8822C(desc, pmp_priv->rateidx);
3640 }
3641 #endif /* CONFIG_MP_INCLUDED */
3642
fill_default_txdesc(struct xmit_frame * pxmitframe,u8 * pbuf)3643 static void fill_default_txdesc(struct xmit_frame *pxmitframe, u8 *pbuf)
3644 {
3645 PADAPTER adapter;
3646 PHAL_DATA_TYPE hal;
3647 struct mlme_ext_priv *pmlmeext;
3648 struct mlme_ext_info *pmlmeinfo;
3649 struct pkt_attrib *pattrib;
3650 s32 bmcst;
3651 u32 desc_size;
3652 u8 hw_port;
3653
3654 adapter = pxmitframe->padapter;
3655 hal = GET_HAL_DATA(adapter);
3656 pmlmeext = &adapter->mlmeextpriv;
3657 pmlmeinfo = &(pmlmeext->mlmext_info);
3658
3659 pattrib = &pxmitframe->attrib;
3660 bmcst = IS_MCAST(pattrib->ra);
3661 hw_port = rtw_hal_get_port(adapter);
3662
3663 desc_size = rtl8822c_get_tx_desc_size(adapter);
3664 _rtw_memset(pbuf, 0, desc_size);
3665
3666 if (pxmitframe->frame_tag == DATA_FRAMETAG) {
3667 u8 drv_userate = 0;
3668
3669 SET_TX_DESC_MACID_8822C(pbuf, pattrib->mac_id);
3670 SET_TX_DESC_RATE_ID_8822C(pbuf, pattrib->raid);
3671 SET_TX_DESC_QSEL_8822C(pbuf, pattrib->qsel);
3672 SET_TX_DESC_SW_SEQ_8822C(pbuf, pattrib->seqnum);
3673
3674 rtl8822c_fill_txdesc_sectype(pattrib, pbuf);
3675 rtl8822c_fill_txdesc_vcs(adapter, pattrib, pbuf);
3676
3677 if (bmcst)
3678 rtl8822c_fill_txdesc_force_bmc_camid(pattrib, pbuf);
3679
3680 #ifdef CONFIG_P2P
3681 if (!rtw_p2p_chk_state(&adapter->wdinfo, P2P_STATE_NONE)) {
3682 if (pattrib->icmp_pkt == 1 && adapter->registrypriv.wifi_spec == 1)
3683 drv_userate = 1;
3684 }
3685 #endif
3686
3687 if ((pattrib->ether_type != 0x888e) &&
3688 (pattrib->ether_type != 0x0806) &&
3689 (pattrib->ether_type != 0x88B4) &&
3690 (pattrib->dhcp_pkt != 1) &&
3691 (drv_userate != 1)
3692 #ifdef CONFIG_AUTO_AP_MODE
3693 && (pattrib->pctrl != _TRUE)
3694 #endif
3695 ) {
3696 /* Non EAP & ARP & DHCP type data packet */
3697
3698 if (pattrib->ampdu_en == _TRUE) {
3699 SET_TX_DESC_AGG_EN_8822C(pbuf, 1);
3700 SET_TX_DESC_MAX_AGG_NUM_8822C(pbuf, 0x1F);
3701 SET_TX_DESC_AMPDU_DENSITY_8822C(pbuf, pattrib->ampdu_spacing);
3702 } else
3703 SET_TX_DESC_BK_8822C(pbuf, 1);
3704
3705 rtl8822c_fill_txdesc_phy(adapter, pattrib, pbuf);
3706
3707 /* compatibility for MCC consideration, use pmlmeext->cur_channel */
3708 if (!bmcst) {
3709 if (pmlmeext->cur_channel > 14)
3710 /* for 5G, OFDM 6M */
3711 SET_TX_DESC_DATA_RTY_LOWEST_RATE_8822C(pbuf, 4);
3712 else
3713 /* for 2.4G, CCK 1M */
3714 SET_TX_DESC_DATA_RTY_LOWEST_RATE_8822C(pbuf, 0);
3715 }
3716
3717 if (hal->fw_ractrl == _FALSE)
3718 rtl8822c_fill_txdesc_tx_rate(adapter, pattrib,
3719 hal->INIDATA_RATE[pattrib->mac_id] & 0x7F,
3720 hal->INIDATA_RATE[pattrib->mac_id] & BIT(7) ? 1 : 0,
3721 1, pbuf);
3722
3723 if (bmcst) {
3724 SET_TX_DESC_SW_DEFINE_8822C(pbuf, 0x01);
3725 rtl8822c_fill_txdesc_bmc_tx_rate(pattrib, pbuf);
3726 }
3727
3728 /* modify data rate by iwpriv */
3729 if (adapter->fix_rate != 0xFF)
3730 rtl8822c_fill_txdesc_tx_rate(adapter, pattrib,
3731 adapter->fix_rate & 0x7F,
3732 adapter->fix_rate & BIT(7) ? 1 : 0,
3733 adapter->data_fb, pbuf);
3734
3735 if (pattrib->ldpc)
3736 SET_TX_DESC_DATA_LDPC_8822C(pbuf, 1);
3737 if (pattrib->stbc)
3738 SET_TX_DESC_DATA_STBC_8822C(pbuf, 1);
3739
3740 #ifdef CONFIG_CMCC_TEST
3741 SET_TX_DESC_DATA_SHORT_8822C(pbuf, 1); /* use cck short premble */
3742 #endif
3743
3744 #ifdef CONFIG_WMMPS_STA
3745 if (pattrib->trigger_frame)
3746 SET_TX_DESC_TRI_FRAME_8822C (pbuf, 1);
3747 #endif /* CONFIG_WMMPS_STA */
3748
3749 } else {
3750 /*
3751 * EAP data packet and ARP packet.
3752 * Use the 1M data rate to send the EAP/ARP packet.
3753 * This will maybe make the handshake smooth.
3754 */
3755
3756 SET_TX_DESC_BK_8822C(pbuf, 1);
3757 SET_TX_DESC_USE_RATE_8822C(pbuf, 1);
3758 if (pmlmeinfo->preamble_mode == PREAMBLE_SHORT)
3759 SET_TX_DESC_DATA_SHORT_8822C(pbuf, 1);
3760 #ifdef CONFIG_IP_R_MONITOR
3761 if((pattrib->ether_type == ETH_P_ARP) &&
3762 (IsSupportedTxOFDM(adapter->registrypriv.wireless_mode)))
3763 SET_TX_DESC_DATARATE_8822C(pbuf, MRateToHwRate(IEEE80211_OFDM_RATE_6MB));
3764 else
3765 #endif/*CONFIG_IP_R_MONITOR*/
3766 SET_TX_DESC_DATARATE_8822C(pbuf, MRateToHwRate(pmlmeext->tx_rate));
3767
3768 RTW_INFO(FUNC_ADPT_FMT ": SP Packet(0x%04X) rate=0x%x SeqNum = %d\n",
3769 FUNC_ADPT_ARG(adapter), pattrib->ether_type, MRateToHwRate(pmlmeext->tx_rate), pattrib->seqnum);
3770 }
3771
3772 #if defined(CONFIG_USB_TX_AGGREGATION) || defined(CONFIG_SDIO_HCI) || defined(CONFIG_GSPI_HCI)
3773 SET_TX_DESC_DMA_TXAGG_NUM_8822C(pbuf, pxmitframe->agg_num);
3774 #endif
3775
3776 #ifdef CONFIG_TDLS
3777 #ifdef CONFIG_XMIT_ACK
3778 /* CCX-TXRPT ack for xmit mgmt frames. */
3779 if (pxmitframe->ack_report) {
3780 #ifdef DBG_CCX
3781 RTW_INFO("%s set spe_rpt\n", __func__);
3782 #endif
3783 SET_TX_DESC_SPE_RPT_8822C(pbuf, 1);
3784 SET_TX_DESC_SW_DEFINE_8822C(pbuf, (u8)(GET_PRIMARY_ADAPTER(adapter)->xmitpriv.seq_no));
3785 }
3786 #endif /* CONFIG_XMIT_ACK */
3787 #endif
3788 } else if (pxmitframe->frame_tag == MGNT_FRAMETAG) {
3789 SET_TX_DESC_MACID_8822C(pbuf, pattrib->mac_id);
3790 SET_TX_DESC_QSEL_8822C(pbuf, pattrib->qsel);
3791 SET_TX_DESC_RATE_ID_8822C(pbuf, pattrib->raid);
3792 SET_TX_DESC_SW_SEQ_8822C(pbuf, pattrib->seqnum);
3793 SET_TX_DESC_USE_RATE_8822C(pbuf, 1);
3794
3795 SET_TX_DESC_MBSSID_8822C(pbuf, pattrib->mbssid & 0xF);
3796
3797 SET_TX_DESC_DATARATE_8822C(pbuf, MRateToHwRate(pattrib->rate));
3798
3799 SET_TX_DESC_RTY_LMT_EN_8822C(pbuf, 1);
3800 if (pattrib->retry_ctrl == _TRUE)
3801 SET_TX_DESC_RTS_DATA_RTY_LMT_8822C(pbuf, 6);
3802 else
3803 SET_TX_DESC_RTS_DATA_RTY_LMT_8822C(pbuf, 12);
3804
3805 rtl8822c_fill_txdesc_mgnt_bf(pxmitframe, pbuf);
3806
3807 #ifdef CONFIG_XMIT_ACK
3808 /* CCX-TXRPT ack for xmit mgmt frames. */
3809 if (pxmitframe->ack_report) {
3810 #ifdef DBG_CCX
3811 RTW_INFO("%s set spe_rpt\n", __FUNCTION__);
3812 #endif
3813 SET_TX_DESC_SPE_RPT_8822C(pbuf, 1);
3814 SET_TX_DESC_SW_DEFINE_8822C(pbuf, (u8)(GET_PRIMARY_ADAPTER(adapter)->xmitpriv.seq_no));
3815 }
3816 #endif /* CONFIG_XMIT_ACK */
3817 } else if (pxmitframe->frame_tag == TXAGG_FRAMETAG)
3818 RTW_INFO("%s: TXAGG_FRAMETAG\n", __FUNCTION__);
3819 #ifdef CONFIG_MP_INCLUDED
3820 else if (pxmitframe->frame_tag == MP_FRAMETAG) {
3821 RTW_DBG("%s: MP_FRAMETAG\n", __FUNCTION__);
3822 fill_txdesc_for_mp(adapter, pbuf);
3823 }
3824 #endif
3825 else {
3826 RTW_INFO("%s: frame_tag=0x%x\n", __FUNCTION__, pxmitframe->frame_tag);
3827
3828 SET_TX_DESC_MACID_8822C(pbuf, pattrib->mac_id);
3829 SET_TX_DESC_RATE_ID_8822C(pbuf, pattrib->raid);
3830 SET_TX_DESC_QSEL_8822C(pbuf, pattrib->qsel);
3831 SET_TX_DESC_SW_SEQ_8822C(pbuf, pattrib->seqnum);
3832 SET_TX_DESC_USE_RATE_8822C(pbuf, 1);
3833 SET_TX_DESC_DATARATE_8822C(pbuf, MRateToHwRate(pmlmeext->tx_rate));
3834 }
3835
3836 SET_TX_DESC_TXPKTSIZE_8822C(pbuf, pattrib->last_txcmdsz);
3837
3838 {
3839 u8 pkt_offset, offset;
3840
3841 pkt_offset = 0;
3842 offset = desc_size;
3843 #ifdef CONFIG_USB_HCI
3844 pkt_offset = pxmitframe->pkt_offset;
3845 offset += (pxmitframe->pkt_offset >> 3);
3846 #endif /* CONFIG_USB_HCI */
3847
3848 #ifdef CONFIG_TX_EARLY_MODE
3849 if (pxmitframe->frame_tag == DATA_FRAMETAG) {
3850 pkt_offset = 1;
3851 offset += EARLY_MODE_INFO_SIZE;
3852 }
3853 #endif /* CONFIG_TX_EARLY_MODE */
3854
3855 SET_TX_DESC_PKT_OFFSET_8822C(pbuf, pkt_offset);
3856 SET_TX_DESC_OFFSET_8822C(pbuf, offset);
3857 #ifdef CONFIG_TCP_CSUM_OFFLOAD_TX
3858 if (pattrib->hw_csum == 1) {
3859 int offset = 48 + pkt_offset*8 + 24;
3860
3861 SET_TX_DESC_OFFSET_8822C(pbuf, offset);
3862 SET_TX_DESC_CHK_EN_8822C(pbuf, 1);
3863 SET_TX_DESC_WHEADER_LEN_8822C(pbuf, (pattrib->hdrlen + pattrib->iv_len + XATTRIB_GET_MCTRL_LEN(pattrib))>>1);
3864 }
3865 #endif
3866 }
3867
3868 if (bmcst)
3869 SET_TX_DESC_BMC_8822C(pbuf, 1);
3870
3871 /*
3872 * 2009.11.05. tynli_test. Suggested by SD4 Filen for FW LPS.
3873 * (1) The sequence number of each non-Qos frame / broadcast / multicast /
3874 * mgnt frame should be controlled by Hw because Fw will also send null data
3875 * which we cannot control when Fw LPS enable.
3876 * --> default enable non-Qos data sequense number. 2010.06.23. by tynli.
3877 * (2) Enable HW SEQ control for beacon packet, because we use Hw beacon.
3878 * (3) Use HW Qos SEQ to control the seq num of Ext port non-Qos packets.
3879 * 2010.06.23. Added by tynli.
3880 */
3881 if (!pattrib->qos_en) {
3882 SET_TX_DESC_DISQSELSEQ_8822C(pbuf, 1);
3883 SET_TX_DESC_EN_HWSEQ_8822C(pbuf, 1);
3884 SET_TX_DESC_HW_SSN_SEL_8822C(pbuf, pattrib->hw_ssn_sel);
3885 }
3886
3887 SET_TX_DESC_PORT_ID_8822C(pbuf, hw_port);
3888 SET_TX_DESC_MULTIPLE_PORT_8822C(pbuf, hw_port);
3889
3890 #ifdef CONFIG_ANTENNA_DIVERSITY
3891 if (!bmcst && pattrib->psta)
3892 odm_set_tx_ant_by_tx_info(adapter_to_phydm(adapter), pbuf, pattrib->psta->cmn.mac_id);
3893 #endif
3894
3895 rtl8822c_fill_txdesc_bf(pxmitframe, pbuf);
3896 }
3897
3898 /*
3899 * Description:
3900 *
3901 * Parameters:
3902 * pxmitframe xmitframe
3903 * pbuf where to fill tx desc
3904 */
rtl8822c_update_txdesc(struct xmit_frame * pxmitframe,u8 * pbuf)3905 void rtl8822c_update_txdesc(struct xmit_frame *pxmitframe, u8 *pbuf)
3906 {
3907 fill_default_txdesc(pxmitframe, pbuf);
3908 rtl8822c_cal_txdesc_chksum(pxmitframe->padapter, pbuf);
3909 }
3910
3911 /*
3912 * Description:
3913 * In normal chip, we should send some packet to HW which will be used by FW
3914 * in FW LPS mode.
3915 * The function is to fill the Tx descriptor of this packets,
3916 * then FW can tell HW to send these packet directly.
3917 */
fill_fake_txdesc(PADAPTER adapter,u8 * pDesc,u32 BufferLen,u8 IsPsPoll,u8 IsBTQosNull,u8 bDataFrame)3918 static void fill_fake_txdesc(PADAPTER adapter, u8 *pDesc, u32 BufferLen,
3919 u8 IsPsPoll, u8 IsBTQosNull, u8 bDataFrame)
3920 {
3921 /* Clear all status */
3922 struct mlme_ext_priv *pmlmeext = &adapter->mlmeextpriv;
3923 struct xmit_priv *pxmitpriv = &adapter->xmitpriv;
3924 u32 desc_size;
3925 u8 hw_port = rtw_hal_get_port(adapter);
3926
3927
3928 desc_size = rtl8822c_get_tx_desc_size(adapter);
3929 _rtw_memset(pDesc, 0, desc_size);
3930
3931 SET_TX_DESC_LS_8822C(pDesc, 1);
3932
3933 SET_TX_DESC_OFFSET_8822C(pDesc, desc_size);
3934
3935 SET_TX_DESC_TXPKTSIZE_8822C(pDesc, BufferLen);
3936 SET_TX_DESC_QSEL_8822C(pDesc, QSLT_MGNT); /* Fixed queue of Mgnt queue */
3937
3938 if (pmlmeext->cur_wireless_mode & WIRELESS_11B)
3939 SET_TX_DESC_RATE_ID_8822C(pDesc, RATEID_IDX_B);
3940 else
3941 SET_TX_DESC_RATE_ID_8822C(pDesc, RATEID_IDX_G);
3942
3943 /* Set NAVUSEHDR to prevent Ps-poll AId filed to be changed to error vlaue by HW */
3944 if (_TRUE == IsPsPoll)
3945 SET_TX_DESC_NAVUSEHDR_8822C(pDesc, 1);
3946 else {
3947 SET_TX_DESC_DISQSELSEQ_8822C(pDesc, 1);
3948 SET_TX_DESC_EN_HWSEQ_8822C(pDesc, 1);
3949 SET_TX_DESC_HW_SSN_SEL_8822C(pDesc, pxmitpriv->hw_ssn_seq_no);/*pattrib->hw_ssn_sel*/
3950 SET_TX_DESC_EN_HWEXSEQ_8822C(pDesc, 0);
3951 }
3952
3953 if (_TRUE == IsBTQosNull)
3954 SET_TX_DESC_BT_NULL_8822C(pDesc, 1);
3955
3956 SET_TX_DESC_USE_RATE_8822C(pDesc, 1);
3957 SET_TX_DESC_DATARATE_8822C(pDesc, MRateToHwRate(pmlmeext->tx_rate));
3958
3959 #ifdef CONFIG_MCC_MODE
3960 /* config Null data retry number */
3961 if (IsPsPoll == _FALSE && IsBTQosNull == _FALSE && bDataFrame == _FALSE) {
3962 if (rtw_hal_check_mcc_status(adapter, MCC_STATUS_PROCESS_MCC_START_SETTING)) {
3963 u8 rty_num = adapter->mcc_adapterpriv.null_rty_num;
3964 if (rty_num != 0) {
3965 SET_TX_DESC_RTY_LMT_EN_8822C(pDesc, 1);
3966 SET_TX_DESC_RTS_DATA_RTY_LMT_8822C(pDesc, rty_num);
3967 }
3968 }
3969 }
3970 #endif
3971
3972
3973 /*
3974 * Encrypt the data frame if under security mode excepct null data.
3975 */
3976 if (_TRUE == bDataFrame) {
3977 u32 EncAlg;
3978
3979 EncAlg = adapter->securitypriv.dot11PrivacyAlgrthm;
3980 switch (EncAlg) {
3981 case _NO_PRIVACY_:
3982 SET_TX_DESC_SEC_TYPE_8822C(pDesc, 0x0);
3983 break;
3984 case _WEP40_:
3985 case _WEP104_:
3986 case _TKIP_:
3987 SET_TX_DESC_SEC_TYPE_8822C(pDesc, 0x1);
3988 break;
3989 case _SMS4_:
3990 SET_TX_DESC_SEC_TYPE_8822C(pDesc, 0x2);
3991 break;
3992 case _AES_:
3993 SET_TX_DESC_SEC_TYPE_8822C(pDesc, 0x3);
3994 break;
3995 case _CCMP_256_:
3996 case _GCMP_:
3997 case _GCMP_256_:
3998 SET_TX_DESC_SEC_TYPE_8822C(pDesc, 0x2);
3999 break;
4000 default:
4001 SET_TX_DESC_SEC_TYPE_8822C(pDesc, 0x0);
4002 break;
4003 }
4004 }
4005
4006 SET_TX_DESC_PORT_ID_8822C(pDesc, hw_port);
4007 SET_TX_DESC_MULTIPLE_PORT_8822C(pDesc, hw_port);
4008 #if defined(CONFIG_USB_HCI) || defined(CONFIG_SDIO_HCI) || defined(CONFIG_GSPI_HCI)
4009 /*
4010 * USB interface drop packet if the checksum of descriptor isn't correct.
4011 * Using this checksum can let hardware recovery from packet bulk out error (e.g. Cancel URC, Bulk out error.).
4012 */
4013 rtl8822c_cal_txdesc_chksum(adapter, pDesc);
4014 #endif
4015 }
4016
rtl8822c_dbg_dump_tx_desc(PADAPTER adapter,int frame_tag,u8 * ptxdesc)4017 void rtl8822c_dbg_dump_tx_desc(PADAPTER adapter, int frame_tag, u8 *ptxdesc)
4018 {
4019 u8 bDumpTxPkt;
4020 u8 bDumpTxDesc = _FALSE;
4021
4022
4023 rtw_hal_get_def_var(adapter, HAL_DEF_DBG_DUMP_TXPKT, &bDumpTxPkt);
4024
4025 /* 1 for data frame, 2 for mgnt frame */
4026 if (bDumpTxPkt == 1) {
4027 RTW_INFO("dump tx_desc for data frame\n");
4028 if ((frame_tag & 0x0f) == DATA_FRAMETAG)
4029 bDumpTxDesc = _TRUE;
4030 } else if (bDumpTxPkt == 2) {
4031 RTW_INFO("dump tx_desc for mgnt frame\n");
4032 if ((frame_tag & 0x0f) == MGNT_FRAMETAG)
4033 bDumpTxDesc = _TRUE;
4034 }
4035
4036 /* 8822C TX SIZE = 48(HALMAC_TX_DESC_SIZE_8822C) */
4037 if (_TRUE == bDumpTxDesc) {
4038 RTW_INFO("=====================================\n");
4039 RTW_INFO("Offset00(0x%08x)\n", *((u32 *)(ptxdesc)));
4040 RTW_INFO("Offset04(0x%08x)\n", *((u32 *)(ptxdesc + 4)));
4041 RTW_INFO("Offset08(0x%08x)\n", *((u32 *)(ptxdesc + 8)));
4042 RTW_INFO("Offset12(0x%08x)\n", *((u32 *)(ptxdesc + 12)));
4043 RTW_INFO("Offset16(0x%08x)\n", *((u32 *)(ptxdesc + 16)));
4044 RTW_INFO("Offset20(0x%08x)\n", *((u32 *)(ptxdesc + 20)));
4045 RTW_INFO("Offset24(0x%08x)\n", *((u32 *)(ptxdesc + 24)));
4046 RTW_INFO("Offset28(0x%08x)\n", *((u32 *)(ptxdesc + 28)));
4047 RTW_INFO("Offset32(0x%08x)\n", *((u32 *)(ptxdesc + 32)));
4048 RTW_INFO("Offset36(0x%08x)\n", *((u32 *)(ptxdesc + 36)));
4049 RTW_INFO("Offset40(0x%08x)\n", *((u32 *)(ptxdesc + 40)));
4050 RTW_INFO("Offset44(0x%08x)\n", *((u32 *)(ptxdesc + 44)));
4051 RTW_INFO("=====================================\n");
4052 }
4053 }
4054 /* xmit section */
rtl8822c_init_xmit_priv(_adapter * adapter)4055 void rtl8822c_init_xmit_priv(_adapter *adapter)
4056 {
4057 struct xmit_priv *pxmitpriv = &adapter->xmitpriv;
4058
4059 pxmitpriv->hw_ssn_seq_no = rtw_get_hwseq_no(adapter);
4060 pxmitpriv->nqos_ssn = 0;
4061 }
4062
rtl8822c_rxdesc2attribute(struct rx_pkt_attrib * a,u8 * desc)4063 void rtl8822c_rxdesc2attribute(struct rx_pkt_attrib *a, u8 *desc)
4064 {
4065 /* initial value */
4066 _rtw_memset(a, 0, sizeof(struct rx_pkt_attrib));
4067 a->bw = CHANNEL_WIDTH_MAX;
4068
4069 /* Get from RX DESC */
4070 a->pkt_len = (u16)GET_RX_DESC_PKT_LEN_8822C(desc);
4071 a->pkt_rpt_type = GET_RX_DESC_C2H_8822C(desc) ? C2H_PACKET : NORMAL_RX;
4072
4073 if (a->pkt_rpt_type == NORMAL_RX) {
4074 a->crc_err = (u8)GET_RX_DESC_CRC32_8822C(desc);
4075 a->icv_err = (u8)GET_RX_DESC_ICV_ERR_8822C(desc);
4076 a->drvinfo_sz = (u8)GET_RX_DESC_DRV_INFO_SIZE_8822C(desc) << 3;
4077 a->encrypt = (u8)GET_RX_DESC_SECURITY_8822C(desc);
4078 a->qos = (u8)GET_RX_DESC_QOS_8822C(desc);
4079 a->shift_sz = (u8)GET_RX_DESC_SHIFT_8822C(desc);
4080 a->physt = (u8)GET_RX_DESC_PHYST_8822C(desc);
4081 a->bdecrypted = (u8)GET_RX_DESC_SWDEC_8822C(desc) ? 0 : 1;
4082
4083 a->priority = (u8)GET_RX_DESC_TID_8822C(desc);
4084 a->amsdu = (u8)GET_RX_DESC_AMSDU_8822C(desc);
4085 a->mdata = (u8)GET_RX_DESC_MD_8822C(desc);
4086 a->mfrag = (u8)GET_RX_DESC_MF_8822C(desc);
4087
4088 a->seq_num = (u16)GET_RX_DESC_SEQ_8822C(desc);
4089 a->frag_num = (u8)GET_RX_DESC_FRAG_8822C(desc);
4090
4091 a->data_rate = (u8)GET_RX_DESC_RX_RATE_8822C(desc);
4092 a->ampdu = (u8)GET_RX_DESC_PAGGR_8822C(desc);
4093 a->ampdu_eof = (u8)GET_RX_DESC_RX_EOF_8822C(desc);
4094 a->ppdu_cnt = (u8)GET_RX_DESC_PPDU_CNT_8822C(desc);
4095 a->free_cnt = (u32)GET_RX_DESC_TSFL_8822C(desc);
4096
4097 #ifdef CONFIG_TCP_CSUM_OFFLOAD_RX
4098 /* RX TCP checksum offload related variables */
4099 a->csum_valid = (u8)GET_RX_DESC_CHK_VLD_8822C(desc);
4100 a->csum_err = (u8)GET_RX_DESC_CHKERR_8822C(desc);
4101 #endif /* CONFIG_TCP_CSUM_OFFLOAD_RX */
4102 }
4103 }
4104
rtl8822c_query_rx_desc(union recv_frame * precvframe,u8 * pdesc)4105 void rtl8822c_query_rx_desc(union recv_frame *precvframe, u8 *pdesc)
4106 {
4107 rtl8822c_rxdesc2attribute(&precvframe->u.hdr.attrib, pdesc);
4108 }
4109
rtl8822c_set_hal_ops(PADAPTER adapter)4110 void rtl8822c_set_hal_ops(PADAPTER adapter)
4111 {
4112 struct hal_com_data *hal;
4113 struct hal_ops *ops;
4114
4115
4116 hal = GET_HAL_DATA(adapter);
4117 ops = &adapter->hal_func;
4118
4119 /*
4120 * Initialize hal_com_data variables
4121 */
4122 hal->efuse0x3d7 = 0xFF;
4123 hal->efuse0x3d8 = 0xFF;
4124
4125 /*
4126 * Initialize operation callback functions
4127 */
4128 /*** initialize section ***/
4129 ops->read_chip_version = read_chip_version;
4130 /*
4131 ops->init_default_value = NULL;
4132 ops->intf_chip_configure = NULL;
4133 */
4134 ops->read_adapter_info = rtl8822c_read_efuse;
4135 ops->hal_power_on = rtl8822c_power_on;
4136 ops->hal_power_off = rtl8822c_power_off;
4137 ops->hal_init = rtl8822c_init;
4138 ops->hal_deinit = rtl8822c_deinit;
4139 ops->dm_init = rtl8822c_phy_init_dm_priv;
4140 ops->dm_deinit = rtl8822c_phy_deinit_dm_priv;
4141
4142 /*** xmit section ***/
4143 /*
4144 ops->init_xmit_priv = NULL;
4145 ops->free_xmit_priv = NULL;
4146 ops->hal_xmit = NULL;
4147 ops->mgnt_xmit = NULL;
4148 ops->hal_xmitframe_enqueue = NULL;
4149 #ifdef CONFIG_XMIT_THREAD_MODE
4150 ops->xmit_thread_handler = NULL;
4151 #endif
4152 */
4153 ops->run_thread = rtl8822c_run_thread;
4154 ops->cancel_thread = rtl8822c_cancel_thread;
4155
4156 /*** recv section ***/
4157 /*
4158 ops->init_recv_priv = NULL;
4159 ops->free_recv_priv = NULL;
4160 #if defined(CONFIG_USB_HCI) || defined(CONFIG_PCI_HCI)
4161 ops->inirp_init = NULL;
4162 ops->inirp_deinit = NULL;
4163 #endif
4164 */
4165 /*** interrupt hdl section ***/
4166 /*
4167 ops->enable_interrupt = NULL;
4168 ops->disable_interrupt = NULL;
4169 */
4170 ops->check_ips_status = check_ips_status;
4171 /*
4172 #if defined(CONFIG_PCI_HCI)
4173 ops->interrupt_handler = NULL;
4174 #endif
4175 #if defined(CONFIG_USB_HCI) && defined(CONFIG_SUPPORT_USB_INT)
4176 ops->interrupt_handler = NULL;
4177 #endif
4178 #if defined(CONFIG_PCI_HCI)
4179 ops->irp_reset = NULL;
4180 #endif
4181 */
4182
4183 /*** DM section ***/
4184 ops->set_chnl_bw_handler = rtl8822c_set_channel_bw;
4185
4186 ops->set_tx_power_level_handler = rtl8822c_set_tx_power_level;
4187 ops->set_txpwr_done = rtl8822c_set_txpwr_done;
4188 ops->set_tx_power_index_handler = rtl8822c_set_tx_power_index;
4189 ops->get_tx_power_index_handler = hal_com_get_txpwr_idx;
4190
4191 ops->hal_dm_watchdog = rtl8822c_phy_haldm_watchdog;
4192
4193 ops->set_hw_reg_handler = rtl8822c_sethwreg;
4194 ops->GetHwRegHandler = rtl8822c_gethwreg;
4195 ops->get_hal_def_var_handler = rtl8822c_gethaldefvar;
4196 ops->SetHalDefVarHandler = rtl8822c_sethaldefvar;
4197
4198 ops->GetHalODMVarHandler = GetHalODMVar;
4199 ops->SetHalODMVarHandler = SetHalODMVar;
4200
4201 ops->SetBeaconRelatedRegistersHandler = set_beacon_related_registers;
4202
4203 /*
4204 ops->interface_ps_func = NULL;
4205 */
4206 ops->read_bbreg = rtl8822c_read_bb_reg;
4207 ops->write_bbreg = rtl8822c_write_bb_reg;
4208 ops->read_rfreg = rtl8822c_read_rf_reg;
4209 ops->write_rfreg = rtl8822c_write_rf_reg;
4210 ops->read_wmmedca_reg = rtl8822c_read_wmmedca_reg;
4211
4212 #ifdef CONFIG_HOSTAPD_MLME
4213 /*
4214 ops->hostap_mgnt_xmit_entry = NULL;
4215 */
4216 #endif
4217 /*
4218 ops->EfusePowerSwitch = NULL;
4219 ops->BTEfusePowerSwitch = NULL;
4220 ops->ReadEFuse = NULL;
4221 ops->EFUSEGetEfuseDefinition = NULL;
4222 ops->EfuseGetCurrentSize = NULL;
4223 ops->Efuse_PgPacketRead = NULL;
4224 ops->Efuse_PgPacketWrite = NULL;
4225 ops->Efuse_WordEnableDataWrite = NULL;
4226 ops->Efuse_PgPacketWrite_BT = NULL;
4227 */
4228 #ifdef DBG_CONFIG_ERROR_DETECT
4229 ops->sreset_init_value = sreset_init_value;
4230 ops->sreset_reset_value = sreset_reset_value;
4231 ops->silentreset = sreset_reset;
4232 ops->sreset_xmit_status_check = xmit_status_check;
4233 ops->sreset_linked_status_check = linked_status_check;
4234 ops->sreset_get_wifi_status = sreset_get_wifi_status;
4235 ops->sreset_inprogress = sreset_inprogress;
4236 #endif /* DBG_CONFIG_ERROR_DETECT */
4237
4238 #ifdef CONFIG_IOL
4239 /*
4240 ops->IOL_exec_cmds_sync = NULL;
4241 */
4242 #endif
4243
4244 ops->hal_notch_filter = rtl8822c_notch_filter_switch;
4245 ops->hal_mac_c2h_handler = rtl8822c_c2h_handler;
4246 ops->fill_h2c_cmd = rtl8822c_fillh2ccmd;
4247 ops->fill_fake_txdesc = fill_fake_txdesc;
4248 ops->fw_dl = rtl8822c_fw_dl;
4249
4250 #if defined(CONFIG_WOWLAN) || defined(CONFIG_AP_WOWLAN) || defined(CONFIG_PCI_HCI)
4251 /*
4252 ops->clear_interrupt = NULL;
4253 */
4254 #endif
4255 /*
4256 ops->hal_get_tx_buff_rsvd_page_num = NULL;
4257 */
4258 #ifdef CONFIG_GPIO_API
4259 /*
4260 ops->update_hisr_hsisr_ind = NULL;
4261 */
4262 #endif
4263
4264 /* HALMAC related functions */
4265 ops->init_mac_register = rtl8822c_phy_init_mac_register;
4266 ops->init_phy = rtl8822c_phy_init;
4267 ops->reqtxrpt = rtl8822c_req_txrpt_cmd;
4268
4269 }
4270
4271