1 /****************************************************************************** 2 * 3 * Copyright(c) 2007 - 2017 Realtek Corporation. 4 * 5 * This program is free software; you can redistribute it and/or modify it 6 * under the terms of version 2 of the GNU General Public License as 7 * published by the Free Software Foundation. 8 * 9 * This program is distributed in the hope that it will be useful, but WITHOUT 10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for 12 * more details. 13 * 14 *****************************************************************************/ 15 #ifndef __HAL_COM_PHYCFG_H__ 16 #define __HAL_COM_PHYCFG_H__ 17 18 #ifndef DBG_TX_POWER_IDX 19 #define DBG_TX_POWER_IDX 0 20 #endif 21 22 #define PathA 0x0 /* Useless */ 23 #define PathB 0x1 24 #define PathC 0x2 25 #define PathD 0x3 26 27 typedef enum _RF_TX_NUM { 28 RF_1TX = 0, 29 RF_2TX, 30 RF_3TX, 31 RF_4TX, 32 RF_MAX_TX_NUM, 33 RF_TX_NUM_NONIMPLEMENT, 34 } RF_TX_NUM; 35 36 enum txpwr_pg_mode { 37 TXPWR_PG_WITH_PWR_IDX, 38 TXPWR_PG_WITH_TSSI_OFFSET, 39 TXPWR_PG_UNKNOWN, /* keep last */ 40 }; 41 42 /*------------------------------Define structure----------------------------*/ 43 typedef struct _BB_REGISTER_DEFINITION { 44 u32 rfintfs; /* set software control: */ 45 /* 0x870~0x877[8 bytes] */ 46 47 u32 rfintfo; /* output data: */ 48 /* 0x860~0x86f [16 bytes] */ 49 50 u32 rfintfe; /* output enable: */ 51 /* 0x860~0x86f [16 bytes] */ 52 53 u32 rf3wireOffset; /* LSSI data: */ 54 /* 0x840~0x84f [16 bytes] */ 55 56 u32 rfHSSIPara2; /* wire parameter control2 : */ 57 /* 0x824~0x827,0x82c~0x82f, 0x834~0x837, 0x83c~0x83f [16 bytes] */ 58 59 u32 rfLSSIReadBack; /* LSSI RF readback data SI mode */ 60 /* 0x8a0~0x8af [16 bytes] */ 61 62 u32 rfLSSIReadBackPi; /* LSSI RF readback data PI mode 0x8b8-8bc for Path A and B */ 63 64 } BB_REGISTER_DEFINITION_T, *PBB_REGISTER_DEFINITION_T; 65 66 67 /* ---------------------------------------------------------------------- */ 68 69 extern const char *const _txpwr_pg_mode_str[]; 70 #define txpwr_pg_mode_str(_mode) (((_mode) >= TXPWR_PG_UNKNOWN) ? _txpwr_pg_mode_str[TXPWR_PG_UNKNOWN] : _txpwr_pg_mode_str[(_mode)]) 71 72 u8 phy_get_target_txpwr( 73 PADAPTER Adapter, 74 u8 Band, 75 u8 RfPath, 76 RATE_SECTION RateSection 77 ); 78 79 void 80 PHY_GetRateValuesOfTxPowerByRate( 81 PADAPTER pAdapter, 82 u32 RegAddr, 83 u32 BitMask, 84 u32 Value, 85 u8 *Rate, 86 s8 *PwrByRateVal, 87 u8 *RateNum 88 ); 89 90 u8 phy_get_rate_idx_of_txpwr_by_rate(enum MGN_RATE rate); 91 92 void 93 phy_set_tx_power_index_by_rate_section( 94 PADAPTER pAdapter, 95 enum rf_path RFPath, 96 u8 Channel, 97 u8 RateSection 98 ); 99 100 s8 phy_get_txpwr_by_rate(_adapter *adapter 101 , BAND_TYPE band, enum rf_path rfpath, RATE_SECTION rs, enum MGN_RATE rate); 102 103 s16 phy_get_txpwr_by_rate_single_mbm(_adapter *adapter 104 , BAND_TYPE band, enum rf_path rfpath, RATE_SECTION rs, enum MGN_RATE rate, bool eirp); 105 s16 phy_get_txpwr_by_rate_total_mbm(_adapter *adapter 106 , BAND_TYPE band, RATE_SECTION rs, enum MGN_RATE rate, bool cap, bool eirp); 107 108 s16 phy_get_txpwr_by_rate_single_max_mbm(_adapter *adapter, BAND_TYPE band, enum rf_path rfpath, bool eirp); 109 s16 phy_get_txpwr_by_rate_total_max_mbm(_adapter *adapter, BAND_TYPE band, bool cap, bool eirp); 110 111 void 112 phy_set_tx_power_level_by_path( 113 PADAPTER Adapter, 114 u8 channel, 115 u8 path 116 ); 117 118 void 119 PHY_InitTxPowerByRate( 120 PADAPTER pAdapter 121 ); 122 123 void 124 phy_store_tx_power_by_rate( 125 PADAPTER pAdapter, 126 u32 Band, 127 u32 RfPath, 128 u32 TxNum, 129 u32 RegAddr, 130 u32 BitMask, 131 u32 Data 132 ); 133 134 void 135 PHY_TxPowerByRateConfiguration( 136 PADAPTER pAdapter 137 ); 138 139 bool phy_chk_ch_setting_consistency(_adapter *adapter, u8 ch); 140 141 #ifdef CONFIG_TXPWR_PG_WITH_PWR_IDX 142 u8 phy_get_pg_txpwr_idx(_adapter *pAdapter 143 , enum rf_path RFPath, RATE_SECTION rs, u8 ntx_idx 144 , enum channel_width BandWidth, u8 band, u8 Channel); 145 #endif 146 147 #if CONFIG_TXPWR_LIMIT 148 s8 phy_get_txpwr_lmt(_adapter *adapter 149 , const char *lmt_name 150 , BAND_TYPE band, enum channel_width bw 151 , u8 tlrs, u8 ntx_idx, u8 cch, u8 lock 152 ); 153 154 s8 phy_get_txpwr_lmt_diff(_adapter *adapter 155 , const char *lmt_name 156 , BAND_TYPE band, enum channel_width bw 157 , u8 rfpath, u8 rs, u8 tlrs, u8 ntx_idx, u8 cch, u8 lock 158 ); 159 160 s8 phy_get_txpwr_lmt_sub_chs(_adapter *adapter 161 , const char *lmt_name 162 , BAND_TYPE band, enum channel_width bw 163 , u8 rfpath, u8 rate, u8 ntx_idx, u8 cch, u8 opch, bool reg_max 164 ); 165 #else 166 #define phy_get_txpwr_lmt(adapter, lmt_name, band, bw, tlrs, ntx_idx, cch, lock) (GET_HAL_SPEC(adapter)->txgi_max) 167 #define phy_get_txpwr_lmt_diff(adapter, lmt_name, band, bw, rfpath, rs, tlrs, ntx_idx, cch, lock) (GET_HAL_SPEC(adapter)->txgi_max) 168 #define phy_get_txpwr_lmt_sub_chs(adapter, lmt_name, band, bw, rfpath, rate, ntx_idx, cch, opch, reg_max) (GET_HAL_SPEC(adapter)->txgi_max) 169 #endif /* CONFIG_TXPWR_LIMIT */ 170 171 void dump_txpwr_tpc_settings(void *sel, _adapter *adapter); 172 void dump_txpwr_antenna_gain(void *sel, _adapter *adapter); 173 174 s8 phy_get_txpwr_target(_adapter *adapter, u8 rfpath, RATE_SECTION rs, u8 rate, u8 ntx_idx 175 , enum channel_width bw, BAND_TYPE band, u8 cch, u8 opch, bool reg_max, struct txpwr_idx_comp *tic); 176 s8 phy_get_txpwr_amends(_adapter *adapter, u8 rfpath, RATE_SECTION rs, u8 rate, u8 ntx_idx 177 , enum channel_width bw, BAND_TYPE band, u8 cch, struct txpwr_idx_comp *tic); 178 #ifdef CONFIG_TXPWR_PG_WITH_TSSI_OFFSET 179 s8 phy_get_tssi_txpwr_by_rate_ref(_adapter *adapter, enum rf_path path 180 , enum channel_width bw, u8 cch, u8 opch); 181 #endif 182 u8 hal_com_get_txpwr_idx(_adapter *adapter, enum rf_path rfpath 183 , RATE_SECTION rs, enum MGN_RATE rate, enum channel_width bw, BAND_TYPE band, u8 cch, u8 opch 184 , struct txpwr_idx_comp *tic); 185 186 s16 phy_get_txpwr_single_mbm(_adapter *adapter, u8 rfpath, RATE_SECTION rs, u8 rate 187 , enum channel_width bw, u8 cch, u8 opch, bool reg_max, bool eirp, struct txpwr_idx_comp *tic); 188 s16 phy_get_txpwr_total_mbm(_adapter *adapter, RATE_SECTION rs, u8 rate 189 , enum channel_width bw, u8 cch, u8 opch, bool reg_max, bool eirp, struct txpwr_idx_comp *tic); 190 191 s16 phy_get_txpwr_single_max_mbm(_adapter *adapter, u8 rfpath 192 , enum channel_width bw, u8 cch, u8 opch, u16 bmp_cck_ofdm, u32 bmp_ht, u64 bmp_vht, bool reg_max, bool eirp); 193 s16 phy_get_txpwr_total_max_mbm(_adapter *adapter 194 , enum channel_width bw, u8 cch, u8 opch, u16 bmp_cck_ofdm, u32 bmp_ht, u64 bmp_vht, bool reg_max, bool eirp); 195 196 s8 197 phy_get_tx_power_final_absolute_value(_adapter *adapter, u8 rfpath, u8 rate, 198 enum channel_width bw, u8 channel); 199 200 s8 201 PHY_GetTxPowerTrackingOffset( 202 PADAPTER pAdapter, 203 enum rf_path RFPath, 204 u8 Rate 205 ); 206 207 struct txpwr_idx_comp { 208 u8 ntx_idx; 209 s8 target; 210 s8 base; 211 212 /* for target */ 213 s8 by_rate; 214 s8 btc; 215 s8 extra; 216 s8 utarget; 217 s8 rlimit; /* regulatory limit w/o HAL consideration */ 218 s8 limit; /* limit from RTK private (regulatory limit w/ HAL consideration) */ 219 s8 ulimit; /* user limit */ 220 s8 tpc; 221 222 /* for amends */ 223 s8 tpt; 224 s8 dpd; 225 }; 226 227 u8 phy_get_tx_power_index_ex(_adapter *adapter 228 , enum rf_path rfpath, RATE_SECTION rs, enum MGN_RATE rate 229 , enum channel_width bw, BAND_TYPE band, u8 cch, u8 opch); 230 231 u8 232 phy_get_tx_power_index( 233 PADAPTER pAdapter, 234 enum rf_path RFPath, 235 u8 Rate, 236 enum channel_width BandWidth, 237 u8 Channel 238 ); 239 240 void 241 PHY_SetTxPowerIndex( 242 PADAPTER pAdapter, 243 u32 PowerIndex, 244 enum rf_path RFPath, 245 u8 Rate 246 ); 247 248 bool phy_is_txpwr_user_mbm_valid(_adapter *adapter, s16 mbm); 249 bool phy_is_txpwr_user_target_specified(_adapter *adapter); 250 251 void dump_tx_power_index_inline(void *sel, _adapter *adapter, u8 rfpath 252 , enum channel_width bw, u8 cch, enum MGN_RATE rate, u8 pwr_idx, struct txpwr_idx_comp *tic); 253 #ifdef CONFIG_PROC_DEBUG 254 void dump_tx_power_idx_title(void *sel, _adapter *adapter 255 , enum channel_width bw, u8 cch, u8 opch); 256 void dump_tx_power_idx_by_path_rs(void *sel, _adapter *adapter, u8 rfpath 257 , RATE_SECTION rs, enum channel_width bw, u8 cch, u8 opch); 258 void dump_tx_power_idx(void *sel, _adapter *adapter 259 , enum channel_width bw, u8 cch, u8 opch); 260 void dump_txpwr_total_dbm_title(void *sel, _adapter *adapter 261 , enum channel_width bw, u8 cch, u8 opch); 262 void dump_txpwr_total_dbm_by_rs(void *sel, _adapter *adapter, u8 rs 263 , enum channel_width bw, u8 cch, u8 opch); 264 void dump_txpwr_total_dbm(void *sel, _adapter *adapter 265 , enum channel_width bw, u8 cch, u8 opch); 266 #endif 267 268 bool phy_is_tx_power_limit_needed(_adapter *adapter); 269 bool phy_is_tx_power_by_rate_needed(_adapter *adapter); 270 int phy_load_tx_power_by_rate(_adapter *adapter, u8 chk_file); 271 #if CONFIG_TXPWR_LIMIT 272 int phy_load_tx_power_limit(_adapter *adapter, u8 chk_file); 273 #endif 274 void phy_load_tx_power_ext_info(_adapter *adapter, u8 chk_file); 275 void phy_reload_tx_power_ext_info(_adapter *adapter); 276 void phy_reload_default_tx_power_ext_info(_adapter *adapter); 277 278 const struct map_t *hal_pg_txpwr_def_info(_adapter *adapter); 279 280 #ifdef CONFIG_EFUSE_CONFIG_FILE 281 int check_phy_efuse_tx_power_info_valid(_adapter *adapter); 282 #endif 283 284 #ifdef CONFIG_TXPWR_PG_WITH_PWR_IDX 285 void dump_hal_txpwr_info_2g(void *sel, _adapter *adapter, u8 rfpath_num, u8 max_tx_cnt); 286 void dump_hal_txpwr_info_5g(void *sel, _adapter *adapter, u8 rfpath_num, u8 max_tx_cnt); 287 288 void hal_load_txpwr_info(_adapter *adapter); 289 #endif 290 291 #ifdef CONFIG_PROC_DEBUG 292 void dump_tx_power_ext_info(void *sel, _adapter *adapter); 293 void dump_target_tx_power(void *sel, _adapter *adapter); 294 void dump_tx_power_by_rate(void *sel, _adapter *adapter); 295 #endif 296 297 int rtw_get_phy_file_path(_adapter *adapter, const char *file_name); 298 299 #ifdef CONFIG_LOAD_PHY_PARA_FROM_FILE 300 #define MAC_FILE_FW_NIC "FW_NIC.bin" 301 #define MAC_FILE_FW_WW_IMG "FW_WoWLAN.bin" 302 #define PHY_FILE_MAC_REG "MAC_REG.txt" 303 304 #define PHY_FILE_AGC_TAB "AGC_TAB.txt" 305 #define PHY_FILE_PHY_REG "PHY_REG.txt" 306 #define PHY_FILE_PHY_REG_MP "PHY_REG_MP.txt" 307 #define PHY_FILE_PHY_REG_PG "PHY_REG_PG.txt" 308 309 #define PHY_FILE_RADIO_A "RadioA.txt" 310 #define PHY_FILE_RADIO_B "RadioB.txt" 311 #define PHY_FILE_RADIO_C "RadioC.txt" 312 #define PHY_FILE_RADIO_D "RadioD.txt" 313 #define PHY_FILE_TXPWR_TRACK "TxPowerTrack.txt" 314 #define PHY_FILE_TXPWR_LMT "TXPWR_LMT.txt" 315 316 #define PHY_FILE_WIFI_ANT_ISOLATION "wifi_ant_isolation.txt" 317 318 #define MAX_PARA_FILE_BUF_LEN 32768 /* 32k */ 319 320 #define LOAD_MAC_PARA_FILE BIT0 321 #define LOAD_BB_PARA_FILE BIT1 322 #define LOAD_BB_PG_PARA_FILE BIT2 323 #define LOAD_BB_MP_PARA_FILE BIT3 324 #define LOAD_RF_PARA_FILE BIT4 325 #define LOAD_RF_TXPWR_TRACK_PARA_FILE BIT5 326 #define LOAD_RF_TXPWR_LMT_PARA_FILE BIT6 327 328 int phy_ConfigMACWithParaFile(PADAPTER Adapter, char *pFileName); 329 int phy_ConfigBBWithParaFile(PADAPTER Adapter, char *pFileName, u32 ConfigType); 330 int phy_ConfigBBWithPgParaFile(PADAPTER Adapter, const char *pFileName); 331 int phy_ConfigBBWithMpParaFile(PADAPTER Adapter, char *pFileName); 332 int PHY_ConfigRFWithParaFile(PADAPTER Adapter, char *pFileName, enum rf_path eRFPath); 333 int PHY_ConfigRFWithTxPwrTrackParaFile(PADAPTER Adapter, char *pFileName); 334 #if CONFIG_TXPWR_LIMIT 335 int PHY_ConfigRFWithPowerLimitTableParaFile(PADAPTER Adapter, const char *pFileName); 336 #endif 337 void phy_free_filebuf_mask(_adapter *padapter, u8 mask); 338 void phy_free_filebuf(_adapter *padapter); 339 #endif /* CONFIG_LOAD_PHY_PARA_FROM_FILE */ 340 u8 phy_check_under_survey_ch(_adapter *adapter); 341 #endif /* __HAL_COMMON_H__ */ 342