1 // Copyright 2015-2019 Espressif Systems (Shanghai) PTE LTD
2 //
3 // Licensed under the Apache License, Version 2.0 (the "License");
4 // you may not use this file except in compliance with the License.
5 // You may obtain a copy of the License at
6 //
7 // http://www.apache.org/licenses/LICENSE-2.0
8 //
9 // Unless required by applicable law or agreed to in writing, software
10 // distributed under the License is distributed on an "AS IS" BASIS,
11 // WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
12 // See the License for the specific language governing permissions and
13 // limitations under the License.
14
15 #include "sdkconfig.h"
16 #include "esp_flash.h"
17 #include "memspi_host_driver.h"
18 #include "esp_flash_spi_init.h"
19 #include "driver/gpio.h"
20 #include "esp_rom_gpio.h"
21 #include "esp_rom_efuse.h"
22 #include "esp_log.h"
23 #include "esp_heap_caps.h"
24 #include "hal/spi_types.h"
25 #include "driver/spi_common_internal.h"
26 #include "hal/spi_flash_hal.h"
27 #include "hal/gpio_hal.h"
28 #include "esp_flash_internal.h"
29 #include "esp_rom_gpio.h"
30 #if CONFIG_IDF_TARGET_ESP32
31 #include "esp32/rom/spi_flash.h"
32 #elif CONFIG_IDF_TARGET_ESP32S2
33 #include "esp32s2/rom/spi_flash.h"
34 #elif CONFIG_IDF_TARGET_ESP32S3
35 #include "esp32s3/rom/spi_flash.h"
36 #elif CONFIG_IDF_TARGET_ESP32C3
37 #include "esp32c3/rom/spi_flash.h"
38 #endif
39
40 __attribute__((unused)) static const char TAG[] = "spi_flash";
41
42 #ifdef CONFIG_ESPTOOLPY_FLASHFREQ_80M
43 #define DEFAULT_FLASH_SPEED ESP_FLASH_80MHZ
44 #elif defined CONFIG_ESPTOOLPY_FLASHFREQ_40M
45 #define DEFAULT_FLASH_SPEED ESP_FLASH_40MHZ
46 #elif defined CONFIG_ESPTOOLPY_FLASHFREQ_26M
47 #define DEFAULT_FLASH_SPEED ESP_FLASH_26MHZ
48 #elif defined CONFIG_ESPTOOLPY_FLASHFREQ_20M
49 #define DEFAULT_FLASH_SPEED ESP_FLASH_20MHZ
50 #else
51 #error Flash frequency not defined! Check the ``CONFIG_ESPTOOLPY_FLASHFREQ_*`` options.
52 #endif
53
54 #if defined(CONFIG_ESPTOOLPY_FLASHMODE_QIO)
55 #define DEFAULT_FLASH_MODE SPI_FLASH_QIO
56 #elif defined(CONFIG_ESPTOOLPY_FLASHMODE_QOUT)
57 #define DEFAULT_FLASH_MODE SPI_FLASH_QOUT
58 #elif defined(CONFIG_ESPTOOLPY_FLASHMODE_DIO)
59 #define DEFAULT_FLASH_MODE SPI_FLASH_DIO
60 #elif defined(CONFIG_ESPTOOLPY_FLASHMODE_DOUT)
61 #define DEFAULT_FLASH_MODE SPI_FLASH_DOUT
62 #else
63 #define DEFAULT_FLASH_MODE SPI_FLASH_FASTRD
64 #endif
65
66 //TODO: modify cs hold to meet requirements of all chips!!!
67 #if CONFIG_IDF_TARGET_ESP32
68 #define ESP_FLASH_HOST_CONFIG_DEFAULT() (memspi_host_config_t){ \
69 .host_id = SPI1_HOST,\
70 .speed = DEFAULT_FLASH_SPEED, \
71 .cs_num = 0, \
72 .iomux = false, \
73 .input_delay_ns = 0,\
74 .cs_setup = 1,\
75 }
76 #elif CONFIG_IDF_TARGET_ESP32S2
77 #define ESP_FLASH_HOST_CONFIG_DEFAULT() (memspi_host_config_t){ \
78 .host_id = SPI1_HOST,\
79 .speed = DEFAULT_FLASH_SPEED, \
80 .cs_num = 0, \
81 .iomux = true, \
82 .input_delay_ns = 0,\
83 .cs_setup = 1,\
84 }
85 #elif CONFIG_IDF_TARGET_ESP32S3
86 #include "esp32s3/rom/efuse.h"
87 #define ESP_FLASH_HOST_CONFIG_DEFAULT() (memspi_host_config_t){ \
88 .host_id = SPI1_HOST,\
89 .speed = DEFAULT_FLASH_SPEED, \
90 .cs_num = 0, \
91 .iomux = true, \
92 .input_delay_ns = 0,\
93 .cs_setup = 1,\
94 }
95 #elif CONFIG_IDF_TARGET_ESP32C3
96 #include "esp32c3/rom/efuse.h"
97 #if !CONFIG_SPI_FLASH_AUTO_SUSPEND
98 #define ESP_FLASH_HOST_CONFIG_DEFAULT() (memspi_host_config_t){ \
99 .host_id = SPI1_HOST,\
100 .speed = DEFAULT_FLASH_SPEED, \
101 .cs_num = 0, \
102 .iomux = true, \
103 .input_delay_ns = 0,\
104 .cs_setup = 1,\
105 }
106 #else
107 #define ESP_FLASH_HOST_CONFIG_DEFAULT() (memspi_host_config_t){ \
108 .host_id = SPI1_HOST,\
109 .speed = DEFAULT_FLASH_SPEED, \
110 .cs_num = 0, \
111 .iomux = true, \
112 .input_delay_ns = 0,\
113 .auto_sus_en = true,\
114 .cs_setup = 1,\
115 }
116 #endif //!CONFIG_SPI_FLASH_AUTO_SUSPEND
117 #endif
118
119
cs_initialize(esp_flash_t * chip,const esp_flash_spi_device_config_t * config,bool use_iomux,int cs_id)120 static IRAM_ATTR NOINLINE_ATTR void cs_initialize(esp_flash_t *chip, const esp_flash_spi_device_config_t *config, bool use_iomux, int cs_id)
121 {
122 //Not using spicommon_cs_initialize since we don't want to put the whole
123 //spi_periph_signal into the DRAM. Copy these data from flash before the
124 //cache disabling
125 int cs_io_num = config->cs_io_num;
126 int spics_in = spi_periph_signal[config->host_id].spics_in;
127 int spics_out = spi_periph_signal[config->host_id].spics_out[cs_id];
128 int spics_func = spi_periph_signal[config->host_id].func;
129 uint32_t iomux_reg = GPIO_PIN_MUX_REG[cs_io_num];
130
131 //To avoid the panic caused by flash data line conflicts during cs line
132 //initialization, disable the cache temporarily
133 chip->os_func->start(chip->os_func_data);
134 PIN_INPUT_ENABLE(iomux_reg);
135 if (use_iomux) {
136 gpio_hal_iomux_func_sel(iomux_reg, spics_func);
137 } else {
138 #if SOC_GPIO_PIN_COUNT <= 32
139 GPIO.enable_w1ts.val = (0x1 << cs_io_num);
140 #else
141 if (cs_io_num < 32) {
142 GPIO.enable_w1ts = (0x1 << cs_io_num);
143 } else {
144 GPIO.enable1_w1ts.data = (0x1 << (cs_io_num - 32));
145 }
146 #endif
147 GPIO.pin[cs_io_num].pad_driver = 0;
148 esp_rom_gpio_connect_out_signal(cs_io_num, spics_out, false, false);
149 if (cs_id == 0) {
150 esp_rom_gpio_connect_in_signal(cs_io_num, spics_in, false);
151 }
152 gpio_hal_iomux_func_sel(iomux_reg, PIN_FUNC_GPIO);
153 }
154 chip->os_func->end(chip->os_func_data);
155 }
156
spi_bus_add_flash_device(esp_flash_t ** out_chip,const esp_flash_spi_device_config_t * config)157 esp_err_t spi_bus_add_flash_device(esp_flash_t **out_chip, const esp_flash_spi_device_config_t *config)
158 {
159 if (out_chip == NULL) {
160 return ESP_ERR_INVALID_ARG;
161 }
162 if (!GPIO_IS_VALID_OUTPUT_GPIO(config->cs_io_num)) {
163 return ESP_ERR_INVALID_ARG;
164 }
165 esp_flash_t *chip = NULL;
166 memspi_host_inst_t *host = NULL;
167 esp_err_t ret = ESP_OK;
168
169 uint32_t caps = MALLOC_CAP_DEFAULT;
170 if (config->host_id == SPI1_HOST) caps = MALLOC_CAP_INTERNAL | MALLOC_CAP_8BIT;
171
172 chip = (esp_flash_t*)heap_caps_malloc(sizeof(esp_flash_t), caps);
173 if (!chip) {
174 ret = ESP_ERR_NO_MEM;
175 goto fail;
176 }
177
178 host = (memspi_host_inst_t*)heap_caps_malloc(sizeof(memspi_host_inst_t), caps);
179 *chip = (esp_flash_t) {
180 .read_mode = config->io_mode,
181 .host = (spi_flash_host_inst_t*)host,
182 };
183 if (!host) {
184 ret = ESP_ERR_NO_MEM;
185 goto fail;
186 }
187
188 int dev_id = -1;
189 esp_err_t err = esp_flash_init_os_functions(chip, config->host_id, &dev_id);
190 if (err == ESP_ERR_NOT_SUPPORTED) {
191 ESP_LOGE(TAG, "Init os functions failed! No free CS.");
192 } else if (err == ESP_ERR_INVALID_ARG) {
193 ESP_LOGE(TAG, "Init os functions failed! Bus lock not initialized (check CONFIG_SPI_FLASH_SHARE_SPI1_BUS).");
194 }
195 if (err != ESP_OK) {
196 ret = err;
197 goto fail;
198 }
199 // When `CONFIG_SPI_FLASH_SHARE_SPI1_BUS` is not enabled on SPI1 bus, the
200 // `esp_flash_init_os_functions` will not be able to assign a new device ID. In this case, we
201 // use the `cs_id` in the config structure.
202 if (dev_id == -1 && config->host_id == SPI1_HOST) {
203 dev_id = config->cs_id;
204 }
205 assert(dev_id < SOC_SPI_PERIPH_CS_NUM(config->host_id) && dev_id >= 0);
206
207 bool use_iomux = spicommon_bus_using_iomux(config->host_id);
208 memspi_host_config_t host_cfg = {
209 .host_id = config->host_id,
210 .cs_num = dev_id,
211 .iomux = use_iomux,
212 .input_delay_ns = config->input_delay_ns,
213 .speed = config->speed,
214 };
215 err = memspi_host_init_pointers(host, &host_cfg);
216 if (err != ESP_OK) {
217 ret = err;
218 goto fail;
219 }
220
221 // The cs_id inside `config` is deprecated, use the `dev_id` provided by the bus lock instead.
222 cs_initialize(chip, config, use_iomux, dev_id);
223 *out_chip = chip;
224 return ret;
225 fail:
226 // The memory allocated are free'd in the `spi_bus_remove_flash_device`.
227 spi_bus_remove_flash_device(chip);
228 return ret;
229 }
230
spi_bus_remove_flash_device(esp_flash_t * chip)231 esp_err_t spi_bus_remove_flash_device(esp_flash_t *chip)
232 {
233 if (chip==NULL) {
234 return ESP_ERR_INVALID_ARG;
235 }
236 esp_flash_deinit_os_functions(chip);
237 free(chip->host);
238 free(chip);
239 return ESP_OK;
240 }
241
242 /* The default (ie initial boot) no-OS ROM esp_flash_os_functions_t */
243 extern const esp_flash_os_functions_t esp_flash_noos_functions;
244
245 /* This pointer is defined in ROM and extern-ed on targets where CONFIG_SPI_FLASH_ROM_IMPL = y*/
246 #if !CONFIG_SPI_FLASH_ROM_IMPL
247 esp_flash_t *esp_flash_default_chip = NULL;
248 #endif
249
250 #ifndef CONFIG_SPI_FLASH_USE_LEGACY_IMPL
251
252 static DRAM_ATTR memspi_host_inst_t esp_flash_default_host;
253
254 static DRAM_ATTR esp_flash_t default_chip = {
255 .read_mode = DEFAULT_FLASH_MODE,
256 .host = (spi_flash_host_inst_t*)&esp_flash_default_host,
257 .os_func = &esp_flash_noos_functions,
258 };
259
260 extern esp_err_t esp_flash_suspend_cmd_init(esp_flash_t* chip);
esp_flash_init_default_chip(void)261 esp_err_t esp_flash_init_default_chip(void)
262 {
263 const esp_rom_spiflash_chip_t *legacy_chip = &g_rom_flashchip;
264 memspi_host_config_t cfg = ESP_FLASH_HOST_CONFIG_DEFAULT();
265
266 #if !CONFIG_IDF_TARGET_ESP32
267 // For esp32s2 spi IOs are configured as from IO MUX by default
268 cfg.iomux = esp_rom_efuse_get_flash_gpio_info() == 0 ? true : false;
269 #endif
270
271 //the host is already initialized, only do init for the data and load it to the host
272 esp_err_t err = memspi_host_init_pointers(&esp_flash_default_host, &cfg);
273 if (err != ESP_OK) {
274 return err;
275 }
276
277 // ROM TODO: account for non-standard default pins in efuse
278 // ROM TODO: to account for chips which are slow to power on, maybe keep probing in a loop here
279 err = esp_flash_init(&default_chip);
280 if (err != ESP_OK) {
281 return err;
282 }
283 if (default_chip.size < legacy_chip->chip_size) {
284 ESP_EARLY_LOGE(TAG, "Detected size(%dk) smaller than the size in the binary image header(%dk). Probe failed.", default_chip.size/1024, legacy_chip->chip_size/1024);
285 return ESP_ERR_FLASH_SIZE_NOT_MATCH;
286 }
287
288 if (default_chip.size > legacy_chip->chip_size) {
289 ESP_EARLY_LOGW(TAG, "Detected size(%dk) larger than the size in the binary image header(%dk). Using the size in the binary image header.", default_chip.size/1024, legacy_chip->chip_size/1024);
290 }
291 default_chip.size = legacy_chip->chip_size;
292
293 esp_flash_default_chip = &default_chip;
294 #ifdef CONFIG_SPI_FLASH_AUTO_SUSPEND
295 err = esp_flash_suspend_cmd_init(&default_chip);
296 if (err != ESP_OK) {
297 return err;
298 }
299 #endif
300 return ESP_OK;
301 }
302
esp_flash_app_init(void)303 esp_err_t esp_flash_app_init(void)
304 {
305 esp_err_t err = ESP_OK;
306 #if CONFIG_SPI_FLASH_SHARE_SPI1_BUS
307 err = esp_flash_init_main_bus_lock();
308 if (err != ESP_OK) return err;
309 #endif
310 err = esp_flash_app_enable_os_functions(&default_chip);
311 return err;
312 }
313
314 #endif //!CONFIG_SPI_FLASH_USE_LEGACY_IMPL
315