1 /* 2 * Copyright (c) 2023 HPMicro 3 * 4 * SPDX-License-Identifier: BSD-3-Clause 5 * 6 */ 7 8 /* 9 * Note: 10 * PY and PZ IOs: if any SOC pin function needs to be routed to these IOs, 11 * besides of IOC, PIOC/BIOC needs to be configured SOC_GPIO_X_xx, so that 12 * expected SoC function can be enabled on these IOs. 13 * 14 */ 15 #include "board.h" 16 #include "pinmux.h" 17 init_xtal_pins(void)18void init_xtal_pins(void) 19 { 20 /* Package QFN32 should be set PA30 and PA31 pins as analog type to enable xtal. */ 21 /* 22 * HPM_IOC->PAD[IOC_PAD_PA30].FUNC_CTL = IOC_PAD_FUNC_CTL_ANALOG_MASK; 23 * HPM_IOC->PAD[IOC_PAD_PA31].FUNC_CTL = IOC_PAD_FUNC_CTL_ANALOG_MASK; 24 */ 25 } 26 init_py_pins_as_pgpio(void)27void init_py_pins_as_pgpio(void) 28 { 29 } 30 init_uart_pins(UART_Type * ptr)31void init_uart_pins(UART_Type *ptr) 32 { 33 if (ptr == HPM_UART0) { 34 HPM_IOC->PAD[IOC_PAD_PA00].FUNC_CTL = IOC_PA00_FUNC_CTL_UART0_TXD; 35 HPM_IOC->PAD[IOC_PAD_PA01].FUNC_CTL = IOC_PA01_FUNC_CTL_UART0_RXD; 36 } else if (ptr == HPM_UART3) { 37 HPM_IOC->PAD[IOC_PAD_PB15].FUNC_CTL = IOC_PB15_FUNC_CTL_UART3_TXD; 38 HPM_IOC->PAD[IOC_PAD_PB14].FUNC_CTL = IOC_PB14_FUNC_CTL_UART3_RXD; 39 } else { 40 ; 41 } 42 } 43 init_i2c_pins(I2C_Type * ptr)44void init_i2c_pins(I2C_Type *ptr) 45 { 46 if (ptr == HPM_I2C2) { 47 HPM_IOC->PAD[IOC_PAD_PB08].FUNC_CTL = IOC_PB08_FUNC_CTL_I2C2_SCL | IOC_PAD_FUNC_CTL_LOOP_BACK_MASK; 48 HPM_IOC->PAD[IOC_PAD_PB09].FUNC_CTL = IOC_PB09_FUNC_CTL_I2C2_SDA | IOC_PAD_FUNC_CTL_LOOP_BACK_MASK; 49 HPM_IOC->PAD[IOC_PAD_PB08].PAD_CTL = IOC_PAD_PAD_CTL_OD_SET(1) | IOC_PAD_PAD_CTL_PE_SET(1) | IOC_PAD_PAD_CTL_PS_SET(1); 50 HPM_IOC->PAD[IOC_PAD_PB09].PAD_CTL = IOC_PAD_PAD_CTL_OD_SET(1) | IOC_PAD_PAD_CTL_PE_SET(1) | IOC_PAD_PAD_CTL_PS_SET(1); 51 } else { 52 ; 53 } 54 } 55 init_gpio_pins(void)56void init_gpio_pins(void) 57 { 58 /* configure pad setting: pull enable and pull down, schmitt trigger enable */ 59 /* enable schmitt trigger to eliminate jitter of pin used as button */ 60 61 /* Button */ 62 uint32_t pad_ctl = IOC_PAD_PAD_CTL_PE_SET(1) | IOC_PAD_PAD_CTL_PS_SET(0) | IOC_PAD_PAD_CTL_HYS_SET(1); 63 HPM_IOC->PAD[IOC_PAD_PA03].FUNC_CTL = IOC_PA03_FUNC_CTL_GPIO_A_03; 64 HPM_IOC->PAD[IOC_PAD_PA03].PAD_CTL = pad_ctl; 65 } 66 init_spi_pins(SPI_Type * ptr)67void init_spi_pins(SPI_Type *ptr) 68 { 69 if (ptr == HPM_SPI1) { 70 HPM_IOC->PAD[IOC_PAD_PA26].FUNC_CTL = IOC_PA26_FUNC_CTL_SPI1_CS_0; 71 HPM_IOC->PAD[IOC_PAD_PA27].FUNC_CTL = IOC_PA27_FUNC_CTL_SPI1_SCLK | IOC_PAD_FUNC_CTL_LOOP_BACK_SET(1); 72 HPM_IOC->PAD[IOC_PAD_PA28].FUNC_CTL = IOC_PA28_FUNC_CTL_SPI1_MISO; 73 HPM_IOC->PAD[IOC_PAD_PA29].FUNC_CTL = IOC_PA29_FUNC_CTL_SPI1_MOSI; 74 } 75 } 76 init_spi_pins_with_gpio_as_cs(SPI_Type * ptr)77void init_spi_pins_with_gpio_as_cs(SPI_Type *ptr) 78 { 79 if (ptr == HPM_SPI1) { 80 HPM_IOC->PAD[IOC_PAD_PA26].FUNC_CTL = IOC_PA26_FUNC_CTL_GPIO_A_26; 81 HPM_IOC->PAD[IOC_PAD_PA27].FUNC_CTL = IOC_PA27_FUNC_CTL_SPI1_SCLK | IOC_PAD_FUNC_CTL_LOOP_BACK_SET(1); 82 HPM_IOC->PAD[IOC_PAD_PA28].FUNC_CTL = IOC_PA28_FUNC_CTL_SPI1_MISO; 83 HPM_IOC->PAD[IOC_PAD_PA29].FUNC_CTL = IOC_PA29_FUNC_CTL_SPI1_MOSI; 84 } 85 } 86 87 init_gptmr_pins(GPTMR_Type * ptr)88void init_gptmr_pins(GPTMR_Type *ptr) 89 { 90 (void) ptr; 91 } 92 init_butn_pins(void)93void init_butn_pins(void) 94 { 95 /* configure pad setting: pull enable and pull up, schmitt trigger enable */ 96 /* enable schmitt trigger to eliminate jitter of pin used as button */ 97 98 /* Button */ 99 uint32_t pad_ctl = IOC_PAD_PAD_CTL_PE_SET(1) | IOC_PAD_PAD_CTL_PS_SET(1) | IOC_PAD_PAD_CTL_HYS_SET(1); 100 HPM_IOC->PAD[IOC_PAD_PA09].FUNC_CTL = IOC_PA09_FUNC_CTL_GPIO_A_09; 101 HPM_IOC->PAD[IOC_PAD_PA09].PAD_CTL = pad_ctl; 102 } 103 init_acmp_pins(void)104void init_acmp_pins(void) 105 { 106 /* configure to ACMP_COMP_1(ALT16) function */ 107 HPM_IOC->PAD[IOC_PAD_PB09].FUNC_CTL = IOC_PB09_FUNC_CTL_ACMP_COMP_1; 108 /* configure to CMP1_INN4 function */ 109 HPM_IOC->PAD[IOC_PAD_PB11].FUNC_CTL = IOC_PAD_FUNC_CTL_ANALOG_MASK; 110 } 111 init_adc_pins(void)112void init_adc_pins(void) 113 { 114 HPM_IOC->PAD[IOC_PAD_PB08].FUNC_CTL = IOC_PAD_FUNC_CTL_ANALOG_MASK; /* ADC_A: ADC0.11/ADC1.11 */ 115 HPM_IOC->PAD[IOC_PAD_PB09].FUNC_CTL = IOC_PAD_FUNC_CTL_ANALOG_MASK; /* ADC_B: ADC0.1 /ADC1.1 */ 116 HPM_IOC->PAD[IOC_PAD_PB10].FUNC_CTL = IOC_PAD_FUNC_CTL_ANALOG_MASK; /* ADC_C: ADC0.2 /ADC1.2 */ 117 HPM_IOC->PAD[IOC_PAD_PB11].FUNC_CTL = IOC_PAD_FUNC_CTL_ANALOG_MASK; /* ADC_D: ADC0.3 /ADC1.3 */ 118 HPM_IOC->PAD[IOC_PAD_PB12].FUNC_CTL = IOC_PAD_FUNC_CTL_ANALOG_MASK; /* ADC_IW: ADC0.4 /ADC1.4 */ 119 HPM_IOC->PAD[IOC_PAD_PB13].FUNC_CTL = IOC_PAD_FUNC_CTL_ANALOG_MASK; /* ADC_IU: ADC0.5 /ADC1.5 */ 120 HPM_IOC->PAD[IOC_PAD_PB14].FUNC_CTL = IOC_PAD_FUNC_CTL_ANALOG_MASK; /* ADC_IV: ADC0.6 /ADC1.6 */ 121 HPM_IOC->PAD[IOC_PAD_PB15].FUNC_CTL = IOC_PAD_FUNC_CTL_ANALOG_MASK; /* Board ID: ADC0.7 /ADC1.7 */ 122 } 123 init_adc_bldc_pins(void)124void init_adc_bldc_pins(void) 125 { 126 HPM_IOC->PAD[IOC_PAD_PB13].FUNC_CTL = IOC_PAD_FUNC_CTL_ANALOG_MASK; /* ADC_IU: ADC0.5 /ADC1.5 */ 127 HPM_IOC->PAD[IOC_PAD_PB14].FUNC_CTL = IOC_PAD_FUNC_CTL_ANALOG_MASK; /* ADC_IV: ADC0.6 /ADC1.6 */ 128 } 129 init_usb_pins(void)130void init_usb_pins(void) 131 { 132 HPM_IOC->PAD[IOC_PAD_PA24].FUNC_CTL = IOC_PAD_FUNC_CTL_ANALOG_MASK; 133 HPM_IOC->PAD[IOC_PAD_PA25].FUNC_CTL = IOC_PAD_FUNC_CTL_ANALOG_MASK; 134 135 /* USB0_ID */ 136 HPM_IOC->PAD[IOC_PAD_PY00].FUNC_CTL = IOC_PY00_FUNC_CTL_USB0_ID; 137 /* USB0_OC */ 138 HPM_IOC->PAD[IOC_PAD_PY01].FUNC_CTL = IOC_PY01_FUNC_CTL_USB0_OC; 139 /* USB0_PWR */ 140 HPM_IOC->PAD[IOC_PAD_PY02].FUNC_CTL = IOC_PY02_FUNC_CTL_USB0_PWR; 141 142 /* PY port IO needs to configure PIOC as well */ 143 HPM_PIOC->PAD[IOC_PAD_PY00].FUNC_CTL = IOC_PY00_FUNC_CTL_SOC_GPIO_Y_00; 144 HPM_PIOC->PAD[IOC_PAD_PY01].FUNC_CTL = IOC_PY01_FUNC_CTL_SOC_GPIO_Y_01; 145 HPM_PIOC->PAD[IOC_PAD_PY02].FUNC_CTL = IOC_PY02_FUNC_CTL_SOC_GPIO_Y_02; 146 } 147 init_led_pins_as_gpio(void)148void init_led_pins_as_gpio(void) 149 { 150 HPM_IOC->PAD[IOC_PAD_PA10].FUNC_CTL = IOC_PA10_FUNC_CTL_GPIO_A_10; 151 } 152 153