1 /* 2 * Copyright (c) 2022-2023 HPMicro 3 * 4 * SPDX-License-Identifier: BSD-3-Clause 5 * 6 */ 7 8 #ifndef _HPM_BOARD_H 9 #define _HPM_BOARD_H 10 #include <stdio.h> 11 #include "hpm_common.h" 12 #include "hpm_clock_drv.h" 13 #include "hpm_soc.h" 14 #include "hpm_soc_feature.h" 15 #include "pinmux.h" 16 #if !defined(CONFIG_NDEBUG_CONSOLE) || !CONFIG_NDEBUG_CONSOLE 17 #include "hpm_debug_console.h" 18 #endif 19 20 #define BOARD_NAME "hpm6300evk" 21 #define BOARD_UF2_SIGNATURE (0x0A4D5048UL) 22 23 /* dma section */ 24 #define BOARD_APP_XDMA HPM_XDMA 25 #define BOARD_APP_HDMA HPM_HDMA 26 #define BOARD_APP_XDMA_IRQ IRQn_XDMA 27 #define BOARD_APP_HDMA_IRQ IRQn_HDMA 28 #define BOARD_APP_DMAMUX HPM_DMAMUX 29 30 /* uart section */ 31 #ifndef BOARD_RUNNING_CORE 32 #define BOARD_RUNNING_CORE HPM_CORE0 33 #endif 34 #ifndef BOARD_APP_UART_BASE 35 #define BOARD_APP_UART_BASE HPM_UART0 36 #define BOARD_APP_UART_IRQ IRQn_UART0 37 #else 38 #ifndef BOARD_APP_UART_IRQ 39 #warning no IRQ specified for application uart 40 #endif 41 #endif 42 43 #define BOARD_APP_UART_BAUDRATE (115200UL) 44 #define BOARD_APP_UART_CLK_NAME clock_uart0 45 #define BOARD_APP_UART_RX_DMA_REQ HPM_DMA_SRC_UART0_RX 46 #define BOARD_APP_UART_TX_DMA_REQ HPM_DMA_SRC_UART0_TX 47 48 #if !defined(CONFIG_NDEBUG_CONSOLE) || !CONFIG_NDEBUG_CONSOLE 49 #ifndef BOARD_CONSOLE_TYPE 50 #define BOARD_CONSOLE_TYPE CONSOLE_TYPE_UART 51 #endif 52 53 #if CONSOLE_TYPE_UART == BOARD_CONSOLE_TYPE 54 #ifndef BOARD_CONSOLE_BASE 55 #if BOARD_RUNNING_CORE == HPM_CORE0 56 #define BOARD_CONSOLE_BASE HPM_UART0 57 #define BOARD_CONSOLE_CLK_NAME clock_uart0 58 #else 59 #define BOARD_CONSOLE_BASE HPM_UART13 60 #define BOARD_CONSOLE_CLK_NAME clock_uart13 61 #endif 62 #endif 63 #define BOARD_CONSOLE_BAUDRATE (115200UL) 64 #endif 65 #endif 66 67 #define BOARD_FREEMASTER_UART_BASE HPM_UART0 68 #define BOARD_FREEMASTER_UART_IRQ IRQn_UART0 69 #define BOARD_FREEMASTER_UART_CLK_NAME clock_uart0 70 71 /* uart rx idle demo section */ 72 #define BOARD_UART_IDLE HPM_UART2 73 #define BOARD_UART_IDLE_IRQ IRQn_UART2 74 #define BOARD_UART_IDLE_CLK_NAME clock_uart2 75 #define BOARD_UART_IDLE_TX_DMA_SRC HPM_DMA_SRC_UART2_TX 76 #define BOARD_UART_IDLE_DMA_SRC HPM_DMA_SRC_UART2_RX 77 78 #define BOARD_UART_IDLE_TRGM HPM_TRGM1 79 #define BOARD_UART_IDLE_TRGM_PIN IOC_PAD_PA24 80 #define BOARD_UART_IDLE_TRGM_INPUT_SRC HPM_TRGM1_INPUT_SRC_TRGM1_P4 81 #define BOARD_UART_IDLE_TRGM_OUTPUT_GPTMR_IN HPM_TRGM1_OUTPUT_SRC_GPTMR2_IN2 82 #define BOARD_UART_IDLE_TRGM_OUTPUT_GPTMR_SYNCI HPM_TRGM1_OUTPUT_SRC_GPTMR2_SYNCI 83 84 #define BOARD_UART_IDLE_GPTMR HPM_GPTMR2 85 #define BOARD_UART_IDLE_GPTMR_CLK_NAME clock_gptmr2 86 #define BOARD_UART_IDLE_GPTMR_IRQ IRQn_GPTMR2 87 #define BOARD_UART_IDLE_GPTMR_CMP_CH 0 88 #define BOARD_UART_IDLE_GPTMR_CAP_CH 2 89 90 /* uart lin sample section */ 91 #define BOARD_UART_LIN HPM_UART2 92 #define BOARD_UART_LIN_IRQ IRQn_UART2 93 #define BOARD_UART_LIN_CLK_NAME clock_uart2 94 #define BOARD_UART_LIN_TX_PORT GPIO_DI_GPIOC 95 #define BOARD_UART_LIN_TX_PIN (26U) /* PC26 should align with used pin in pinmux configuration */ 96 97 /* uart microros sample section */ 98 #define BOARD_MICROROS_UART_BASE HPM_UART2 99 #define BOARD_MICROROS_UART_IRQ IRQn_UART2 100 #define BOARD_MICROROS_UART_CLK_NAME clock_uart2 101 102 /* sdram section */ 103 #define BOARD_SDRAM_ADDRESS (0x40000000UL) 104 #define BOARD_SDRAM_SIZE (32*SIZE_1MB) 105 #define BOARD_SDRAM_CS FEMC_SDRAM_CS0 106 #define BOARD_SDRAM_PORT_SIZE FEMC_SDRAM_PORT_SIZE_16_BITS 107 #define BOARD_SDRAM_REFRESH_COUNT (8192UL) 108 #define BOARD_SDRAM_REFRESH_IN_MS (64UL) 109 #define BOARD_SDRAM_DATA_WIDTH_IN_BYTE (4UL) 110 111 112 /* nor flash section */ 113 #define BOARD_FLASH_BASE_ADDRESS (0x80000000UL) 114 #define BOARD_FLASH_SIZE (16 * SIZE_1MB) 115 116 /* i2c section */ 117 #define BOARD_APP_I2C_BASE HPM_I2C0 118 #define BOARD_APP_I2C_IRQ IRQn_I2C0 119 #define BOARD_APP_I2C_CLK_NAME clock_i2c0 120 #define BOARD_APP_I2C_DMA HPM_HDMA 121 #define BOARD_APP_I2C_DMAMUX HPM_DMAMUX 122 #define BOARD_APP_I2C_DMA_SRC HPM_DMA_SRC_I2C0 123 #define BOARD_I2C_GPIO_CTRL HPM_GPIO0 124 #define BOARD_I2C_SCL_GPIO_INDEX GPIO_DO_GPIOC 125 #define BOARD_I2C_SCL_GPIO_PIN 13 126 #define BOARD_I2C_SDA_GPIO_INDEX GPIO_DO_GPIOC 127 #define BOARD_I2C_SDA_GPIO_PIN 14 128 129 /* ACMP desction */ 130 #define BOARD_ACMP HPM_ACMP 131 #define BOARD_ACMP_CHANNEL ACMP_CHANNEL_CHN1 132 #define BOARD_ACMP_IRQ IRQn_ACMP_1 133 #define BOARD_ACMP_PLUS_INPUT ACMP_INPUT_DAC_OUT /* use internal DAC */ 134 #define BOARD_ACMP_MINUS_INPUT ACMP_INPUT_ANALOG_5 /* align with used pin */ 135 136 /* dma section */ 137 #define BOARD_APP_XDMA HPM_XDMA 138 #define BOARD_APP_HDMA HPM_HDMA 139 #define BOARD_APP_XDMA_IRQ IRQn_XDMA 140 #define BOARD_APP_HDMA_IRQ IRQn_HDMA 141 #define BOARD_APP_DMAMUX HPM_DMAMUX 142 143 /* gptmr section */ 144 #define BOARD_GPTMR HPM_GPTMR2 145 #define BOARD_GPTMR_IRQ IRQn_GPTMR2 146 #define BOARD_GPTMR_CHANNEL 0 147 #define BOARD_GPTMR_DMA_SRC HPM_DMA_SRC_GPTMR2_0 148 #define BOARD_GPTMR_CLK_NAME clock_gptmr2 149 #define BOARD_GPTMR_PWM HPM_GPTMR2 150 #define BOARD_GPTMR_PWM_DMA_SRC HPM_DMA_SRC_GPTMR2_0 151 #define BOARD_GPTMR_PWM_CHANNEL 0 152 #define BOARD_GPTMR_PWM_CLK_NAME clock_gptmr2 153 #define BOARD_GPTMR_PWM_IRQ IRQn_GPTMR2 154 #define BOARD_GPTMR_PWM_SYNC HPM_GPTMR2 155 #define BOARD_GPTMR_PWM_SYNC_CHANNEL 1 156 #define BOARD_GPTMR_PWM_SYNC_CLK_NAME clock_gptmr2 157 158 /* gpio section */ 159 #define BOARD_APP_GPIO_INDEX GPIO_DI_GPIOZ 160 #define BOARD_APP_GPIO_PIN 2 161 162 /* pinmux section */ 163 #define USING_GPIO0_FOR_GPIOZ 164 #ifndef USING_GPIO0_FOR_GPIOZ 165 #define BOARD_APP_GPIO_CTRL HPM_BGPIO 166 #define BOARD_APP_GPIO_IRQ IRQn_BGPIO 167 #else 168 #define BOARD_APP_GPIO_CTRL HPM_GPIO0 169 #define BOARD_APP_GPIO_IRQ IRQn_GPIO0_Z 170 #endif 171 172 /* gpiom section */ 173 #define BOARD_APP_GPIOM_BASE HPM_GPIOM 174 #define BOARD_APP_GPIOM_USING_CTRL HPM_FGPIO 175 #define BOARD_APP_GPIOM_USING_CTRL_NAME gpiom_core0_fast 176 177 /* spi section */ 178 #define BOARD_APP_SPI_BASE HPM_SPI3 179 #define BOARD_APP_SPI_CLK_NAME clock_spi3 180 #define BOARD_APP_SPI_IRQ IRQn_SPI3 181 #define BOARD_APP_SPI_SCLK_FREQ (20000000UL) 182 #define BOARD_APP_SPI_ADDR_LEN_IN_BYTES (1U) 183 #define BOARD_APP_SPI_DATA_LEN_IN_BITS (8U) 184 #define BOARD_APP_SPI_RX_DMA HPM_DMA_SRC_SPI3_RX 185 #define BOARD_APP_SPI_TX_DMA HPM_DMA_SRC_SPI3_TX 186 #define BOARD_SPI_CS_GPIO_CTRL HPM_GPIO0 187 #define BOARD_SPI_CS_PIN IOC_PAD_PC18 188 #define BOARD_SPI_CS_ACTIVE_LEVEL (0U) 189 190 /* Flash section */ 191 #define BOARD_APP_XPI_NOR_XPI_BASE (HPM_XPI0) 192 #define BOARD_APP_XPI_NOR_CFG_OPT_HDR (0xfcf90001U) 193 #define BOARD_APP_XPI_NOR_CFG_OPT_OPT0 (0x00000005U) 194 #define BOARD_APP_XPI_NOR_CFG_OPT_OPT1 (0x00001000U) 195 196 /* i2s section */ 197 #define BOARD_APP_I2S_BASE HPM_I2S0 198 #define BOARD_APP_I2S_DATA_LINE (2U) 199 #define BOARD_APP_I2S_CLK_NAME clock_i2s0 200 #define BOARD_APP_AUDIO_CLK_SRC clock_source_pll2_clk0 201 #define BOARD_APP_AUDIO_CLK_SRC_NAME clk_pll2clk0 202 203 /* enet section */ 204 #define BOARD_ENET_PPS HPM_ENET0 205 #define BOARD_ENET_PPS_IDX enet_pps_0 206 #define BOARD_ENET_PPS_PTP_CLOCK clock_ptp0 207 208 #define BOARD_ENET_RMII HPM_ENET0 209 #define BOARD_ENET_RMII_RST_GPIO 210 #define BOARD_ENET_RMII_RST_GPIO_INDEX 211 #define BOARD_ENET_RMII_RST_GPIO_PIN 212 #define BOARD_ENET_RMII HPM_ENET0 213 #define BOARD_ENET_RMII_INT_REF_CLK (1U) 214 #define BOARD_ENET_RMII_PTP_CLOCK (clock_ptp0) 215 #define BOARD_ENET_RMII_PPS0_PINOUT (1) 216 217 /* ADC section */ 218 #define BOARD_APP_ADC16_NAME "ADC0" 219 #define BOARD_APP_ADC16_BASE HPM_ADC0 220 #define BOARD_APP_ADC16_IRQn IRQn_ADC0 221 #define BOARD_APP_ADC16_CH_1 (13U) 222 #define BOARD_APP_ADC16_CLK_NAME (clock_adc0) 223 224 #define BOARD_APP_ADC16_HW_TRIG_SRC HPM_PWM0 225 #define BOARD_APP_ADC16_HW_TRGM HPM_TRGM0 226 #define BOARD_APP_ADC16_HW_TRGM_IN HPM_TRGM0_INPUT_SRC_PWM0_CH8REF 227 #define BOARD_APP_ADC16_HW_TRGM_OUT_SEQ TRGM_TRGOCFG_ADC0_STRGI 228 #define BOARD_APP_ADC16_HW_TRGM_OUT_PMT TRGM_TRGOCFG_ADCX_PTRGI0A 229 230 #define BOARD_APP_ADC16_PMT_TRIG_CH ADC16_CONFIG_TRG0A 231 232 /* DAC section */ 233 #define BOARD_DAC_BASE HPM_DAC 234 #define BOARD_DAC_IRQn IRQn_DAC 235 #define BOARD_APP_DAC_CLOCK_NAME clock_dac0 236 237 /* CAN section */ 238 #define BOARD_APP_CAN_BASE HPM_CAN1 239 #define BOARD_APP_CAN_IRQn IRQn_CAN1 240 241 /* 242 * timer for board delay 243 */ 244 #define BOARD_DELAY_TIMER (HPM_GPTMR3) 245 #define BOARD_DELAY_TIMER_CH 0 246 #define BOARD_DELAY_TIMER_CLK_NAME (clock_gptmr3) 247 248 #define BOARD_CALLBACK_TIMER (HPM_GPTMR3) 249 #define BOARD_CALLBACK_TIMER_CH 1 250 #define BOARD_CALLBACK_TIMER_IRQ IRQn_GPTMR3 251 #define BOARD_CALLBACK_TIMER_CLK_NAME (clock_gptmr3) 252 253 /* SDXC section */ 254 #define BOARD_APP_SDCARD_SDXC_BASE (HPM_SDXC0) 255 #define BOARD_APP_SDCARD_SUPPORT_3V3 (1) 256 #define BOARD_APP_SDCARD_SUPPORT_1V8 (0) 257 #define BOARD_APP_SDCARD_SUPPORT_4BIT (1) 258 #define BOARD_APP_SDCARD_SUPPORT_CARD_DETECTION (1) 259 #define BOARD_APP_EMMC_SDXC_BASE (HPM_SDXC0) 260 #define BOARD_APP_EMMC_SUPPORT_3V3 (1) 261 #define BOARD_APP_EMMC_SUPPORT_1V8 (0) 262 #define BOARD_APP_EMMC_SUPPORT_4BIT (1) 263 #define BOARD_APP_EMMC_HOST_USING_IRQ (0) 264 265 /* USB section */ 266 #define BOARD_USB0_ID_PORT (HPM_GPIO0) 267 #define BOARD_USB0_ID_GPIO_INDEX (GPIO_DO_GPIOC) 268 #define BOARD_USB0_ID_GPIO_PIN (23) 269 270 /*BLDC pwm*/ 271 272 /*PWM define*/ 273 #define BOARD_BLDCPWM HPM_PWM0 274 #define BOARD_BLDC_UH_PWM_OUTPIN (0U) 275 #define BOARD_BLDC_UL_PWM_OUTPIN (1U) 276 #define BOARD_BLDC_VH_PWM_OUTPIN (2U) 277 #define BOARD_BLDC_VL_PWM_OUTPIN (3U) 278 #define BOARD_BLDC_WH_PWM_OUTPIN (4U) 279 #define BOARD_BLDC_WL_PWM_OUTPIN (5U) 280 #define BOARD_BLDCPWM_TRGM HPM_TRGM0 281 #define BOARD_BLDCAPP_PWM_IRQ IRQn_PWM0 282 #define BOARD_BLDCPWM_CMP_INDEX_0 (0U) 283 #define BOARD_BLDCPWM_CMP_INDEX_1 (1U) 284 #define BOARD_BLDCPWM_CMP_INDEX_2 (2U) 285 #define BOARD_BLDCPWM_CMP_INDEX_3 (3U) 286 #define BOARD_BLDCPWM_CMP_INDEX_4 (4U) 287 #define BOARD_BLDCPWM_CMP_INDEX_5 (5U) 288 #define BOARD_BLDCPWM_CMP_INDEX_6 (6U) 289 #define BOARD_BLDCPWM_CMP_INDEX_7 (7U) 290 #define BOARD_BLDCPWM_CMP_TRIG_CMP (20U) 291 292 /*HALL define*/ 293 294 #define BOARD_BLDC_HALL_BASE HPM_HALL0 295 #define BOARD_BLDC_HALL_TRGM HPM_TRGM0 296 #define BOARD_BLDC_HALL_IRQ IRQn_HALL0 297 #define BOARD_BLDC_HALL_TRGM_HALL_U_SRC HPM_TRGM0_INPUT_SRC_TRGM0_P8 298 #define BOARD_BLDC_HALL_TRGM_HALL_V_SRC HPM_TRGM0_INPUT_SRC_TRGM0_P7 299 #define BOARD_BLDC_HALL_TRGM_HALL_W_SRC HPM_TRGM0_INPUT_SRC_TRGM0_P6 300 #define BOARD_BLDC_HALL_MOTOR_PHASE_COUNT_PER_REV (1000U) 301 302 303 304 /*QEI*/ 305 306 #define BOARD_BLDC_QEI_BASE HPM_QEI0 307 #define BOARD_BLDC_QEI_IRQ IRQn_QEI0 308 #define BOARD_BLDC_QEI_TRGM HPM_TRGM0 309 #define BOARD_BLDC_QEI_TRGM_QEI_A_SRC HPM_TRGM0_INPUT_SRC_TRGM0_P9 310 #define BOARD_BLDC_QEI_TRGM_QEI_B_SRC HPM_TRGM0_INPUT_SRC_TRGM0_P10 311 #define BOARD_BLDC_QEI_MOTOR_PHASE_COUNT_PER_REV (16U) 312 #define BOARD_BLDC_QEI_CLOCK_SOURCE clock_mot0 313 #define BOARD_BLDC_QEI_FOC_PHASE_COUNT_PER_REV (4000U) 314 315 /*Timer define*/ 316 317 #define BOARD_BLDC_TMR_1MS HPM_GPTMR2 318 #define BOARD_BLDC_TMR_CH 0 319 #define BOARD_BLDC_TMR_CMP 0 320 #define BOARD_BLDC_TMR_IRQ IRQn_GPTMR2 321 #define BOARD_BLDC_TMR_RELOAD (100000U) 322 323 /*adc*/ 324 #define BOARD_BLDC_ADC_MODULE ADCX_MODULE_ADC16 325 #define BOARD_BLDC_ADC_U_BASE HPM_ADC1 326 #define BOARD_BLDC_ADC_V_BASE HPM_ADC0 327 #define BOARD_BLDC_ADC_W_BASE HPM_ADC2 328 #define BOARD_BLDC_ADC_TRIG_FLAG adc16_event_trig_complete 329 330 #define BOARD_BLDC_ADC_CH_U (7U) 331 #define BOARD_BLDC_ADC_CH_V (12U) 332 #define BOARD_BLDC_ADC_CH_W (5U) 333 #define BOARD_BLDC_ADC_IRQn IRQn_ADC1 334 #define BOARD_BLDC_ADC_PMT_DMA_SIZE_IN_4BYTES (ADC_SOC_PMT_MAX_DMA_BUFF_LEN_IN_4BYTES) 335 #define BOARD_BLDC_ADC_TRG ADC16_CONFIG_TRG0A 336 #define BOARD_BLDC_ADC_PREEMPT_TRIG_LEN (1U) 337 #define BOARD_BLDC_PWM_TRIG_CMP_INDEX (8U) 338 #define BOARD_BLDC_TRIGMUX_IN_NUM HPM_TRGM0_INPUT_SRC_PWM0_CH8REF 339 #define BOARD_BLDC_TRG_NUM TRGM_TRGOCFG_ADCX_PTRGI0A 340 341 /* APP PWM */ 342 #define BOARD_APP_PWM HPM_PWM0 343 #define BOARD_APP_PWM_CLOCK_NAME clock_mot0 344 #define BOARD_APP_PWM_OUT1 0 345 #define BOARD_APP_PWM_OUT2 1 346 #define BOARD_APP_TRGM HPM_TRGM0 347 #define BOARD_APP_PWM_IRQ IRQn_PWM0 348 #define BOARD_APP_TRGM_PWM_OUTPUT TRGM_TRGOCFG_PWM_SYNCI 349 350 #define BOARD_CPU_FREQ (480000000UL) 351 352 /* LED */ 353 #define BOARD_LED_GPIO_CTRL HPM_GPIO0 354 #define BOARD_LED_GPIO_INDEX GPIO_DI_GPIOA 355 #define BOARD_LED_GPIO_PIN 7 356 #define BOARD_LED_OFF_LEVEL 1 357 #define BOARD_LED_ON_LEVEL 0 358 359 #ifndef BOARD_SHOW_CLOCK 360 #define BOARD_SHOW_CLOCK 1 361 #endif 362 #ifndef BOARD_SHOW_BANNER 363 #define BOARD_SHOW_BANNER 1 364 #endif 365 366 /* FreeRTOS Definitions */ 367 #define BOARD_FREERTOS_TIMER HPM_GPTMR1 368 #define BOARD_FREERTOS_TIMER_CHANNEL 1 369 #define BOARD_FREERTOS_TIMER_IRQ IRQn_GPTMR1 370 #define BOARD_FREERTOS_TIMER_CLK_NAME clock_gptmr1 371 372 #if defined(__cplusplus) 373 extern "C" { 374 #endif /* __cplusplus */ 375 376 typedef void (*board_timer_cb)(void); 377 378 void board_init(void); 379 void board_init_console(void); 380 381 void board_init_uart(UART_Type *ptr); 382 void board_init_i2c(I2C_Type *ptr); 383 384 void board_init_can(CAN_Type *ptr); 385 386 uint32_t board_init_femc_clock(void); 387 388 void board_init_sdram_pins(void); 389 void board_init_gpio_pins(void); 390 void board_init_spi_pins(SPI_Type *ptr); 391 void board_init_spi_pins_with_gpio_as_cs(SPI_Type *ptr); 392 void board_write_spi_cs(uint32_t pin, uint8_t state); 393 void board_init_led_pins(void); 394 395 void board_led_write(uint8_t state); 396 void board_led_toggle(void); 397 398 /* Initialize SoC overall clocks */ 399 void board_init_clock(void); 400 401 uint32_t board_init_spi_clock(SPI_Type *ptr); 402 403 uint32_t board_init_adc16_clock(ADC16_Type *ptr, bool clk_src_ahb); 404 405 uint32_t board_init_dac_clock(DAC_Type *ptr, bool clk_src_ahb); 406 407 void board_init_adc16_pins(void); 408 409 void board_init_dac_pins(DAC_Type *ptr); 410 411 uint32_t board_init_can_clock(CAN_Type *ptr); 412 413 hpm_stat_t board_set_audio_pll_clock(uint32_t freq); 414 uint32_t board_init_i2s_clock(I2S_Type *ptr); 415 uint32_t board_init_pdm_clock(void); 416 uint32_t board_init_dao_clock(void); 417 418 uint32_t board_sd_configure_clock(SDXC_Type *ptr, uint32_t freq, bool need_inverse); 419 void board_sd_switch_pins_to_1v8(SDXC_Type *ptr); 420 bool board_sd_detect_card(SDXC_Type *ptr); 421 422 void board_init_usb_pins(void); 423 void board_usb_vbus_ctrl(uint8_t usb_index, uint8_t level); 424 uint8_t board_get_usb_id_status(void); 425 426 void board_init_enet_pps_pins(ENET_Type *ptr); 427 uint8_t board_get_enet_dma_pbl(ENET_Type *ptr); 428 hpm_stat_t board_reset_enet_phy(ENET_Type *ptr); 429 hpm_stat_t board_init_enet_pins(ENET_Type *ptr); 430 hpm_stat_t board_init_enet_rmii_reference_clock(ENET_Type *ptr, bool internal); 431 hpm_stat_t board_init_enet_ptp_clock(ENET_Type *ptr); 432 hpm_stat_t board_enable_enet_irq(ENET_Type *ptr); 433 hpm_stat_t board_disable_enet_irq(ENET_Type *ptr); 434 /* 435 * @brief Initialize PMP and PMA for but not limited to the following purposes: 436 * -- non-cacheable memory initialization 437 */ 438 void board_init_pmp(void); 439 440 void board_delay_us(uint32_t us); 441 void board_delay_ms(uint32_t ms); 442 443 void board_timer_create(uint32_t ms, board_timer_cb cb); 444 void board_ungate_mchtmr_at_lp_mode(void); 445 446 /* Initialize the UART clock */ 447 uint32_t board_init_uart_clock(UART_Type *ptr); 448 449 /* 450 * Get GPIO pin level of onboard LED 451 */ 452 uint8_t board_get_led_gpio_off_level(void); 453 454 #if defined(__cplusplus) 455 } 456 #endif /* __cplusplus */ 457 #endif /* _HPM_BOARD_H */ 458