1 /* 2 * Copyright (c) 2021-2023 HPMicro 3 * 4 * SPDX-License-Identifier: BSD-3-Clause 5 * 6 */ 7 8 #ifndef _HPM_BOARD_H 9 #define _HPM_BOARD_H 10 #include <stdio.h> 11 #include "hpm_common.h" 12 #include "hpm_soc.h" 13 #include "hpm_soc_feature.h" 14 #include "hpm_clock_drv.h" 15 #include "pinmux.h" 16 #include "hpm_lcdc_drv.h" 17 #ifdef CONFIG_HPM_PANEL 18 #include "hpm_panel.h" 19 #endif 20 #if !defined(CONFIG_NDEBUG_CONSOLE) || !CONFIG_NDEBUG_CONSOLE 21 #include "hpm_debug_console.h" 22 #endif 23 24 #define BOARD_NAME "hpm6750evkmini" 25 #define BOARD_UF2_SIGNATURE (0x0A4D5048UL) 26 27 #define SEC_CORE_IMG_START ILM_LOCAL_BASE 28 29 /* uart section */ 30 #ifndef BOARD_RUNNING_CORE 31 #define BOARD_RUNNING_CORE HPM_CORE0 32 #endif 33 #ifndef BOARD_APP_UART_BASE 34 #define BOARD_APP_UART_BASE HPM_UART0 35 #define BOARD_APP_UART_IRQ IRQn_UART0 36 #else 37 #ifndef BOARD_APP_UART_IRQ 38 #warning no IRQ specified for application uart 39 #endif 40 #endif 41 42 /* uart rx idle demo section */ 43 #define BOARD_UART_IDLE HPM_UART13 44 #define BOARD_UART_IDLE_IRQ IRQn_UART13 45 #define BOARD_UART_IDLE_CLK_NAME clock_uart13 46 #define BOARD_UART_IDLE_TX_DMA_SRC HPM_DMA_SRC_UART13_TX 47 #define BOARD_UART_IDLE_DMA_SRC HPM_DMA_SRC_UART13_RX 48 49 #define BOARD_UART_IDLE_TRGM HPM_TRGM2 50 #define BOARD_UART_IDLE_TRGM_PIN IOC_PAD_PD19 51 #define BOARD_UART_IDLE_TRGM_INPUT_SRC HPM_TRGM2_INPUT_SRC_TRGM2_P9 52 #define BOARD_UART_IDLE_TRGM_OUTPUT_GPTMR_IN HPM_TRGM2_OUTPUT_SRC_GPTMR4_IN2 53 #define BOARD_UART_IDLE_TRGM_OUTPUT_GPTMR_SYNCI HPM_TRGM2_OUTPUT_SRC_GPTMR4_SYNCI 54 55 #define BOARD_UART_IDLE_GPTMR HPM_GPTMR4 56 #define BOARD_UART_IDLE_GPTMR_CLK_NAME clock_gptmr4 57 #define BOARD_UART_IDLE_GPTMR_IRQ IRQn_GPTMR4 58 #define BOARD_UART_IDLE_GPTMR_CMP_CH 0 59 #define BOARD_UART_IDLE_GPTMR_CAP_CH 2 60 61 /* uart microros sample section */ 62 #define BOARD_MICROROS_UART_BASE HPM_UART13 63 #define BOARD_MICROROS_UART_IRQ IRQn_UART13 64 #define BOARD_MICROROS_UART_CLK_NAME clock_uart13 65 66 /* uart lin sample section */ 67 #define BOARD_UART_LIN HPM_UART13 68 #define BOARD_UART_LIN_IRQ IRQn_UART13 69 #define BOARD_UART_LIN_CLK_NAME clock_uart13 70 #define BOARD_UART_LIN_TX_PORT GPIO_DI_GPIOZ 71 #define BOARD_UART_LIN_TX_PIN (9U) /* PC03 should align with used pin in pinmux configuration */ 72 73 #define BOARD_APP_UART_BAUDRATE (115200UL) 74 #define BOARD_APP_UART_CLK_NAME clock_uart0 75 #define BOARD_APP_UART_RX_DMA_REQ HPM_DMA_SRC_UART0_RX 76 #define BOARD_APP_UART_TX_DMA_REQ HPM_DMA_SRC_UART0_TX 77 78 #if !defined(CONFIG_NDEBUG_CONSOLE) || !CONFIG_NDEBUG_CONSOLE 79 #ifndef BOARD_CONSOLE_TYPE 80 #define BOARD_CONSOLE_TYPE CONSOLE_TYPE_UART 81 #endif 82 83 #if BOARD_CONSOLE_TYPE == CONSOLE_TYPE_UART 84 #ifndef BOARD_CONSOLE_BASE 85 #if BOARD_RUNNING_CORE == HPM_CORE0 86 #define BOARD_CONSOLE_BASE HPM_UART0 87 #define BOARD_CONSOLE_CLK_NAME clock_uart0 88 #else 89 #define BOARD_CONSOLE_BASE HPM_UART13 90 #define BOARD_CONSOLE_CLK_NAME clock_uart13 91 #endif 92 #endif 93 #define BOARD_CONSOLE_BAUDRATE (115200UL) 94 #endif 95 #endif 96 97 #define BOARD_FREEMASTER_UART_BASE HPM_UART0 98 #define BOARD_FREEMASTER_UART_IRQ IRQn_UART0 99 #define BOARD_FREEMASTER_UART_CLK_NAME clock_uart0 100 101 /* sdram section */ 102 #define BOARD_SDRAM_ADDRESS (0x40000000UL) 103 #define BOARD_SDRAM_SIZE (16*SIZE_1MB) 104 #define BOARD_SDRAM_CS FEMC_SDRAM_CS0 105 #define BOARD_SDRAM_PORT_SIZE FEMC_SDRAM_PORT_SIZE_16_BITS 106 #define BOARD_SDRAM_REFRESH_COUNT (4096UL) 107 #define BOARD_SDRAM_REFRESH_IN_MS (64UL) 108 #define BOARD_SDRAM_DATA_WIDTH_IN_BYTE (2UL) 109 110 /* lcd section */ 111 #define BOARD_LCD_BASE HPM_LCDC 112 #define BOARD_LCD_IRQ IRQn_LCDC_D0 113 #define BOARD_LCD_POWER_GPIO_BASE HPM_GPIO0 114 #define BOARD_LCD_POWER_GPIO_INDEX GPIO_DO_GPIOB 115 #define BOARD_LCD_POWER_GPIO_PIN 12 116 #define BOARD_LCD_BACKLIGHT_GPIO_BASE HPM_GPIO0 117 #define BOARD_LCD_BACKLIGHT_GPIO_INDEX GPIO_DO_GPIOB 118 #define BOARD_LCD_BACKLIGHT_GPIO_PIN 23 119 120 /* i2c section */ 121 #define BOARD_APP_I2C_BASE HPM_I2C0 122 #define BOARD_APP_I2C_IRQ IRQn_I2C0 123 #define BOARD_APP_I2C_IRQ IRQn_I2C0 124 #define BOARD_APP_I2C_CLK_NAME clock_i2c0 125 #define BOARD_APP_I2C_DMA HPM_HDMA 126 #define BOARD_APP_I2C_DMAMUX HPM_DMAMUX 127 #define BOARD_APP_I2C_DMA_SRC HPM_DMA_SRC_I2C0 128 129 #define BOARD_CAM_I2C_BASE HPM_I2C0 130 #define BOARD_CAM_I2C_CLK_NAME clock_i2c0 131 132 #define BOARD_CAP_I2C_BASE (HPM_I2C0) 133 #define BOARD_CAP_I2C_CLK_NAME clock_i2c0 134 #define BOARD_CAP_RST_GPIO (HPM_GPIO0) 135 #define BOARD_CAP_RST_GPIO_INDEX (GPIO_DI_GPIOB) 136 #define BOARD_CAP_RST_GPIO_PIN (9) 137 #define BOARD_CAP_RST_GPIO_IRQ (IRQn_GPIO0_B) 138 #define BOARD_CAP_INTR_GPIO (HPM_GPIO0) 139 #define BOARD_CAP_INTR_GPIO_INDEX (GPIO_DI_GPIOB) 140 #define BOARD_CAP_INTR_GPIO_PIN (8) 141 #define BOARD_CAP_INTR_GPIO_IRQ (IRQn_GPIO0_B) 142 #define BOARD_CAP_I2C_SDA_GPIO_INDEX (GPIO_DI_GPIOB) 143 #define BOARD_CAP_I2C_SDA_GPIO_PIN (10) 144 #define BOARD_CAP_I2C_CLK_GPIO_INDEX (GPIO_DI_GPIOB) 145 #define BOARD_CAP_I2C_CLK_GPIO_PIN (11) 146 147 /* ACMP desction */ 148 #define BOARD_ACMP HPM_ACMP 149 #define BOARD_ACMP_CHANNEL ACMP_CHANNEL_CHN1 150 #define BOARD_ACMP_IRQ IRQn_ACMP_1 151 #define BOARD_ACMP_PLUS_INPUT ACMP_INPUT_DAC_OUT /* use internal DAC */ 152 #define BOARD_ACMP_MINUS_INPUT ACMP_INPUT_ANALOG_6 /* align with used pin */ 153 154 /* dma section */ 155 #define BOARD_APP_XDMA HPM_XDMA 156 #define BOARD_APP_HDMA HPM_HDMA 157 #define BOARD_APP_XDMA_IRQ IRQn_XDMA 158 #define BOARD_APP_HDMA_IRQ IRQn_HDMA 159 #define BOARD_APP_DMAMUX HPM_DMAMUX 160 161 /* gptmr section */ 162 #define BOARD_GPTMR HPM_GPTMR2 163 #define BOARD_GPTMR_IRQ IRQn_GPTMR2 164 #define BOARD_GPTMR_CHANNEL 0 165 #define BOARD_GPTMR_DMA_SRC HPM_DMA_SRC_GPTMR2_0 166 #define BOARD_GPTMR_CLK_NAME clock_gptmr2 167 #define BOARD_GPTMR_PWM HPM_GPTMR2 168 #define BOARD_GPTMR_PWM_DMA_SRC HPM_DMA_SRC_GPTMR2_0 169 #define BOARD_GPTMR_PWM_CHANNEL 0 170 #define BOARD_GPTMR_PWM_CLK_NAME clock_gptmr2 171 #define BOARD_GPTMR_PWM_IRQ IRQn_GPTMR2 172 #define BOARD_GPTMR_PWM_SYNC HPM_GPTMR2 173 #define BOARD_GPTMR_PWM_SYNC_CHANNEL 1 174 #define BOARD_GPTMR_PWM_SYNC_CLK_NAME clock_gptmr2 175 176 /* gpio section */ 177 #define BOARD_R_GPIO_CTRL HPM_GPIO0 178 #define BOARD_R_GPIO_INDEX GPIO_DI_GPIOB 179 #define BOARD_R_GPIO_PIN 19 180 #define BOARD_G_GPIO_CTRL HPM_GPIO0 181 #define BOARD_G_GPIO_INDEX GPIO_DI_GPIOB 182 #define BOARD_G_GPIO_PIN 18 183 #define BOARD_B_GPIO_CTRL HPM_GPIO0 184 #define BOARD_B_GPIO_INDEX GPIO_DI_GPIOB 185 #define BOARD_B_GPIO_PIN 20 186 187 #define BOARD_LED_GPIO_CTRL BOARD_G_GPIO_CTRL 188 #define BOARD_LED_GPIO_INDEX BOARD_G_GPIO_INDEX 189 #define BOARD_LED_GPIO_PIN BOARD_G_GPIO_PIN 190 191 /* 192 *led Internal pull-up and pull-down resistance direction 193 *The configurations of Rev-A / B boards are different 194 */ 195 #define BOARD_LED_OFF_LEVEL 1 196 #define BOARD_LED_ON_LEVEL 0 197 198 #define BOARD_APP_GPIO_INDEX GPIO_DI_GPIOZ 199 #define BOARD_APP_GPIO_PIN 2 200 201 /* pinmux section */ 202 #define USING_GPIO0_FOR_GPIOZ 203 #ifndef USING_GPIO0_FOR_GPIOZ 204 #define BOARD_APP_GPIO_CTRL HPM_BGPIO 205 #define BOARD_APP_GPIO_IRQ IRQn_BGPIO 206 #else 207 #define BOARD_APP_GPIO_CTRL HPM_GPIO0 208 #define BOARD_APP_GPIO_IRQ IRQn_GPIO0_Z 209 #endif 210 211 /* gpiom section */ 212 #define BOARD_APP_GPIOM_BASE HPM_GPIOM 213 #define BOARD_APP_GPIOM_USING_CTRL HPM_FGPIO 214 #define BOARD_APP_GPIOM_USING_CTRL_NAME gpiom_core0_fast 215 216 /* spi section */ 217 #define BOARD_APP_SPI_BASE HPM_SPI2 218 #define BOARD_APP_SPI_CLK_NAME clock_spi2 219 #define BOARD_APP_SPI_IRQ IRQn_SPI2 220 #define BOARD_APP_SPI_SCLK_FREQ (20000000UL) 221 #define BOARD_APP_SPI_ADDR_LEN_IN_BYTES (1U) 222 #define BOARD_APP_SPI_DATA_LEN_IN_BITS (8U) 223 #define BOARD_APP_SPI_RX_DMA HPM_DMA_SRC_SPI2_RX 224 #define BOARD_APP_SPI_TX_DMA HPM_DMA_SRC_SPI2_TX 225 #define BOARD_SPI_CS_GPIO_CTRL HPM_GPIO0 226 #define BOARD_SPI_CS_PIN IOC_PAD_PB24 227 #define BOARD_SPI_CS_ACTIVE_LEVEL (0U) 228 229 /* Flash section */ 230 #define BOARD_APP_XPI_NOR_XPI_BASE (HPM_XPI0) 231 #define BOARD_APP_XPI_NOR_CFG_OPT_HDR (0xfcf90001U) 232 #define BOARD_APP_XPI_NOR_CFG_OPT_OPT0 (0x00000007U) 233 #define BOARD_APP_XPI_NOR_CFG_OPT_OPT1 (0x00000000U) 234 235 #define BOARD_FLASH_BASE_ADDRESS (0x80000000UL) 236 #define BOARD_FLASH_SIZE (8 << 20) 237 238 /* lcd section */ 239 240 #ifndef BOARD_LCD_WIDTH 241 #define BOARD_LCD_WIDTH PANEL_SIZE_WIDTH 242 #endif 243 #ifndef BOARD_LCD_HEIGHT 244 #define BOARD_LCD_HEIGHT PANEL_SIZE_HEIGHT 245 #endif 246 247 /* pdma section */ 248 #define BOARD_PDMA_BASE HPM_PDMA 249 250 /* i2s section */ 251 #define BOARD_APP_I2S_CLK_NAME clock_i2s1 252 #define BOARD_APP_AUDIO_CLK_SRC clock_source_pll3_clk0 253 #define BOARD_APP_AUDIO_CLK_SRC_NAME clk_pll3clk0 254 #define BOARD_PDM_SINGLE_CHANNEL_MASK (1U) 255 #define BOARD_PDM_DUAL_CHANNEL_MASK (0x11U) 256 257 /* enet section */ 258 #define BOARD_ENET_PPS HPM_ENET0 259 #define BOARD_ENET_PPS_IDX enet_pps_0 260 #define BOARD_ENET_PPS_PTP_CLOCK clock_ptp0 261 262 #define BOARD_ENET_RMII_RST_GPIO HPM_GPIO0 263 #define BOARD_ENET_RMII_RST_GPIO_INDEX GPIO_DO_GPIOD 264 #define BOARD_ENET_RMII_RST_GPIO_PIN (15U) 265 #define BOARD_ENET_RMII HPM_ENET1 266 #define BOARD_ENET_RMII_INT_REF_CLK (0U) 267 #define BOARD_ENET_RMII_PTP_CLOCK clock_ptp1 268 269 /* ADC section */ 270 #define BOARD_APP_ADC12_NAME "ADC0" 271 #define BOARD_APP_ADC12_BASE HPM_ADC0 272 #define BOARD_APP_ADC12_IRQn IRQn_ADC0 273 #define BOARD_APP_ADC12_CH_1 (7U) 274 #define BOARD_APP_ADC12_CLK_NAME (clock_adc0) 275 276 #define BOARD_APP_ADC16_NAME "ADC3" 277 #define BOARD_APP_ADC16_IRQn IRQn_ADC3 278 #define BOARD_APP_ADC16_BASE HPM_ADC3 279 #define BOARD_APP_ADC16_CH_1 (2U) 280 #define BOARD_APP_ADC16_CLK_NAME (clock_adc3) 281 282 #define BOARD_APP_ADC12_HW_TRIG_SRC HPM_PWM0 283 #define BOARD_APP_ADC12_HW_TRGM HPM_TRGM0 284 #define BOARD_APP_ADC12_HW_TRGM_IN HPM_TRGM0_INPUT_SRC_PWM0_CH8REF 285 #define BOARD_APP_ADC12_HW_TRGM_OUT_SEQ TRGM_TRGOCFG_ADC0_STRGI 286 #define BOARD_APP_ADC12_HW_TRGM_OUT_PMT TRGM_TRGOCFG_ADCX_PTRGI0A 287 288 #define BOARD_APP_ADC16_HW_TRIG_SRC HPM_PWM0 289 #define BOARD_APP_ADC16_HW_TRGM HPM_TRGM0 290 #define BOARD_APP_ADC16_HW_TRGM_IN HPM_TRGM0_INPUT_SRC_PWM0_CH8REF 291 #define BOARD_APP_ADC16_HW_TRGM_OUT_SEQ TRGM_TRGOCFG_ADC3_STRGI 292 #define BOARD_APP_ADC16_HW_TRGM_OUT_PMT TRGM_TRGOCFG_ADCX_PTRGI0A 293 294 #define BOARD_APP_ADC12_PMT_TRIG_CH ADC12_CONFIG_TRG0A 295 #define BOARD_APP_ADC16_PMT_TRIG_CH ADC16_CONFIG_TRG0A 296 297 /* CAN section */ 298 #define BOARD_APP_CAN_BASE HPM_CAN1 299 #define BOARD_APP_CAN_IRQn IRQn_CAN1 300 301 /* 302 * timer for board delay 303 */ 304 #define BOARD_DELAY_TIMER (HPM_GPTMR7) 305 #define BOARD_DELAY_TIMER_CH 0 306 #define BOARD_DELAY_TIMER_CLK_NAME (clock_gptmr7) 307 308 #define BOARD_CALLBACK_TIMER (HPM_GPTMR7) 309 #define BOARD_CALLBACK_TIMER_CH 1 310 #define BOARD_CALLBACK_TIMER_IRQ IRQn_GPTMR7 311 #define BOARD_CALLBACK_TIMER_CLK_NAME (clock_gptmr7) 312 313 /* timer for 1ms*/ 314 #define BOARD_TMR_1MS HPM_GPTMR2 315 #define BOARD_TMR_1MS_CH 0 316 #define BOARD_TMR_1MS_CMP 0 317 #define BOARD_TMR_1MS_IRQ IRQn_GPTMR2 318 #define BOARD_TMR_1MS_RELOAD (100000U) 319 320 /* SDXC section */ 321 #define BOARD_APP_SDCARD_SDXC_BASE (HPM_SDXC1) 322 #define BOARD_APP_SDCARD_SUPPORT_3V3 (1) 323 #define BOARD_APP_SDCARD_SUPPORT_1V8 (1) 324 #define BOARD_APP_SDCARD_SUPPORT_4BIT (1) 325 #define BOARD_APP_SDCARD_SUPPORT_CARD_DETECTION (1) 326 #define BOARD_APP_SDCARD_SUPPORT_POWER_SWITCH (0) 327 #define BOARD_APP_SDCARD_SUPPORT_VOLTAGE_SWITCH (1) 328 #define BOARD_APP_SDCARD_SUPPORT_CARD_DETECTION (1) 329 #define BOARD_APP_SDCARD_CARD_DETECTION_USING_GPIO (0) 330 #if defined(BOARD_APP_SDCARD_CARD_DETECTION_USING_GPIO) && (BOARD_APP_SDCARD_CARD_DETECTION_USING_GPIO == 1) 331 #define BOARD_APP_SDCARD_CARD_DETECTION_GPIO NULL 332 #define BOARD_APP_SDCARD_CARD_DETECTION_GPIO_INDEX 0 333 #define BOARD_APP_SDCARD_CARD_DETECTION_PIN_INDEX 0 334 #endif 335 336 #define BOARD_APP_EMMC_SDXC_BASE (HPM_SDXC1) 337 #define BOARD_APP_EMMC_SUPPORT_3V3 (1) 338 #define BOARD_APP_EMMC_SUPPORT_1V8 (0) 339 #define BOARD_APP_EMMC_SUPPORT_4BIT (1) 340 #define BOARD_APP_EMMC_SUPPORT_8BIT (0) 341 #define BOARD_APP_EMMC_SUPPORT_VOLTAGE_SWITCH (0) 342 /* For eMMC device, it is recommended to use GPIO to switch voltage directly */ 343 #define BOARD_APP_EMMC_VOLTAGE_SWITCH_USING_GPIO (1) 344 #if defined(BOARD_APP_EMMC_VOLTAGE_SWITCH_USING_GPIO) && (BOARD_APP_EMMC_VOLTAGE_SWITCH_USING_GPIO == 1) 345 #define BOARD_APP_EMMC_VSEL_PIN IOC_PAD_PD29 346 #endif 347 348 /* USB section */ 349 #define BOARD_USB0_ID_PORT (HPM_GPIO0) 350 #define BOARD_USB0_ID_GPIO_INDEX (GPIO_DO_GPIOF) 351 #define BOARD_USB0_ID_GPIO_PIN (10) 352 353 #define BOARD_USB0_OC_PORT (HPM_GPIO0) 354 #define BOARD_USB0_OC_GPIO_INDEX (GPIO_DI_GPIOF) 355 #define BOARD_USB0_OC_GPIO_PIN (8) 356 357 /* APP PWM */ 358 #define BOARD_APP_PWM HPM_PWM0 359 #define BOARD_APP_PWM_CLOCK_NAME clock_mot0 360 #define BOARD_APP_PWM_OUT1 4 361 #define BOARD_APP_PWM_OUT2 5 362 #define BOARD_APP_TRGM HPM_TRGM0 363 #define BOARD_APP_PWM_IRQ IRQn_PWM0 364 #define BOARD_APP_TRGM_PWM_OUTPUT TRGM_TRGOCFG_PWM_SYNCI 365 366 /* RGB LED Section */ 367 #define BOARD_RED_PWM_IRQ IRQn_PWM1 368 #define BOARD_RED_PWM HPM_PWM1 369 #define BOARD_RED_PWM_OUT 0 370 #define BOARD_RED_PWM_CMP 0 371 #define BOARD_RED_PWM_CMP_INITIAL_ZERO true 372 #define BOARD_RED_PWM_CLOCK_NAME clock_mot1 373 374 #define BOARD_GREEN_PWM_IRQ IRQn_PWM1 375 #define BOARD_GREEN_PWM HPM_PWM1 376 #define BOARD_GREEN_PWM_OUT 1 377 #define BOARD_GREEN_PWM_CMP 1 378 #define BOARD_GREEN_PWM_CMP_INITIAL_ZERO true 379 #define BOARD_GREEN_PWM_CLOCK_NAME clock_mot1 380 381 #define BOARD_BLUE_PWM_IRQ IRQn_PWM0 382 #define BOARD_BLUE_PWM HPM_PWM0 383 #define BOARD_BLUE_PWM_OUT 7 384 #define BOARD_BLUE_PWM_CMP 7 385 #define BOARD_BLUE_PWM_CMP_INITIAL_ZERO true 386 #define BOARD_BLUE_PWM_CLOCK_NAME clock_mot0 387 388 #define BOARD_RGB_RED 0 389 #define BOARD_RGB_GREEN (BOARD_RGB_RED + 1) 390 #define BOARD_RGB_BLUE (BOARD_RGB_RED + 2) 391 392 /* Beep Section */ 393 #define BOARD_BEEP_PWM HPM_PWM3 394 #define BOARD_BEEP_PWM_OUT 4 395 #define BOARD_BEEP_PWM_CLOCK_NAME clock_mot3 396 397 /*BLDC pwm*/ 398 399 /*PWM define*/ 400 #define BOARD_BLDCPWM HPM_PWM1 401 #define BOARD_BLDC_UH_PWM_OUTPIN (2U) 402 #define BOARD_BLDC_UL_PWM_OUTPIN (3U) 403 #define BOARD_BLDC_VH_PWM_OUTPIN (4U) 404 #define BOARD_BLDC_VL_PWM_OUTPIN (5U) 405 #define BOARD_BLDC_WH_PWM_OUTPIN (6U) 406 #define BOARD_BLDC_WL_PWM_OUTPIN (7U) 407 #define BOARD_BLDCPWM_TRGM HPM_TRGM1 408 #define BOARD_BLDCAPP_PWM_IRQ IRQn_PWM1 409 #define BOARD_BLDCPWM_CMP_INDEX_0 (0U) 410 #define BOARD_BLDCPWM_CMP_INDEX_1 (1U) 411 #define BOARD_BLDCPWM_CMP_INDEX_2 (2U) 412 #define BOARD_BLDCPWM_CMP_INDEX_3 (3U) 413 #define BOARD_BLDCPWM_CMP_INDEX_4 (4U) 414 #define BOARD_BLDCPWM_CMP_INDEX_5 (5U) 415 #define BOARD_BLDCPWM_CMP_INDEX_6 (6U) 416 #define BOARD_BLDCPWM_CMP_INDEX_7 (7U) 417 #define BOARD_BLDCPWM_CMP_TRIG_CMP (20U) 418 419 /*HALL define*/ 420 421 #define BOARD_BLDC_HALL_BASE HPM_HALL2 422 #define BOARD_BLDC_HALL_TRGM HPM_TRGM2 423 #define BOARD_BLDC_HALL_IRQ IRQn_HALL2 424 #define BOARD_BLDC_HALL_TRGM_HALL_U_SRC HPM_TRGM2_INPUT_SRC_TRGM2_P9 425 #define BOARD_BLDC_HALL_TRGM_HALL_V_SRC HPM_TRGM2_INPUT_SRC_TRGM2_P10 426 #define BOARD_BLDC_HALL_TRGM_HALL_W_SRC HPM_TRGM2_INPUT_SRC_TRGM2_P11 427 #define BOARD_BLDC_HALL_MOTOR_PHASE_COUNT_PER_REV (1000U) 428 429 430 431 /*QEI*/ 432 433 #define BOARD_BLDC_QEI_BASE HPM_QEI2 434 #define BOARD_BLDC_QEI_IRQ IRQn_QEI2 435 #define BOARD_BLDC_QEI_TRGM HPM_TRGM2 436 #define BOARD_BLDC_QEI_TRGM_QEI_A_SRC HPM_TRGM2_INPUT_SRC_TRGM2_P6 437 #define BOARD_BLDC_QEI_TRGM_QEI_B_SRC HPM_TRGM2_INPUT_SRC_TRGM2_P7 438 #define BOARD_BLDC_QEI_MOTOR_PHASE_COUNT_PER_REV (16U) 439 #define BOARD_BLDC_QEI_CLOCK_SOURCE clock_mot2 440 #define BOARD_BLDC_QEI_FOC_PHASE_COUNT_PER_REV (4000U) 441 442 /*Timer define*/ 443 444 #define BOARD_TMR_1MS HPM_GPTMR2 445 #define BOARD_TMR_1MS_CH 0 446 #define BOARD_TMR_1MS_CMP 0 447 #define BOARD_TMR_1MS_IRQ IRQn_GPTMR2 448 #define BOARD_TMR_1MS_RELOAD (100000U) 449 450 #define BOARD_BLDC_TMR_1MS BOARD_TMR_1MS 451 #define BOARD_BLDC_TMR_CH BOARD_TMR_1MS_CH 452 #define BOARD_BLDC_TMR_CMP BOARD_TMR_1MS_CMP 453 #define BOARD_BLDC_TMR_IRQ BOARD_TMR_1MS_IRQ 454 #define BOARD_BLDC_TMR_RELOAD BOARD_TMR_1MS_RELOAD 455 456 /*adc*/ 457 #define BOARD_BLDC_ADC_MODULE ADCX_MODULE_ADC12 458 #define BOARD_BLDC_ADC_U_BASE HPM_ADC0 459 #define BOARD_BLDC_ADC_V_BASE HPM_ADC1 460 #define BOARD_BLDC_ADC_W_BASE HPM_ADC2 461 #define BOARD_BLDC_ADC_TRIG_FLAG adc12_event_trig_complete 462 463 #define BOARD_BLDC_ADC_CH_U (1U) 464 #define BOARD_BLDC_ADC_CH_V (2U) 465 #define BOARD_BLDC_ADC_CH_W (3U) 466 #define BOARD_BLDC_ADC_IRQn IRQn_ADC0 467 #define BOARD_BLDC_ADC_PMT_DMA_SIZE_IN_4BYTES (ADC_SOC_PMT_MAX_DMA_BUFF_LEN_IN_4BYTES) 468 #define BOARD_BLDC_ADC_TRG ADC12_CONFIG_TRG1A 469 #define BOARD_BLDC_ADC_PREEMPT_TRIG_LEN (1U) 470 #define BOARD_BLDC_PWM_TRIG_CMP_INDEX (8U) 471 #define BOARD_BLDC_TRIGMUX_IN_NUM HPM_TRGM1_INPUT_SRC_PWM1_CH8REF 472 #define BOARD_BLDC_TRG_NUM TRGM_TRGOCFG_ADCX_PTRGI0A 473 #define BOARD_BLDC_ADC_IRQn IRQn_ADC0 474 475 476 #define BOARD_CPU_FREQ (648000000UL) 477 478 #define BOARD_APP_DISPLAY_CLOCK clock_display 479 480 #ifndef BOARD_SHOW_CLOCK 481 #define BOARD_SHOW_CLOCK 1 482 #endif 483 #ifndef BOARD_SHOW_BANNER 484 #define BOARD_SHOW_BANNER 1 485 #endif 486 487 /* FreeRTOS Definitions */ 488 #define BOARD_FREERTOS_TIMER HPM_GPTMR4 489 #define BOARD_FREERTOS_TIMER_CHANNEL 1 490 #define BOARD_FREERTOS_TIMER_IRQ IRQn_GPTMR4 491 #define BOARD_FREERTOS_TIMER_CLK_NAME clock_gptmr4 492 493 #ifndef BOARD_RUNNING_CORE 494 #define BOARD_RUNNING_CORE 0 495 #endif 496 497 #if defined(__cplusplus) 498 extern "C" { 499 #endif /* __cplusplus */ 500 501 typedef void (*board_timer_cb)(void); 502 503 void board_init(void); 504 void board_init_console(void); 505 506 void board_init_uart(UART_Type *ptr); 507 void board_init_i2c(I2C_Type *ptr); 508 void board_init_lcd(void); 509 void board_lcd_backlight(bool is_on); 510 void board_panel_para_to_lcdc(lcdc_config_t *config); 511 void board_init_can(CAN_Type *ptr); 512 513 uint32_t board_init_femc_clock(void); 514 515 void board_init_sdram_pins(void); 516 void board_init_gpio_pins(void); 517 void board_init_spi_pins(SPI_Type *ptr); 518 void board_init_spi_pins_with_gpio_as_cs(SPI_Type *ptr); 519 void board_write_spi_cs(uint32_t pin, uint8_t state); 520 void board_init_led_pins(void); 521 522 /* cap touch */ 523 void board_init_cap_touch(void); 524 525 void board_led_write(uint8_t state); 526 void board_led_toggle(void); 527 528 void board_fpga_power_enable(void); 529 530 void board_init_cam_pins(void); 531 /* Initialize SoC overall clocks */ 532 void board_init_clock(void); 533 534 /* Initialize the UART clock */ 535 uint32_t board_init_uart_clock(UART_Type *ptr); 536 537 /* Initialize the CAM(camera) dot clock */ 538 uint32_t board_init_cam_clock(CAM_Type *ptr); 539 540 /* Initialize the LCD pixel clock */ 541 uint32_t board_init_lcd_clock(void); 542 543 uint32_t board_init_spi_clock(SPI_Type *ptr); 544 545 uint32_t board_init_adc12_clock(ADC12_Type *ptr, bool clk_src_ahb); 546 547 uint32_t board_init_adc16_clock(ADC16_Type *ptr, bool clk_src_ahb); 548 549 uint32_t board_init_can_clock(CAN_Type *ptr); 550 551 hpm_stat_t board_set_audio_pll_clock(uint32_t freq); 552 553 void board_init_i2s_pins(I2S_Type *ptr); 554 uint32_t board_init_i2s_clock(I2S_Type *ptr); 555 uint32_t board_config_i2s_clock(I2S_Type *ptr, uint32_t sample_rate); 556 uint32_t board_init_pdm_clock(void); 557 uint32_t board_init_dao_clock(void); 558 559 void board_init_sd_pins(SDXC_Type *ptr); 560 uint32_t board_sd_configure_clock(SDXC_Type *ptr, uint32_t freq, bool need_inverse); 561 void board_sd_switch_pins_to_1v8(SDXC_Type *ptr); 562 bool board_sd_detect_card(SDXC_Type *ptr); 563 564 void board_init_dao_pins(void); 565 566 void board_init_adc12_pins(void); 567 void board_init_adc16_pins(void); 568 569 void board_init_usb_pins(void); 570 void board_usb_vbus_ctrl(uint8_t usb_index, uint8_t level); 571 572 void board_init_enet_pps_pins(ENET_Type *ptr); 573 uint8_t board_get_enet_dma_pbl(ENET_Type *ptr); 574 hpm_stat_t board_reset_enet_phy(ENET_Type *ptr); 575 hpm_stat_t board_init_enet_pins(ENET_Type *ptr); 576 hpm_stat_t board_init_enet_rmii_reference_clock(ENET_Type *ptr, bool internal); 577 hpm_stat_t board_init_enet_ptp_clock(ENET_Type *ptr); 578 hpm_stat_t board_enable_enet_irq(ENET_Type *ptr); 579 hpm_stat_t board_disable_enet_irq(ENET_Type *ptr); 580 581 /* 582 * @brief Initialize PMP and PMA for but not limited to the following purposes: 583 * -- non-cacheable memory initialization 584 */ 585 void board_init_pmp(void); 586 587 void board_delay_ms(uint32_t ms); 588 void board_delay_us(uint32_t us); 589 590 void board_init_beep_pwm_pins(void); 591 void board_init_rgb_pwm_pins(void); 592 593 void board_timer_create(uint32_t ms, board_timer_cb cb); 594 void board_enable_output_rgb_led(uint8_t color); 595 void board_disable_output_rgb_led(uint8_t color); 596 597 /* 598 * Keep mchtmr clock on low power mode 599 */ 600 void board_ungate_mchtmr_at_lp_mode(void); 601 602 /* 603 * Get PWM output level of onboard LED 604 */ 605 uint8_t board_get_led_pwm_off_level(void); 606 607 /* 608 * Get GPIO pin level of onboard LED 609 */ 610 uint8_t board_get_led_gpio_off_level(void); 611 #if defined(__cplusplus) 612 } 613 #endif /* __cplusplus */ 614 #endif /* _HPM_BOARD_H */ 615