1 /* 2 * Copyright (c) 2023 HPMicro 3 * 4 * SPDX-License-Identifier: BSD-3-Clause 5 * 6 */ 7 8 #ifndef _HPM_BOARD_H 9 #define _HPM_BOARD_H 10 #include <stdio.h> 11 #include "hpm_common.h" 12 #include "hpm_clock_drv.h" 13 #include "hpm_lcdc_drv.h" 14 #include "hpm_soc.h" 15 #include "hpm_soc_feature.h" 16 #include "pinmux.h" 17 #ifdef CONFIG_HPM_PANEL 18 #include "hpm_panel.h" 19 #endif 20 #if !defined(CONFIG_NDEBUG_CONSOLE) || !CONFIG_NDEBUG_CONSOLE 21 #include "hpm_debug_console.h" 22 #endif 23 24 #define BOARD_NAME "hpm6800evk" 25 #define BOARD_UF2_SIGNATURE (0x0A4D5048UL) 26 27 /* dma section */ 28 #define BOARD_APP_XDMA HPM_XDMA 29 #define BOARD_APP_HDMA HPM_HDMA 30 #define BOARD_APP_XDMA_IRQ IRQn_XDMA 31 #define BOARD_APP_HDMA_IRQ IRQn_HDMA 32 #define BOARD_APP_DMAMUX HPM_DMAMUX 33 #define TEST_DMA_CONTROLLER HPM_HDMA 34 #define TEST_DMA_IRQ IRQn_HDMA 35 36 /* uart section */ 37 #ifndef BOARD_RUNNING_CORE 38 #define BOARD_RUNNING_CORE HPM_CORE0 39 #endif 40 #ifndef BOARD_APP_UART_BASE 41 #define BOARD_APP_UART_BASE HPM_UART0 42 #define BOARD_APP_UART_IRQ IRQn_UART0 43 #else 44 #ifndef BOARD_APP_UART_IRQ 45 #warning no IRQ specified for application uart 46 #endif 47 #endif 48 49 #define BOARD_APP_UART_BAUDRATE (115200UL) 50 #define BOARD_APP_UART_CLK_NAME clock_uart0 51 #define BOARD_APP_UART_RX_DMA_REQ HPM_DMA_SRC_UART0_RX 52 #define BOARD_APP_UART_TX_DMA_REQ HPM_DMA_SRC_UART0_TX 53 54 #if !defined(CONFIG_NDEBUG_CONSOLE) || !CONFIG_NDEBUG_CONSOLE 55 #ifndef BOARD_CONSOLE_TYPE 56 #define BOARD_CONSOLE_TYPE CONSOLE_TYPE_UART 57 #endif 58 59 #if BOARD_CONSOLE_TYPE == CONSOLE_TYPE_UART 60 #ifndef BOARD_CONSOLE_BASE 61 #if BOARD_RUNNING_CORE == HPM_CORE0 62 #define BOARD_CONSOLE_BASE HPM_UART0 63 #define BOARD_CONSOLE_CLK_NAME clock_uart0 64 #else 65 #define BOARD_CONSOLE_BASE HPM_UART3 66 #define BOARD_CONSOLE_CLK_NAME clock_uart3 67 #endif 68 #endif 69 #define BOARD_CONSOLE_BAUDRATE (115200UL) 70 #endif 71 #endif 72 73 #define BOARD_FREEMASTER_UART_BASE HPM_UART0 74 #define BOARD_FREEMASTER_UART_IRQ IRQn_UART0 75 #define BOARD_FREEMASTER_UART_CLK_NAME clock_uart0 76 77 /* uart microros sample section */ 78 #define BOARD_MICROROS_UART_BASE HPM_UART2 79 #define BOARD_MICROROS_UART_IRQ IRQn_UART2 80 #define BOARD_MICROROS_UART_CLK_NAME clock_uart2 81 82 /* lin section */ 83 #define BOARD_LIN HPM_LIN0 84 #define BOARD_LIN_CLK_NAME clock_lin0 85 #define BOARD_LIN_IRQ IRQn_LIN0 86 #define BOARD_LIN_BAUDRATE (19200U) 87 88 /* nor flash section */ 89 #define BOARD_FLASH_BASE_ADDRESS (0x80000000UL) 90 #define BOARD_FLASH_SIZE (16 * SIZE_1MB) 91 92 /* i2c section */ 93 #define BOARD_APP_I2C_BASE HPM_I2C1 94 #define BOARD_APP_I2C_IRQ IRQn_I2C1 95 #define BOARD_APP_I2C_CLK_NAME clock_i2c1 96 #define BOARD_APP_I2C_DMA HPM_HDMA 97 #define BOARD_APP_I2C_DMAMUX HPM_DMAMUX 98 #define BOARD_APP_I2C_DMA_SRC HPM_DMA_SRC_I2C1 99 #define BOARD_APP_I2C_DMAMUX_CH DMAMUX_MUXCFG_HDMA_MUX0 100 101 /* cam */ 102 #define BOARD_CAM_I2C_BASE HPM_I2C0 103 #define BOARD_CAM_I2C_CLK_NAME clock_i2c0 104 #define BOARD_SUPPORT_CAM_RESET 105 #define BOARD_SUPPORT_CAM_PWDN 106 #define BOARD_CAM_RST_GPIO_CTRL HPM_GPIO0 107 #define BOARD_CAM_RST_GPIO_INDEX GPIO_DI_GPIOA 108 #define BOARD_CAM_RST_GPIO_PIN 22 109 #define BOARD_CAM_PWDN_GPIO_CTRL HPM_GPIO0 110 #define BOARD_CAM_PWDN_GPIO_INDEX GPIO_DI_GPIOA 111 #define BOARD_CAM_PWDN_GPIO_PIN 21 112 113 /* touch panel */ 114 #define BOARD_CAP_I2C_BASE (HPM_I2C0) 115 #define BOARD_CAP_I2C_CLK_NAME clock_i2c0 116 #define BOARD_CAP_RST_GPIO (HPM_GPIO0) 117 #define BOARD_CAP_RST_GPIO_INDEX (GPIO_DI_GPIOY) 118 #define BOARD_CAP_RST_GPIO_PIN (7) 119 #define BOARD_CAP_RST_GPIO_IRQ (IRQn_GPIO0_Y) 120 #define BOARD_CAP_INTR_GPIO (HPM_GPIO0) 121 #define BOARD_CAP_INTR_GPIO_INDEX (GPIO_DI_GPIOY) 122 #define BOARD_CAP_INTR_GPIO_PIN (6) 123 #define BOARD_CAP_INTR_GPIO_IRQ (IRQn_GPIO0_Y) 124 #define BOARD_CAP_I2C_GPIO HPM_GPIO0 125 #define BOARD_CAP_I2C_SDA_GPIO_INDEX (GPIO_DI_GPIOF) 126 #define BOARD_CAP_I2C_SDA_GPIO_PIN (9) 127 #define BOARD_CAP_I2C_CLK_GPIO_INDEX (GPIO_DI_GPIOF) 128 #define BOARD_CAP_I2C_CLK_GPIO_PIN (8) 129 130 /* i2s section */ 131 #define BOARD_APP_I2S_BASE HPM_I2S3 132 #define BOARD_APP_I2S_DATA_LINE (2U) 133 #define BOARD_APP_I2S_CLK_NAME clock_i2s3 134 #define BOARD_APP_I2S_TX_DMA_REQ HPM_DMA_SRC_I2S3_TX 135 #define BOARD_APP_I2S_IRQ IRQn_I2S3 136 #define BOARD_APP_AUDIO_CLK_SRC clock_source_pll3_clk0 137 #define BOARD_APP_AUDIO_CLK_SRC_NAME clk_pll3clk0 138 #define BOARD_PDM_SINGLE_CHANNEL_MASK (0x02U) 139 #define BOARD_PDM_DUAL_CHANNEL_MASK (0x22U) 140 141 /* i2c for i2s codec section */ 142 #define BOARD_CODEC_I2C_BASE HPM_I2C3 143 #define BOARD_CODEC_I2C_CLK_NAME clock_i2c3 144 145 /* dma section */ 146 #define BOARD_APP_XDMA HPM_XDMA 147 #define BOARD_APP_HDMA HPM_HDMA 148 #define BOARD_APP_XDMA_IRQ IRQn_XDMA 149 #define BOARD_APP_HDMA_IRQ IRQn_HDMA 150 #define BOARD_APP_DMAMUX HPM_DMAMUX 151 152 /* gptmr section */ 153 #define BOARD_GPTMR HPM_GPTMR2 154 #define BOARD_GPTMR_IRQ IRQn_GPTMR2 155 #define BOARD_GPTMR_CHANNEL 0 156 #define BOARD_GPTMR_DMA_SRC HPM_DMA_SRC_GPTMR2_0 157 #define BOARD_GPTMR_CLK_NAME clock_gptmr2 158 #define BOARD_GPTMR_PWM HPM_GPTMR2 159 #define BOARD_GPTMR_PWM_CHANNEL 0 160 #define BOARD_GPTMR_PWM_DMA_SRC HPM_DMA_SRC_GPTMR2_0 161 #define BOARD_GPTMR_PWM_CLK_NAME clock_gptmr2 162 #define BOARD_GPTMR_PWM_IRQ IRQn_GPTMR2 163 #define BOARD_GPTMR_PWM_SYNC HPM_GPTMR2 164 #define BOARD_GPTMR_PWM_SYNC_CHANNEL 1 165 #define BOARD_GPTMR_PWM_SYNC_CLK_NAME clock_gptmr2 166 167 /* pinmux section */ 168 #define USING_GPIO0_FOR_GPIOZ 169 #ifndef USING_GPIO0_FOR_GPIOZ 170 #define BOARD_APP_GPIO_CTRL HPM_BGPIO 171 #define BOARD_APP_GPIO_IRQ IRQn_BGPIO 172 #else 173 #define BOARD_APP_GPIO_CTRL HPM_GPIO0 174 #define BOARD_APP_GPIO_IRQ IRQn_GPIO0_F 175 #endif 176 177 /* gpiom section */ 178 #define BOARD_APP_GPIOM_BASE HPM_GPIOM 179 #define BOARD_APP_GPIOM_USING_CTRL HPM_FGPIO 180 #define BOARD_APP_GPIOM_USING_CTRL_NAME gpiom_core0_fast 181 /* 182 * in errata, for gpiom, setting the ASSIGN register of GPIOF is invalid. 183 * so need to configure GPIOE to make it effective at the same time. 184 */ 185 #define BOARD_LED_GPIOM_GPIO_INDEX GPIO_DI_GPIOE 186 187 /* spi section */ 188 #define BOARD_APP_SPI_BASE HPM_SPI3 189 #define BOARD_APP_SPI_CLK_NAME clock_spi3 190 #define BOARD_APP_SPI_IRQ IRQn_SPI3 191 #define BOARD_APP_SPI_SCLK_FREQ (20000000UL) 192 #define BOARD_APP_SPI_ADDR_LEN_IN_BYTES (1U) 193 #define BOARD_APP_SPI_DATA_LEN_IN_BITS (8U) 194 #define BOARD_APP_SPI_RX_DMA HPM_DMA_SRC_SPI3_RX 195 #define BOARD_APP_SPI_TX_DMA HPM_DMA_SRC_SPI3_TX 196 #define BOARD_SPI_CS_GPIO_CTRL HPM_GPIO0 197 #define BOARD_SPI_CS_PIN IOC_PAD_PE04 198 #define BOARD_SPI_CS_ACTIVE_LEVEL (0U) 199 200 /* mtimer section */ 201 #define BOARD_MCHTMR_FREQ_IN_HZ (1000000UL) 202 203 /* Flash section */ 204 #define BOARD_APP_XPI_NOR_XPI_BASE (HPM_XPI0) 205 #define BOARD_APP_XPI_NOR_CFG_OPT_HDR (0xfcf90001U) 206 #define BOARD_APP_XPI_NOR_CFG_OPT_OPT0 (0x00000005U) 207 #define BOARD_APP_XPI_NOR_CFG_OPT_OPT1 (0x00001000U) 208 209 /* ADC section */ 210 #define BOARD_APP_ADC16_NAME "ADC0" 211 #define BOARD_APP_ADC16_BASE HPM_ADC0 212 #define BOARD_APP_ADC16_IRQn IRQn_ADC0 213 #define BOARD_APP_ADC16_CH_1 (8U) 214 #define BOARD_APP_ADC16_CLK_NAME (clock_adc0) 215 216 #define BOARD_APP_ADC16_PMT_TRIG_CH ADC16_CONFIG_TRG0A 217 218 /* CAN section */ 219 #define BOARD_APP_CAN_BASE HPM_MCAN3 220 #define BOARD_APP_CAN_IRQn IRQn_CAN3 221 222 /* 223 * timer for board delay 224 */ 225 #define BOARD_DELAY_TIMER (HPM_GPTMR3) 226 #define BOARD_DELAY_TIMER_CH 0 227 #define BOARD_DELAY_TIMER_CLK_NAME (clock_gptmr3) 228 229 #define BOARD_CALLBACK_TIMER (HPM_GPTMR3) 230 #define BOARD_CALLBACK_TIMER_CH 1 231 #define BOARD_CALLBACK_TIMER_IRQ IRQn_GPTMR3 232 #define BOARD_CALLBACK_TIMER_CLK_NAME (clock_gptmr3) 233 234 #define BOARD_CPU_FREQ (500000000UL) 235 236 /* LED */ 237 #define BOARD_R_GPIO_CTRL HPM_GPIO0 238 #define BOARD_R_GPIO_INDEX GPIO_DI_GPIOF 239 #define BOARD_R_GPIO_PIN 1 240 #define BOARD_G_GPIO_CTRL HPM_GPIO0 241 #define BOARD_G_GPIO_INDEX GPIO_DI_GPIOF 242 #define BOARD_G_GPIO_PIN 2 243 #define BOARD_B_GPIO_CTRL HPM_GPIO0 244 #define BOARD_B_GPIO_INDEX GPIO_DI_GPIOF 245 #define BOARD_B_GPIO_PIN 5 246 247 #define BOARD_RGB_RED 0 248 #define BOARD_RGB_GREEN (BOARD_RGB_RED + 1) 249 #define BOARD_RGB_BLUE (BOARD_RGB_RED + 2) 250 251 #define BOARD_LED_GPIO_CTRL BOARD_G_GPIO_CTRL 252 #define BOARD_LED_GPIO_INDEX BOARD_G_GPIO_INDEX 253 #define BOARD_LED_GPIO_PIN BOARD_G_GPIO_PIN 254 255 #define BOARD_LED_OFF_LEVEL 0 256 #define BOARD_LED_ON_LEVEL !BOARD_LED_OFF_LEVEL 257 #define BOARD_LED_TOGGLE_RGB 1 258 259 /* Key */ 260 #define BOARD_APP_GPIO_INDEX GPIO_DI_GPIOF 261 #define BOARD_APP_GPIO_PIN 6 262 263 /* ACMP desction */ 264 #define BOARD_ACMP 0 265 #define BOARD_ACMP_CHANNEL ACMP_CHANNEL_CHN1 266 #define BOARD_ACMP_IRQ 0 267 #define BOARD_ACMP_PLUS_INPUT ACMP_INPUT_DAC_OUT /* use internal DAC */ 268 #define BOARD_ACMP_MINUS_INPUT ACMP_INPUT_ANALOG_6 /* align with used pin */ 269 270 #define BOARD_GWC_BASE HPM_GWC0 271 #define BOARD_GWC_FUNC_IRQ IRQn_GWCK0_FUNC 272 #define BOARD_GWC_ERR_IRQ IRQn_GWCK0_ERR 273 #define BOARD_GWC_PIXEL_WIDTH 1920 274 #define BOARD_GWC_PIXEL_HEIGHT 1080 275 276 /* lcd section */ 277 #define BOARD_LCD_BASE HPM_LCDC 278 #define BOARD_LCD_IRQ IRQn_LCDC 279 #define clock_display clock_lcd0 280 281 #ifndef BOARD_LCD_WIDTH 282 #define BOARD_LCD_WIDTH PANEL_SIZE_WIDTH 283 #endif 284 #ifndef BOARD_LCD_HEIGHT 285 #define BOARD_LCD_HEIGHT PANEL_SIZE_HEIGHT 286 #endif 287 288 /* pdma section */ 289 #define BOARD_PDMA_BASE HPM_PDMA 290 #ifndef IRQn_PDMA_D0 291 #define IRQn_PDMA_D0 IRQn_PDMA 292 #endif 293 294 #ifndef BOARD_SHOW_CLOCK 295 #define BOARD_SHOW_CLOCK 1 296 #endif 297 #ifndef BOARD_SHOW_BANNER 298 #define BOARD_SHOW_BANNER 1 299 #endif 300 301 /* USB */ 302 #define BOARD_USB HPM_USB0 303 304 /* FreeRTOS Definitions */ 305 #define BOARD_FREERTOS_TIMER HPM_GPTMR2 306 #define BOARD_FREERTOS_TIMER_CHANNEL 1 307 #define BOARD_FREERTOS_TIMER_IRQ IRQn_GPTMR2 308 #define BOARD_FREERTOS_TIMER_CLK_NAME clock_gptmr2 309 310 /* SDXC section */ 311 #define BOARD_APP_SDCARD_SDXC_BASE (HPM_SDXC1) 312 #define BOARD_APP_SDCARD_SUPPORT_3V3 (1) 313 #define BOARD_APP_SDCARD_SUPPORT_1V8 (1) 314 #define BOARD_APP_SDCARD_SUPPORT_4BIT (1) 315 #define BOARD_APP_SDCARD_SUPPORT_CARD_DETECTION (1) 316 #define BOARD_APP_SDCARD_SUPPORT_POWER_SWITCH (1) 317 #define BOARD_APP_SDCARD_SUPPORT_VOLTAGE_SWITCH (1) 318 319 #define BOARD_APP_SDCARD_CARD_DETECTION_USING_GPIO (1) 320 #define BOARD_APP_SDCARD_POWER_SWITCH_USING_GPIO (1) 321 #define BOARD_APP_SDCARD_VOLTAGE_SWITCH_USING_GPIO (1) 322 #if BOARD_APP_SDCARD_CARD_DETECTION_USING_GPIO 323 #define BOARD_APP_SDCARD_CARD_DETECTION_PIN IOC_PAD_PD05 324 #define BOARD_APP_SDCARD_CARD_DETECTION_PIN_POL (1) /* pin value 0 means card was detected*/ 325 #endif 326 #ifdef BOARD_APP_SDCARD_POWER_SWITCH_USING_GPIO 327 #define BOARD_APP_SDCARD_POWER_SWITCH_PIN IOC_PAD_PD07 328 #endif 329 #ifdef BOARD_APP_SDCARD_VOLTAGE_SWITCH_USING_GPIO 330 #define BOARD_APP_SDCARD_VSEL_PIN IOC_PAD_PD12 331 #endif 332 333 #define BOARD_APP_EMMC_SDXC_BASE (HPM_SDXC0) 334 #define BOARD_APP_EMMC_SUPPORT_3V3 (0) 335 #define BOARD_APP_EMMC_SUPPORT_1V8 (1) 336 #define BOARD_APP_EMMC_SUPPORT_4BIT (1) 337 #define BOARD_APP_EMMC_SUPPORT_8BIT (1) 338 #define BOARD_APP_EMMC_SUPPORT_DS (1) 339 #define BOARD_APP_EMMC_HOST_USING_IRQ (0) 340 341 /* enet section */ 342 #define BOARD_ENET_COUNT (1U) 343 #define BOARD_ENET_PPS HPM_ENET0 344 #define BOARD_ENET_PPS_IDX enet_pps_0 345 #define BOARD_ENET_PPS_PTP_CLOCK clock_ptp0 346 347 #define BOARD_ENET_RGMII_PHY_ITF enet_inf_rgmii 348 #define BOARD_ENET_RGMII_RST_GPIO HPM_GPIO0 349 #define BOARD_ENET_RGMII_RST_GPIO_INDEX GPIO_DO_GPIOD 350 #define BOARD_ENET_RGMII_RST_GPIO_PIN (18U) 351 #define BOARD_ENET_RGMII HPM_ENET0 352 #define BOARD_ENET_RGMII_TX_DLY (0U) 353 #define BOARD_ENET_RGMII_RX_DLY (0U) 354 #define BOARD_ENET_RGMII_PTP_CLOCK clock_ptp0 355 #define BOARD_ENET_RGMII_PPS0_PINOUT (1) 356 357 /* dram section */ 358 #define DDR_TYPE_DDR2 (0U) 359 #define DDR_TYPE_DDR3L (1U) 360 #define BOARD_DDR_TYPE DDR_TYPE_DDR3L 361 362 #define BOARD_SDRAM_ADDRESS (0x40000000UL) 363 #if (BOARD_DDR_TYPE == DDR_TYPE_DDR2) 364 #define BOARD_SDRAM_SIZE (256UL * 1024UL * 1024UL) 365 #else 366 #define BOARD_SDRAM_SIZE (512UL * 1024UL * 1024UL) 367 #endif 368 369 370 #if defined(__cplusplus) 371 extern "C" { 372 #endif /* __cplusplus */ 373 374 typedef void (*board_timer_cb)(void); 375 376 void board_init(void); 377 void board_init_console(void); 378 379 void board_init_uart(UART_Type *ptr); 380 void board_init_i2c(I2C_Type *ptr); 381 void board_init_can(MCAN_Type *ptr); 382 383 void board_init_gpio_pins(void); 384 void board_init_spi_pins(SPI_Type *ptr); 385 void board_init_spi_pins_with_gpio_as_cs(SPI_Type *ptr); 386 void board_write_spi_cs(uint32_t pin, uint8_t state); 387 uint8_t board_get_led_gpio_off_level(void); 388 void board_init_led_pins(void); 389 void board_disable_output_rgb_led(uint8_t color); 390 void board_enable_output_rgb_led(uint8_t color); 391 392 void board_led_write(uint8_t state); 393 void board_led_toggle(void); 394 395 /* Initialize SoC overall clocks */ 396 void board_init_clock(void); 397 398 uint32_t board_init_spi_clock(SPI_Type *ptr); 399 uint32_t board_init_can_clock(MCAN_Type *ptr); 400 401 void board_init_enet_pps_pins(ENET_Type *ptr); 402 uint8_t board_get_enet_dma_pbl(ENET_Type *ptr); 403 hpm_stat_t board_reset_enet_phy(ENET_Type *ptr); 404 hpm_stat_t board_init_enet_pins(ENET_Type *ptr); 405 hpm_stat_t board_init_enet_rmii_reference_clock(ENET_Type *ptr, bool internal); 406 hpm_stat_t board_init_enet_rgmii_clock_delay(ENET_Type *ptr); 407 hpm_stat_t board_init_enet_ptp_clock(ENET_Type *ptr); 408 hpm_stat_t board_enable_enet_irq(ENET_Type *ptr); 409 hpm_stat_t board_disable_enet_irq(ENET_Type *ptr); 410 411 /* 412 * @brief Initialize PMP and PMA for but not limited to the following purposes: 413 * -- non-cacheable memory initialization 414 */ 415 void board_init_pmp(void); 416 417 void board_delay_us(uint32_t us); 418 void board_delay_ms(uint32_t ms); 419 420 void board_timer_create(uint32_t ms, board_timer_cb cb); 421 void board_ungate_mchtmr_at_lp_mode(void); 422 423 /* Initialize the UART clock */ 424 uint32_t board_init_uart_clock(UART_Type *ptr); 425 426 void board_lcd_backlight(bool is_on); 427 void board_init_lcd(void); 428 void board_panel_para_to_lcdc(lcdc_config_t *config); 429 void board_init_gwc(void); 430 void board_init_cap_touch(void); 431 void board_init_usb_pins(void); 432 void board_usb_vbus_ctrl(uint8_t usb_index, uint8_t level); 433 434 void board_init_sd_pins(SDXC_Type *ptr); 435 uint32_t board_sd_configure_clock(SDXC_Type *ptr, uint32_t freq, bool need_inverse); 436 void board_sd_switch_pins_to_1v8(SDXC_Type *ptr); 437 bool board_sd_detect_card(SDXC_Type *ptr); 438 439 uint32_t board_init_dao_clock(void); 440 uint32_t board_init_pdm_clock(void); 441 uint32_t board_init_i2s_clock(I2S_Type *ptr); 442 uint32_t board_config_i2s_clock(I2S_Type *ptr, uint32_t sample_rate); 443 444 void board_init_adc16_pins(void); 445 uint32_t board_init_adc16_clock(ADC16_Type *ptr, bool clk_src_ahb); 446 uint32_t board_init_sadc_clock(SDADC_Type *ptr, bool clk_src_ahb); 447 448 void board_init_cam_pins(void); 449 void board_write_cam_rst(uint8_t state); 450 void board_write_cam_pwdn(uint8_t state); 451 uint32_t board_init_cam_clock(CAM_Type *ptr); 452 453 void board_init_mipi_csi_cam_pins(void); 454 void board_write_mipi_csi_cam_rst(uint8_t state); 455 456 #if defined(__cplusplus) 457 } 458 #endif /* __cplusplus */ 459 #endif /* _HPM_BOARD_H */ 460