1 /*
2 * Copyright (c) 2021-2023 HPMicro
3 *
4 * SPDX-License-Identifier: BSD-3-Clause
5 *
6 */
7
8 #ifndef HPM_ADC16_DRV_H
9 #define HPM_ADC16_DRV_H
10
11 #include "hpm_common.h"
12 #include "hpm_adc16_regs.h"
13 #include "hpm_soc_feature.h"
14
15 /**
16 * @brief ADC16 driver APIs
17 * @defgroup adc16_interface ADC16 driver APIs
18 * @ingroup adc_interfaces
19 * @{
20 */
21
22 /** @brief Define ADC16 validity check for the channel number */
23 #if defined (ADC16_SOC_TEMP_CH_EN) && ADC16_SOC_TEMP_CH_EN
24 #define ADC16_IS_CHANNEL_INVALID(CH) (CH > ADC16_SOC_MAX_CH_NUM && CH != ADC16_SOC_TEMP_CH_NUM)
25 #else
26 #define ADC16_IS_CHANNEL_INVALID(CH) (CH > ADC16_SOC_MAX_CH_NUM)
27 #endif
28
29 /** @brief Define ADC16 validity check for the trigger number */
30 #define ADC16_IS_TRIG_CH_INVLAID(CH) (CH > ADC_SOC_MAX_TRIG_CH_NUM)
31
32 /** @brief Define ADC16 validity check for the trigger length */
33 #define ADC16_IS_TRIG_LEN_INVLAID(TRIG_LEN) (TRIG_LEN > ADC_SOC_MAX_TRIG_CH_LEN)
34
35 /** @brief Define ADC16 validity check for the sequence length */
36 #define ADC16_IS_SEQ_LEN_INVLAID(LEN) ((LEN == 0) || (LEN > ADC_SOC_SEQ_MAX_LEN))
37
38 /** @brief Define ADC16 validity check for the DMA buffer length in the sequence mode */
39 #define ADC16_IS_SEQ_DMA_BUFF_LEN_INVLAID(LEN) ((LEN == 0) || (LEN > ADC_SOC_SEQ_MAX_DMA_BUFF_LEN_IN_4BYTES))
40
41 /** @brief Define ADC16 validity check for the DMA buffer length in the preemption mode */
42 #define ADC16_IS_PMT_DMA_BUFF_LEN_INVLAID(LEN) ((LEN == 0) || (LEN > ADC_SOC_PMT_MAX_DMA_BUFF_LEN_IN_4BYTES))
43
44 /** @brief Define ADC16 resolutions. */
45 typedef enum {
46 adc16_res_8_bits = 9,
47 adc16_res_10_bits = 11,
48 adc16_res_12_bits = 14,
49 adc16_res_16_bits = 21
50 } adc16_resolution_t;
51
52 /** @brief Define ADC16 conversion modes. */
53 typedef enum {
54 adc16_conv_mode_oneshot = 0,
55 adc16_conv_mode_period,
56 adc16_conv_mode_sequence,
57 adc16_conv_mode_preemption
58 } adc16_conversion_mode_t;
59
60 /** @brief Define ADC16 Clock Divider */
61 typedef enum {
62 adc16_clock_divider_1 = 1,
63 adc16_clock_divider_2,
64 adc16_clock_divider_3,
65 adc16_clock_divider_4,
66 adc16_clock_divider_5,
67 adc16_clock_divider_6,
68 adc16_clock_divider_7,
69 adc16_clock_divider_8,
70 adc16_clock_divider_9,
71 adc16_clock_divider_10,
72 adc16_clock_divider_11,
73 adc16_clock_divider_12,
74 adc16_clock_divider_13,
75 adc16_clock_divider_14,
76 adc16_clock_divider_15,
77 adc16_clock_divider_16,
78 } adc16_clock_divider_t;
79
80 /** @brief Define ADC16 irq events. */
81 typedef enum {
82 /** This mask indicates that a trigger conversion is complete. */
83 adc16_event_trig_complete = ADC16_INT_STS_TRIG_CMPT_MASK,
84
85 /** This mask indicates that a conflict caused by software-triggered conversions. */
86 adc16_event_trig_sw_conflict = ADC16_INT_STS_TRIG_SW_CFLCT_MASK,
87
88 /** This mask indicates that a conflict caused by hardware-triggered conversions. */
89 adc16_event_trig_hw_conflict = ADC16_INT_STS_TRIG_HW_CFLCT_MASK,
90
91 /** This mask indicates that a conflict caused when bus reading from different channels. */
92 adc16_event_read_conflict = ADC16_INT_STS_READ_CFLCT_MASK,
93
94 /** This mask indicates that a conflict caused by sequence-triggered conversions. */
95 adc16_event_seq_sw_conflict = ADC16_INT_STS_SEQ_SW_CFLCT_MASK,
96
97 /** This mask indicates that a conflict caused by hardware-triggered conversions. */
98 adc16_event_seq_hw_conflict = ADC16_INT_STS_SEQ_HW_CFLCT_MASK,
99
100 /** This mask indicates that DMA is stopped currently. */
101 adc16_event_seq_dma_abort = ADC16_INT_STS_SEQ_DMAABT_MASK,
102
103 /** This mask indicates that all of the configured conversion(s) in a queue is(are) complete. */
104 adc16_event_seq_full_complete = ADC16_INT_STS_SEQ_CMPT_MASK,
105
106 /** This mask indicates that one of the configured conversion(s) in a queue is complete. */
107 adc16_event_seq_single_complete = ADC16_INT_STS_SEQ_CVC_MASK,
108
109 /** This mask indicates that DMA FIFO is full currently. */
110 adc16_event_dma_fifo_full = ADC16_INT_STS_DMA_FIFO_FULL_MASK
111 } adc16_irq_event_t;
112
113 /** @brief ADC16 common configuration struct. */
114 typedef struct {
115 uint8_t res;
116 uint8_t conv_mode;
117 uint32_t adc_clk_div;
118 uint16_t conv_duration;
119 bool port3_realtime;
120 bool wait_dis;
121 bool sel_sync_ahb;
122 bool adc_ahb_en;
123 } adc16_config_t;
124
125 /** @brief ADC16 channel configuration struct. */
126 typedef struct {
127 uint8_t ch;
128 uint16_t thshdh;
129 uint16_t thshdl;
130 bool wdog_int_en;
131 uint8_t sample_cycle_shift;
132 uint32_t sample_cycle;
133 } adc16_channel_config_t;
134
135 /** @brief ADC16 channel configuration struct. */
136 typedef struct {
137 uint8_t ch;
138 uint16_t thshdh;
139 uint16_t thshdl;
140 } adc16_channel_threshold_t;
141
142 /** @brief ADC16 DMA configuration struct. */
143 typedef struct {
144 uint32_t *start_addr;
145 uint32_t buff_len_in_4bytes;
146 uint32_t stop_pos;
147 bool stop_en;
148 } adc16_dma_config_t;
149
150 /** @brief ADC16 DMA configuration struct for the sequence mode. */
151 #if defined(ADC_SOC_IP_VERSION) && (ADC_SOC_IP_VERSION < 2)
152 typedef struct {
153 uint32_t result :16;
154 uint32_t seq_num :4;
155 uint32_t :4;
156 uint32_t adc_ch :5;
157 uint32_t :2;
158 uint32_t cycle_bit :1;
159 } adc16_seq_dma_data_t;
160 #else
161 typedef struct {
162 uint32_t result :16;
163 uint32_t seq_num :4;
164 uint32_t adc_ch :5;
165 uint32_t :6;
166 uint32_t cycle_bit :1;
167 } adc16_seq_dma_data_t;
168 #endif
169
170 /** @brief ADC16 DMA configuration struct for the preemption mode. */
171 #if defined(ADC_SOC_IP_VERSION) && (ADC_SOC_IP_VERSION < 2)
172 typedef struct {
173 uint32_t result :16;
174 uint32_t seq_num :2;
175 uint32_t :2;
176 uint32_t trig_ch :4;
177 uint32_t adc_ch :5;
178 uint32_t :2;
179 uint32_t cycle_bit :1;
180 } adc16_pmt_dma_data_t;
181 #else
182 typedef struct {
183 uint32_t result :16;
184 uint32_t :4;
185 uint32_t adc_ch :5;
186 uint32_t trig_ch :4;
187 uint32_t seq_num :2;
188 uint32_t cycle_bit :1;
189 } adc16_pmt_dma_data_t;
190 #endif
191
192 /** @brief ADC16 configuration struct for the period mode. */
193 typedef struct {
194 uint8_t ch;
195 uint8_t prescale;
196 uint8_t period_count;
197 } adc16_prd_config_t;
198
199 /** @brief ADC16 queue configuration struct for the sequence mode. */
200 typedef struct {
201 bool seq_int_en;
202 uint8_t ch;
203 } adc16_seq_queue_config_t;
204
205 /** @brief ADC16 configuration struct for the sequence mode. */
206 typedef struct {
207 adc16_seq_queue_config_t queue[ADC_SOC_SEQ_MAX_LEN];
208 bool restart_en;
209 bool cont_en;
210 bool sw_trig_en;
211 bool hw_trig_en;
212 uint8_t seq_len;
213 } adc16_seq_config_t;
214
215 /** @brief ADC16 trigger configuration struct for the preemption mode. */
216 typedef struct {
217 bool inten[ADC_SOC_MAX_TRIG_CH_LEN];
218 uint8_t adc_ch[ADC_SOC_MAX_TRIG_CH_LEN];
219 uint8_t trig_ch;
220 uint8_t trig_len;
221 } adc16_pmt_config_t;
222
223 #ifdef __cplusplus
224 extern "C" {
225 #endif
226 /**
227 * @name Initialization and Deinitialization
228 * @{
229 */
230
231 /**
232 * @brief Get a default configuration for an ADC16 instance.
233 *
234 * @param[out] config A pointer to the configuration struct of @ref adc16_config_t.
235 *
236 */
237 void adc16_get_default_config(adc16_config_t *config);
238
239 /**
240 * @brief Get a default configuration for an ADC16 Channel.
241 *
242 * @param[out] config A pointer to the configuration struct of @ref adc16_channel_config_t.
243 */
244 void adc16_get_channel_default_config(adc16_channel_config_t *config);
245
246 /**
247 * @brief De-initialize an ADC16 instance.
248 *
249 * @param[in] ptr An ADC16 peripheral base address.
250 * @return A result of de-initializing an ADC16 instance.
251 * @retval status_success De-initialize an ADC16 instance successfully. Please refer to @ref hpm_stat_t.
252 * @retval status_invalid_argument De-initialize an ADC16 instance unsuccessfully due to passing one or more invalid arguments. Please refer to @ref hpm_stat_t.
253 */
254 hpm_stat_t adc16_deinit(ADC16_Type *ptr);
255
256 /**
257 * @brief Initialize an ADC16 instance.
258 *
259 * @param[in] ptr An ADC16 peripheral base address.
260 * @param[in] config A pointer to the configuration struct of @ref adc16_config_t.
261 * @return A result of initializing an ADC16 instance.
262 * @retval status_success Initialize an ADC16 instance successfully. Please refer to @ref hpm_stat_t.
263 * @retval status_invalid_argument Initialize an ADC16 instance unsuccessfully due to passing one or more invalid arguments. Please refer to @ref hpm_stat_t.
264 */
265 hpm_stat_t adc16_init(ADC16_Type *ptr, adc16_config_t *config);
266
267 /**
268 * @brief Initialize an ADC16 channel
269 *
270 * @param[in] ptr An ADC16 peripheral base address.
271 * @param[in] config A pointer to the configuration struct of @ref adc16_channel_config_t.
272 * @return A result of initializing an ADC16 channel.
273 * @retval status_success Initialize an ADC16 channel successfully. Please refer to @ref hpm_stat_t.
274 * @retval status_invalid_argument Initialize an ADC16 channel unsuccessfully due to passing one or more invalid arguments. Please refer to @ref hpm_stat_t.
275 */
276 hpm_stat_t adc16_init_channel(ADC16_Type *ptr, adc16_channel_config_t *config);
277
278 /**
279 * @brief Get thresholds of an ADC16 channel
280 *
281 * @param[in] ptr An ADC16 peripheral base address.
282 * @param[in] ch An ADC16 channel number
283 * @param[out] config A pointer to the structure of channel threshold
284 * @return A result of getting thresholds of an ADC16 channel .
285 * @retval status_success Initialize an ADC16 channel successfully. Please refer to @ref hpm_stat_t.
286 * @retval status_invalid_argument Initialize an ADC16 channel unsuccessfully due to passing one or more invalid arguments. Please refer to @ref hpm_stat_t.
287 */
288 hpm_stat_t adc16_get_channel_threshold(ADC16_Type *ptr, uint8_t ch, adc16_channel_threshold_t *config);
289
290 #if defined (ADC_SOC_BUSMODE_ENABLE_CTRL_SUPPORT) && ADC_SOC_BUSMODE_ENABLE_CTRL_SUPPORT
291 /**
292 * @brief Enable oneshot mode (bus mode)
293 *
294 * @param[in] ptr An ADC16 peripheral base address.
295 */
296 void adc16_enable_oneshot_mode(ADC16_Type *ptr);
297
298 /**
299 * @brief Disable oneshot mode (bus mode)
300 *
301 * @param[in] ptr An ADC16 peripheral base address.
302 */
303 void adc16_disable_oneshot_mode(ADC16_Type *ptr);
304 #endif
305
306 /**
307 * @brief Configure the the period mode for an ADC16 instance.
308 *
309 * @param[in] ptr An ADC16 peripheral base address.
310 * @param[in] config A pointer to the configuration struct of @ref adc16_prd_config_t.
311 * @return A result of configuring the the period mode for an ADC16 instance.
312 * @retval status_success Configure the the period mode successfully. Please refer to @ref hpm_stat_t.
313 * @retval status_invalid_argument Configure the the period mode unsuccessfully due to passing one or more invalid arguments. Please refer to @ref hpm_stat_t.
314 */
315 hpm_stat_t adc16_set_prd_config(ADC16_Type *ptr, adc16_prd_config_t *config);
316
317 /**
318 * @brief Configure the sequence mode for an ADC16 instance.
319 *
320 * @param[in] ptr An ADC16 peripheral base address.
321 * @param[in] config A pointer to configuration struct of @ref adc16_seq_config_t.
322 * @return A result of configuring the sequence mode for an ADC16 instance.
323 * @retval status_success Configure the sequence mode successfully. Please refer to @ref hpm_stat_t.
324 * @retval status_invalid_argument Configure the sequence mode unsuccessfully due to passing one or more invalid arguments. Please refer to @ref hpm_stat_t.
325 */
326 hpm_stat_t adc16_set_seq_config(ADC16_Type *ptr, adc16_seq_config_t *config);
327
328 /**
329 * @brief Configure the preemption mode for an ADC16 instance.
330 *
331 * @param[in] ptr An ADC16 peripheral base address.
332 * @param[in] config A pointer to configuration struct of @ref adc16_pmt_config_t.
333 * @return A result of configuring the preemption mode for an ADC16 instance.
334 * @retval status_success Configure the preemption mode successfully. Please refer to @ref hpm_stat_t.
335 * @retval status_invalid_argument Configure the preemption mode unsuccessfully due to passing one or more invalid arguments. Please refer to @ref hpm_stat_t.
336 */
337 hpm_stat_t adc16_set_pmt_config(ADC16_Type *ptr, adc16_pmt_config_t *config);
338
339 /**
340 * @brief Set the queue enable control.
341 *
342 * @param[in] ptr An ADC16 peripheral base address.
343 * @param[in] trig_ch An ADC16 peripheral trigger channel.
344 * @param[in] enable A enable control
345 * @return A result of setting queue enable in preemption
346 * @retval status_success Get the result of an ADC16 conversion in oneshot mode successfully.
347 * @retval status_invalid_argument Get the result of an ADC16 conversion in oneshot mode unsuccessfully due to passing invalid arguments.
348 */
349 hpm_stat_t adc16_set_pmt_queue_enable(ADC16_Type *ptr, uint8_t trig_ch, bool enable);
350
351 /** @} */
352
353 /**
354 * @name DMA Control
355 * @{
356 */
357
358 /**
359 * @brief Configure the stop position offset in the specified memory of DMA write operation for the sequence mode.
360 *
361 * @param[in] ptr An ADC16 peripheral base address.
362 * @param[in] stop_pos A stop position offset.
363 */
adc16_set_seq_stop_pos(ADC16_Type * ptr,uint16_t stop_pos)364 static inline void adc16_set_seq_stop_pos(ADC16_Type *ptr, uint16_t stop_pos)
365 {
366 ptr->SEQ_DMA_CFG = (ptr->SEQ_DMA_CFG & ~ADC16_SEQ_DMA_CFG_STOP_POS_MASK)
367 | ADC16_SEQ_DMA_CFG_STOP_POS_SET(stop_pos);
368 }
369
370 /**
371 * @brief Configure the start address of DMA write operation for the preemption mode.
372 *
373 * @param[in] ptr An ADC16 peripheral base address.
374 * @param[in] addr A start address of DMA write operation.
375 */
adc16_init_pmt_dma(ADC16_Type * ptr,uint32_t addr)376 static inline void adc16_init_pmt_dma(ADC16_Type *ptr, uint32_t addr)
377 {
378 ptr->TRG_DMA_ADDR = addr & ADC16_TRG_DMA_ADDR_TRG_DMA_ADDR_MASK;
379 }
380
381 /**
382 * @brief Configure the start address of DMA write operation for the sequence mode.
383 *
384 * @param[in] ptr An ADC16 peripheral base address.
385 * @param[in] config A pointer to configuration struct of @ref adc16_dma_config_t.
386 * @return An implementation result of DMA initializing for the sequence mode
387 * @retval status_success ADC16 initialize in sequence mode successfully. Please refert to @ref hpm_stat_t.
388 * @retval status_invalid_argument ADC16 initialize in sequence mode unsuccessfully due to passing invalid arguments. Please refert to @ref hpm_stat_t.
389 */
390 hpm_stat_t adc16_init_seq_dma(ADC16_Type *ptr, adc16_dma_config_t *config);
391
392 /** @} */
393
394 /**
395 * @name Status
396 * @{
397 */
398
399 /**
400 * @brief Get all ADC16 status flags.
401 *
402 * @param[in] ptr An ADC16 peripheral base address.
403 * @return A mask indicating all corresponding interrupt statuses.
404 * @retval A mask. Please refer to @ref adc16_irq_event_t.
405 */
adc16_get_status_flags(ADC16_Type * ptr)406 static inline uint32_t adc16_get_status_flags(ADC16_Type *ptr)
407 {
408 return ptr->INT_STS;
409 }
410
411 /**
412 * @brief Set value of the WAIT_DIS bit. The ADC does not block access to the associated peripheral bus
413 * until the ADC has completed its conversion.
414 *
415 * @param[in] ptr An ADC16 peripheral base address.
416 * @deprecated This API will be removed from V2.0.x
417 */
adc16_disable_busywait(ADC16_Type * ptr)418 static inline void adc16_disable_busywait(ADC16_Type *ptr)
419 {
420 ptr->BUF_CFG0 |= ADC16_BUF_CFG0_WAIT_DIS_SET(1);
421 }
422
423 /**
424 * @brief Set value of the WAIT_DIS bit. ADC blocks access to the associated peripheral bus
425 * until the ADC completes the conversion.
426 *
427 * @param[in] ptr An ADC16 peripheral base address.
428 * @deprecated This API will be removed from V2.0.x
429 */
adc16_enable_busywait(ADC16_Type * ptr)430 static inline void adc16_enable_busywait(ADC16_Type *ptr)
431 {
432 ptr->BUF_CFG0 &= ~ADC16_BUF_CFG0_WAIT_DIS_MASK;
433 }
434
435 /**
436 * @brief Set nonblocking read in oneshot mode.
437 * @note An ADC does not block access to the associated peripheral whether it completes a conversion or not.
438 *
439 * @param[in] ptr An ADC16 peripheral base address.
440 */
adc16_set_nonblocking_read(ADC16_Type * ptr)441 static inline void adc16_set_nonblocking_read(ADC16_Type *ptr)
442 {
443 ptr->BUF_CFG0 |= ADC16_BUF_CFG0_WAIT_DIS_MASK;
444 }
445
446 /**
447 * @brief Set blocking read in oneshot mode.
448 * @note An ADC blocks access to the associated peripheral bus until it completes a conversion.
449 *
450 * @param[in] ptr An ADC16 peripheral base address.
451 */
adc16_set_blocking_read(ADC16_Type * ptr)452 static inline void adc16_set_blocking_read(ADC16_Type *ptr)
453 {
454 ptr->BUF_CFG0 &= ~ADC16_BUF_CFG0_WAIT_DIS_MASK;
455 }
456
457 /**
458 * @brief Judge whether the current setting is none-blocking mode or not.
459 *
460 * @param[in] ptr An ADC16 peripheral base address.
461 * @return A result indicating the status of bus waiting.
462 * @retval True means that nonblocking reading.
463 * @retval False means that blocking reading.
464 *
465 */
adc16_is_nonblocking_mode(ADC16_Type * ptr)466 static inline bool adc16_is_nonblocking_mode(ADC16_Type *ptr)
467 {
468 return (ADC16_BUF_CFG0_WAIT_DIS_GET(ptr->BUF_CFG0) ? true : false);
469 }
470
471 /**
472 * @brief Get the status of a conversion validity.
473 *
474 * @param[in] ptr An ADC16 peripheral base address.
475 * @param[in] ch An ADC16 peripheral channel.
476 * @return Status indicating the validity of the current conversion result.
477 *
478 * @note This function is only used when the WAIT_DIS bit in the BUF_RESULT register is 1.
479 */
adc16_get_conv_valid_status(ADC16_Type * ptr,uint8_t ch)480 static inline bool adc16_get_conv_valid_status(ADC16_Type *ptr, uint8_t ch)
481 {
482 return ADC16_BUS_RESULT_VALID_GET(ptr->BUS_RESULT[ch]);
483 }
484
485 /**
486 * @brief Clear the status flags.
487 *
488 *
489 * @param[in] ptr An ADC16 peripheral base address.
490 * @param[in] mask A mask that means the specified flags to be cleared. Please refer to @ref adc16_irq_event_t.
491 *
492 * @note Only the specified flags can be cleared by writing the INT_STS register.
493 */
adc16_clear_status_flags(ADC16_Type * ptr,uint32_t mask)494 static inline void adc16_clear_status_flags(ADC16_Type *ptr, uint32_t mask)
495 {
496 ptr->INT_STS = mask;
497 }
498
499 /** @} */
500
501 /**
502 * @name Interrupts
503 * @{
504 */
505
506 /**
507 * @brief Enable interrupts.
508 *
509 * @param[in] ptr An ADC16 peripheral base address.
510 * @param[in] mask A mask indicating the specified ADC interrupt events. Please refer to @ref adc16_irq_event_t.
511 */
adc16_enable_interrupts(ADC16_Type * ptr,uint32_t mask)512 static inline void adc16_enable_interrupts(ADC16_Type *ptr, uint32_t mask)
513 {
514 ptr->INT_EN |= mask;
515 }
516
517 /**
518 * @brief Disable interrupts.
519 *
520 * @param[in] ptr An ADC16 peripheral base address.
521 * @param[in] mask A mask indicating the specified interrupt events. Please refer to @ref adc16_irq_event_t.
522 */
adc16_disable_interrupts(ADC16_Type * ptr,uint32_t mask)523 static inline void adc16_disable_interrupts(ADC16_Type *ptr, uint32_t mask)
524 {
525 ptr->INT_EN &= ~mask;
526 }
527
528 /** @} */
529
530 /**
531 * @name Trigger and Conversion
532 * @{
533 */
534
535 /**
536 * @brief Trigger ADC conversions by software in sequence mode
537 *
538 * @param[in] ptr An ADC16 peripheral base address.
539 * @return An implementation result of getting an ADC16 software trigger.
540 * @retval status_success ADC16 software triggers successfully. Please refer to @ref hpm_stat_t.
541 * @retval status_fail ADC16 software triggers unsuccessfully. Please refer to @ref hpm_stat_t.
542 */
543 hpm_stat_t adc16_trigger_seq_by_sw(ADC16_Type *ptr);
544
545 /**
546 * @brief Trigger ADC conversions by software in preemption mode
547 *
548 * @param[in] ptr An ADC16 peripheral base address.
549 * @param[in] trig_ch A trigger channel number(e.g. TRIG0A,TRIG0B,TRIG0C...).
550 * @return An implementation result of getting an ADC16 software trigger.
551 * @retval status_success ADC16 software triggers successfully. Please refer to @ref hpm_stat_t.
552 * @retval status_fail ADC16 software triggers unsuccessfully. Please refer to @ref hpm_stat_t.
553 */
554 hpm_stat_t adc16_trigger_pmt_by_sw(ADC16_Type *ptr, uint8_t trig_ch);
555
556
557 /**
558 * @brief Get the result in oneshot mode.
559 *
560 * @param[in] ptr An ADC16 peripheral base address.
561 * @param[in] ch An ADC16 peripheral channel.
562 * @param[out] result A pointer to an ADC16 conversion result.
563 * @return An implementation result of getting an ADC16 conversion result in oneshot mode.
564 * @retval status_success Get the result of an ADC16 conversion in oneshot mode successfully. Please refer to @ref hpm_stat_t.
565 * @retval status_invalid_argument Get the result of an ADC16 conversion in oneshot mode unsuccessfully due to passing invalid arguments. Please refer to @ref hpm_stat_t.
566 */
567 hpm_stat_t adc16_get_oneshot_result(ADC16_Type *ptr, uint8_t ch, uint16_t *result);
568
569 /**
570 * @brief Get the result in the period mode.
571 *
572 * @param[in] ptr An ADC16 peripheral base address.
573 * @param[in] ch An ADC16 peripheral channel.
574 * @param[out] result A pointer to a specified ADC16 conversion result
575 * @return An implementation of getting an ADC16 conversion result in the period mode.
576 * @retval status_success Get the result of an ADC16 conversion in the period mode successfully. Please refer to @ref hpm_stat_t.
577 * @retval status_invalid_argument Get the result of an ADC16 conversion in the period mode unsuccessfully due to passing invalid arguments. Please refer to @ref hpm_stat_t.
578 */
579 hpm_stat_t adc16_get_prd_result(ADC16_Type *ptr, uint8_t ch, uint16_t *result);
580
581 #if defined(ADC16_SOC_TEMP_CH_EN) && ADC16_SOC_TEMP_CH_EN
582 /**
583 * @brief Enable the temperature sensor
584 *
585 * @param[in] ptr An ADC16 peripheral base address.
586 */
587 void adc16_enable_temp_sensor(ADC16_Type *ptr);
588
589 /**
590 * @brief Disable the temperature sensor
591 *
592 * @param[in] ptr An ADC16 peripheral base address.
593 */
594 void adc16_disable_temp_sensor(ADC16_Type *ptr);
595 #endif
596
597 /**
598 * @brief enable the transmission of adc data to the motor sensor unit.
599 *
600 * @param[in] ptr An ADC16 peripheral base address.
601 */
adc16_enable_motor(ADC16_Type * ptr)602 static inline void adc16_enable_motor(ADC16_Type *ptr)
603 {
604 ptr->ANA_CTRL0 |= ADC16_ANA_CTRL0_MOTO_EN_MASK;
605 }
606
607 /** @} */
608
609 #ifdef __cplusplus
610 }
611 #endif
612
613 /** @} */
614 #endif /* HPM_ADC16_DRV_H */
615