1 /*
2 * Copyright (c) 2021 HPMicro
3 *
4 * SPDX-License-Identifier: BSD-3-Clause
5 *
6 */
7
8 #ifndef HPM_BACC_DRV_H
9 #define HPM_BACC_DRV_H
10
11 #include "hpm_common.h"
12 #include "hpm_bacc_regs.h"
13
14 /**
15 *
16 * @brief BACC driver APIs
17 * @defgroup bacc_interface BACC driver APIs
18 * @ingroup io_interfaces
19 * @{
20 */
21
22 /* @brief Timing gap ratios */
23 typedef enum {
24 bacc_ratio_0 = 0,
25 bacc_ratio_1_32768 = 1,
26 bacc_ratio_1_16384 = 2,
27 bacc_ratio_1_8192 = 3,
28 bacc_ratio_1_4096 = 4,
29 bacc_ratio_1_2048 = 5,
30 bacc_ratio_1_1024 = 6,
31 bacc_ratio_1_512 = 7,
32 bacc_ratio_1_256 = 8,
33 bacc_ratio_1_128 = 9,
34 bacc_ratio_1_64 = 10,
35 bacc_ratio_1_32 = 11,
36 bacc_ratio_1_16 = 12,
37 bacc_ratio_1_8 = 13,
38 bacc_ratio_1_4 = 14,
39 bacc_ratio_1_2 = 15,
40 } bacc_ratio_t;
41
42 #ifdef __cplusplus
43 extern "C" {
44 #endif
45
46 /*
47 * brief set timing gap after rising edge
48 *
49 * @param[in] ptr BACC base address
50 * @param[in] ratio Ratio of guard band after rising edge
51 * @param[in] offset Guard band after rising edge (16 bits)
52 */
bacc_timing_gap_post(BACC_Type * ptr,bacc_ratio_t ratio,uint16_t offset)53 static inline void bacc_timing_gap_post(BACC_Type *ptr, bacc_ratio_t ratio, uint16_t offset)
54 {
55 ptr->PRE_TIME = BACC_PRE_TIME_POST_RATIO_SET(ratio)
56 | BACC_PRE_TIME_POST_OFFSET_SET(offset);
57 }
58
59 /*
60 * brief set timing gap before rising edge
61 *
62 * @param[in] ptr BACC base address
63 * @param[in] ratio Ratio of guard band before rising edge
64 * @param[in] offset Guard band before rising edge (16 bits)
65 */
bacc_timing_gap_pre(BACC_Type * ptr,bacc_ratio_t ratio,uint16_t offset)66 static inline void bacc_timing_gap_pre(BACC_Type *ptr, bacc_ratio_t ratio, uint16_t offset)
67 {
68 ptr->PRE_TIME = BACC_PRE_TIME_PRE_RATIO_SET(ratio)
69 | BACC_PRE_TIME_PRE_OFFSET_SET(offset);
70 }
71
72 /*
73 * brief disable fast read
74 *
75 * @param[in] ptr BACC base address
76 */
bacc_disable_fast_read(BACC_Type * ptr)77 static inline void bacc_disable_fast_read(BACC_Type *ptr)
78 {
79 ptr->CONFIG &= ~BACC_CONFIG_FAST_READ_MASK;
80 }
81
82 /*
83 * brief enable fast read
84 *
85 * @param[in] ptr BACC base address
86 */
bacc_enable_fast_read(BACC_Type * ptr)87 static inline void bacc_enable_fast_read(BACC_Type *ptr)
88 {
89 ptr->CONFIG |= BACC_CONFIG_FAST_READ_MASK;
90 }
91
92 /*
93 * brief disable fast wirte
94 *
95 * @param[in] ptr BACC base address
96 */
bacc_disable_fast_write(BACC_Type * ptr)97 static inline void bacc_disable_fast_write(BACC_Type *ptr)
98 {
99 ptr->CONFIG &= ~BACC_CONFIG_FAST_WRITE_MASK;
100 }
101
102 /*
103 * brief enable fast wirte
104 *
105 * @param[in] ptr BACC base address
106 */
bacc_enable_fast_write(BACC_Type * ptr)107 static inline void bacc_enable_fast_write(BACC_Type *ptr)
108 {
109 ptr->CONFIG |= BACC_CONFIG_FAST_WRITE_MASK;
110 }
111
112 /*
113 * brief set timing of access
114 *
115 * @param[in] ptr BACC base address
116 * @param[in] timing Time in APB clock cycles (16 bits)
117 */
bacc_set_timing(BACC_Type * ptr,uint16_t timing)118 static inline void bacc_set_timing(BACC_Type *ptr, uint16_t timing)
119 {
120 ptr->CONFIG = (ptr->CONFIG & ~(BACC_CONFIG_TIMING_MASK))
121 | BACC_CONFIG_TIMING_SET(timing);
122 }
123
124 #ifdef __cplusplus
125 }
126 #endif
127
128 /**
129 * @}
130 */
131 #endif /* HPM_BACC_DRV_H */
132