1 /* 2 * Copyright (c) 2021-2023 HPMicro 3 * 4 * SPDX-License-Identifier: BSD-3-Clause 5 * 6 */ 7 #ifndef HPM_CLOCK_DRV_H 8 #define HPM_CLOCK_DRV_H 9 10 #include "hpm_common.h" 11 #include "hpm_sysctl_drv.h" 12 #include "hpm_csr_drv.h" 13 14 15 /** 16 * @brief Error codes for clock driver 17 */ 18 enum { 19 status_clk_div_invalid = MAKE_STATUS(status_group_clk, 0), 20 status_clk_src_invalid = MAKE_STATUS(status_group_clk, 1), 21 status_clk_invalid = MAKE_STATUS(status_group_clk, 2), 22 status_clk_operation_unsupported = MAKE_STATUS(status_group_clk, 3), 23 status_clk_shared_ahb = MAKE_STATUS(status_group_clk, 4), 24 status_clk_shared_axi0 = MAKE_STATUS(status_group_clk, 5), 25 status_clk_shared_axi1 = MAKE_STATUS(status_group_clk, 6), 26 status_clk_shared_axi2 = MAKE_STATUS(status_group_clk, 7), 27 status_clk_shared_cpu0 = MAKE_STATUS(status_group_clk, 8), 28 status_clk_shared_cpu1 = MAKE_STATUS(status_group_clk, 9), 29 status_clk_fixed = MAKE_STATUS(status_group_clk, 10), 30 }; 31 32 /** 33 * @brief Clock source group definitions 34 */ 35 #define CLK_SRC_GROUP_COMMON (0U) 36 #define CLK_SRC_GROUP_ADC (1U) 37 #define CLK_SRC_GROUP_WDG (3U) 38 #define CLK_SRC_GROUP_PMIC (4U) 39 #define CLK_SRC_GROUP_AHB (5U) 40 #define CLK_SRC_GROUP_DAC (7U) 41 #define CLK_SRC_GROUP_CPU0 (9U) 42 #define CLK_SRC_GROUP_SRC (10U) 43 #define CLK_SRC_GROUP_PWDG (11U) 44 #define CLK_SRC_GROUP_INVALID (15U) 45 46 #define MAKE_CLK_SRC(src_grp, index) (((uint8_t)(src_grp)<<4) | (index)) 47 #define GET_CLK_SRC_GROUP(src) (((uint8_t)(src)>>4) & 0x0FU) 48 #define GET_CLK_SRC_INDEX(src) ((uint8_t)(src) & 0x0FU) 49 50 #define GET_CLOCK_SOURCE_FROM_CLK_SRC(clk_src) (clock_source_t)((uint32_t)(clk_src) & 0xFU) 51 52 /** 53 * @brief Clock source definitions 54 */ 55 typedef enum _clock_sources { 56 clk_src_osc24m = MAKE_CLK_SRC(CLK_SRC_GROUP_COMMON, 0), 57 clk_src_pll0_clk0 = MAKE_CLK_SRC(CLK_SRC_GROUP_COMMON, 1), 58 clk_src_pll0_clk1 = MAKE_CLK_SRC(CLK_SRC_GROUP_COMMON, 2), 59 clk_src_pll0_clk2 = MAKE_CLK_SRC(CLK_SRC_GROUP_COMMON, 3), 60 clk_src_pll1_clk0 = MAKE_CLK_SRC(CLK_SRC_GROUP_COMMON, 4), 61 clk_src_pll1_clk1 = MAKE_CLK_SRC(CLK_SRC_GROUP_COMMON, 5), 62 clk_src_pll1_clk2 = MAKE_CLK_SRC(CLK_SRC_GROUP_COMMON, 6), 63 clk_src_pll1_clk3 = MAKE_CLK_SRC(CLK_SRC_GROUP_COMMON, 7), 64 clk_src_osc32k = MAKE_CLK_SRC(CLK_SRC_GROUP_COMMON, 8), 65 66 clk_adc_src_ahb0 = MAKE_CLK_SRC(CLK_SRC_GROUP_ADC, 0), 67 clk_adc_src_ana0 = MAKE_CLK_SRC(CLK_SRC_GROUP_ADC, 1), 68 clk_adc_src_ana1 = MAKE_CLK_SRC(CLK_SRC_GROUP_ADC, 1), 69 70 clk_dac_src_ahb0 = MAKE_CLK_SRC(CLK_SRC_GROUP_DAC, 0), 71 clk_dac_src_ana2 = MAKE_CLK_SRC(CLK_SRC_GROUP_DAC, 1), 72 clk_dac_src_ana3 = MAKE_CLK_SRC(CLK_SRC_GROUP_DAC, 1), 73 74 clk_wdg_src_ahb0 = MAKE_CLK_SRC(CLK_SRC_GROUP_WDG, 0), 75 clk_wdg_src_osc32k = MAKE_CLK_SRC(CLK_SRC_GROUP_WDG, 1), 76 77 clk_pwdg_src_osc24m = MAKE_CLK_SRC(CLK_SRC_GROUP_PWDG, 0), 78 clk_pwdg_src_osc32k = MAKE_CLK_SRC(CLK_SRC_GROUP_PWDG, 1), 79 80 clk_src_invalid = MAKE_CLK_SRC(CLK_SRC_GROUP_INVALID, 15), 81 } clk_src_t; 82 83 84 #define RESOURCE_INVALID (0xFFFFU) 85 #define RESOURCE_SHARED_CPU0 (0xFFFDU) 86 87 /* Clock NAME related Macros */ 88 #define MAKE_CLOCK_NAME(resource, src_type, node) (((uint32_t)(resource) << 16) | ((uint32_t)(src_type) << 8) | ((uint32_t)(node))) 89 #define GET_CLK_SRC_GROUP_FROM_NAME(name) (((uint32_t)(name) >> 8) & 0xFFUL) 90 #define GET_CLK_NODE_FROM_NAME(name) ((uint32_t)(name) & 0xFFUL) 91 #define GET_CLK_RESOURCE_FROM_NAME(name) ((uint32_t)(name) >> 16) 92 93 /** 94 * @brief Peripheral Clock Type Description 95 */ 96 typedef enum _clock_name { 97 clock_cpu0 = MAKE_CLOCK_NAME(sysctl_resource_cpu0, CLK_SRC_GROUP_CPU0, clock_node_cpu0), 98 99 clock_mchtmr0 = MAKE_CLOCK_NAME(sysctl_resource_mchtmr0, CLK_SRC_GROUP_COMMON, clock_node_mchtmr0), 100 clock_can0 = MAKE_CLOCK_NAME(sysctl_resource_can0, CLK_SRC_GROUP_COMMON, clock_node_can0), 101 clock_can1 = MAKE_CLOCK_NAME(sysctl_resource_can1, CLK_SRC_GROUP_COMMON, clock_node_can1), 102 clock_can2 = MAKE_CLOCK_NAME(sysctl_resource_can2, CLK_SRC_GROUP_COMMON, clock_node_can2), 103 clock_can3 = MAKE_CLOCK_NAME(sysctl_resource_can3, CLK_SRC_GROUP_COMMON, clock_node_can3), 104 clock_lin0 = MAKE_CLOCK_NAME(sysctl_resource_lin0, CLK_SRC_GROUP_COMMON, clock_node_lin0), 105 clock_lin1 = MAKE_CLOCK_NAME(sysctl_resource_lin1, CLK_SRC_GROUP_COMMON, clock_node_lin1), 106 clock_lin2 = MAKE_CLOCK_NAME(sysctl_resource_lin2, CLK_SRC_GROUP_COMMON, clock_node_lin2), 107 clock_lin3 = MAKE_CLOCK_NAME(sysctl_resource_lin3, CLK_SRC_GROUP_COMMON, clock_node_lin3), 108 clock_gptmr0 = MAKE_CLOCK_NAME(sysctl_resource_gptmr0, CLK_SRC_GROUP_COMMON, clock_node_gptmr0), 109 clock_gptmr1 = MAKE_CLOCK_NAME(sysctl_resource_gptmr1, CLK_SRC_GROUP_COMMON, clock_node_gptmr1), 110 clock_gptmr2 = MAKE_CLOCK_NAME(sysctl_resource_gptmr2, CLK_SRC_GROUP_COMMON, clock_node_gptmr2), 111 clock_gptmr3 = MAKE_CLOCK_NAME(sysctl_resource_gptmr3, CLK_SRC_GROUP_COMMON, clock_node_gptmr3), 112 clock_i2c0 = MAKE_CLOCK_NAME(sysctl_resource_i2c0, CLK_SRC_GROUP_COMMON, clock_node_i2c0), 113 clock_i2c1 = MAKE_CLOCK_NAME(sysctl_resource_i2c1, CLK_SRC_GROUP_COMMON, clock_node_i2c1), 114 clock_i2c2 = MAKE_CLOCK_NAME(sysctl_resource_i2c2, CLK_SRC_GROUP_COMMON, clock_node_i2c2), 115 clock_i2c3 = MAKE_CLOCK_NAME(sysctl_resource_i2c3, CLK_SRC_GROUP_COMMON, clock_node_i2c3), 116 clock_spi0 = MAKE_CLOCK_NAME(sysctl_resource_spi0, CLK_SRC_GROUP_COMMON, clock_node_spi0), 117 clock_spi1 = MAKE_CLOCK_NAME(sysctl_resource_spi1, CLK_SRC_GROUP_COMMON, clock_node_spi1), 118 clock_spi2 = MAKE_CLOCK_NAME(sysctl_resource_spi2, CLK_SRC_GROUP_COMMON, clock_node_spi2), 119 clock_spi3 = MAKE_CLOCK_NAME(sysctl_resource_spi3, CLK_SRC_GROUP_COMMON, clock_node_spi3), 120 clock_uart0 = MAKE_CLOCK_NAME(sysctl_resource_uart0, CLK_SRC_GROUP_COMMON, clock_node_uart0), 121 clock_uart1 = MAKE_CLOCK_NAME(sysctl_resource_uart1, CLK_SRC_GROUP_COMMON, clock_node_uart1), 122 clock_uart2 = MAKE_CLOCK_NAME(sysctl_resource_uart2, CLK_SRC_GROUP_COMMON, clock_node_uart2), 123 clock_uart3 = MAKE_CLOCK_NAME(sysctl_resource_uart3, CLK_SRC_GROUP_COMMON, clock_node_uart3), 124 clock_uart4 = MAKE_CLOCK_NAME(sysctl_resource_uart4, CLK_SRC_GROUP_COMMON, clock_node_uart4), 125 clock_uart5 = MAKE_CLOCK_NAME(sysctl_resource_uart5, CLK_SRC_GROUP_COMMON, clock_node_uart5), 126 clock_uart6 = MAKE_CLOCK_NAME(sysctl_resource_uart6, CLK_SRC_GROUP_COMMON, clock_node_uart6), 127 clock_uart7 = MAKE_CLOCK_NAME(sysctl_resource_uart7, CLK_SRC_GROUP_COMMON, clock_node_uart7), 128 clock_xpi0 = MAKE_CLOCK_NAME(sysctl_resource_xpi0, CLK_SRC_GROUP_COMMON, clock_node_xpi0), 129 clock_ref0 = MAKE_CLOCK_NAME(sysctl_resource_ref0, CLK_SRC_GROUP_COMMON, clock_node_ref0), 130 clock_ref1 = MAKE_CLOCK_NAME(sysctl_resource_ref1, CLK_SRC_GROUP_COMMON, clock_node_ref0), 131 132 clock_ahb = MAKE_CLOCK_NAME(RESOURCE_SHARED_CPU0, CLK_SRC_GROUP_AHB, clock_node_ahb), 133 134 clock_watchdog0 = MAKE_CLOCK_NAME(sysctl_resource_wdg0, CLK_SRC_GROUP_WDG, 0), 135 clock_watchdog1 = MAKE_CLOCK_NAME(sysctl_resource_wdg1, CLK_SRC_GROUP_WDG, 1), 136 clock_pwdg = MAKE_CLOCK_NAME(RESOURCE_INVALID, CLK_SRC_GROUP_PWDG, 0), 137 138 clock_lmm0 = MAKE_CLOCK_NAME(sysctl_resource_lmm0, CLK_SRC_GROUP_CPU0, 0), 139 140 clock_mbx0 = MAKE_CLOCK_NAME(sysctl_resource_mbx0, CLK_SRC_GROUP_AHB, 0), 141 clock_crc0 = MAKE_CLOCK_NAME(sysctl_resource_crc0, CLK_SRC_GROUP_AHB, 1), 142 clock_acmp = MAKE_CLOCK_NAME(sysctl_resource_acmp, CLK_SRC_GROUP_AHB, 2), 143 clock_opa0 = MAKE_CLOCK_NAME(sysctl_resource_opa0, CLK_SRC_GROUP_AHB, 3), 144 clock_opa1 = MAKE_CLOCK_NAME(sysctl_resource_opa1, CLK_SRC_GROUP_AHB, 4), 145 clock_mot0 = MAKE_CLOCK_NAME(sysctl_resource_mot0, CLK_SRC_GROUP_AHB, 5), 146 clock_rng = MAKE_CLOCK_NAME(sysctl_resource_rng0, CLK_SRC_GROUP_AHB, 6), 147 clock_sdp = MAKE_CLOCK_NAME(sysctl_resource_sdp0, CLK_SRC_GROUP_AHB, 7), 148 clock_kman = MAKE_CLOCK_NAME(sysctl_resource_kman, CLK_SRC_GROUP_AHB, 8), 149 clock_gpio = MAKE_CLOCK_NAME(sysctl_resource_gpio, CLK_SRC_GROUP_AHB, 9), 150 clock_hdma = MAKE_CLOCK_NAME(sysctl_resource_hdma, CLK_SRC_GROUP_AHB, 10), 151 clock_rom = MAKE_CLOCK_NAME(sysctl_resource_rom0, CLK_SRC_GROUP_AHB, 11), 152 clock_tsns = MAKE_CLOCK_NAME(sysctl_resource_tsns, CLK_SRC_GROUP_AHB, 12), 153 clock_usb0 = MAKE_CLOCK_NAME(sysctl_resource_usb0, CLK_SRC_GROUP_AHB, 13), 154 clock_ptpc = MAKE_CLOCK_NAME(sysctl_resource_ptpc, CLK_SRC_GROUP_AHB, 14), 155 156 clock_ptmr = MAKE_CLOCK_NAME(RESOURCE_INVALID, CLK_SRC_GROUP_PMIC, 0), 157 clock_puart = MAKE_CLOCK_NAME(RESOURCE_INVALID, CLK_SRC_GROUP_PMIC, 1), 158 clock_pgpio = MAKE_CLOCK_NAME(RESOURCE_INVALID, CLK_SRC_GROUP_PMIC, 2), 159 160 /* For ADC, there are 2-stage clock source and divider configurations */ 161 clock_ana0 = MAKE_CLOCK_NAME(RESOURCE_INVALID, CLK_SRC_GROUP_COMMON, clock_node_ana0), 162 clock_ana1 = MAKE_CLOCK_NAME(RESOURCE_INVALID, CLK_SRC_GROUP_COMMON, clock_node_ana1), 163 clock_adc0 = MAKE_CLOCK_NAME(sysctl_resource_adc0, CLK_SRC_GROUP_ADC, 0), 164 clock_adc1 = MAKE_CLOCK_NAME(sysctl_resource_adc1, CLK_SRC_GROUP_ADC, 1), 165 166 /* For DAC, there are 2-stage clock source and divider configurations */ 167 clock_ana2 = MAKE_CLOCK_NAME(RESOURCE_INVALID, CLK_SRC_GROUP_COMMON, clock_node_ana2), 168 clock_ana3 = MAKE_CLOCK_NAME(RESOURCE_INVALID, CLK_SRC_GROUP_COMMON, clock_node_ana3), 169 clock_dac0 = MAKE_CLOCK_NAME(sysctl_resource_dac0, CLK_SRC_GROUP_DAC, 0), 170 clock_dac1 = MAKE_CLOCK_NAME(sysctl_resource_dac1, CLK_SRC_GROUP_DAC, 1), 171 172 /* Clock sources */ 173 clk_osc0clk0 = MAKE_CLOCK_NAME(RESOURCE_INVALID, CLK_SRC_GROUP_SRC, 0), 174 clk_pll0clk0 = MAKE_CLOCK_NAME(RESOURCE_INVALID, CLK_SRC_GROUP_SRC, 1), 175 clk_pll0clk1 = MAKE_CLOCK_NAME(RESOURCE_INVALID, CLK_SRC_GROUP_SRC, 2), 176 clk_pll0clk2 = MAKE_CLOCK_NAME(RESOURCE_INVALID, CLK_SRC_GROUP_SRC, 3), 177 clk_pll1clk0 = MAKE_CLOCK_NAME(RESOURCE_INVALID, CLK_SRC_GROUP_SRC, 4), 178 clk_pll1clk1 = MAKE_CLOCK_NAME(RESOURCE_INVALID, CLK_SRC_GROUP_SRC, 5), 179 clk_pll1clk2 = MAKE_CLOCK_NAME(RESOURCE_INVALID, CLK_SRC_GROUP_SRC, 6), 180 clk_pll1clk3 = MAKE_CLOCK_NAME(RESOURCE_INVALID, CLK_SRC_GROUP_SRC, 7), 181 } clock_name_t; 182 183 extern uint32_t hpm_core_clock; 184 185 #ifdef __cplusplus 186 extern "C" { 187 #endif 188 189 /** 190 * @brief Get specified IP frequency 191 * @param[in] clock_name IP clock name 192 * 193 * @return IP clock frequency in Hz 194 */ 195 uint32_t clock_get_frequency(clock_name_t clock_name); 196 197 /** 198 * @brief Get Clock frequency for selected clock source 199 * @param [in] source clock source 200 * @return clock frequency for selected clock source 201 */ 202 uint32_t get_frequency_for_source(clock_source_t source); 203 204 /** 205 * @brief Get the IP clock source 206 * Note: This API return the direct clock source 207 * @param [in] clock_name clock name 208 * @return IP clock source 209 */ 210 clk_src_t clock_get_source(clock_name_t clock_name); 211 212 /** 213 * @brief Set ADC clock source 214 * @param[in] clock_name ADC clock name 215 * @param[in] src ADC clock source 216 * 217 * @return #status_success Setting ADC clock source is successful 218 * #status_clk_invalid Invalid ADC clock 219 * #status_clk_src_invalid Invalid ADC clock source 220 */ 221 hpm_stat_t clock_set_adc_source(clock_name_t clock_name, clk_src_t src); 222 223 /** 224 * @brief Set DAC clock source 225 * @param[in] clock_name DAC clock name 226 * @param[in] src DAC clock source 227 * 228 * @return #status_success Setting DAC clock source is successful 229 * #status_clk_invalid Invalid DAC clock 230 * #status_clk_src_invalid Invalid DAC clock source 231 */ 232 hpm_stat_t clock_set_dac_source(clock_name_t clock_name, clk_src_t src); 233 234 /** 235 * @brief Set the IP clock source and divider 236 * @param[in] clock_name clock name 237 * @param[in] src clock source 238 * @param[in] div clock divider, valid range (1 - 256) 239 * 240 * @return #status_success Setting Clock source and divider is successful. 241 * #status_clk_src_invalid clock source is invalid. 242 * #status_clk_fixed clock source and divider is a fixed value 243 * #status_clk_shared_ahb Clock is shared with the AHB clock 244 * #status_clk_shared_axi0 Clock is shared with the AXI0 clock 245 * #status_clk_shared_axi1 CLock is shared with the AXI1 clock 246 * #status_clk_shared_axi2 Clock is shared with the AXI2 clock 247 * #status_clk_shared_cpu0 Clock is shared with the CPU0 clock 248 * #status_clk_shared_cpu1 Clock is shared with the CPU1 clock 249 */ 250 hpm_stat_t clock_set_source_divider(clock_name_t clock_name, clk_src_t src, uint32_t div); 251 252 /** 253 * @brief Enable IP clock 254 * @param[in] clock_name IP clock name 255 */ 256 void clock_enable(clock_name_t clock_name); 257 258 /** 259 * @brief Disable IP clock 260 * @param[in] clock_name IP clock name 261 */ 262 void clock_disable(clock_name_t clock_name); 263 264 /** 265 * @brief Add IP to specified group 266 * @param[in] clock_name IP clock name 267 * @param[in] group resource group index, valid value: 0/1/2/3 268 */ 269 void clock_add_to_group(clock_name_t clock_name, uint32_t group); 270 271 /** 272 * @brief Remove IP from specified group 273 * @param[in] clock_name IP clock name 274 * @param[in] group resource group index, valid value: 0/1/2/3 275 */ 276 void clock_remove_from_group(clock_name_t clock_name, uint32_t group); 277 278 /** 279 * @brief Check IP in specified group 280 * @param[in] clock_name IP clock name 281 * @return true if in group, false if not in group 282 */ 283 bool clock_check_in_group(clock_name_t clock_name, uint32_t group); 284 285 /** 286 * @brief Disconnect the clock group from specified CPU 287 * @param[in] group clock group index, value value is 0/1/2/3 288 * @param[in] cpu CPU index, valid value is 0/1 289 */ 290 void clock_connect_group_to_cpu(uint32_t group, uint32_t cpu); 291 292 /** 293 * @brief Disconnect the clock group from specified CPU 294 * @param[in] group clock group index, value value is 0/1/2/3 295 * @param[in] cpu CPU index, valid value is 0/1 296 */ 297 void clock_disconnect_group_from_cpu(uint32_t group, uint32_t cpu); 298 299 /** 300 * @brief Delay specified microseconds 301 * 302 * @param [in] us expected delay interval in microseconds 303 */ 304 void clock_cpu_delay_us(uint32_t us); 305 306 /** 307 * @brief Delay specified milliseconds 308 * 309 * @param [in] ms expected delay interval in milliseconds 310 */ 311 void clock_cpu_delay_ms(uint32_t ms); 312 313 /** 314 * @brief Update the Core clock frequency 315 */ 316 void clock_update_core_clock(void); 317 318 319 #ifdef __cplusplus 320 } 321 #endif 322 323 #endif /* HPM_CLOCK_DRV_H */ 324