1/* 2 * Copyright (c) 2023 HPMicro 3 * SPDX-License-Identifier: BSD-3-Clause 4 */ 5 6ENTRY(_start) 7 8STACK_SIZE = _stack_size; 9HEAP_SIZE = _heap_size; 10 11MEMORY 12{ 13 ILM (wx) : ORIGIN = 0x00000000, LENGTH = 128K 14 DLM (w) : ORIGIN = 0x00080000, LENGTH = 128K 15 AXI_SRAM_NONCACHEABLE (wx) : ORIGIN = 0x01080000, LENGTH = 128K 16 AXI_SRAM (wx) : ORIGIN = 0x010A0000, LENGTH = 112K 17 SHARE_RAM (w) : ORIGIN = 0x010BC000, LENGTH = 16K 18 AHB_SRAM (w) : ORIGIN = 0xF0300000, LENGTH = 32k 19} 20 21SECTIONS 22{ 23 .start : { 24 . = ALIGN(8); 25 KEEP(*(.start)) 26 } > ILM 27 28 .vectors : { 29 . = ALIGN(8); 30 KEEP(*(.isr_vector)) 31 KEEP(*(.vector_table)) 32 KEEP(*(.isr_s_vector)) 33 KEEP(*(.vector_s_table)) 34 . = ALIGN(8); 35 } > ILM 36 37 .rel : { 38 KEEP(*(.rel*)) 39 } > ILM 40 41 .text : { 42 . = ALIGN(8); 43 *(.text) 44 *(.text*) 45 *(.rodata) 46 *(.rodata*) 47 *(.srodata) 48 *(.srodata*) 49 50 *(.hash) 51 *(.dyn*) 52 *(.gnu*) 53 *(.pl*) 54 55 KEEP(*(.eh_frame)) 56 *(.eh_frame*) 57 58 KEEP (*(.init)) 59 KEEP (*(.fini)) 60 61 /* section information for usbh class */ 62 . = ALIGN(8); 63 __usbh_class_info_start__ = .; 64 KEEP(*(.usbh_class_info)) 65 __usbh_class_info_end__ = .; 66 67 /* RT-Thread related sections - Start */ 68 /* section information for finsh shell */ 69 . = ALIGN(4); 70 __fsymtab_start = .; 71 KEEP(*(FSymTab)) 72 __fsymtab_end = .; 73 . = ALIGN(4); 74 __vsymtab_start = .; 75 KEEP(*(VSymTab)) 76 __vsymtab_end = .; 77 . = ALIGN(4); 78 79 . = ALIGN(4); 80 __rt_init_start = .; 81 KEEP(*(SORT(.rti_fn*))) 82 __rt_init_end = .; 83 . = ALIGN(4); 84 85 /* section information for modules */ 86 . = ALIGN(4); 87 __rtmsymtab_start = .; 88 KEEP(*(RTMSymTab)) 89 __rtmsymtab_end = .; 90 91 /* RT-Thread related sections - end */ 92 93 . = ALIGN(8); 94 PROVIDE (__etext = .); 95 PROVIDE (_etext = .); 96 PROVIDE (etext = .); 97 } > ILM 98 99 __data_load_addr__ = etext; 100 .data : AT(__data_load_addr__) { 101 . = ALIGN(8); 102 __data_start__ = .; 103 __global_pointer$ = . + 0x800; 104 *(.data) 105 *(.data*) 106 *(.sdata) 107 *(.sdata*) 108 109 KEEP(*(.jcr)) 110 KEEP(*(.dynamic)) 111 KEEP(*(.got*)) 112 KEEP(*(.got)) 113 KEEP(*(.gcc_except_table)) 114 KEEP(*(.gcc_except_table.*)) 115 116 . = ALIGN(8); 117 PROVIDE(__preinit_array_start = .); 118 KEEP(*(.preinit_array)) 119 PROVIDE(__preinit_array_end = .); 120 121 . = ALIGN(8); 122 PROVIDE(__init_array_start = .); 123 KEEP(*(SORT_BY_INIT_PRIORITY(.init_array.*))) 124 KEEP(*(.init_array)) 125 PROVIDE(__init_array_end = .); 126 127 . = ALIGN(8); 128 PROVIDE(__finit_array_start = .); 129 KEEP(*(SORT_BY_INIT_PRIORITY(.finit_array.*))) 130 KEEP(*(.finit_array)) 131 PROVIDE(__finit_array_end = .); 132 133 . = ALIGN(8); 134 KEEP(*crtbegin*.o(.ctors)) 135 KEEP(*(EXCLUDE_FILE (*crtend*.o) .ctors)) 136 KEEP(*(SORT(.ctors.*))) 137 KEEP(*(.ctors)) 138 139 . = ALIGN(8); 140 KEEP(*crtbegin*.o(.dtors)) 141 KEEP(*(EXCLUDE_FILE (*crtend*.o) .dtors)) 142 KEEP(*(SORT(.dtors.*))) 143 KEEP(*(.dtors)) 144 145 . = ALIGN(8); 146 __data_end__ = .; 147 PROVIDE (__edata = .); 148 PROVIDE (_edata = .); 149 PROVIDE (edata = .); 150 } > AXI_SRAM 151 152 __fast_load_addr__ = etext + SIZEOF(.data); 153 .fast : AT(__fast_load_addr__) { 154 . = ALIGN(8); 155 PROVIDE(__ramfunc_start__ = .); 156 *(.fast) 157 *(.fast.*) 158 . = ALIGN(8); 159 PROVIDE(__ramfunc_end__ = .); 160 } > ILM 161 162 .bss (NOLOAD) : { 163 . = ALIGN(8); 164 __bss_start__ = .; 165 *(.bss) 166 *(.bss*) 167 *(.sbss*) 168 *(.scommon) 169 *(.scommon*) 170 *(.dynsbss*) 171 *(COMMON) 172 . = ALIGN(8); 173 _end = .; 174 __bss_end__ = .; 175 } > AXI_SRAM 176 177 .tbss (NOLOAD) : { 178 . = ALIGN(8); 179 PROVIDE(__tbss_start__ = .); 180 __thread_pointer$ = .; 181 *(.tbss) 182 *(.tbss.*) 183 *(.gnu.linkonce.tb.*) 184 *(.tcommon) 185 . = ALIGN(8); 186 PROVIDE(__tbss_end__ = .); 187 } > AXI_SRAM 188 189 __tdata_load_addr__ = etext + SIZEOF(.data) + SIZEOF(.fast); 190 .tdata : AT(__tdata_load_addr__) { 191 . = ALIGN(8); 192 PROVIDE(__tdata_start__ = .); 193 *(.tdata) 194 *(.tdata.*) 195 *(.gnu.linkonce.td.*) 196 . = ALIGN(8); 197 PROVIDE(__tdata_end__ = .); 198 } > AXI_SRAM 199 200 .framebuffer (NOLOAD) : { 201 . = ALIGN(8); 202 KEEP(*(.framebuffer)) 203 . = ALIGN(8); 204 } > AXI_SRAM 205 206 __noncacheable_init_load_addr__ = etext + SIZEOF(.data) + SIZEOF(.fast) + SIZEOF(.tdata); 207 .noncacheable.init : AT(__noncacheable_init_load_addr__) { 208 . = ALIGN(8); 209 __noncacheable_init_start__ = .; 210 KEEP(*(.noncacheable.init)) 211 __noncacheable_init_end__ = .; 212 . = ALIGN(8); 213 } > AXI_SRAM_NONCACHEABLE 214 215 .noncacheable.bss (NOLOAD) : { 216 . = ALIGN(8); 217 KEEP(*(.noncacheable)) 218 __noncacheable_bss_start__ = .; 219 KEEP(*(.noncacheable.bss)) 220 __noncacheable_bss_end__ = .; 221 . = ALIGN(8); 222 } > AXI_SRAM_NONCACHEABLE 223 224 .ahb_sram (NOLOAD) : { 225 KEEP(*(.ahb_sram)) 226 } > AHB_SRAM 227 228 .sh_mem (NOLOAD) : { 229 KEEP(*(.sh_mem)) 230 } > SHARE_RAM 231 232 .fast_ram (NOLOAD) : { 233 KEEP(*(.fast_ram)) 234 } > DLM 235 236 .heap (NOLOAD) : { 237 . = ALIGN(8); 238 __heap_start__ = .; 239 . += HEAP_SIZE; 240 __heap_end__ = .; 241 } > DLM 242 243 .stack (NOLOAD) : { 244 . = ALIGN(8); 245 __stack_base__ = .; 246 . += STACK_SIZE; 247 . = ALIGN(8); 248 PROVIDE (_stack = .); 249 PROVIDE (_stack_safe = .); 250 } > DLM 251 252 __noncacheable_start__ = ORIGIN(AXI_SRAM_NONCACHEABLE); 253 __noncacheable_end__ = ORIGIN(AXI_SRAM_NONCACHEABLE) + LENGTH(AXI_SRAM_NONCACHEABLE); 254 __share_mem_start__ = ORIGIN(SHARE_RAM); 255 __share_mem_end__ = ORIGIN(SHARE_RAM) + LENGTH(SHARE_RAM); 256 257 __fw_size__ = SIZEOF(.start) + SIZEOF(.vectors) + SIZEOF(.rel) + SIZEOF(.text) + SIZEOF(.data) + SIZEOF(.fast) + SIZEOF(.tdata) + SIZEOF(.noncacheable.init); 258 ASSERT(__fw_size__ <= LENGTH(ILM), "****** FAILED! ILM has not enough space! ******") 259} 260