1/* 2 * Copyright (c) 2022-2023 HPMicro 3 * SPDX-License-Identifier: BSD-3-Clause 4 */ 5 6ENTRY(_start) 7 8STACK_SIZE = _stack_size; 9HEAP_SIZE = _heap_size; 10UF2_BOOTLOADER_RESERVED_LENGTH = DEFINED(_uf2_bl_length) ? _uf2_bl_length : 0x20000; 11 12MEMORY 13{ 14 XPI0 (rx) : ORIGIN = 0x80000000 + UF2_BOOTLOADER_RESERVED_LENGTH, LENGTH = _flash_size - UF2_BOOTLOADER_RESERVED_LENGTH 15 ILM (wx) : ORIGIN = 0x00000000, LENGTH = 128K 16 DLM (w) : ORIGIN = 0x00080000, LENGTH = 128K 17 AXI_SRAM (wx) : ORIGIN = 0x01080000, LENGTH = 256K 18 AXI_SRAM_NONCACHEABLE (wx) : ORIGIN = 0x010C0000, LENGTH = 256K 19 AHB_SRAM (w) : ORIGIN = 0xF0300000, LENGTH = 32k 20} 21 22SECTIONS 23{ 24 .start : { 25 KEEP(*(.uf2_signature)) 26 KEEP(*(.start)) 27 } > XPI0 28 29 __vector_load_addr__ = ADDR(.start) + SIZEOF(.start); 30 .vectors ORIGIN(ILM) : AT(__vector_load_addr__) { 31 . = ALIGN(8); 32 __vector_ram_start__ = .; 33 KEEP(*(.vector_table)) 34 KEEP(*(.isr_vector)) 35 KEEP(*(.vector_s_table)) 36 KEEP(*(.isr_s_vector)) 37 . = ALIGN(8); 38 __vector_ram_end__ = .; 39 } > ILM 40 41 .text (__vector_load_addr__ + SIZEOF(.vectors)): { 42 . = ALIGN(8); 43 *(.text) 44 *(.text*) 45 *(.rodata) 46 *(.rodata*) 47 *(.srodata) 48 *(.srodata*) 49 50 *(.hash) 51 *(.dyn*) 52 *(.gnu*) 53 *(.pl*) 54 55 KEEP(*(.eh_frame)) 56 *(.eh_frame*) 57 58 KEEP (*(.init)) 59 KEEP (*(.fini)) 60 61 /* section information for usbh class */ 62 . = ALIGN(8); 63 __usbh_class_info_start__ = .; 64 KEEP(*(.usbh_class_info)) 65 __usbh_class_info_end__ = .; 66 67 /* RT-Thread related sections - Start */ 68 /* section information for finsh shell */ 69 . = ALIGN(4); 70 __fsymtab_start = .; 71 KEEP(*(FSymTab)) 72 __fsymtab_end = .; 73 . = ALIGN(4); 74 __vsymtab_start = .; 75 KEEP(*(VSymTab)) 76 __vsymtab_end = .; 77 . = ALIGN(4); 78 79 . = ALIGN(4); 80 __rt_init_start = .; 81 KEEP(*(SORT(.rti_fn*))) 82 __rt_init_end = .; 83 . = ALIGN(4); 84 85 /* section information for modules */ 86 . = ALIGN(4); 87 __rtmsymtab_start = .; 88 KEEP(*(RTMSymTab)) 89 __rtmsymtab_end = .; 90 91 /* RT-Thread related sections - end */ 92 . = ALIGN(8); 93 } > XPI0 94 95 .rel : { 96 KEEP(*(.rel*)) 97 } > XPI0 98 99 PROVIDE (__etext = .); 100 PROVIDE (_etext = .); 101 PROVIDE (etext = .); 102 103 __data_load_addr__ = etext; 104 .data : AT(__data_load_addr__) { 105 . = ALIGN(8); 106 __data_start__ = .; 107 __global_pointer$ = . + 0x800; 108 *(.data) 109 *(.data*) 110 *(.sdata) 111 *(.sdata*) 112 113 KEEP(*(.jcr)) 114 KEEP(*(.dynamic)) 115 KEEP(*(.got*)) 116 KEEP(*(.got)) 117 KEEP(*(.gcc_except_table)) 118 KEEP(*(.gcc_except_table.*)) 119 120 . = ALIGN(8); 121 PROVIDE(__preinit_array_start = .); 122 KEEP(*(.preinit_array)) 123 PROVIDE(__preinit_array_end = .); 124 125 . = ALIGN(8); 126 PROVIDE(__init_array_start = .); 127 KEEP(*(SORT_BY_INIT_PRIORITY(.init_array.*))) 128 KEEP(*(.init_array)) 129 PROVIDE(__init_array_end = .); 130 131 . = ALIGN(8); 132 PROVIDE(__finit_array_start = .); 133 KEEP(*(SORT_BY_INIT_PRIORITY(.finit_array.*))) 134 KEEP(*(.finit_array)) 135 PROVIDE(__finit_array_end = .); 136 137 . = ALIGN(8); 138 KEEP(*crtbegin*.o(.ctors)) 139 KEEP(*(EXCLUDE_FILE (*crtend*.o) .ctors)) 140 KEEP(*(SORT(.ctors.*))) 141 KEEP(*(.ctors)) 142 143 . = ALIGN(8); 144 KEEP(*crtbegin*.o(.dtors)) 145 KEEP(*(EXCLUDE_FILE (*crtend*.o) .dtors)) 146 KEEP(*(SORT(.dtors.*))) 147 KEEP(*(.dtors)) 148 . = ALIGN(8); 149 __data_end__ = .; 150 PROVIDE (__edata = .); 151 PROVIDE (_edata = .); 152 PROVIDE (edata = .); 153 } > AXI_SRAM 154 155 __fast_load_addr__ = etext + SIZEOF(.data); 156 .fast : AT(__fast_load_addr__) { 157 . = ALIGN(8); 158 PROVIDE(__ramfunc_start__ = .); 159 *(.fast) 160 *(.fast.*) 161 . = ALIGN(8); 162 PROVIDE(__ramfunc_end__ = .); 163 } > ILM 164 165 .bss (NOLOAD) : { 166 . = ALIGN(8); 167 __bss_start__ = .; 168 *(.bss) 169 *(.bss*) 170 *(.sbss*) 171 *(.scommon) 172 *(.scommon*) 173 *(.dynsbss*) 174 *(COMMON) 175 . = ALIGN(8); 176 _end = .; 177 __bss_end__ = .; 178 } > AXI_SRAM 179 180 .tbss (NOLOAD) : { 181 . = ALIGN(8); 182 PROVIDE(__tbss_start__ = .); 183 __thread_pointer$ = .; 184 *(.tbss) 185 *(.tbss.*) 186 *(.gnu.linkonce.tb.*) 187 *(.tcommon) 188 . = ALIGN(8); 189 PROVIDE(__tbss_end__ = .); 190 } > AXI_SRAM 191 192 __tdata_load_addr__ = etext + SIZEOF(.data) + SIZEOF(.fast); 193 .tdata : AT(__tdata_load_addr__) { 194 . = ALIGN(8); 195 PROVIDE(__tdata_start__ = .); 196 *(.tdata) 197 *(.tdata.*) 198 *(.gnu.linkonce.td.*) 199 . = ALIGN(8); 200 PROVIDE(__tdata_end__ = .); 201 } > AXI_SRAM 202 203 .framebuffer (NOLOAD) : { 204 . = ALIGN(8); 205 KEEP(*(.framebuffer)) 206 . = ALIGN(8); 207 } > AXI_SRAM 208 209 __noncacheable_init_load_addr__ = etext + SIZEOF(.data) + SIZEOF(.fast) + SIZEOF(.tdata); 210 .noncacheable.init : AT(__noncacheable_init_load_addr__) { 211 . = ALIGN(8); 212 __noncacheable_init_start__ = .; 213 KEEP(*(.noncacheable.init)) 214 __noncacheable_init_end__ = .; 215 . = ALIGN(8); 216 } > AXI_SRAM_NONCACHEABLE 217 218 .noncacheable.bss (NOLOAD) : { 219 . = ALIGN(8); 220 KEEP(*(.noncacheable)) 221 __noncacheable_bss_start__ = .; 222 KEEP(*(.noncacheable.bss)) 223 __noncacheable_bss_end__ = .; 224 . = ALIGN(8); 225 } > AXI_SRAM_NONCACHEABLE 226 227 .ahb_sram (NOLOAD) : { 228 KEEP(*(.ahb_sram)) 229 } > AHB_SRAM 230 231 .fast_ram (NOLOAD) : { 232 KEEP(*(.fast_ram)) 233 } > DLM 234 235 .heap (NOLOAD) : { 236 . = ALIGN(8); 237 __heap_start__ = .; 238 . += HEAP_SIZE; 239 __heap_end__ = .; 240 } > DLM 241 242 .stack (NOLOAD) : { 243 . = ALIGN(8); 244 __stack_base__ = .; 245 . += STACK_SIZE; 246 . = ALIGN(8); 247 PROVIDE (_stack = .); 248 PROVIDE (_stack_safe = .); 249 } > DLM 250 251 __noncacheable_start__ = ORIGIN(AXI_SRAM_NONCACHEABLE); 252 __noncacheable_end__ = ORIGIN(AXI_SRAM_NONCACHEABLE) + LENGTH(AXI_SRAM_NONCACHEABLE); 253 254 __fw_size__ = SIZEOF(.start) + SIZEOF(.vectors) + SIZEOF(.rel) + SIZEOF(.text) + SIZEOF(.data) + SIZEOF(.fast) + SIZEOF(.tdata) + SIZEOF(.noncacheable.init); 255 ASSERT(__fw_size__ <= LENGTH(XPI0), "****** FAILED! XPI0 has not enough space! ******") 256} 257