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1/*
2 * Copyright (c) 2023 HPMicro
3 * SPDX-License-Identifier: BSD-3-Clause
4 */
5
6ENTRY(_start)
7
8STACK_SIZE = _stack_size;
9HEAP_SIZE = _heap_size;
10
11MEMORY
12{
13    XPI0 (rx) : ORIGIN = 0x80000000, LENGTH = _flash_size - 0x3000
14    ILM (wx) : ORIGIN = 0x00000000, LENGTH = 256K
15    DLM (w) : ORIGIN = 0x00080000, LENGTH = 256K
16    AXI_SRAM (wx) : ORIGIN = 0x01200000, LENGTH = 256K
17    AXI_SRAM_NONCACHEABLE (wx) : ORIGIN = 0x01240000, LENGTH = 256K
18    AHB_SRAM (w) : ORIGIN = 0xF0400000, LENGTH = 32k
19    APB_SRAM (w): ORIGIN = 0xF4130000, LENGTH = 16k
20}
21
22__nor_cfg_option_load_addr__ = ORIGIN(XPI0) + 0x400;
23__boot_header_load_addr__ = ORIGIN(XPI0) + 0x1000;
24__app_load_addr__ = ORIGIN(XPI0) + 0x3000;
25__boot_header_length__ = __boot_header_end__ - __boot_header_start__;
26__app_offset__ = __app_load_addr__ - __boot_header_load_addr__;
27
28
29SECTIONS
30{
31    .nor_cfg_option __nor_cfg_option_load_addr__ : {
32        KEEP(*(.nor_cfg_option))
33    } > XPI0
34
35    .boot_header __boot_header_load_addr__ : {
36        __boot_header_start__ = .;
37        KEEP(*(.boot_header))
38        KEEP(*(.fw_info_table))
39        KEEP(*(.dc_info))
40        __boot_header_end__ = .;
41    } > XPI0
42
43    .start __app_load_addr__ : {
44        . = ALIGN(8);
45        KEEP(*(.start))
46    } > XPI0
47
48    __vector_load_addr__ = ADDR(.start) + SIZEOF(.start);
49    .vectors ORIGIN(ILM) : AT(__vector_load_addr__) {
50        . = ALIGN(8);
51        __vector_ram_start__ = .;
52        KEEP(*(.vector_table))
53        KEEP(*(.isr_vector))
54        . = ALIGN(8);
55        __vector_ram_end__ = .;
56    } > ILM
57
58    .text (__vector_load_addr__ + SIZEOF(.vectors)) : {
59        . = ALIGN(8);
60        *(.text)
61        *(.text*)
62        *(.rodata)
63        *(.rodata*)
64        *(.srodata)
65        *(.srodata*)
66
67        *(.hash)
68        *(.dyn*)
69        *(.gnu*)
70        *(.pl*)
71
72        KEEP(*(.eh_frame))
73        *(.eh_frame*)
74
75        KEEP (*(.init))
76        KEEP (*(.fini))
77
78    /* section information for usbh class */
79        . = ALIGN(8);
80        __usbh_class_info_start__ = .;
81        KEEP(*(.usbh_class_info))
82        __usbh_class_info_end__ = .;
83
84        /* RT-Thread related sections - Start */
85        /* section information for finsh shell */
86        . = ALIGN(4);
87        __fsymtab_start = .;
88        KEEP(*(FSymTab))
89        __fsymtab_end = .;
90        . = ALIGN(4);
91        __vsymtab_start = .;
92        KEEP(*(VSymTab))
93        __vsymtab_end = .;
94        . = ALIGN(4);
95
96        . = ALIGN(4);
97        __rt_init_start = .;
98        KEEP(*(SORT(.rti_fn*)))
99        __rt_init_end = .;
100        . = ALIGN(4);
101
102        /* section information for modules */
103        . = ALIGN(4);
104        __rtmsymtab_start = .;
105        KEEP(*(RTMSymTab))
106        __rtmsymtab_end = .;
107
108        /* RT-Thread related sections - end */
109        . = ALIGN(8);
110    } > XPI0
111
112    .rel : {
113        KEEP(*(.rel*))
114    } > XPI0
115
116    PROVIDE (__etext = .);
117    PROVIDE (_etext = .);
118    PROVIDE (etext = .);
119
120    __data_load_addr__ = etext;
121    .data : AT(__data_load_addr__) {
122        . = ALIGN(8);
123        __data_start__ = .;
124        __global_pointer$ = . + 0x800;
125        *(.data)
126        *(.data*)
127        *(.sdata)
128        *(.sdata*)
129
130        KEEP(*(.jcr))
131        KEEP(*(.dynamic))
132        KEEP(*(.got*))
133        KEEP(*(.got))
134        KEEP(*(.gcc_except_table))
135        KEEP(*(.gcc_except_table.*))
136
137        . = ALIGN(8);
138        PROVIDE(__preinit_array_start = .);
139        KEEP(*(.preinit_array))
140        PROVIDE(__preinit_array_end = .);
141
142        . = ALIGN(8);
143        PROVIDE(__init_array_start = .);
144        KEEP(*(SORT_BY_INIT_PRIORITY(.init_array.*)))
145        KEEP(*(.init_array))
146        PROVIDE(__init_array_end = .);
147
148        . = ALIGN(8);
149        PROVIDE(__finit_array_start = .);
150        KEEP(*(SORT_BY_INIT_PRIORITY(.finit_array.*)))
151        KEEP(*(.finit_array))
152        PROVIDE(__finit_array_end = .);
153
154        . = ALIGN(8);
155        KEEP(*crtbegin*.o(.ctors))
156        KEEP(*(EXCLUDE_FILE (*crtend*.o) .ctors))
157        KEEP(*(SORT(.ctors.*)))
158        KEEP(*(.ctors))
159
160        . = ALIGN(8);
161        KEEP(*crtbegin*.o(.dtors))
162        KEEP(*(EXCLUDE_FILE (*crtend*.o) .dtors))
163        KEEP(*(SORT(.dtors.*)))
164        KEEP(*(.dtors))
165        . = ALIGN(8);
166        __data_end__ = .;
167        PROVIDE (__edata = .);
168        PROVIDE (_edata = .);
169        PROVIDE (edata = .);
170    } > AXI_SRAM
171
172    __fast_load_addr__ = etext + SIZEOF(.data);
173    .fast : AT(__fast_load_addr__) {
174        . = ALIGN(8);
175        PROVIDE(__ramfunc_start__ = .);
176        *(.fast)
177        *(.fast.*)
178        . = ALIGN(8);
179        PROVIDE(__ramfunc_end__ = .);
180    } > ILM
181
182    .bss (NOLOAD) : {
183        . = ALIGN(8);
184        __bss_start__ = .;
185        *(.bss)
186        *(.bss*)
187        *(.sbss*)
188        *(.scommon)
189        *(.scommon*)
190        *(.dynsbss*)
191        *(COMMON)
192        . = ALIGN(8);
193        _end = .;
194        __bss_end__ = .;
195    } > AXI_SRAM
196
197    .tbss (NOLOAD) : {
198        . = ALIGN(8);
199        PROVIDE(__tbss_start__ = .);
200        __thread_pointer$ = .;
201        *(.tbss)
202        *(.tbss.*)
203        *(.gnu.linkonce.tb.*)
204        *(.tcommon)
205        . = ALIGN(8);
206        PROVIDE(__tbss_end__ = .);
207    } > AXI_SRAM
208
209    __tdata_load_addr__ = etext + SIZEOF(.data) + SIZEOF(.fast);
210    .tdata : AT(__tdata_load_addr__) {
211        . = ALIGN(8);
212        PROVIDE(__tdata_start__ = .);
213        *(.tdata)
214        *(.tdata.*)
215        *(.gnu.linkonce.td.*)
216        . = ALIGN(8);
217        PROVIDE(__tdata_end__ = .);
218    } > AXI_SRAM
219
220    .framebuffer (NOLOAD) : {
221        . = ALIGN(8);
222        KEEP(*(.framebuffer))
223        . = ALIGN(8);
224    } > AXI_SRAM
225
226    __noncacheable_init_load_addr__ = etext + SIZEOF(.data) + SIZEOF(.fast) + SIZEOF(.tdata);
227    .noncacheable.init : AT(__noncacheable_init_load_addr__) {
228        . = ALIGN(8);
229        __noncacheable_init_start__ = .;
230        KEEP(*(.noncacheable.init))
231        __noncacheable_init_end__ = .;
232        . = ALIGN(8);
233    } > AXI_SRAM_NONCACHEABLE
234
235    .noncacheable.bss (NOLOAD) : {
236        . = ALIGN(8);
237        KEEP(*(.noncacheable))
238        __noncacheable_bss_start__ = .;
239        KEEP(*(.noncacheable.bss))
240        __noncacheable_bss_end__ = .;
241        . = ALIGN(8);
242    } > AXI_SRAM_NONCACHEABLE
243
244    .ahb_sram (NOLOAD) : {
245        KEEP(*(.ahb_sram))
246    } > AHB_SRAM
247
248    .apb_sram (NOLOAD) : {
249        KEEP(*(.backup_sram))
250    } > APB_SRAM
251
252    .fast_ram (NOLOAD) : {
253        KEEP(*(.fast_ram))
254    } > DLM
255
256    .heap (NOLOAD) : {
257        . = ALIGN(8);
258        __heap_start__ = .;
259        . += HEAP_SIZE;
260        __heap_end__ = .;
261    } > DLM
262
263    .stack (NOLOAD) : {
264        . = ALIGN(8);
265        __stack_base__ = .;
266        . += STACK_SIZE;
267        . = ALIGN(8);
268        PROVIDE (_stack = .);
269        PROVIDE (_stack_safe = .);
270    } > DLM
271
272    __noncacheable_start__ = ORIGIN(AXI_SRAM_NONCACHEABLE);
273    __noncacheable_end__ = ORIGIN(AXI_SRAM_NONCACHEABLE) + LENGTH(AXI_SRAM_NONCACHEABLE);
274
275    __fw_size__ = SIZEOF(.start) + SIZEOF(.vectors) + SIZEOF(.rel) + SIZEOF(.text) + SIZEOF(.data) + SIZEOF(.fast) + SIZEOF(.tdata) + SIZEOF(.noncacheable.init);
276    ASSERT(__fw_size__ <= LENGTH(XPI0), "******  FAILED! XPI0 has not enough space!  ******")
277}
278