1 /** 2 ****************************************************************************** 3 * @file stm32f4xx.h 4 * @author MCD Application Team 5 * @brief CMSIS STM32F4xx Device Peripheral Access Layer Header File. 6 * 7 * The file is the unique include file that the application programmer 8 * is using in the C source code, usually in main.c. This file contains: 9 * - Configuration section that allows to select: 10 * - The STM32F4xx device used in the target application 11 * - To use or not the peripheral抯 drivers in application code(i.e. 12 * code will be based on direct access to peripheral抯 registers 13 * rather than drivers API), this option is controlled by 14 * "#define USE_HAL_DRIVER" 15 * 16 ****************************************************************************** 17 * @attention 18 * 19 * <h2><center>© Copyright (c) 2017 STMicroelectronics. 20 * All rights reserved.</center></h2> 21 * 22 * This software component is licensed by ST under BSD 3-Clause license, 23 * the "License"; You may not use this file except in compliance with the 24 * License. You may obtain a copy of the License at: 25 * opensource.org/licenses/BSD-3-Clause 26 * 27 ****************************************************************************** 28 */ 29 30 /** @addtogroup CMSIS 31 * @{ 32 */ 33 34 /** @addtogroup stm32f4xx 35 * @{ 36 */ 37 38 #ifndef __STM32F4xx_H 39 #define __STM32F4xx_H 40 41 #ifdef __cplusplus 42 extern "C" { 43 #endif /* __cplusplus */ 44 45 /** @addtogroup Library_configuration_section 46 * @{ 47 */ 48 49 /** 50 * @brief STM32 Family 51 */ 52 #if !defined (STM32F4) 53 #define STM32F4 54 #endif /* STM32F4 */ 55 56 /* Uncomment the line below according to the target STM32 device used in your 57 application 58 */ 59 #if !defined (STM32F405xx) && !defined (STM32F415xx) && !defined (STM32F407xx) && !defined (STM32F417xx) && \ 60 !defined (STM32F427xx) && !defined (STM32F437xx) && !defined (STM32F429xx) && !defined (STM32F439xx) && \ 61 !defined (STM32F401xC) && !defined (STM32F401xE) && !defined (STM32F410Tx) && !defined (STM32F410Cx) && \ 62 !defined (STM32F410Rx) && !defined (STM32F411xE) && !defined (STM32F446xx) && !defined (STM32F469xx) && \ 63 !defined (STM32F479xx) && !defined (STM32F412Cx) && !defined (STM32F412Rx) && !defined (STM32F412Vx) && \ 64 !defined (STM32F412Zx) && !defined (STM32F413xx) && !defined (STM32F423xx) 65 /* #define STM32F405xx */ /*!< STM32F405RG, STM32F405VG and STM32F405ZG Devices */ 66 /* #define STM32F415xx */ /*!< STM32F415RG, STM32F415VG and STM32F415ZG Devices */ 67 /* #define STM32F407xx */ /*!< STM32F407VG, STM32F407VE, STM32F407ZG, STM32F407ZE, STM32F407IG and STM32F407IE Devices */ 68 /* #define STM32F417xx */ /*!< STM32F417VG, STM32F417VE, STM32F417ZG, STM32F417ZE, STM32F417IG and STM32F417IE Devices */ 69 /* #define STM32F427xx */ /*!< STM32F427VG, STM32F427VI, STM32F427ZG, STM32F427ZI, STM32F427IG and STM32F427II Devices */ 70 /* #define STM32F437xx */ /*!< STM32F437VG, STM32F437VI, STM32F437ZG, STM32F437ZI, STM32F437IG and STM32F437II Devices */ 71 /* #define STM32F429xx */ /*!< STM32F429VG, STM32F429VI, STM32F429ZG, STM32F429ZI, STM32F429BG, STM32F429BI, STM32F429NG, 72 STM32F439NI, STM32F429IG and STM32F429II Devices */ 73 /* #define STM32F439xx */ /*!< STM32F439VG, STM32F439VI, STM32F439ZG, STM32F439ZI, STM32F439BG, STM32F439BI, STM32F439NG, 74 STM32F439NI, STM32F439IG and STM32F439II Devices */ 75 /* #define STM32F401xC */ /*!< STM32F401CB, STM32F401CC, STM32F401RB, STM32F401RC, STM32F401VB and STM32F401VC Devices */ 76 /* #define STM32F401xE */ /*!< STM32F401CD, STM32F401RD, STM32F401VD, STM32F401CE, STM32F401RE and STM32F401VE Devices */ 77 /* #define STM32F410Tx */ /*!< STM32F410T8 and STM32F410TB Devices */ 78 /* #define STM32F410Cx */ /*!< STM32F410C8 and STM32F410CB Devices */ 79 /* #define STM32F410Rx */ /*!< STM32F410R8 and STM32F410RB Devices */ 80 /* #define STM32F411xE */ /*!< STM32F411CC, STM32F411RC, STM32F411VC, STM32F411CE, STM32F411RE and STM32F411VE Devices */ 81 /* #define STM32F446xx */ /*!< STM32F446MC, STM32F446ME, STM32F446RC, STM32F446RE, STM32F446VC, STM32F446VE, STM32F446ZC, 82 and STM32F446ZE Devices */ 83 /* #define STM32F469xx */ /*!< STM32F469AI, STM32F469II, STM32F469BI, STM32F469NI, STM32F469AG, STM32F469IG, STM32F469BG, 84 STM32F469NG, STM32F469AE, STM32F469IE, STM32F469BE and STM32F469NE Devices */ 85 /* #define STM32F479xx */ /*!< STM32F479AI, STM32F479II, STM32F479BI, STM32F479NI, STM32F479AG, STM32F479IG, STM32F479BG 86 and STM32F479NG Devices */ 87 /* #define STM32F412Cx */ /*!< STM32F412CEU and STM32F412CGU Devices */ 88 /* #define STM32F412Zx */ /*!< STM32F412ZET, STM32F412ZGT, STM32F412ZEJ and STM32F412ZGJ Devices */ 89 /* #define STM32F412Vx */ /*!< STM32F412VET, STM32F412VGT, STM32F412VEH and STM32F412VGH Devices */ 90 /* #define STM32F412Rx */ /*!< STM32F412RET, STM32F412RGT, STM32F412REY and STM32F412RGY Devices */ 91 /* #define STM32F413xx */ /*!< STM32F413CH, STM32F413MH, STM32F413RH, STM32F413VH, STM32F413ZH, STM32F413CG, STM32F413MG, 92 STM32F413RG, STM32F413VG and STM32F413ZG Devices */ 93 /* #define STM32F423xx */ /*!< STM32F423CH, STM32F423RH, STM32F423VH and STM32F423ZH Devices */ 94 #endif 95 96 /* Tip: To avoid modifying this file each time you need to switch between these 97 devices, you can define the device in your toolchain compiler preprocessor. 98 */ 99 #if !defined (USE_HAL_DRIVER) 100 /** 101 * @brief Comment the line below if you will not use the peripherals drivers. 102 In this case, these drivers will not be included and the application code will 103 be based on direct access to peripherals registers 104 */ 105 #define USE_HAL_DRIVER 106 #endif /* USE_HAL_DRIVER */ 107 108 /** 109 * @brief CMSIS version number V2.6.7 110 */ 111 #define __STM32F4xx_CMSIS_VERSION_MAIN (0x02U) /*!< [31:24] main version */ 112 #define __STM32F4xx_CMSIS_VERSION_SUB1 (0x06U) /*!< [23:16] sub1 version */ 113 #define __STM32F4xx_CMSIS_VERSION_SUB2 (0x07U) /*!< [15:8] sub2 version */ 114 #define __STM32F4xx_CMSIS_VERSION_RC (0x00U) /*!< [7:0] release candidate */ 115 #define __STM32F4xx_CMSIS_VERSION ((__STM32F4xx_CMSIS_VERSION_MAIN << 24)\ 116 |(__STM32F4xx_CMSIS_VERSION_SUB1 << 16)\ 117 |(__STM32F4xx_CMSIS_VERSION_SUB2 << 8 )\ 118 |(__STM32F4xx_CMSIS_VERSION_RC)) 119 120 /** 121 * @} 122 */ 123 124 /** @addtogroup Device_Included 125 * @{ 126 */ 127 128 #if defined(STM32F405xx) 129 #include "stm32f405xx.h" 130 #elif defined(STM32F415xx) 131 #include "stm32f415xx.h" 132 #elif defined(STM32F407xx) 133 #include "stm32f407xx.h" 134 #elif defined(STM32F417xx) 135 #include "stm32f417xx.h" 136 #elif defined(STM32F427xx) 137 #include "stm32f427xx.h" 138 #elif defined(STM32F437xx) 139 #include "stm32f437xx.h" 140 #elif defined(STM32F429xx) 141 #include "stm32f429xx.h" 142 #elif defined(STM32F439xx) 143 #include "stm32f439xx.h" 144 #elif defined(STM32F401xC) 145 #include "stm32f401xc.h" 146 #elif defined(STM32F401xE) 147 #include "stm32f401xe.h" 148 #elif defined(STM32F410Tx) 149 #include "stm32f410tx.h" 150 #elif defined(STM32F410Cx) 151 #include "stm32f410cx.h" 152 #elif defined(STM32F410Rx) 153 #include "stm32f410rx.h" 154 #elif defined(STM32F411xE) 155 #include "stm32f411xe.h" 156 #elif defined(STM32F446xx) 157 #include "stm32f446xx.h" 158 #elif defined(STM32F469xx) 159 #include "stm32f469xx.h" 160 #elif defined(STM32F479xx) 161 #include "stm32f479xx.h" 162 #elif defined(STM32F412Cx) 163 #include "stm32f412cx.h" 164 #elif defined(STM32F412Zx) 165 #include "stm32f412zx.h" 166 #elif defined(STM32F412Rx) 167 #include "stm32f412rx.h" 168 #elif defined(STM32F412Vx) 169 #include "stm32f412vx.h" 170 #elif defined(STM32F413xx) 171 #include "stm32f413xx.h" 172 #elif defined(STM32F423xx) 173 #include "stm32f423xx.h" 174 #else 175 #error "Please select first the target STM32F4xx device used in your application (in stm32f4xx.h file)" 176 #endif 177 178 /** 179 * @} 180 */ 181 182 /** @addtogroup Exported_types 183 * @{ 184 */ 185 typedef enum 186 { 187 RESET = 0U, 188 SET = !RESET 189 } FlagStatus, ITStatus; 190 191 typedef enum 192 { 193 DISABLE = 0U, 194 ENABLE = !DISABLE 195 } FunctionalState; 196 #define IS_FUNCTIONAL_STATE(STATE) (((STATE) == DISABLE) || ((STATE) == ENABLE)) 197 198 typedef enum 199 { 200 SUCCESS = 0U, 201 ERROR = !SUCCESS 202 } ErrorStatus; 203 204 /** 205 * @} 206 */ 207 208 209 /** @addtogroup Exported_macro 210 * @{ 211 */ 212 #define SET_BIT(REG, BIT) ((REG) |= (BIT)) 213 214 #define CLEAR_BIT(REG, BIT) ((REG) &= ~(BIT)) 215 216 #define READ_BIT(REG, BIT) ((REG) & (BIT)) 217 218 #define CLEAR_REG(REG) ((REG) = (0x0)) 219 220 #define WRITE_REG(REG, VAL) ((REG) = (VAL)) 221 222 #define READ_REG(REG) ((REG)) 223 224 #define MODIFY_REG(REG, CLEARMASK, SETMASK) WRITE_REG((REG), (((READ_REG(REG)) & (~(CLEARMASK))) | (SETMASK))) 225 226 #define POSITION_VAL(VAL) (__CLZ(__RBIT(VAL))) 227 228 /* Use of CMSIS compiler intrinsics for register exclusive access */ 229 /* Atomic 32-bit register access macro to set one or several bits */ 230 #define ATOMIC_SET_BIT(REG, BIT) \ 231 do { \ 232 uint32_t val; \ 233 do { \ 234 val = __LDREXW((__IO uint32_t *)&(REG)) | (BIT); \ 235 } while ((__STREXW(val,(__IO uint32_t *)&(REG))) != 0U); \ 236 } while(0) 237 238 /* Atomic 32-bit register access macro to clear one or several bits */ 239 #define ATOMIC_CLEAR_BIT(REG, BIT) \ 240 do { \ 241 uint32_t val; \ 242 do { \ 243 val = __LDREXW((__IO uint32_t *)&(REG)) & ~(BIT); \ 244 } while ((__STREXW(val,(__IO uint32_t *)&(REG))) != 0U); \ 245 } while(0) 246 247 /* Atomic 32-bit register access macro to clear and set one or several bits */ 248 #define ATOMIC_MODIFY_REG(REG, CLEARMSK, SETMASK) \ 249 do { \ 250 uint32_t val; \ 251 do { \ 252 val = (__LDREXW((__IO uint32_t *)&(REG)) & ~(CLEARMSK)) | (SETMASK); \ 253 } while ((__STREXW(val,(__IO uint32_t *)&(REG))) != 0U); \ 254 } while(0) 255 256 /* Atomic 16-bit register access macro to set one or several bits */ 257 #define ATOMIC_SETH_BIT(REG, BIT) \ 258 do { \ 259 uint16_t val; \ 260 do { \ 261 val = __LDREXH((__IO uint16_t *)&(REG)) | (BIT); \ 262 } while ((__STREXH(val,(__IO uint16_t *)&(REG))) != 0U); \ 263 } while(0) 264 265 /* Atomic 16-bit register access macro to clear one or several bits */ 266 #define ATOMIC_CLEARH_BIT(REG, BIT) \ 267 do { \ 268 uint16_t val; \ 269 do { \ 270 val = __LDREXH((__IO uint16_t *)&(REG)) & ~(BIT); \ 271 } while ((__STREXH(val,(__IO uint16_t *)&(REG))) != 0U); \ 272 } while(0) 273 274 /* Atomic 16-bit register access macro to clear and set one or several bits */ 275 #define ATOMIC_MODIFYH_REG(REG, CLEARMSK, SETMASK) \ 276 do { \ 277 uint16_t val; \ 278 do { \ 279 val = (__LDREXH((__IO uint16_t *)&(REG)) & ~(CLEARMSK)) | (SETMASK); \ 280 } while ((__STREXH(val,(__IO uint16_t *)&(REG))) != 0U); \ 281 } while(0) 282 283 /** 284 * @} 285 */ 286 287 #if defined (USE_HAL_DRIVER) 288 #include "stm32f4xx_hal.h" 289 #endif /* USE_HAL_DRIVER */ 290 291 #ifdef __cplusplus 292 } 293 #endif /* __cplusplus */ 294 295 #endif /* __STM32F4xx_H */ 296 /** 297 * @} 298 */ 299 300 /** 301 * @} 302 */ 303 304 305 306 307 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ 308