1 /****************************************************************************** 2 * Copyright (c) 2022 Telink Semiconductor (Shanghai) Co., Ltd. ("TELINK") 3 * All rights reserved. 4 * 5 * Licensed under the Apache License, Version 2.0 (the "License"); 6 * you may not use this file except in compliance with the License. 7 * You may obtain a copy of the License at 8 * 9 * http://www.apache.org/licenses/LICENSE-2.0 10 * 11 * Unless required by applicable law or agreed to in writing, software 12 * distributed under the License is distributed on an "AS IS" BASIS, 13 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 14 * See the License for the specific language governing permissions and 15 * limitations under the License. 16 * 17 *****************************************************************************/ 18 #ifndef STACK_BLE_TRACE_H_ 19 #define STACK_BLE_TRACE_H_ 20 21 // log_event, ID: 0~31 22 #define SLEV_reservd 0 23 24 #define SLEV_rebuild 10 25 #define SLEV_rst_sSlot 11 26 27 // log_tick, ID: 0~31 28 29 #define SLET_00_systimer 0 30 #define SLET_01_rx 1 31 #define SLET_02_rx_scn 2 32 #define SLET_03_rx_slv 3 33 #define SLET_04_rx_mas 4 34 #define SLET_timestamp 31 35 36 // log_task, ID: 0~31 37 #define SL01_01_scan 1 38 #define SL01_02_adv 2 39 #define SL01_03_btx1 3 40 #define SL01_04_btx2 4 41 #define SL01_05_btx3 5 42 #define SL01_06_btx4 6 43 #define SL01_07_brx1 7 44 #define SL01_08_brx2 8 45 #define SL01_09_brx3 9 46 #define SL01_10_brx4 10 47 48 #define SL01_29_sysTimer 29 49 #define SL01_30_rf 30 50 #define SL01_31_IRQ 31 51 52 // 8-bit data: cid0 - cid63 53 #define SL08_reserved 0 54 55 // 16-bit data: sid0 - sid63 56 #define SL16_reserved 0 57 58 #endif /* STACK_BLE_TRACE_H_ */ 59