1 /* $FreeBSD$ */ 2 /*- 3 * SPDX-License-Identifier: BSD-2-Clause-NetBSD 4 * 5 * Copyright (c) 2001 The NetBSD Foundation, Inc. 6 * All rights reserved. 7 * 8 * This code is derived from software contributed to The NetBSD Foundation 9 * by Lennart Augustsson (lennart@augustsson.net). 10 * 11 * Redistribution and use in source and binary forms, with or without 12 * modification, are permitted provided that the following conditions 13 * are met: 14 * 1. Redistributions of source code must retain the above copyright 15 * notice, this list of conditions and the following disclaimer. 16 * 2. Redistributions in binary form must reproduce the above copyright 17 * notice, this list of conditions and the following disclaimer in the 18 * documentation and/or other materials provided with the distribution. 19 * 20 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 21 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 22 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 23 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 24 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 25 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 26 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 27 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 28 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 29 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 30 * POSSIBILITY OF SUCH DAMAGE. 31 */ 32 33 #ifndef _EHCI_H_ 34 #define _EHCI_H_ 35 36 #include <sys/endian.h> 37 38 #define EHCI_MAX_DEVICES MIN(USB_MAX_DEVICES, 128) 39 40 /* 41 * Alignment NOTE: structures must be aligned so that the hardware can index 42 * without performing addition. 43 */ 44 #define EHCI_FRAMELIST_ALIGN 0x1000 /* bytes */ 45 #define EHCI_FRAMELIST_COUNT 1024 /* units */ 46 #define EHCI_VIRTUAL_FRAMELIST_COUNT 128 /* units */ 47 48 #if ((8 * EHCI_VIRTUAL_FRAMELIST_COUNT) < USB_MAX_HS_ISOC_FRAMES_PER_XFER) 49 #error "maximum number of high-speed isochronous frames is higher than supported!" 50 #endif 51 52 #if (EHCI_VIRTUAL_FRAMELIST_COUNT < USB_MAX_FS_ISOC_FRAMES_PER_XFER) 53 #error "maximum number of full-speed isochronous frames is higher than supported!" 54 #endif 55 56 /* Link types */ 57 #define EHCI_LINK_TERMINATE 0x00000001 58 #define EHCI_LINK_TYPE(x) ((x) & 0x00000006) 59 #define EHCI_LINK_ITD 0x0 60 #define EHCI_LINK_QH 0x2 61 #define EHCI_LINK_SITD 0x4 62 #define EHCI_LINK_FSTN 0x6 63 #define EHCI_LINK_ADDR(x) ((x) &~ 0x1f) 64 65 /* Structures alignment (bytes) */ 66 #define EHCI_ITD_ALIGN 128 67 #define EHCI_SITD_ALIGN 64 68 #define EHCI_QTD_ALIGN 64 69 #define EHCI_QH_ALIGN 128 70 #define EHCI_FSTN_ALIGN 32 71 /* Data buffers are divided into one or more pages */ 72 #define EHCI_PAGE_SIZE 0x1000 73 #if ((USB_PAGE_SIZE < EHCI_PAGE_SIZE) || (EHCI_PAGE_SIZE == 0) || \ 74 (USB_PAGE_SIZE < EHCI_ITD_ALIGN) || (EHCI_ITD_ALIGN == 0) || \ 75 (USB_PAGE_SIZE < EHCI_SITD_ALIGN) || (EHCI_SITD_ALIGN == 0) || \ 76 (USB_PAGE_SIZE < EHCI_QTD_ALIGN) || (EHCI_QTD_ALIGN == 0) || \ 77 (USB_PAGE_SIZE < EHCI_QH_ALIGN) || (EHCI_QH_ALIGN == 0) || \ 78 (USB_PAGE_SIZE < EHCI_FSTN_ALIGN) || (EHCI_FSTN_ALIGN == 0)) 79 #error "Invalid USB page size!" 80 #endif 81 82 /* 83 * Isochronous Transfer Descriptor. This descriptor is used for high speed 84 * transfers only. 85 */ 86 struct ehci_itd { 87 volatile uint32_t itd_next; 88 volatile uint32_t itd_status[8]; 89 #define EHCI_ITD_SET_LEN(x) ((x) << 16) 90 #define EHCI_ITD_GET_LEN(x) (((x) >> 16) & 0xFFF) 91 #define EHCI_ITD_IOC (1 << 15) 92 #define EHCI_ITD_SET_PG(x) ((x) << 12) 93 #define EHCI_ITD_GET_PG(x) (((x) >> 12) & 0x7) 94 #define EHCI_ITD_SET_OFFS(x) (x) 95 #define EHCI_ITD_GET_OFFS(x) (((x) >> 0) & 0xFFF) 96 #define EHCI_ITD_ACTIVE (1U << 31) 97 #define EHCI_ITD_DATABUFERR (1 << 30) 98 #define EHCI_ITD_BABBLE (1 << 29) 99 #define EHCI_ITD_XACTERR (1 << 28) 100 101 #define EHCI_ITD_BP_MAX 7 102 volatile uint32_t itd_bp[EHCI_ITD_BP_MAX]; 103 /* itd_bp[0] */ 104 #define EHCI_ITD_SET_ADDR(x) (x) 105 #define EHCI_ITD_GET_ADDR(x) (((x) >> 0) & 0x7F) 106 #define EHCI_ITD_SET_ENDPT(x) ((x) << 8) 107 #define EHCI_ITD_GET_ENDPT(x) (((x) >> 8) & 0xF) 108 /* itd_bp[1] */ 109 #define EHCI_ITD_SET_DIR_IN (1 << 11) 110 #define EHCI_ITD_SET_DIR_OUT (0 << 11) 111 #define EHCI_ITD_SET_MPL(x) (x) 112 #define EHCI_ITD_GET_MPL(x) (((x) >> 0) & 0x7FF) 113 volatile uint32_t itd_bp_hi[EHCI_ITD_BP_MAX]; 114 /* 115 * Extra information needed: 116 */ 117 uint32_t itd_self; 118 struct ehci_itd *next; 119 struct ehci_itd *prev; 120 struct ehci_itd *obj_next; 121 struct usb_page_cache *page_cache; 122 } __aligned(EHCI_ITD_ALIGN); 123 124 typedef struct ehci_itd ehci_itd_t; 125 126 /* 127 * Split Transaction Isochronous Transfer Descriptor. This descriptor is used 128 * for full speed transfers only. 129 */ 130 struct ehci_sitd { 131 volatile uint32_t sitd_next; 132 volatile uint32_t sitd_portaddr; 133 #define EHCI_SITD_SET_DIR_OUT (0 << 31) 134 #define EHCI_SITD_SET_DIR_IN (1U << 31) 135 #define EHCI_SITD_SET_ADDR(x) (x) 136 #define EHCI_SITD_GET_ADDR(x) ((x) & 0x7F) 137 #define EHCI_SITD_SET_ENDPT(x) ((x) << 8) 138 #define EHCI_SITD_GET_ENDPT(x) (((x) >> 8) & 0xF) 139 #define EHCI_SITD_GET_DIR(x) ((x) >> 31) 140 #define EHCI_SITD_SET_PORT(x) ((x) << 24) 141 #define EHCI_SITD_GET_PORT(x) (((x) >> 24) & 0x7F) 142 #define EHCI_SITD_SET_HUBA(x) ((x) << 16) 143 #define EHCI_SITD_GET_HUBA(x) (((x) >> 16) & 0x7F) 144 volatile uint32_t sitd_mask; 145 #define EHCI_SITD_SET_SMASK(x) (x) 146 #define EHCI_SITD_SET_CMASK(x) ((x) << 8) 147 volatile uint32_t sitd_status; 148 #define EHCI_SITD_COMPLETE_SPLIT (1<<1) 149 #define EHCI_SITD_START_SPLIT (0<<1) 150 #define EHCI_SITD_MISSED_MICRO_FRAME (1<<2) 151 #define EHCI_SITD_XACTERR (1<<3) 152 #define EHCI_SITD_BABBLE (1<<4) 153 #define EHCI_SITD_DATABUFERR (1<<5) 154 #define EHCI_SITD_ERROR (1<<6) 155 #define EHCI_SITD_ACTIVE (1<<7) 156 #define EHCI_SITD_IOC (1U<<31) 157 #define EHCI_SITD_SET_LEN(len) ((len)<<16) 158 #define EHCI_SITD_GET_LEN(x) (((x)>>16) & 0x3FF) 159 volatile uint32_t sitd_bp[2]; 160 volatile uint32_t sitd_back; 161 volatile uint32_t sitd_bp_hi[2]; 162 /* 163 * Extra information needed: 164 */ 165 uint32_t sitd_self; 166 struct ehci_sitd *next; 167 struct ehci_sitd *prev; 168 struct ehci_sitd *obj_next; 169 struct usb_page_cache *page_cache; 170 } __aligned(EHCI_SITD_ALIGN); 171 172 typedef struct ehci_sitd ehci_sitd_t; 173 174 /* Queue Element Transfer Descriptor */ 175 struct ehci_qtd { 176 volatile uint32_t qtd_next; 177 volatile uint32_t qtd_altnext; 178 volatile uint32_t qtd_status; 179 #define EHCI_QTD_GET_STATUS(x) (((x) >> 0) & 0xff) 180 #define EHCI_QTD_SET_STATUS(x) ((x) << 0) 181 #define EHCI_QTD_ACTIVE 0x80 182 #define EHCI_QTD_HALTED 0x40 183 #define EHCI_QTD_BUFERR 0x20 184 #define EHCI_QTD_BABBLE 0x10 185 #define EHCI_QTD_XACTERR 0x08 186 #define EHCI_QTD_MISSEDMICRO 0x04 187 #define EHCI_QTD_SPLITXSTATE 0x02 188 #define EHCI_QTD_PINGSTATE 0x01 189 #define EHCI_QTD_STATERRS 0x74 190 #define EHCI_QTD_GET_PID(x) (((x) >> 8) & 0x3) 191 #define EHCI_QTD_SET_PID(x) ((x) << 8) 192 #define EHCI_QTD_PID_OUT 0x0 193 #define EHCI_QTD_PID_IN 0x1 194 #define EHCI_QTD_PID_SETUP 0x2 195 #define EHCI_QTD_GET_CERR(x) (((x) >> 10) & 0x3) 196 #define EHCI_QTD_SET_CERR(x) ((x) << 10) 197 #define EHCI_QTD_GET_C_PAGE(x) (((x) >> 12) & 0x7) 198 #define EHCI_QTD_SET_C_PAGE(x) ((x) << 12) 199 #define EHCI_QTD_GET_IOC(x) (((x) >> 15) & 0x1) 200 #define EHCI_QTD_IOC 0x00008000 201 #define EHCI_QTD_GET_BYTES(x) (((x) >> 16) & 0x7fff) 202 #define EHCI_QTD_SET_BYTES(x) ((x) << 16) 203 #define EHCI_QTD_GET_TOGGLE(x) (((x) >> 31) & 0x1) 204 #define EHCI_QTD_SET_TOGGLE(x) ((x) << 31) 205 #define EHCI_QTD_TOGGLE_MASK 0x80000000 206 #define EHCI_QTD_NBUFFERS 5 207 #define EHCI_QTD_PAYLOAD_MAX ((EHCI_QTD_NBUFFERS-1)*EHCI_PAGE_SIZE) 208 volatile uint32_t qtd_buffer[EHCI_QTD_NBUFFERS]; 209 volatile uint32_t qtd_buffer_hi[EHCI_QTD_NBUFFERS]; 210 /* 211 * Extra information needed: 212 */ 213 struct ehci_qtd *alt_next; 214 struct ehci_qtd *obj_next; 215 struct usb_page_cache *page_cache; 216 uint32_t qtd_self; 217 uint16_t len; 218 } __aligned(EHCI_QTD_ALIGN); 219 220 typedef struct ehci_qtd ehci_qtd_t; 221 222 /* Queue Head Sub Structure */ 223 struct ehci_qh_sub { 224 volatile uint32_t qtd_next; 225 volatile uint32_t qtd_altnext; 226 volatile uint32_t qtd_status; 227 volatile uint32_t qtd_buffer[EHCI_QTD_NBUFFERS]; 228 volatile uint32_t qtd_buffer_hi[EHCI_QTD_NBUFFERS]; 229 } __aligned(4); 230 231 /* Queue Head */ 232 struct ehci_qh { 233 volatile uint32_t qh_link; 234 volatile uint32_t qh_endp; 235 #define EHCI_QH_GET_ADDR(x) (((x) >> 0) & 0x7f) /* endpoint addr */ 236 #define EHCI_QH_SET_ADDR(x) (x) 237 #define EHCI_QH_ADDRMASK 0x0000007f 238 #define EHCI_QH_GET_INACT(x) (((x) >> 7) & 0x01) /* inactivate on next */ 239 #define EHCI_QH_INACT 0x00000080 240 #define EHCI_QH_GET_ENDPT(x) (((x) >> 8) & 0x0f) /* endpoint no */ 241 #define EHCI_QH_SET_ENDPT(x) ((x) << 8) 242 #define EHCI_QH_GET_EPS(x) (((x) >> 12) & 0x03) /* endpoint speed */ 243 #define EHCI_QH_SET_EPS(x) ((x) << 12) 244 #define EHCI_QH_SPEED_FULL 0x0 245 #define EHCI_QH_SPEED_LOW 0x1 246 #define EHCI_QH_SPEED_HIGH 0x2 247 #define EHCI_QH_GET_DTC(x) (((x) >> 14) & 0x01) /* data toggle control */ 248 #define EHCI_QH_DTC 0x00004000 249 #define EHCI_QH_GET_HRECL(x) (((x) >> 15) & 0x01) /* head of reclamation */ 250 #define EHCI_QH_HRECL 0x00008000 251 #define EHCI_QH_GET_MPL(x) (((x) >> 16) & 0x7ff) /* max packet len */ 252 #define EHCI_QH_SET_MPL(x) ((x) << 16) 253 #define EHCI_QH_MPLMASK 0x07ff0000 254 #define EHCI_QH_GET_CTL(x) (((x) >> 27) & 0x01) /* control endpoint */ 255 #define EHCI_QH_CTL 0x08000000 256 #define EHCI_QH_GET_NRL(x) (((x) >> 28) & 0x0f) /* NAK reload */ 257 #define EHCI_QH_SET_NRL(x) ((x) << 28) 258 volatile uint32_t qh_endphub; 259 #define EHCI_QH_GET_SMASK(x) (((x) >> 0) & 0xff) /* intr sched mask */ 260 #define EHCI_QH_SET_SMASK(x) ((x) << 0) 261 #define EHCI_QH_GET_CMASK(x) (((x) >> 8) & 0xff) /* split completion mask */ 262 #define EHCI_QH_SET_CMASK(x) ((x) << 8) 263 #define EHCI_QH_GET_HUBA(x) (((x) >> 16) & 0x7f) /* hub address */ 264 #define EHCI_QH_SET_HUBA(x) ((x) << 16) 265 #define EHCI_QH_GET_PORT(x) (((x) >> 23) & 0x7f) /* hub port */ 266 #define EHCI_QH_SET_PORT(x) ((x) << 23) 267 #define EHCI_QH_GET_MULT(x) (((x) >> 30) & 0x03) /* pipe multiplier */ 268 #define EHCI_QH_SET_MULT(x) ((x) << 30) 269 volatile uint32_t qh_curqtd; 270 struct ehci_qh_sub qh_qtd; 271 /* 272 * Extra information needed: 273 */ 274 struct ehci_qh *next; 275 struct ehci_qh *prev; 276 struct ehci_qh *obj_next; 277 struct usb_page_cache *page_cache; 278 uint32_t qh_self; 279 } __aligned(EHCI_QH_ALIGN); 280 281 typedef struct ehci_qh ehci_qh_t; 282 283 /* Periodic Frame Span Traversal Node */ 284 struct ehci_fstn { 285 volatile uint32_t fstn_link; 286 volatile uint32_t fstn_back; 287 } __aligned(EHCI_FSTN_ALIGN); 288 289 typedef struct ehci_fstn ehci_fstn_t; 290 291 struct ehci_hw_softc { 292 struct usb_page_cache pframes_pc; 293 struct usb_page_cache terminate_pc; 294 struct usb_page_cache async_start_pc; 295 struct usb_page_cache intr_start_pc[EHCI_VIRTUAL_FRAMELIST_COUNT]; 296 struct usb_page_cache isoc_hs_start_pc[EHCI_VIRTUAL_FRAMELIST_COUNT]; 297 struct usb_page_cache isoc_fs_start_pc[EHCI_VIRTUAL_FRAMELIST_COUNT]; 298 299 struct usb_page pframes_pg; 300 struct usb_page terminate_pg; 301 struct usb_page async_start_pg; 302 struct usb_page intr_start_pg[EHCI_VIRTUAL_FRAMELIST_COUNT]; 303 struct usb_page isoc_hs_start_pg[EHCI_VIRTUAL_FRAMELIST_COUNT]; 304 struct usb_page isoc_fs_start_pg[EHCI_VIRTUAL_FRAMELIST_COUNT]; 305 }; 306 307 struct ehci_config_desc { 308 struct usb_config_descriptor confd; 309 struct usb_interface_descriptor ifcd; 310 struct usb_endpoint_descriptor endpd; 311 } __packed; 312 313 union ehci_hub_desc { 314 struct usb_status stat; 315 struct usb_port_status ps; 316 struct usb_hub_descriptor hubd; 317 uint8_t temp[128]; 318 }; 319 320 typedef struct ehci_softc { 321 struct ehci_hw_softc sc_hw; 322 struct usb_bus sc_bus; /* base device */ 323 struct callout sc_tmo_pcd; 324 struct callout sc_tmo_poll; 325 union ehci_hub_desc sc_hub_desc; 326 327 struct usb_device *sc_devices[EHCI_MAX_DEVICES]; 328 struct resource *sc_io_res; 329 struct resource *sc_irq_res; 330 struct ehci_qh *sc_async_p_last; 331 struct ehci_qh *sc_intr_p_last[EHCI_VIRTUAL_FRAMELIST_COUNT]; 332 struct ehci_sitd *sc_isoc_fs_p_last[EHCI_VIRTUAL_FRAMELIST_COUNT]; 333 struct ehci_itd *sc_isoc_hs_p_last[EHCI_VIRTUAL_FRAMELIST_COUNT]; 334 void *sc_intr_hdl; 335 bus_size_t sc_io_size; 336 bus_space_tag_t sc_io_tag; 337 bus_space_handle_t sc_io_hdl; 338 339 uint32_t sc_terminate_self; /* TD short packet termination pointer */ 340 uint32_t sc_eintrs; /* Interrupt mask */ 341 342 uint16_t sc_intr_stat[EHCI_VIRTUAL_FRAMELIST_COUNT]; 343 uint16_t sc_id_vendor; /* vendor ID for root hub */ 344 uint16_t sc_flags; /* chip specific flags */ 345 #define EHCI_SCFLG_NORESTERM 0x0004 /* don't terminate reset sequence */ 346 #define EHCI_SCFLG_BIGEDESC 0x0008 /* big-endian byte order descriptors */ 347 #define EHCI_SCFLG_TT 0x0020 /* transaction translator present */ 348 #define EHCI_SCFLG_LOSTINTRBUG 0x0040 /* workaround for VIA / ATI chipsets */ 349 #define EHCI_SCFLG_IAADBUG 0x0080 /* workaround for nVidia chipsets */ 350 #define EHCI_SCFLG_DONTRESET 0x0100 /* don't reset ctrl. in ehci_init() */ 351 #define EHCI_SCFLG_DONEINIT 0x1000 /* ehci_init() has been called. */ 352 353 uint8_t sc_offs; /* offset to operational registers */ 354 uint8_t sc_doorbell_disable; /* set on doorbell failure */ 355 uint8_t sc_noport; 356 uint8_t sc_addr; /* device address */ 357 uint8_t sc_conf; /* device configuration */ 358 uint8_t sc_isreset; 359 uint8_t sc_hub_idata[8]; 360 361 char sc_vendor[16]; /* vendor string for root hub */ 362 363 void (*sc_vendor_post_reset)(struct ehci_softc *sc); 364 uint16_t (*sc_vendor_get_port_speed)(struct ehci_softc *sc, uint16_t index); 365 } ehci_softc_t; 366 367 #define EREAD1(sc, a) bus_space_read_1((sc)->sc_io_tag, (sc)->sc_io_hdl, (a)) 368 #define EREAD2(sc, a) bus_space_read_2((sc)->sc_io_tag, (sc)->sc_io_hdl, (a)) 369 #define EREAD4(sc, a) bus_space_read_4((sc)->sc_io_tag, (sc)->sc_io_hdl, (a)) 370 #define EWRITE1(sc, a, x) \ 371 bus_space_write_1((sc)->sc_io_tag, (sc)->sc_io_hdl, (a), (x)) 372 #define EWRITE2(sc, a, x) \ 373 bus_space_write_2((sc)->sc_io_tag, (sc)->sc_io_hdl, (a), (x)) 374 #define EWRITE4(sc, a, x) \ 375 bus_space_write_4((sc)->sc_io_tag, (sc)->sc_io_hdl, (a), (x)) 376 #define EOREAD1(sc, a) \ 377 bus_space_read_1((sc)->sc_io_tag, (sc)->sc_io_hdl, (sc)->sc_offs+(a)) 378 #define EOREAD2(sc, a) \ 379 bus_space_read_2((sc)->sc_io_tag, (sc)->sc_io_hdl, (sc)->sc_offs+(a)) 380 #define EOREAD4(sc, a) \ 381 bus_space_read_4((sc)->sc_io_tag, (sc)->sc_io_hdl, (sc)->sc_offs+(a)) 382 #define EOWRITE1(sc, a, x) \ 383 bus_space_write_1((sc)->sc_io_tag, (sc)->sc_io_hdl, (sc)->sc_offs+(a), (x)) 384 #define EOWRITE2(sc, a, x) \ 385 bus_space_write_2((sc)->sc_io_tag, (sc)->sc_io_hdl, (sc)->sc_offs+(a), (x)) 386 #define EOWRITE4(sc, a, x) \ 387 bus_space_write_4((sc)->sc_io_tag, (sc)->sc_io_hdl, (sc)->sc_offs+(a), (x)) 388 389 #ifdef USB_EHCI_BIG_ENDIAN_DESC 390 /* 391 * Handle byte order conversion between host and ``host controller''. 392 * Typically the latter is little-endian but some controllers require 393 * big-endian in which case we may need to manually swap. 394 */ 395 static __inline uint32_t 396 htohc32(const struct ehci_softc *sc, const uint32_t v) 397 { 398 return sc->sc_flags & EHCI_SCFLG_BIGEDESC ? htobe32(v) : htole32(v); 399 } 400 401 static __inline uint16_t 402 htohc16(const struct ehci_softc *sc, const uint16_t v) 403 { 404 return sc->sc_flags & EHCI_SCFLG_BIGEDESC ? htobe16(v) : htole16(v); 405 } 406 407 static __inline uint32_t 408 hc32toh(const struct ehci_softc *sc, const uint32_t v) 409 { 410 return sc->sc_flags & EHCI_SCFLG_BIGEDESC ? be32toh(v) : le32toh(v); 411 } 412 413 static __inline uint16_t 414 hc16toh(const struct ehci_softc *sc, const uint16_t v) 415 { 416 return sc->sc_flags & EHCI_SCFLG_BIGEDESC ? be16toh(v) : le16toh(v); 417 } 418 #else 419 /* 420 * Normal little-endian only conversion routines. 421 */ 422 static __inline uint32_t 423 htohc32(const struct ehci_softc *sc, const uint32_t v) 424 { 425 return htole32(v); 426 } 427 428 static __inline uint16_t 429 htohc16(const struct ehci_softc *sc, const uint16_t v) 430 { 431 return htole16(v); 432 } 433 434 static __inline uint32_t 435 hc32toh(const struct ehci_softc *sc, const uint32_t v) 436 { 437 return le32toh(v); 438 } 439 440 static __inline uint16_t 441 hc16toh(const struct ehci_softc *sc, const uint16_t v) 442 { 443 return le16toh(v); 444 } 445 #endif 446 447 usb_bus_mem_cb_t ehci_iterate_hw_softc; 448 449 usb_error_t ehci_reset(ehci_softc_t *sc); 450 usb_error_t ehci_init(ehci_softc_t *sc); 451 void ehci_detach(struct ehci_softc *sc); 452 void ehci_interrupt(unsigned int irq, ehci_softc_t *sc); 453 uint16_t ehci_get_port_speed_portsc(struct ehci_softc *sc, uint16_t index); 454 uint16_t ehci_get_port_speed_hostc(struct ehci_softc *sc, uint16_t index); 455 456 #endif /* _EHCI_H_ */ 457