1 /*
2 * Copyright (c) 2022 Shenzhen Kaihong Digital Industry Development Co., Ltd.
3 * Licensed under the Apache License, Version 2.0 (the "License");
4 * you may not use this file except in compliance with the License.
5 * You may obtain a copy of the License at
6 *
7 * http://www.apache.org/licenses/LICENSE-2.0
8 *
9 * Unless required by applicable law or agreed to in writing, software
10 * distributed under the License is distributed on an "AS IS" BASIS,
11 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
12 * See the License for the specific language governing permissions and
13 * limitations under the License.
14 */
15
16 #include "hdf_device_desc.h"
17
18 #ifdef LOSCFG_DRIVERS_HDF_CONFIG_MACRO
19 #include "hcs_macro.h"
20 #include "hdf_config_macro.h"
21 #else
22 #include "device_resource_if.h"
23 #endif
24 #include "hdf_log.h"
25 #include "osal.h"
26 #include "los_mux.h"
27 #include "los_queue.h"
28
29 #include "uart_if.h"
30 #include "uart_core.h"
31 #include "gd32f4xx_usart.h"
32
33 #define HDF_LOG_TAG uart_gd32f4xx
34 #define UART_HWI_PRIO (0U)
35 #define UART_HWI_MODE (1U)
36 #define CLOCK_APB (2)
37 #define UART_BUS_NUMS (8)
38 #define GPIO_REG_BASE 0x40020000
39 #define GPIO_REG_STEP 0x00000400
40 #define GPIO_BIT_PER_GROUP 16
41
42 struct UartCtrl {
43 uint32_t num;
44 uint32_t regBase;
45 uint32_t irqNum;
46 OSAL_DECLARE_SPINLOCK(lock);
47 uint32_t baudRate;
48 enum UartTransMode mode;
49 uint32_t openCount;
50 uint32_t af;
51 uint32_t txPin;
52 uint32_t rxPin;
53 uint32_t fifoSize;
54 void *priv;
55 };
56
57 static int32_t g_regBase;
58 static UINT32 g_queue;
59
ToGpioPin(uint16_t local)60 static inline uint32_t ToGpioPin(uint16_t local)
61 {
62 uint32_t pinNum = 0;
63
64 pinNum = local % GPIO_BIT_PER_GROUP;
65
66 return (BIT(pinNum));
67 }
68
ToGpioPeriph(uint16_t local)69 static inline uint32_t ToGpioPeriph(uint16_t local)
70 {
71 uint32_t gpioPeriph = 0;
72
73 gpioPeriph = GPIO_REG_BASE + (local / GPIO_BIT_PER_GROUP) * GPIO_REG_STEP;
74
75 return gpioPeriph;
76 }
77
GpioRcuEnumFind(uint32_t gpioGroup)78 static rcu_periph_enum GpioRcuEnumFind(uint32_t gpioGroup)
79 {
80 uint32_t gpioClockOffset;
81 gpioClockOffset = gpioGroup / GPIO_BIT_PER_GROUP;
82 return RCU_REGIDX_BIT(AHB1EN_REG_OFFSET, gpioClockOffset);
83 }
84
UartRcuEnumFind(struct UartCtrl * uart)85 static rcu_periph_enum UartRcuEnumFind(struct UartCtrl *uart)
86 {
87 rcu_periph_enum usartRcus[UART_BUS_NUMS] = {
88 RCU_USART0, RCU_USART1, RCU_USART2, RCU_UART3, RCU_UART4, RCU_USART5, RCU_UART6, RCU_UART7,
89 };
90 return usartRcus[uart->num];
91 }
92
UartRegBaseFind(struct UartCtrl * uart)93 static uint32_t UartRegBaseFind(struct UartCtrl *uart)
94 {
95 uint32_t usarts[UART_BUS_NUMS] = {
96 USART0, USART1, USART2, UART3, UART4, USART5, UART6, UART7,
97 };
98 return usarts[uart->num];
99 }
100
101 // enable uart, and enable tx/rx mode
UartEnable(struct UartCtrl * uart,int enable)102 static int32_t UartEnable(struct UartCtrl *uart, int enable)
103 {
104 if (enable) {
105 int32_t gpioGroup;
106 int32_t gpioTxPin;
107 int32_t gpioRxPin;
108 gpioGroup = ToGpioPeriph(uart->txPin);
109 gpioTxPin = ToGpioPin(uart->txPin);
110 gpioRxPin = ToGpioPin(uart->rxPin);
111 rcu_periph_clock_enable(GpioRcuEnumFind(uart->txPin));
112 rcu_periph_clock_enable(UartRcuEnumFind(uart));
113
114 gpio_af_set(gpioGroup, AF(uart->af), gpioTxPin);
115 gpio_af_set(gpioGroup, AF(uart->af), gpioRxPin);
116
117 gpio_mode_set(gpioGroup, GPIO_MODE_AF, GPIO_PUPD_PULLUP, gpioTxPin);
118 gpio_output_options_set(gpioGroup, GPIO_OTYPE_PP, GPIO_OSPEED_50MHZ, gpioTxPin);
119
120 gpio_mode_set(gpioGroup, GPIO_MODE_AF, GPIO_PUPD_PULLUP, gpioRxPin);
121 gpio_output_options_set(gpioGroup, GPIO_OTYPE_PP, GPIO_OSPEED_50MHZ, gpioRxPin);
122
123 usart_deinit(uart->regBase);
124
125 usart_baudrate_set(uart->regBase, uart->baudRate);
126 usart_word_length_set(uart->regBase, USART_WL_8BIT);
127 usart_stop_bit_set(uart->regBase, USART_STB_1BIT);
128 usart_parity_config(uart->regBase, USART_PM_NONE);
129
130 usart_hardware_flow_rts_config(uart->regBase, USART_RTS_DISABLE);
131 usart_hardware_flow_cts_config(uart->regBase, USART_CTS_DISABLE);
132
133 usart_receive_config(uart->regBase, USART_RECEIVE_ENABLE);
134 usart_transmit_config(uart->regBase, USART_TRANSMIT_ENABLE);
135
136 usart_flag_clear(uart->regBase, USART_FLAG_TC | USART_FLAG_TBE);
137
138 usart_enable(uart->regBase);
139
140 nvic_irq_enable(uart->irqNum, 2U, 0U);
141
142 usart_interrupt_enable(uart->regBase, USART_INT_RBNE);
143 } else {
144 usart_deinit(uart->regBase);
145
146 usart_receive_config(uart->regBase, USART_RECEIVE_DISABLE);
147 usart_transmit_config(uart->regBase, USART_TRANSMIT_DISABLE);
148
149 usart_flag_clear(uart->regBase, USART_FLAG_TC | USART_FLAG_TBE);
150
151 usart_interrupt_disable(uart->regBase, USART_INT_RBNE);
152
153 nvic_irq_disable(uart->irqNum);
154
155 usart_disable(uart->regBase);
156 }
157 return 0;
158 }
159
UartDataBits(struct UartCtrl * uart,uint32_t bits)160 static int32_t UartDataBits(struct UartCtrl *uart, uint32_t bits)
161 {
162 switch (bits) {
163 case UART_ATTR_DATABIT_8:
164 usart_word_length_set(uart->regBase, USART_WL_8BIT);
165 break;
166 default:
167 HDF_LOGE("%s: not support parameter.\r\n", __func__);
168 return HDF_ERR_INVALID_PARAM;
169 }
170
171 return 0;
172 }
173
UartStopBits(struct UartCtrl * uart,uint32_t bits)174 static int32_t UartStopBits(struct UartCtrl *uart, uint32_t bits)
175 {
176 switch (bits) {
177 case UART_ATTR_STOPBIT_1:
178 usart_stop_bit_set(uart->regBase, USART_STB_1BIT);
179 break;
180 case UART_ATTR_STOPBIT_1P5:
181 usart_stop_bit_set(uart->regBase, USART_STB_1_5BIT);
182 break;
183 case UART_ATTR_STOPBIT_2:
184 usart_stop_bit_set(uart->regBase, USART_STB_2BIT);
185 break;
186 default:
187 HDF_LOGE("%s: not support parameter.\r\n", __func__);
188 return HDF_ERR_INVALID_PARAM;
189 }
190
191 return 0;
192 }
193
UartParity(struct UartCtrl * uart,uint32_t parity)194 static int32_t UartParity(struct UartCtrl *uart, uint32_t parity)
195 {
196 switch (parity) {
197 case UART_ATTR_PARITY_NONE:
198 usart_parity_config(uart->regBase, USART_PM_NONE);
199 break;
200 case UART_ATTR_PARITY_ODD:
201 usart_parity_config(uart->regBase, USART_PM_ODD);
202 break;
203 case UART_ATTR_PARITY_EVEN:
204 usart_parity_config(uart->regBase, USART_PM_EVEN);
205 break;
206 default:
207 HDF_LOGE("%s: not support parameter.\r\n", __func__);
208 return HDF_ERR_INVALID_PARAM;
209 }
210
211 return 0;
212 }
213
UartRts(struct UartCtrl * uart,uint32_t rts)214 static int32_t UartRts(struct UartCtrl *uart, uint32_t rts)
215 {
216 switch (rts) {
217 case UART_ATTR_RTS_DIS:
218 usart_hardware_flow_rts_config(uart->regBase, USART_RTS_DISABLE);
219 break;
220 case UART_ATTR_RTS_EN:
221 usart_hardware_flow_rts_config(uart->regBase, USART_RTS_ENABLE);
222 break;
223 default:
224 HDF_LOGE("%s: not support parameter.\r\n", __func__);
225 return HDF_ERR_INVALID_PARAM;
226 }
227
228 return 0;
229 }
230
UartCts(struct UartCtrl * uart,uint32_t cts)231 static int32_t UartCts(struct UartCtrl *uart, uint32_t cts)
232 {
233 switch (cts) {
234 case UART_ATTR_CTS_DIS:
235 usart_hardware_flow_cts_config(uart->regBase, USART_CTS_DISABLE);
236 break;
237 case UART_ATTR_CTS_EN:
238 usart_hardware_flow_cts_config(uart->regBase, USART_CTS_ENABLE);
239 break;
240 default:
241 HDF_LOGE("%s: not support parameter.\r\n", __func__);
242 return HDF_ERR_INVALID_PARAM;
243 }
244
245 return 0;
246 }
247
UartBaudrate(struct UartCtrl * uart,uint32_t baudRate)248 static int32_t UartBaudrate(struct UartCtrl *uart, uint32_t baudRate)
249 {
250 usart_baudrate_set(uart->regBase, baudRate);
251 return 0;
252 }
253
UartConfig(struct UartCtrl * uart)254 static int32_t UartConfig(struct UartCtrl *uart)
255 {
256 int32_t ret;
257 struct UartAttribute *attr = (struct UartAttribute *)uart->priv;
258
259 ret = UartDataBits(uart, attr->dataBits);
260 ret |= UartStopBits(uart, attr->stopBits);
261 ret |= UartParity(uart, attr->parity);
262 ret |= UartRts(uart, attr->rts);
263 ret |= UartCts(uart, attr->cts);
264
265 return ret;
266 }
267
UartDevOpen(struct UartHost * host)268 static int32_t UartDevOpen(struct UartHost *host)
269 {
270 int32_t ret = HDF_SUCCESS;
271
272 struct UartCtrl *uart = (struct UartCtrl *)host->priv;
273
274 OsalSpinLock(&(uart->lock));
275
276 struct UartAttribute *attr = (struct UartAttribute *)uart->priv;
277
278 attr->dataBits = UART_ATTR_DATABIT_8;
279 attr->parity = UART_ATTR_PARITY_NONE;
280 attr->stopBits = UART_ATTR_STOPBIT_1;
281 attr->rts = UART_ATTR_RTS_DIS;
282 attr->cts = UART_ATTR_CTS_DIS;
283
284 UartConfig(uart);
285 UartEnable(uart, true);
286 ret = LOS_QueueCreate("queue", uart->fifoSize, &g_queue, 0, 1);
287 if (ret != LOS_OK) {
288 HDF_LOGE("create queue failure, error: %x\n", ret);
289 }
290 uart->openCount++;
291
292 OsalSpinUnlock(&(uart->lock));
293 return ret;
294 }
295
UartDevClose(struct UartHost * host)296 static int32_t UartDevClose(struct UartHost *host)
297 {
298 struct UartCtrl *uart = (struct UartCtrl *)host->priv;
299
300 if (--uart->openCount > 0) {
301 return HDF_FAILURE;
302 }
303
304 OsalSpinLock(&(uart->lock));
305
306 UartEnable(uart, false);
307
308 OsalSpinUnlock(&(uart->lock));
309
310 return HDF_SUCCESS;
311 }
312
UartDevRead(struct UartHost * host,uint8_t * data,uint32_t size)313 static int32_t UartDevRead(struct UartHost *host, uint8_t *data, uint32_t size)
314 {
315 if (host == NULL || host->priv == NULL) {
316 HDF_LOGE("%s: invalid parameter.\r\n", __func__);
317 return HDF_ERR_INVALID_PARAM;
318 }
319
320 int32_t ret = 0;
321 int32_t recvSize = 0;
322 int32_t readLen = 1;
323 int32_t timeOut = 0;
324
325 struct UartCtrl *uart = (struct UartCtrl *)host->priv;
326
327 OsalSpinLock(&(uart->lock));
328
329 if (uart->mode == UART_MODE_RD_BLOCK) {
330 timeOut = LOS_WAIT_FOREVER;
331 } else if (uart->mode == UART_MODE_RD_NONBLOCK) {
332 timeOut = 0;
333 } else {
334 HDF_LOGE("mode not support");
335 }
336 while (recvSize < size) {
337 ret = LOS_QueueReadCopy(g_queue, data + recvSize, &readLen, timeOut);
338 if (ret == LOS_ERRNO_QUEUE_ISEMPTY) {
339 break;
340 }
341 recvSize++;
342 }
343
344 OsalSpinUnlock(&(uart->lock));
345 return recvSize;
346 }
347
UartDevWrite(struct UartHost * host,uint8_t * data,uint32_t size)348 static int32_t UartDevWrite(struct UartHost *host, uint8_t *data, uint32_t size)
349 {
350 int32_t ret = HDF_SUCCESS;
351 if (host == NULL || host->priv == NULL || data == NULL) {
352 HDF_LOGE("%s: invalid parameter.\r\n", __func__);
353 return HDF_ERR_INVALID_PARAM;
354 }
355 struct UartCtrl *uart = (struct UartCtrl *)host->priv;
356
357 OsalSpinLock(&(uart->lock));
358
359 for (int i = 0; i < size; i++) {
360 if (data[i] == '\n') {
361 usart_data_transmit(uart->regBase, '\r');
362 while (RESET == usart_flag_get(uart->regBase, USART_FLAG_TBE)) { };
363 usart_data_transmit(uart->regBase, '\n');
364 } else {
365 usart_data_transmit(uart->regBase, data[i]);
366 }
367 while (RESET == usart_flag_get(uart->regBase, USART_FLAG_TBE)) { };
368 }
369
370 OsalSpinUnlock(&(uart->lock));
371
372 return ret;
373 }
374
UartDevGetBaud(struct UartHost * host,uint32_t * baudRate)375 static int32_t UartDevGetBaud(struct UartHost *host, uint32_t *baudRate)
376 {
377 int32_t ret = HDF_SUCCESS;
378 if (host == NULL || host->priv == NULL || baudRate == NULL) {
379 HDF_LOGE("%s: invalid parameter", __func__);
380 return HDF_ERR_INVALID_PARAM;
381 }
382 struct UartCtrl *uart = (struct UartCtrl *)host->priv;
383
384 OsalSpinLock(&(uart->lock));
385
386 *baudRate = uart->baudRate;
387
388 OsalSpinUnlock(&(uart->lock));
389 return ret;
390 }
391
UartDevSetBaud(struct UartHost * host,uint32_t baudRate)392 static int32_t UartDevSetBaud(struct UartHost *host, uint32_t baudRate)
393 {
394 int32_t ret = HDF_SUCCESS;
395 if (host == NULL || host->priv == NULL || baudRate == 0) {
396 HDF_LOGE("%s: invalid parameter", __func__);
397 return HDF_ERR_INVALID_PARAM;
398 }
399 struct UartCtrl *uart = (struct UartCtrl *)host->priv;
400
401 OsalSpinLock(&(uart->lock));
402
403 if (uart->baudRate != baudRate) {
404 UartBaudrate(uart, baudRate);
405 uart->baudRate = baudRate;
406 }
407
408 OsalSpinUnlock(&(uart->lock));
409 return ret;
410 }
411
UartDevGetAttribute(struct UartHost * host,struct UartAttribute * attribute)412 static int32_t UartDevGetAttribute(struct UartHost *host, struct UartAttribute *attribute)
413 {
414 int32_t ret = HDF_SUCCESS;
415 struct UartCtrl *uart = NULL;
416 struct UartAttribute *attr = NULL;
417 if (host == NULL || host->priv == NULL || attribute == NULL) {
418 HDF_LOGE("%s: invalid parameter", __func__);
419 return HDF_ERR_INVALID_PARAM;
420 }
421 uart = (struct UartCtrl *)host->priv;
422 attr = (struct UartAttribute *)uart->priv;
423
424 OsalSpinLock(&(uart->lock));
425
426 memcpy_s(attribute, sizeof(struct UartAttribute), attr, sizeof(struct UartAttribute));
427
428 OsalSpinUnlock(&(uart->lock));
429
430 return ret;
431 }
432
UartDevSetAttribute(struct UartHost * host,struct UartAttribute * attribute)433 static int32_t UartDevSetAttribute(struct UartHost *host, struct UartAttribute *attribute)
434 {
435 HDF_LOGE("func: %s, UartSetAttribute ok\r\n", __func__);
436 int32_t ret = HDF_SUCCESS;
437 struct UartCtrl *uart = NULL;
438 struct UartAttribute *attr = NULL;
439 if (host == NULL || host->priv == NULL || attribute == NULL) {
440 HDF_LOGE("%s: invalid parameter", __func__);
441 return HDF_ERR_INVALID_PARAM;
442 }
443 uart = (struct UartCtrl *)host->priv;
444 attr = (struct UartAttribute *)uart->priv;
445
446 OsalSpinLock(&(uart->lock));
447
448 // 保存新配置
449 memcpy_s(attr, sizeof(struct UartAttribute), attribute, sizeof(struct UartAttribute));
450
451 // 根据新配置，更新寄存器
452 ret = UartConfig(uart);
453
454 OsalSpinUnlock(&(uart->lock));
455 return ret;
456 }
457
UartDevSetTransMode(struct UartHost * host,enum UartTransMode mode)458 static int32_t UartDevSetTransMode(struct UartHost *host, enum UartTransMode mode)
459 {
460 int32_t ret = HDF_SUCCESS;
461 struct UartCtrl *uart = (struct UartCtrl *)host->priv;
462
463 OsalSpinLock(&(uart->lock));
464
465 switch (mode) {
466 case UART_MODE_RD_BLOCK:
467 uart->mode = UART_MODE_RD_BLOCK;
468 break;
469 case UART_MODE_RD_NONBLOCK:
470 uart->mode = UART_MODE_RD_NONBLOCK;
471 break;
472 default:
473 HDF_LOGE("%s: unsupport mode %#x.\r\n", __func__, mode);
474 break;
475 }
476
477 OsalSpinUnlock(&(uart->lock));
478
479 return ret;
480 }
481
482 struct UartHostMethod g_uartOps = {.Init = UartDevOpen,
483 .Deinit = UartDevClose,
484 .Read = UartDevRead,
485 .Write = UartDevWrite,
486 .GetBaud = UartDevGetBaud,
487 .SetBaud = UartDevSetBaud,
488 .GetAttribute = UartDevGetAttribute,
489 .SetAttribute = UartDevSetAttribute,
490 .SetTransMode = UartDevSetTransMode,
491 .pollEvent = NULL};
492
493 #ifdef LOSCFG_DRIVERS_HDF_CONFIG_MACRO
494 #define UART_FIND_CONFIG(node, name, uart) \
495 do { \
496 if (strcmp(HCS_PROP(node, match_attr), name) == 0) { \
497 uint32_t devNum = HCS_PROP(node, num); \
498 uint16_t baudRate = HCS_PROP(node, baudrate); \
499 uint16_t mode = HCS_PROP(node, mode); \
500 uint32_t interrupt = HCS_PROP(node, interrupt); \
501 uint32_t fifoSize = HCS_PROP(node, fifo_size); \
502 uint32_t af = HCS_PROP(node, af); \
503 uint32_t txPin = HCS_PROP(node, tx_pin); \
504 uint32_t rxPin = HCS_PROP(node, rx_pin); \
505 uart->num = devNum; \
506 uart->baudRate = baudRate; \
507 uart->mode = mode; \
508 uart->irqNum = interrupt; \
509 uart->fifoSize = fifoSize; \
510 uart->af = af; \
511 uart->txPin = txPin; \
512 uart->rxPin = rxPin; \
513 result = HDF_SUCCESS; \
514 } \
515 } while (0)
516 #define PLATFORM_CONFIG HCS_NODE(HCS_ROOT, platform)
517 #define PLATFORM_UART_CONFIG HCS_NODE(HCS_NODE(HCS_ROOT, platform), controller_0x40011000)
ReadUartHcsSource(struct UartCtrl * uart,const char * deviceMatchAttr)518 static int32_t ReadUartHcsSource(struct UartCtrl *uart, const char *deviceMatchAttr)
519 {
520 int32_t result = HDF_FAILURE;
521 if (uart == NULL || deviceMatchAttr == NULL) {
522 HDF_LOGE("%s: uart resource or deviceMatchAttr is NULL", __func__);
523 return HDF_ERR_INVALID_PARAM;
524 }
525
526 #if HCS_NODE_HAS_PROP(PLATFORM_CONFIG, controller_0x40011000)
527 HCS_FOREACH_CHILD_VARGS(PLATFORM_UART_CONFIG, UART_FIND_CONFIG, deviceMatchAttr, uart);
528 #endif
529 if (result != HDF_SUCCESS) {
530 HDF_LOGE("resourceNode %s is NULL\r\n", deviceMatchAttr);
531 }
532
533 return result;
534 }
535 #else
ReadUartHcsSource(struct UartCtrl * uart,const struct DeviceResourceNode * node)536 static int32_t ReadUartHcsSource(struct UartCtrl *uart, const struct DeviceResourceNode *node)
537 {
538 int32_t ret;
539 struct DeviceResourceIface *drsOps = NULL;
540
541 drsOps = DeviceResourceGetIfaceInstance(HDF_CONFIG_SOURCE);
542 if (drsOps == NULL || drsOps->GetUint32 == NULL) {
543 HDF_LOGE("%s: invalid drs ops!\r\n", __func__);
544 return HDF_FAILURE;
545 }
546
547 ret = drsOps->GetUint32(node, "num", &uart->num, 0);
548 if (ret != HDF_SUCCESS) {
549 HDF_LOGE("%s: read num fail!\r\n", __func__);
550 return ret;
551 }
552
553 ret = drsOps->GetUint32(node, "mode", &uart->mode, 0);
554 if (ret != HDF_SUCCESS) {
555 HDF_LOGE("%s: read mode fail!\r\n", __func__);
556 return ret;
557 }
558
559 ret = drsOps->GetUint32(node, "baudrate", &uart->baudRate, 0);
560 if (ret != HDF_SUCCESS) {
561 HDF_LOGE("%s: read baud_rate fail!\r\n", __func__);
562 return ret;
563 }
564
565 ret = drsOps->GetUint32(node, "interrupt", &uart->irqNum, 0);
566 if (ret != HDF_SUCCESS) {
567 HDF_LOGE("%s: read interrupt fail!\r\n", __func__);
568 return ret;
569 }
570
571 ret = drsOps->GetUint32(node, "fifo_size", &uart->fifoSize, 0);
572 if (ret != HDF_SUCCESS) {
573 HDF_LOGE("%s: read fifoSize fail!\r\n", __func__);
574 return ret;
575 }
576
577 ret = drsOps->GetUint32(node, "af", &uart->af, 0);
578 if (ret != HDF_SUCCESS) {
579 HDF_LOGE("%s: read af fail!\r\n", __func__);
580 return ret;
581 }
582
583 ret = drsOps->GetUint32(node, "tx_pin", &uart->txPin, 0);
584 if (ret != HDF_SUCCESS) {
585 HDF_LOGE("%s: read tx_pin fail!\r\n", __func__);
586 return ret;
587 }
588
589 ret = drsOps->GetUint32(node, "rx_pin", &uart->rxPin, 0);
590 if (ret != HDF_SUCCESS) {
591 HDF_LOGE("%s: read rx_pin fail!\r\n", __func__);
592 return ret;
593 }
594
595 return HDF_SUCCESS;
596 }
597 #endif
598
UartDevBind(struct HdfDeviceObject * device)599 static int32_t UartDevBind(struct HdfDeviceObject *device)
600 {
601 int32_t ret;
602 struct UartHost *host = NULL;
603 struct UartCtrl *uart = NULL;
604 struct UartAttribute *attr = NULL;
605 HDF_LOGI("%s: Enter", __func__);
606
607 #ifdef LOSCFG_DRIVERS_HDF_CONFIG_MACRO
608 if (device == NULL) {
609 #else
610 if (device == NULL || device->property == NULL) {
611 #endif
612 HDF_LOGE("%s: device or property is null!.\r\n", __func__);
613 return HDF_ERR_INVALID_OBJECT;
614 }
615
616 host = UartHostCreate(device);
617 if (host == NULL) {
618 HDF_LOGE("%s: UartHostCreate fail!.\r\n", __func__);
619 return HDF_ERR_MALLOC_FAIL;
620 }
621
622 // 申请内存空间
623 uart = (struct UartCtrl *)OsalMemCalloc(sizeof(struct UartCtrl));
624 if (uart == NULL) {
625 HDF_LOGE("%s: malloc uart fail!.\r\n", __func__);
626 return HDF_ERR_MALLOC_FAIL;
627 }
628
629 // attr
630 attr = (struct UartAttribute *)OsalMemCalloc(sizeof(struct UartAttribute));
631 if (uart == NULL) {
632 HDF_LOGE("%s: malloc attr fail!.\r\n", __func__);
633 OsalMemFree(uart);
634 return HDF_ERR_MALLOC_FAIL;
635 }
636 uart->priv = (void *)attr;
637 #ifdef LOSCFG_DRIVERS_HDF_CONFIG_MACRO
638 ret = ReadUartHcsSource(uart, device->deviceMatchAttr);
639 #else
640 ret = ReadUartHcsSource(uart, device->property);
641 #endif
642 if (ret != HDF_SUCCESS) {
643 HDF_LOGE("%s: read drs fail:%d.\r\n", __func__, ret);
644 OsalMemFree(attr);
645 OsalMemFree(uart);
646 return ret;
647 }
648
649 uart->regBase = UartRegBaseFind(uart);
650 host->method = &g_uartOps;
651 host->priv = uart;
652 host->num = uart->num;
653 HDF_LOGI("%s: Bind sucess", __func__);
654 return HDF_SUCCESS;
655 }
656
657 static void UsartIrq(void)
658 {
659 char ch;
660 char recvCh = 0;
661 UINT32 recvSize = 1;
662 uint32_t ret;
663
664 while (RESET != usart_interrupt_flag_get(g_regBase, USART_INT_FLAG_RBNE)) {
665 ch = usart_data_receive(g_regBase);
666 ret = LOS_QueueWriteCopy(g_queue, &ch, 1, 0);
667 if (ret == LOS_ERRNO_QUEUE_ISFULL) {
668 LOS_QueueReadCopy(g_queue, &recvCh, &recvSize, 0);
669 LOS_QueueWriteCopy(g_queue, &ch, 1, 0);
670 }
671 }
672 }
673
674 static int32_t UartDevInit(struct HdfDeviceObject *device)
675 {
676 int32_t ret = HDF_SUCCESS;
677 struct UartHost *host = NULL;
678 struct UartCtrl *uart = NULL;
679
680 HDF_LOGI("%s: Enter", __func__);
681
682 if (device == NULL) {
683 HDF_LOGE("%s: device is null.\r\n", __func__);
684 return HDF_FAILURE;
685 }
686
687 host = UartHostFromDevice(device);
688 if (host == NULL) {
689 HDF_LOGE("%s: host is null.\r\n", __func__);
690 return HDF_FAILURE;
691 }
692
693 uart = (struct UartCtrl *)host->priv;
694 if (uart == NULL) {
695 HDF_LOGE("%s: uart is null.\r\n", __func__);
696 return HDF_FAILURE;
697 }
698
699 g_regBase = uart->regBase;
700
701 LOS_HwiCreate(uart->irqNum, UART_HWI_PRIO, UART_HWI_MODE, (HWI_PROC_FUNC)UsartIrq, NULL);
702
703 ret = OsalSpinInit(&(uart->lock));
704 if (ret != HDF_SUCCESS) {
705 HDF_LOGE("%s: OsalSpinInit fail.\r\n", __func__);
706 return HDF_FAILURE;
707 }
708
709 OsalSpinLock(&(uart->lock));
710
711 UartEnable(uart, true);
712
713 OsalSpinUnlock(&(uart->lock));
714 HDF_LOGI("%s: init uart%d sucess", __func__, uart->num);
715 return ret;
716 }
717
718 static void UartDevRelease(struct HdfDeviceObject *device)
719 {
720 struct UartHost *host = NULL;
721 struct UartCtrl *uart = NULL;
722 HDF_LOGD("%s::enter, deviceObject=%p", __func__, device);
723 if (device == NULL) {
724 HDF_LOGE("%s: device is null.\r\n", __func__);
725 return;
726 }
727
728 host = UartHostFromDevice(device);
729 if (host == NULL) {
730 HDF_LOGE("%s: host is null.\r\n", __func__);
731 return;
732 }
733
734 uart = (struct UartCtrl *)host->priv;
735 if (uart == NULL) {
736 HDF_LOGE("%s: uart is null.\r\n", __func__);
737 return;
738 }
739
740 OsalSpinLock(&(uart->lock));
741
742 LOS_HwiDelete(uart->irqNum, NULL);
743
744 UartEnable(uart, false);
745
746 OsalSpinUnlock(&(uart->lock));
747
748 OsalSpinDestroy(&(uart->lock));
749
750 OsalMemFree(uart->priv);
751 OsalMemFree(uart);
752
753 UartHostDestroy(host);
754 }
755
756 struct HdfDriverEntry g_hdf_driver_uart_entry = {
757 .moduleVersion = 1,
758 .Bind = UartDevBind,
759 .Init = UartDevInit,
760 .Release = UartDevRelease,
761 .moduleName = "GD_UART_MODULE_HDF",
762 };
763 HDF_INIT(g_hdf_driver_uart_entry);
764