1 /****************************************************************************** 2 * 3 * Copyright (C) 2009-2018 Realtek Corporation 4 * 5 * Licensed under the Apache License, Version 2.0 (the "License"); 6 * you may not use this file except in compliance with the License. 7 * You may obtain a copy of the License at: 8 * 9 * http://www.apache.org/licenses/LICENSE-2.0 10 * 11 * Unless required by applicable law or agreed to in writing, software 12 * distributed under the License is distributed on an "AS IS" BASIS, 13 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 14 * See the License for the specific language governing permissions and 15 * limitations under the License. 16 * 17 ******************************************************************************/ 18 19 /****************************************************************************** 20 * 21 * Filename: bt_vendor_rtk.h 22 * 23 * Description: A wrapper header file of bt_vendor_lib.h 24 * 25 * Contains definitions specific for interfacing with Realtek 26 * Bluetooth chipsets 27 * 28 ******************************************************************************/ 29 30 #ifndef BT_VENDOR_RTK_H 31 #define BT_VENDOR_RTK_H 32 33 #include <string.h> 34 #include <fcntl.h> 35 #include <errno.h> 36 #include <stdio.h> 37 #include <stdlib.h> 38 #include <dirent.h> 39 #include <sys/stat.h> 40 #include <unistd.h> 41 #include <sys/types.h> 42 #include <sys/socket.h> 43 #include <sys/ioctl.h> 44 #include <sys/epoll.h> 45 #include <sys/eventfd.h> 46 #include <unistd.h> 47 #include <ctype.h> 48 #include "hardware.h" 49 #include "rtk_common.h" 50 #include "bt_vendor_lib.h" 51 #include "rtk_btsnoop_net.h" 52 53 #define RTK_VERSION "5.0.1" 54 /****************************************************************************** 55 ** Constants & Macros 56 ******************************************************************************/ 57 #define RTKBT_TRANS_H4 0x20 58 #define RTKBT_TRANS_H5 0x10 59 #define RTKBT_TRANS_UART 0x01 60 #define RTKBT_TRANS_USB 0x02 61 62 #ifndef FALSE 63 #define FALSE 0 64 #endif 65 66 #ifndef TRUE 67 #define TRUE (!FALSE) 68 #endif 69 70 #ifndef BTVND_DBG 71 #define BTVND_DBG TRUE 72 #endif 73 74 #undef BTVNDDBG 75 #if (BTVND_DBG == TRUE) 76 #define BTVNDDBG(param, ...) \ 77 { \ 78 HILOGD(param, ##__VA_ARGS__); \ 79 } 80 #else 81 #define BTVNDDBG(param, ...) \ 82 { \ 83 } 84 #endif 85 86 #define DOWN_FW_CFG _IOW('E', 176, int) 87 #define SET_ISO_CFG _IOW('E', 177, int) 88 #define RESET_CONTROLLER _IOW('E', 178, int) 89 #define DWFW_CMPLT _IOW('E', 179, int) 90 91 #define GET_USB_INFO _IOR('E', 180, int) 92 93 /* Device port name where Bluetooth controller attached */ 94 #ifndef BLUETOOTH_UART_DEVICE_PORT 95 #define BLUETOOTH_UART_DEVICE_PORT "/dev/ttyO1" /* maguro */ 96 #endif 97 98 /* Location of firmware patch files */ 99 #ifndef FW_PATCHFILE_LOCATION 100 #define FW_PATCHFILE_LOCATION "/vendor/firmware/" /* maguro */ 101 #endif 102 103 #ifndef UART_TARGET_BAUD_RATE 104 #define UART_TARGET_BAUD_RATE 3000000 105 #endif 106 107 /* The Bluetooth Device Aaddress source switch: 108 * 109 * -FALSE- (default value) 110 * Get the factory BDADDR from device's file system. Normally the BDADDR is 111 * stored in the location pointed by the PROPERTY_BT_BDADDR_PATH (defined in 112 * btif_common.h file) property. 113 * 114 * -TRUE- 115 * If the Bluetooth Controller has equipped with a non-volatile memory (such 116 * as BCM4330's OTP memory), the factory BDADDR can be stored in there and 117 * retrieved by the stack while enabling BT. 118 * !!! WARNING !!! Make sure that the OTP feature has been enabled in the 119 * firmware patchram (.hcd) file. 120 */ 121 #ifndef USE_CONTROLLER_BDADDR 122 #define USE_CONTROLLER_BDADDR TRUE // FALSE 123 #endif 124 125 /* sleep mode 126 127 0: disable 128 1: UART with Host wake/BT wake out of band signals 129 */ 130 #ifndef LPM_SLEEP_MODE 131 #define LPM_SLEEP_MODE 1 132 #endif 133 134 /* Host Stack Idle Threshold in 300ms or 25ms 135 136 In sleep mode 1, this is the number of firmware loops executed with no 137 activity before the Host wake line is deasserted. Activity includes HCI 138 traffic excluding certain sleep mode commands and the presence of SCO 139 connections if the "Allow Host Sleep During SCO" flag is not set to 1. 140 Each count of this parameter is roughly equivalent to 300ms or 25ms. 141 */ 142 #ifndef LPM_IDLE_THRESHOLD 143 #define LPM_IDLE_THRESHOLD 1 144 #endif 145 146 /* Host Controller Idle Threshold in 300ms or 25ms 147 148 This is the number of firmware loops executed with no activity before the 149 HC is considered idle. Depending on the mode, HC may then attempt to sleep. 150 Activity includes HCI traffic excluding certain sleep mode commands and 151 the presence of ACL/SCO connections. 152 */ 153 #ifndef LPM_HC_IDLE_THRESHOLD 154 #define LPM_HC_IDLE_THRESHOLD 1 155 #endif 156 157 /* BT_WAKE Polarity - 0=Active Low, 1= Active High */ 158 #ifndef LPM_BT_WAKE_POLARITY 159 #define LPM_BT_WAKE_POLARITY 1 /* maguro */ 160 #endif 161 162 /* HOST_WAKE Polarity - 0=Active Low, 1= Active High */ 163 #ifndef LPM_HOST_WAKE_POLARITY 164 #define LPM_HOST_WAKE_POLARITY 1 /* maguro */ 165 #endif 166 167 /* LPM_ALLOW_HOST_SLEEP_DURING_SCO 168 169 When this flag is set to 0, the host is not allowed to sleep while 170 an SCO is active. In sleep mode 1, the device will keep the host 171 wake line asserted while an SCO is active. 172 When this flag is set to 1, the host can sleep while an SCO is active. 173 This flag should only be set to 1 if SCO traffic is directed to the PCM 174 interface. 175 */ 176 #ifndef LPM_ALLOW_HOST_SLEEP_DURING_SCO 177 #define LPM_ALLOW_HOST_SLEEP_DURING_SCO 1 178 #endif 179 180 /* LPM_COMBINE_SLEEP_MODE_AND_LPM 181 182 In Mode 0, always set byte 7 to 0. In sleep mode 1, device always 183 requires permission to sleep between scans / periodic inquiries regardless 184 of the setting of this byte. In sleep mode 1, if byte is set, device must 185 have "permission" to sleep during the low power modes of sniff, hold, and 186 park. If byte is not set, device can sleep without permission during these 187 modes. Permission to sleep in Mode 1 is obtained if the BT_WAKE signal is 188 not asserted. 189 */ 190 #ifndef LPM_COMBINE_SLEEP_MODE_AND_LPM 191 #define LPM_COMBINE_SLEEP_MODE_AND_LPM 1 192 #endif 193 194 /* LPM_ENABLE_UART_TXD_TRI_STATE 195 196 When set to 0, the device will not tristate its UART TX line before going 197 to sleep. 198 When set to 1, the device will tristate its UART TX line before going to 199 sleep. 200 */ 201 #ifndef LPM_ENABLE_UART_TXD_TRI_STATE 202 #define LPM_ENABLE_UART_TXD_TRI_STATE 0 203 #endif 204 205 /* LPM_PULSED_HOST_WAKE 206 */ 207 #ifndef LPM_PULSED_HOST_WAKE 208 #define LPM_PULSED_HOST_WAKE 0 209 #endif 210 211 /* LPM_IDLE_TIMEOUT_MULTIPLE 212 213 The multiple factor of host stack idle threshold in 300ms/25ms 214 */ 215 #ifndef LPM_IDLE_TIMEOUT_MULTIPLE 216 #define LPM_IDLE_TIMEOUT_MULTIPLE 10 217 #endif 218 219 /* BT_WAKE_VIA_USERIAL_IOCTL 220 221 Use userial ioctl function to control BT_WAKE signal 222 */ 223 #ifndef BT_WAKE_VIA_USERIAL_IOCTL 224 #define BT_WAKE_VIA_USERIAL_IOCTL FALSE 225 #endif 226 227 /* BT_WAKE_VIA_PROC 228 229 LPM & BT_WAKE control through PROC nodes 230 */ 231 #ifndef BT_WAKE_VIA_PROC 232 #define BT_WAKE_VIA_PROC FALSE 233 #endif 234 235 /* HW_END_WITH_HCI_RESET 236 237 Sample code implementation of sending a HCI_RESET command during the epilog 238 process. It calls back to the callers after command complete of HCI_RESET 239 is received. 240 */ 241 #ifndef HW_END_WITH_HCI_RESET 242 #define HW_END_WITH_HCI_RESET FALSE 243 #endif 244 245 #define BD_ADDR_LEN 6 246 #define PROPERTY_VALUE_MAX 92 247 #define PATH_MAX 4096 248 249 /****************************************************************************** 250 ** Extern variables and functions 251 ******************************************************************************/ 252 253 extern bt_vendor_callbacks_t *bt_vendor_cbacks; 254 char get_rtkbt_transtype(void); 255 uint8_t *get_vnd_local_bd_addr(void); 256 bool get_rtkbt_auto_restart(void); 257 258 #endif /* BT_VENDOR_RTK_H */ 259