1 // SPDX-License-Identifier: GPL-2.0-or-later
2 /*
3 * Rockchip SoC DP (Display Port) interface driver.
4 *
5 * Copyright (C) Fuzhou Rockchip Electronics Co., Ltd.
6 * Author: Andy Yan <andy.yan@rock-chips.com>
7 * Yakir Yang <ykk@rock-chips.com>
8 * Jeff Chen <jeff.chen@rock-chips.com>
9 */
10
11 #include <linux/component.h>
12 #include <linux/mfd/syscon.h>
13 #include <linux/of_device.h>
14 #include <linux/of_graph.h>
15 #include <linux/regmap.h>
16 #include <linux/reset.h>
17 #include <linux/clk.h>
18
19 #include <uapi/linux/videodev2.h>
20 #include <video/of_videomode.h>
21 #include <video/videomode.h>
22
23 #include <drm/drm_atomic.h>
24 #include <drm/drm_atomic_helper.h>
25 #include <drm/bridge/analogix_dp.h>
26 #include <drm/drm_dp_helper.h>
27 #include <drm/drm_of.h>
28 #include <drm/drm_panel.h>
29 #include <drm/drm_probe_helper.h>
30 #include <drm/drm_simple_kms_helper.h>
31
32 #include "rockchip_drm_drv.h"
33 #include "rockchip_drm_vop.h"
34
35 #define PSR_WAIT_LINE_FLAG_TIMEOUT_MS 100
36
37 #define to_dp(nm) container_of(nm, struct rockchip_dp_device, nm)
38
39 #define GRF_REG_FIELD(_reg, _lsb, _msb) \
40 { \
41 .reg = (_reg), .lsb = (_lsb), .msb = (_msb), .valid = true, \
42 }
43
44 struct rockchip_grf_reg_field {
45 unsigned int reg;
46 unsigned int lsb;
47 unsigned int msb;
48 bool valid;
49 };
50
51 /**
52 * struct rockchip_dp_chip_data - splite the grf setting of kind of chips
53 * @lcdc_sel: grf register field of lcdc_sel
54 * @spdif_sel: grf register field of spdif_sel
55 * @i2s_sel: grf register field of i2s_sel
56 * @edp_mode: grf register field of edp_mode
57 * @chip_type: specific chip type
58 * @ssc: check if SSC is supported by source
59 * @audio: check if audio is supported by source
60 * @split_mode: check if split mode is supported
61 */
62 struct rockchip_dp_chip_data {
63 const struct rockchip_grf_reg_field lcdc_sel;
64 const struct rockchip_grf_reg_field spdif_sel;
65 const struct rockchip_grf_reg_field i2s_sel;
66 const struct rockchip_grf_reg_field edp_mode;
67 u32 chip_type;
68 bool ssc;
69 bool audio;
70 bool split_mode;
71 };
72
73 struct rockchip_dp_device {
74 struct drm_device *drm_dev;
75 struct device *dev;
76 struct drm_encoder encoder;
77 struct drm_bridge *bridge;
78 struct drm_display_mode mode;
79
80 struct regmap *grf;
81 struct reset_control *rst;
82 struct reset_control *apb_reset;
83
84 struct platform_device *audio_pdev;
85 const struct rockchip_dp_chip_data *data;
86 int id;
87
88 struct analogix_dp_device *adp;
89 struct analogix_dp_plat_data plat_data;
90 struct rockchip_drm_sub_dev sub_dev;
91 };
92
rockchip_grf_write(struct regmap * grf,unsigned int reg,unsigned int mask,unsigned int val)93 static int rockchip_grf_write(struct regmap *grf, unsigned int reg, unsigned int mask, unsigned int val)
94 {
95 return regmap_write(grf, reg, (mask << 0x10) | (val & mask));
96 }
97
rockchip_grf_field_write(struct regmap * grf,const struct rockchip_grf_reg_field * field,unsigned int val)98 static int rockchip_grf_field_write(struct regmap *grf, const struct rockchip_grf_reg_field *field, unsigned int val)
99 {
100 unsigned int mask;
101
102 if (!field->valid) {
103 return 0;
104 }
105
106 mask = GENMASK(field->msb, field->lsb);
107 val <<= field->lsb;
108
109 return rockchip_grf_write(grf, field->reg, mask, val);
110 }
111
rockchip_dp_audio_hw_params(struct device * dev,void * data,struct hdmi_codec_daifmt * daifmt,struct hdmi_codec_params * params)112 static int rockchip_dp_audio_hw_params(struct device *dev, void *data, struct hdmi_codec_daifmt *daifmt,
113 struct hdmi_codec_params *params)
114 {
115 struct rockchip_dp_device *dp = dev_get_drvdata(dev);
116
117 rockchip_grf_field_write(dp->grf, &dp->data->spdif_sel, daifmt->fmt == HDMI_SPDIF);
118 rockchip_grf_field_write(dp->grf, &dp->data->i2s_sel, daifmt->fmt == HDMI_I2S);
119
120 return analogix_dp_audio_hw_params(dp->adp, daifmt, params);
121 }
122
rockchip_dp_audio_shutdown(struct device * dev,void * data)123 static void rockchip_dp_audio_shutdown(struct device *dev, void *data)
124 {
125 struct rockchip_dp_device *dp = dev_get_drvdata(dev);
126
127 analogix_dp_audio_shutdown(dp->adp);
128
129 rockchip_grf_field_write(dp->grf, &dp->data->spdif_sel, 0);
130 rockchip_grf_field_write(dp->grf, &dp->data->i2s_sel, 0);
131 }
132
rockchip_dp_audio_startup(struct device * dev,void * data)133 static int rockchip_dp_audio_startup(struct device *dev, void *data)
134 {
135 struct rockchip_dp_device *dp = dev_get_drvdata(dev);
136
137 return analogix_dp_audio_startup(dp->adp);
138 }
139
rockchip_dp_audio_get_eld(struct device * dev,void * data,u8 * buf,size_t len)140 static int rockchip_dp_audio_get_eld(struct device *dev, void *data, u8 *buf, size_t len)
141 {
142 struct rockchip_dp_device *dp = dev_get_drvdata(dev);
143
144 return analogix_dp_audio_get_eld(dp->adp, buf, len);
145 }
146
147 static const struct hdmi_codec_ops rockchip_dp_audio_codec_ops = {
148 .hw_params = rockchip_dp_audio_hw_params,
149 .audio_startup = rockchip_dp_audio_startup,
150 .audio_shutdown = rockchip_dp_audio_shutdown,
151 .get_eld = rockchip_dp_audio_get_eld,
152 };
153
rockchip_dp_match_by_id(struct device * dev,const void * data)154 static int rockchip_dp_match_by_id(struct device *dev, const void *data)
155 {
156 struct rockchip_dp_device *dp = dev_get_drvdata(dev);
157 const unsigned int *id = data;
158
159 return dp->id == *id;
160 }
161
rockchip_dp_find_by_id(struct device_driver * drv,unsigned int id)162 static struct rockchip_dp_device *rockchip_dp_find_by_id(struct device_driver *drv, unsigned int id)
163 {
164 struct device *dev;
165
166 dev = driver_find_device(drv, NULL, &id, rockchip_dp_match_by_id);
167 if (!dev) {
168 return NULL;
169 }
170
171 return dev_get_drvdata(dev);
172 }
173
rockchip_dp_pre_init(struct rockchip_dp_device * dp)174 static int rockchip_dp_pre_init(struct rockchip_dp_device *dp)
175 {
176 reset_control_assert(dp->rst);
177 usleep_range(0xa, 0x14);
178 reset_control_deassert(dp->rst);
179
180 reset_control_assert(dp->apb_reset);
181 usleep_range(0xa, 0x14);
182 reset_control_deassert(dp->apb_reset);
183
184 return 0;
185 }
186
rockchip_dp_poweron_start(struct analogix_dp_plat_data * plat_data)187 static int rockchip_dp_poweron_start(struct analogix_dp_plat_data *plat_data)
188 {
189 struct rockchip_dp_device *dp = to_dp(plat_data);
190 int ret;
191
192 ret = rockchip_dp_pre_init(dp);
193 if (ret < 0) {
194 DRM_DEV_ERROR(dp->dev, "failed to dp pre init %d\n", ret);
195 return ret;
196 }
197
198 return rockchip_grf_field_write(dp->grf, &dp->data->edp_mode, 1);
199 }
200
rockchip_dp_powerdown(struct analogix_dp_plat_data * plat_data)201 static int rockchip_dp_powerdown(struct analogix_dp_plat_data *plat_data)
202 {
203 struct rockchip_dp_device *dp = to_dp(plat_data);
204
205 return rockchip_grf_field_write(dp->grf, &dp->data->edp_mode, 0);
206 }
207
rockchip_dp_get_modes(struct analogix_dp_plat_data * plat_data,struct drm_connector * connector)208 static int rockchip_dp_get_modes(struct analogix_dp_plat_data *plat_data, struct drm_connector *connector)
209 {
210 struct drm_display_info *di = &connector->display_info;
211 /* VOP couldn't output YUV video format for eDP rightly */
212 u32 mask = DRM_COLOR_FORMAT_YCRCB444 | DRM_COLOR_FORMAT_YCRCB422;
213
214 if ((di->color_formats & mask)) {
215 DRM_DEBUG_KMS("Swapping display color format from YUV to RGB\n");
216 di->color_formats &= ~mask;
217 di->color_formats |= DRM_COLOR_FORMAT_RGB444;
218 di->bpc = 0x8;
219 }
220
221 return 0;
222 }
223
rockchip_dp_loader_protect(struct drm_encoder * encoder,bool on)224 static void rockchip_dp_loader_protect(struct drm_encoder *encoder, bool on)
225 {
226 struct rockchip_dp_device *dp = to_dp(encoder);
227 struct analogix_dp_plat_data *plat_data = &dp->plat_data;
228
229 if (!on) {
230 return;
231 }
232
233 if (plat_data->panel) {
234 panel_simple_loader_protect(plat_data->panel);
235 }
236
237 analogix_dp_loader_protect(dp->adp);
238 }
239
rockchip_dp_bridge_attach(struct analogix_dp_plat_data * plat_data,struct drm_bridge * bridge,struct drm_connector * connector)240 static int rockchip_dp_bridge_attach(struct analogix_dp_plat_data *plat_data, struct drm_bridge *bridge,
241 struct drm_connector *connector)
242 {
243 struct rockchip_dp_device *dp = to_dp(plat_data);
244 struct rockchip_drm_sub_dev *sdev = &dp->sub_dev;
245 int ret;
246
247 if (dp->bridge) {
248 ret = drm_bridge_attach(&dp->encoder, dp->bridge, bridge, 0);
249 if (ret) {
250 DRM_ERROR("Failed to attach bridge to drm: %d\n", ret);
251 return ret;
252 }
253 }
254
255 if (connector) {
256 sdev->connector = connector;
257 sdev->of_node = dp->dev->of_node;
258 sdev->loader_protect = rockchip_dp_loader_protect;
259 rockchip_drm_register_sub_dev(sdev);
260 }
261
262 return 0;
263 }
264
rockchip_dp_bridge_detach(struct analogix_dp_plat_data * plat_data,struct drm_bridge * bridge)265 static void rockchip_dp_bridge_detach(struct analogix_dp_plat_data *plat_data, struct drm_bridge *bridge)
266 {
267 struct rockchip_dp_device *dp = to_dp(plat_data);
268 struct rockchip_drm_sub_dev *sdev = &dp->sub_dev;
269
270 if (sdev->connector) {
271 rockchip_drm_unregister_sub_dev(sdev);
272 }
273 }
274
rockchip_dp_drm_encoder_mode_fixup(struct drm_encoder * encoder,const struct drm_display_mode * mode,struct drm_display_mode * adjusted_mode)275 static bool rockchip_dp_drm_encoder_mode_fixup(struct drm_encoder *encoder, const struct drm_display_mode *mode,
276 struct drm_display_mode *adjusted_mode)
277 {
278 /* do nothing */
279 return true;
280 }
281
rockchip_dp_drm_encoder_mode_set(struct drm_encoder * encoder,struct drm_display_mode * mode,struct drm_display_mode * adjusted)282 static void rockchip_dp_drm_encoder_mode_set(struct drm_encoder *encoder, struct drm_display_mode *mode,
283 struct drm_display_mode *adjusted)
284 {
285 /* do nothing */
286 }
287
rockchip_dp_drm_get_new_crtc(struct drm_encoder * encoder,struct drm_atomic_state * state)288 static struct drm_crtc *rockchip_dp_drm_get_new_crtc(struct drm_encoder *encoder, struct drm_atomic_state *state)
289 {
290 struct drm_connector *connector;
291 struct drm_connector_state *conn_state;
292
293 connector = drm_atomic_get_new_connector_for_encoder(state, encoder);
294 if (!connector) {
295 return NULL;
296 }
297
298 conn_state = drm_atomic_get_new_connector_state(state, connector);
299 if (!conn_state) {
300 return NULL;
301 }
302
303 return conn_state->crtc;
304 }
305
rockchip_dp_drm_encoder_enable(struct drm_encoder * encoder,struct drm_atomic_state * state)306 static void rockchip_dp_drm_encoder_enable(struct drm_encoder *encoder, struct drm_atomic_state *state)
307 {
308 struct rockchip_dp_device *dp = to_dp(encoder);
309 struct drm_crtc *crtc;
310 struct drm_crtc_state *old_crtc_state;
311 int ret;
312
313 crtc = rockchip_dp_drm_get_new_crtc(encoder, state);
314 if (!crtc) {
315 return;
316 }
317
318 old_crtc_state = drm_atomic_get_old_crtc_state(state, crtc);
319 /* Coming back from self refresh, nothing to do */
320 if (old_crtc_state && old_crtc_state->self_refresh_active) {
321 return;
322 }
323
324 ret = drm_of_encoder_active_endpoint_id(dp->dev->of_node, encoder);
325 if (ret < 0) {
326 return;
327 }
328
329 DRM_DEV_DEBUG(dp->dev, "vop %s output to dp\n", (ret) ? "LIT" : "BIG");
330
331 ret = rockchip_grf_field_write(dp->grf, &dp->data->lcdc_sel, ret);
332 if (ret != 0) {
333 DRM_DEV_ERROR(dp->dev, "Could not write to GRF: %d\n", ret);
334 }
335 }
336
rockchip_dp_drm_encoder_disable(struct drm_encoder * encoder,struct drm_atomic_state * state)337 static void rockchip_dp_drm_encoder_disable(struct drm_encoder *encoder, struct drm_atomic_state *state)
338 {
339 struct rockchip_dp_device *dp = to_dp(encoder);
340 struct drm_crtc *crtc;
341 struct drm_crtc_state *new_crtc_state = NULL;
342 int ret;
343
344 crtc = rockchip_dp_drm_get_new_crtc(encoder, state);
345 /* No crtc means we're doing a full shutdown */
346 if (!crtc) {
347 return;
348 }
349
350 new_crtc_state = drm_atomic_get_new_crtc_state(state, crtc);
351 /* If we're not entering self-refresh, no need to wait for vact */
352 if (!new_crtc_state || !new_crtc_state->self_refresh_active) {
353 return;
354 }
355
356 ret = rockchip_drm_wait_vact_end(crtc, PSR_WAIT_LINE_FLAG_TIMEOUT_MS);
357 if (ret) {
358 DRM_DEV_ERROR(dp->dev, "line flag irq timed out\n");
359 }
360 }
361
rockchip_dp_drm_encoder_atomic_check(struct drm_encoder * encoder,struct drm_crtc_state * crtc_state,struct drm_connector_state * conn_state)362 static int rockchip_dp_drm_encoder_atomic_check(struct drm_encoder *encoder, struct drm_crtc_state *crtc_state,
363 struct drm_connector_state *conn_state)
364 {
365 struct rockchip_dp_device *dp = to_dp(encoder);
366 struct rockchip_crtc_state *s = to_rockchip_crtc_state(crtc_state);
367 struct drm_display_info *di = &conn_state->connector->display_info;
368
369 if (di->num_bus_formats) {
370 s->bus_format = di->bus_formats[0];
371 } else {
372 s->bus_format = MEDIA_BUS_FMT_RGB888_1X24;
373 }
374
375 /*
376 * The hardware IC designed that VOP must output the RGB10 video
377 * format to eDP controller, and if eDP panel only support RGB8,
378 * then eDP controller should cut down the video data, not via VOP
379 * controller, that's why we need to hardcode the VOP output mode
380 * to RGA10 here.
381 */
382
383 s->output_mode = ROCKCHIP_OUT_MODE_AAAA;
384 s->output_type = DRM_MODE_CONNECTOR_eDP;
385 if (dp->plat_data.split_mode) {
386 s->output_flags |= ROCKCHIP_OUTPUT_DUAL_CHANNEL_LEFT_RIGHT_MODE;
387 s->output_flags |= dp->id ? ROCKCHIP_OUTPUT_DATA_SWAP : 0;
388 s->output_if |= VOP_OUTPUT_IF_eDP0 | VOP_OUTPUT_IF_eDP1;
389 } else {
390 s->output_if |= dp->id ? VOP_OUTPUT_IF_eDP1 : VOP_OUTPUT_IF_eDP0;
391 }
392 s->output_bpc = di->bpc;
393 s->bus_flags = di->bus_flags;
394 s->tv_state = &conn_state->tv;
395 s->eotf = HDMI_EOTF_TRADITIONAL_GAMMA_SDR;
396 s->color_space = V4L2_COLORSPACE_DEFAULT;
397
398 return 0;
399 }
400
401 static struct drm_encoder_helper_funcs rockchip_dp_encoder_helper_funcs = {
402 .mode_fixup = rockchip_dp_drm_encoder_mode_fixup,
403 .mode_set = rockchip_dp_drm_encoder_mode_set,
404 .atomic_enable = rockchip_dp_drm_encoder_enable,
405 .atomic_disable = rockchip_dp_drm_encoder_disable,
406 .atomic_check = rockchip_dp_drm_encoder_atomic_check,
407 };
408
rockchip_dp_of_probe(struct rockchip_dp_device * dp)409 static int rockchip_dp_of_probe(struct rockchip_dp_device *dp)
410 {
411 struct device *dev = dp->dev;
412 struct device_node *np = dev->of_node;
413
414 if (of_property_read_bool(np, "rockchip,grf")) {
415 dp->grf = syscon_regmap_lookup_by_phandle(np, "rockchip,grf");
416 if (IS_ERR(dp->grf)) {
417 DRM_DEV_ERROR(dev, "failed to get rockchip,grf\n");
418 return PTR_ERR(dp->grf);
419 }
420 }
421
422 dp->rst = devm_reset_control_get(dev, "dp");
423 if (IS_ERR(dp->rst)) {
424 DRM_DEV_ERROR(dev, "failed to get dp reset control\n");
425 return PTR_ERR(dp->rst);
426 }
427
428 dp->apb_reset = devm_reset_control_get_optional(dev, "apb");
429 if (IS_ERR(dp->apb_reset)) {
430 DRM_DEV_ERROR(dev, "failed to get apb reset control\n");
431 return PTR_ERR(dp->apb_reset);
432 }
433
434 return 0;
435 }
436
rockchip_dp_drm_create_encoder(struct rockchip_dp_device * dp)437 static int rockchip_dp_drm_create_encoder(struct rockchip_dp_device *dp)
438 {
439 struct drm_encoder *encoder = &dp->encoder;
440 struct drm_device *drm_dev = dp->drm_dev;
441 struct device *dev = dp->dev;
442 int ret;
443
444 encoder->possible_crtcs = rockchip_drm_of_find_possible_crtcs(drm_dev, dev->of_node);
445 DRM_DEBUG_KMS("possible_crtcs = 0x%x\n", encoder->possible_crtcs);
446
447 ret = drm_simple_encoder_init(drm_dev, encoder, DRM_MODE_ENCODER_TMDS);
448 if (ret) {
449 DRM_ERROR("failed to initialize encoder with drm\n");
450 return ret;
451 }
452
453 drm_encoder_helper_add(encoder, &rockchip_dp_encoder_helper_funcs);
454
455 return 0;
456 }
457
rockchip_dp_bind(struct device * dev,struct device * master,void * data)458 static int rockchip_dp_bind(struct device *dev, struct device *master, void *data)
459 {
460 struct rockchip_dp_device *dp = dev_get_drvdata(dev);
461 struct drm_device *drm_dev = data;
462 int ret;
463
464 dp->drm_dev = drm_dev;
465
466 if (!dp->plat_data.left) {
467 ret = rockchip_dp_drm_create_encoder(dp);
468 if (ret) {
469 DRM_ERROR("failed to create drm encoder\n");
470 return ret;
471 }
472
473 dp->plat_data.encoder = &dp->encoder;
474 }
475
476 if (dp->data->audio) {
477 struct hdmi_codec_pdata codec_data = {
478 .ops = &rockchip_dp_audio_codec_ops,
479 .spdif = 1,
480 .i2s = 1,
481 .max_i2s_channels = 2,
482 };
483
484 dp->audio_pdev = platform_device_register_data(dev, HDMI_CODEC_DRV_NAME, PLATFORM_DEVID_AUTO, &codec_data,
485 sizeof(codec_data));
486 if (IS_ERR(dp->audio_pdev)) {
487 ret = PTR_ERR(dp->audio_pdev);
488 goto err_cleanup_encoder;
489 }
490 }
491
492 ret = analogix_dp_bind(dp->adp, drm_dev);
493 if (ret) {
494 goto err_unregister_audio_pdev;
495 }
496
497 return 0;
498
499 err_unregister_audio_pdev:
500 if (dp->audio_pdev) {
501 platform_device_unregister(dp->audio_pdev);
502 }
503 err_cleanup_encoder:
504 dp->encoder.funcs->destroy(&dp->encoder);
505 return ret;
506 }
507
rockchip_dp_unbind(struct device * dev,struct device * master,void * data)508 static void rockchip_dp_unbind(struct device *dev, struct device *master, void *data)
509 {
510 struct rockchip_dp_device *dp = dev_get_drvdata(dev);
511
512 if (dp->audio_pdev) {
513 platform_device_unregister(dp->audio_pdev);
514 }
515 analogix_dp_unbind(dp->adp);
516 dp->encoder.funcs->destroy(&dp->encoder);
517 }
518
519 static const struct component_ops rockchip_dp_component_ops = {
520 .bind = rockchip_dp_bind,
521 .unbind = rockchip_dp_unbind,
522 };
523
rockchip_dp_probe(struct platform_device * pdev)524 static int rockchip_dp_probe(struct platform_device *pdev)
525 {
526 struct device *dev = &pdev->dev;
527 const struct rockchip_dp_chip_data *dp_data;
528 struct drm_panel *panel = NULL;
529 struct drm_bridge *bridge = NULL;
530 struct rockchip_dp_device *dp;
531 int id, i, ret;
532
533 dp_data = of_device_get_match_data(dev);
534 if (!dp_data) {
535 return -ENODEV;
536 }
537
538 ret = drm_of_find_panel_or_bridge(dev->of_node, 1, 0, &panel, &bridge);
539 if (ret < 0 && ret != -ENODEV) {
540 return ret;
541 }
542
543 dp = devm_kzalloc(dev, sizeof(*dp), GFP_KERNEL);
544 if (!dp) {
545 return -ENOMEM;
546 }
547
548 id = of_alias_get_id(dev->of_node, "edp");
549 if (id < 0) {
550 id = 0;
551 }
552
553 i = 0;
554 while (is_rockchip(dp_data[i].chip_type)) {
555 i++;
556 }
557
558 if (id >= i) {
559 dev_err(dev, "invalid id: %d\n", id);
560 return -ENODEV;
561 }
562
563 dp->dev = dev;
564 dp->id = id;
565 dp->adp = ERR_PTR(-ENODEV);
566 dp->data = &dp_data[id];
567 dp->plat_data.ssc = dp->data->ssc;
568 dp->plat_data.panel = panel;
569 dp->plat_data.dev_type = dp->data->chip_type;
570 dp->plat_data.power_on_start = rockchip_dp_poweron_start;
571 dp->plat_data.power_off = rockchip_dp_powerdown;
572 dp->plat_data.get_modes = rockchip_dp_get_modes;
573 dp->plat_data.attach = rockchip_dp_bridge_attach;
574 dp->plat_data.detach = rockchip_dp_bridge_detach;
575 dp->plat_data.convert_to_split_mode = drm_mode_convert_to_split_mode;
576 dp->plat_data.convert_to_origin_mode = drm_mode_convert_to_origin_mode;
577 dp->plat_data.skip_connector = !!bridge;
578 dp->bridge = bridge;
579
580 ret = rockchip_dp_of_probe(dp);
581 if (ret < 0) {
582 return ret;
583 }
584 platform_set_drvdata(pdev, dp);
585 dp->adp = analogix_dp_probe(dev, &dp->plat_data);
586 if (IS_ERR(dp->adp)) {
587 return PTR_ERR(dp->adp);
588 }
589 if (dp->data->split_mode && device_property_read_bool(dev, "split-mode")) {
590 struct rockchip_dp_device *secondary = rockchip_dp_find_by_id(dev->driver, !dp->id);
591 if (!secondary) {
592 return -EPROBE_DEFER;
593 }
594 dp->plat_data.right = secondary->adp;
595 dp->plat_data.split_mode = true;
596 secondary->plat_data.left = dp->adp;
597 secondary->plat_data.split_mode = true;
598 }
599 ret = component_add(dev, &rockchip_dp_component_ops);
600 if (ret) {
601 analogix_dp_remove(dp->adp);
602 return ret;
603 }
604 return 0;
605 }
606
rockchip_dp_remove(struct platform_device * pdev)607 static int rockchip_dp_remove(struct platform_device *pdev)
608 {
609 struct rockchip_dp_device *dp = platform_get_drvdata(pdev);
610 component_del(&pdev->dev, &rockchip_dp_component_ops);
611 analogix_dp_remove(dp->adp);
612 return 0;
613 }
614
rockchip_dp_runtime_suspend(struct device * dev)615 static __maybe_unused int rockchip_dp_runtime_suspend(struct device *dev)
616 {
617 struct rockchip_dp_device *dp = dev_get_drvdata(dev);
618
619 if (IS_ERR(dp->adp)) {
620 return 0;
621 }
622
623 return analogix_dp_runtime_suspend(dp->adp);
624 }
625
rockchip_dp_runtime_resume(struct device * dev)626 static __maybe_unused int rockchip_dp_runtime_resume(struct device *dev)
627 {
628 struct rockchip_dp_device *dp = dev_get_drvdata(dev);
629
630 if (IS_ERR(dp->adp)) {
631 return 0;
632 }
633
634 return analogix_dp_runtime_resume(dp->adp);
635 }
636
637 static const struct dev_pm_ops rockchip_dp_pm_ops = {
638 SET_RUNTIME_PM_OPS(rockchip_dp_runtime_suspend, rockchip_dp_runtime_resume, NULL)};
639
640 static const struct rockchip_dp_chip_data rk3399_edp[] = {
641 {
642 .chip_type = RK3399_EDP,
643 .lcdc_sel = GRF_REG_FIELD(0x6250, 5, 5),
644 .ssc = true,
645 },
646 {}
647 };
648
649 static const struct rockchip_dp_chip_data rk3288_dp[] = {
650 {
651 .chip_type = RK3288_DP,
652 .lcdc_sel = GRF_REG_FIELD(0x025c, 5, 5),
653 .ssc = true,
654 },
655 {}
656 };
657
658 static const struct rockchip_dp_chip_data rk3568_edp[] = {
659 {
660 .chip_type = RK3568_EDP,
661 .ssc = true,
662 .audio = true,
663 },
664 {}
665 };
666
667 static const struct rockchip_dp_chip_data rk3588_edp[] = {
668 {
669 .chip_type = RK3588_EDP,
670 .spdif_sel = GRF_REG_FIELD(0x0000, 4, 4),
671 .i2s_sel = GRF_REG_FIELD(0x0000, 3, 3),
672 .edp_mode = GRF_REG_FIELD(0x0000, 0, 0),
673 .ssc = true,
674 .audio = true,
675 .split_mode = true,
676 },
677 {
678 .chip_type = RK3588_EDP,
679 .spdif_sel = GRF_REG_FIELD(0x0004, 4, 4),
680 .i2s_sel = GRF_REG_FIELD(0x0004, 3, 3),
681 .edp_mode = GRF_REG_FIELD(0x0004, 0, 0),
682 .ssc = true,
683 .audio = true,
684 .split_mode = true,
685 },
686 {}
687 };
688
689 static const struct of_device_id rockchip_dp_dt_ids[] = {{.compatible = "rockchip,rk3288-dp", .data = &rk3288_dp},
690 {.compatible = "rockchip,rk3399-edp", .data = &rk3399_edp},
691 {.compatible = "rockchip,rk3568-edp", .data = &rk3568_edp},
692 {.compatible = "rockchip,rk3588-edp", .data = &rk3588_edp},
693 {}};
694 MODULE_DEVICE_TABLE(of, rockchip_dp_dt_ids);
695
696 struct platform_driver rockchip_dp_driver = {
697 .probe = rockchip_dp_probe,
698 .remove = rockchip_dp_remove,
699 .driver =
700 {
701 .name = "rockchip-dp",
702 .pm = &rockchip_dp_pm_ops,
703 .of_match_table = of_match_ptr(rockchip_dp_dt_ids),
704 },
705 };
706