1 /*
2 * Copyright (c) Huawei Technologies Co., Ltd. 2021. All rights reserved.
3 * Licensed under the Apache License, Version 2.0 (the "License");
4 * you may not use this file except in compliance with the License.
5 * You may obtain a copy of the License at
6 *
7 * http://www.apache.org/licenses/LICENSE-2.0
8 *
9 * Unless required by applicable law or agreed to in writing, software
10 * distributed under the License is distributed on an "AS IS" BASIS,
11 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
12 * See the License for the specific language governing permissions and
13 * limitations under the License.
14 */
15
16 #include "register_test.h"
17
18 #include <bitset>
19
20 using namespace testing::ext;
21 using namespace std;
22 using namespace OHOS::HiviewDFX;
23 namespace OHOS {
24 namespace Developtools {
25 namespace NativeDaemon {
26 class RegisterTest : public testing::Test {
27 public:
28 static void SetUpTestCase(void);
29 static void TearDownTestCase(void);
30 void SetUp();
31 void TearDown();
32 };
33
SetUpTestCase()34 void RegisterTest::SetUpTestCase() {}
35
TearDownTestCase()36 void RegisterTest::TearDownTestCase() {}
37
SetUp()38 void RegisterTest::SetUp() {}
39
TearDown()40 void RegisterTest::TearDown() {}
41
42 /**
43 * @tc.name: GetSupportedRegMask
44 * @tc.desc:
45 * @tc.type: FUNC
46 */
47 HWTEST_F(RegisterTest, GetSupportedRegMask, TestSize.Level1)
48 {
49 EXPECT_NE(GetSupportedRegMask(ArchType::ARCH_X86), GetSupportedRegMask(ArchType::ARCH_X86_64));
50 EXPECT_NE(GetSupportedRegMask(ArchType::ARCH_ARM), GetSupportedRegMask(ArchType::ARCH_ARM64));
51 EXPECT_EQ(GetSupportedRegMask(static_cast<ArchType>(100)),
52 std::numeric_limits<uint64_t>::max());
53 EXPECT_EQ(GetSupportedRegMask(static_cast<ArchType>(-1)), std::numeric_limits<uint64_t>::max());
54
55 std::bitset<64> regMasker;
56 regMasker = GetSupportedRegMask(ArchType::ARCH_X86);
57 EXPECT_EQ(regMasker.count(), PERF_REG_X86_32_MAX);
58
59 regMasker = GetSupportedRegMask(ArchType::ARCH_X86_64);
60 // dont support PERF_REG_X86_DS,PERF_REG_X86_ES,PERF_REG_X86_FS,PERF_REG_X86_GS
61 EXPECT_EQ(regMasker.count(), PERF_REG_X86_64_MAX - 4u);
62
63 regMasker = GetSupportedRegMask(ArchType::ARCH_ARM);
64 EXPECT_EQ(regMasker.count(), PERF_REG_ARM_MAX);
65
66 regMasker = GetSupportedRegMask(ArchType::ARCH_ARM64);
67 EXPECT_EQ(regMasker.count(), PERF_REG_ARM64_MAX);
68 }
69
70 /**
71 * @tc.name: RegisterGetIP
72 * @tc.desc:
73 * @tc.type: FUNC
74 */
75 HWTEST_F(RegisterTest, RegisterGetIP, TestSize.Level1)
76 {
77 #if defined(target_cpu_x86_64)
78 EXPECT_EQ(RegisterGetIP(ArchType::ARCH_X86_64), PERF_REG_X86_IP);
79 #elif defined(target_cpu_arm)
80 EXPECT_EQ(RegisterGetIP(ArchType::ARCH_ARM), PERF_REG_ARM_PC);
81 #elif defined(target_cpu_arm64)
82 EXPECT_EQ(RegisterGetIP(ArchType::ARCH_ARM64), PERF_REG_ARM64_PC);
83 #endif
84 }
85
86 /**
87 * @tc.name: RegisterGetSP
88 * @tc.desc:
89 * @tc.type: FUNC
90 */
91 HWTEST_F(RegisterTest, RegisterGetSP, TestSize.Level1)
92 {
93 #if defined(target_cpu_x86_64)
94 EXPECT_EQ(RegisterGetSP(ArchType::ARCH_X86_64), PERF_REG_X86_IP);
95 #elif defined(target_cpu_arm)
96 EXPECT_EQ(RegisterGetSP(ArchType::ARCH_ARM), PERF_REG_ARM_SP);
97 #elif defined(target_cpu_arm64)
98 EXPECT_EQ(RegisterGetSP(ArchType::ARCH_ARM64), PERF_REG_ARM64_SP);
99 #endif
100 }
101
102 /**
103 * @tc.name: RegisterGetValue
104 * @tc.desc:
105 * @tc.type: FUNC
106 */
107 HWTEST_F(RegisterTest, RegisterGetValue, TestSize.Level1)
108 {
109 uint64_t value = 0;
110 const u64 registers[4] = {1, 2, 3, 4};
111
112 EXPECT_EQ(RegisterGetValue(value, registers, 0, sizeof(registers)), true);
113 EXPECT_EQ(RegisterGetValue(value, registers, sizeof(registers), sizeof(registers)), false);
114 EXPECT_EQ(RegisterGetValue(value, registers, -1, sizeof(registers)), false);
115
116 for (unsigned i = 0; i < sizeof(registers); i++) {
117 RegisterGetValue(value, registers, i, sizeof(registers));
118 EXPECT_EQ(value, registers[i]);
119 }
120 }
121
122 /**
123 * @tc.name: RegisterGetSPValue
124 * @tc.desc:
125 * @tc.type: FUNC
126 */
127 HWTEST_F(RegisterTest, RegisterGetSPValue, TestSize.Level1)
128 {
129 uint64_t value = 0;
130 uint64_t value2 = 0;
131 u64 registers[PERF_REG_ARM64_MAX] = {1, 2, 3, 4};
132 size_t sp = RegisterGetSP(buildArchType);
133 registers[sp] = 0x1234;
134
135 EXPECT_EQ(RegisterGetValue(value, registers, sp, sizeof(registers)),
136 RegisterGetSPValue(value2, buildArchType, registers, sizeof(registers)));
137
138 EXPECT_EQ(value, value2);
139 }
140
141 /**
142 * @tc.name: RegisterGetIPValue
143 * @tc.desc:
144 * @tc.type: FUNC
145 */
146 HWTEST_F(RegisterTest, RegisterGetIPValue, TestSize.Level1)
147 {
148 uint64_t value = 0;
149 uint64_t value2 = 0;
150 u64 registers[PERF_REG_ARM64_MAX] = {1, 2, 3, 4};
151 size_t ip = RegisterGetIP(buildArchType);
152 registers[ip] = 0x1234;
153
154 EXPECT_EQ(RegisterGetValue(value, registers, ip, sizeof(registers)),
155 RegisterGetIPValue(value2, buildArchType, registers, sizeof(registers)));
156
157 EXPECT_EQ(value, value2);
158 }
159
160 /**
161 * @tc.name: RegisterGetName
162 * @tc.desc:
163 * @tc.type: FUNC
164 */
165 HWTEST_F(RegisterTest, RegisterGetName, TestSize.Level1)
166 {
167 for (unsigned i = 0; i < PERF_REG_ARM64_MAX; i++) {
168 EXPECT_EQ(RegisterGetName(i).empty(), false);
169 }
170 }
171 } // namespace NativeDaemon
172 } // namespace Developtools
173 } // namespace OHOS
174