1 /* SPDX-License-Identifier: GPL-2.0 */ 2 #ifndef __MACH_ROCKCHIP_GRF_H 3 #define __MACH_ROCKCHIP_GRF_H 4 5 #define RK3188_GRF_GPIO0L_DIR 0x0000 6 #define RK3188_GRF_GPIO0H_DIR 0x0004 7 #define RK3188_GRF_GPIO1L_DIR 0x0008 8 #define RK3188_GRF_GPIO1H_DIR 0x000c 9 #define RK3188_GRF_GPIO2L_DIR 0x0010 10 #define RK3188_GRF_GPIO2H_DIR 0x0014 11 #define RK3188_GRF_GPIO3L_DIR 0x0018 12 #define RK3188_GRF_GPIO3H_DIR 0x001c 13 #define RK3188_GRF_GPIO0L_DO 0x0020 14 #define RK3188_GRF_GPIO0H_DO 0x0024 15 #define RK3188_GRF_GPIO1L_DO 0x0028 16 #define RK3188_GRF_GPIO1H_DO 0x002c 17 #define RK3188_GRF_GPIO2L_DO 0x0030 18 #define RK3188_GRF_GPIO2H_DO 0x0034 19 #define RK3188_GRF_GPIO3L_DO 0x0038 20 #define RK3188_GRF_GPIO3H_DO 0x003c 21 #define RK3188_GRF_GPIO0L_EN 0x0040 22 #define RK3188_GRF_GPIO0H_EN 0x0044 23 #define RK3188_GRF_GPIO1L_EN 0x0048 24 #define RK3188_GRF_GPIO1H_EN 0x004c 25 #define RK3188_GRF_GPIO2L_EN 0x0050 26 #define RK3188_GRF_GPIO2H_EN 0x0054 27 #define RK3188_GRF_GPIO3L_EN 0x0058 28 #define RK3188_GRF_GPIO3H_EN 0x005c 29 30 #define RK3188_GRF_GPIO0C_IOMUX 0x0068 31 #define RK3188_GRF_GPIO0D_IOMUX 0x006c 32 #define RK3188_GRF_GPIO1A_IOMUX 0x0070 33 #define RK3188_GRF_GPIO1B_IOMUX 0x0074 34 #define RK3188_GRF_GPIO1C_IOMUX 0x0078 35 #define RK3188_GRF_GPIO1D_IOMUX 0x007c 36 #define RK3188_GRF_GPIO2A_IOMUX 0x0080 37 #define RK3188_GRF_GPIO2B_IOMUX 0x0084 38 #define RK3188_GRF_GPIO2C_IOMUX 0x0088 39 #define RK3188_GRF_GPIO2D_IOMUX 0x008c 40 #define RK3188_GRF_GPIO3A_IOMUX 0x0090 41 #define RK3188_GRF_GPIO3B_IOMUX 0x0094 42 #define RK3188_GRF_GPIO3C_IOMUX 0x0098 43 #define RK3188_GRF_GPIO3D_IOMUX 0x009c 44 #define RK3188_GRF_SOC_CON0 0x00a0 45 #define RK3188_GRF_SOC_CON1 0x00a4 46 #define RK3188_GRF_SOC_CON2 0x00a8 47 #define RK3188_GRF_SOC_STATUS0 0x00ac 48 #define RK3188_GRF_DMAC1_CON0 0x00b0 49 #define RK3188_GRF_DMAC1_CON1 0x00b4 50 #define RK3188_GRF_DMAC1_CON2 0x00b8 51 #define RK3188_GRF_DMAC2_CON0 0x00bc 52 #define RK3188_GRF_DMAC2_CON1 0x00c0 53 #define RK3188_GRF_DMAC2_CON2 0x00c4 54 #define RK3188_GRF_DMAC2_CON3 0x00c8 55 #define RK3188_GRF_CPU_CON0 0x00cc 56 #define RK3188_GRF_CPU_CON1 0x00d0 57 #define RK3188_GRF_CPU_CON2 0x00d4 58 #define RK3188_GRF_CPU_CON3 0x00d8 59 #define RK3188_GRF_CPU_CON4 0x00dc 60 #define RK3188_GRF_CPU_CON5 0x00e0 61 62 #define RK3188_GRF_DDRC_CON0 0x00ec 63 #define RK3188_GRF_DDRC_STAT 0x00f0 64 #define RK3188_GRF_IO_CON0 0x00f4 65 #define RK3188_GRF_IO_CON1 0x00f8 66 #define RK3188_GRF_IO_CON2 0x00fc 67 #define RK3188_GRF_IO_CON3 0x0100 68 #define RK3188_GRF_IO_CON4 0x0104 69 #define RK3188_GRF_SOC_STATUS1 0x0108 70 #define RK3188_GRF_UOC0_CON0 0x010c 71 #define RK3188_GRF_UOC0_CON1 0x0110 72 #define RK3188_GRF_UOC0_CON2 0x0114 73 #define RK3188_GRF_UOC0_CON3 0x0118 74 #define RK3188_GRF_UOC1_CON0 0x011c 75 #define RK3188_GRF_UOC1_CON1 0x0120 76 #define RK3188_GRF_UOC1_CON2 0x0124 77 #define RK3188_GRF_UOC1_CON3 0x0128 78 #define RK3188_GRF_UOC2_CON0 0x012c 79 #define RK3188_GRF_UOC2_CON1 0x0130 80 81 #define RK3188_GRF_UOC3_CON0 0x0138 82 #define RK3188_GRF_UOC3_CON1 0x013c 83 #define RK3188_GRF_EHCI_STAT 0x0140 84 #define RK3188_GRF_OS_REG0 0x0144 85 #define RK3188_GRF_OS_REG1 0x0148 86 #define RK3188_GRF_OS_REG2 0x014c 87 #define RK3188_GRF_OS_REG3 0x0150 88 #define RK3188_GRF_OS_REG4 0x0154 89 #define RK3188_GRF_OS_REG5 0x0158 90 #define RK3188_GRF_OS_REG6 0x015c 91 #define RK3188_GRF_OS_REG7 0x0160 92 #define RK3188_GRF_GPIO0B_PULL 0x0164 93 #define RK3188_GRF_GPIO0C_PULL 0x0168 94 #define RK3188_GRF_GPIO0D_PULL 0x016c 95 #define RK3188_GRF_GPIO1A_PULL 0x0170 96 #define RK3188_GRF_GPIO1B_PULL 0x0174 97 #define RK3188_GRF_GPIO1C_PULL 0x0178 98 #define RK3188_GRF_GPIO1D_PULL 0x017c 99 #define RK3188_GRF_GPIO2A_PULL 0x0180 100 #define RK3188_GRF_GPIO2B_PULL 0x0184 101 #define RK3188_GRF_GPIO2C_PULL 0x0188 102 #define RK3188_GRF_GPIO2D_PULL 0x018c 103 #define RK3188_GRF_GPIO3A_PULL 0x0190 104 #define RK3188_GRF_GPIO3B_PULL 0x0194 105 #define RK3188_GRF_GPIO3C_PULL 0x0198 106 #define RK3188_GRF_GPIO3D_PULL 0x019c 107 #define RK3188_GRF_FLASH_DATA_PULL 0x01a0 108 #define RK3188_GRF_FLASH_CMD_PULL 0x01a4 109 110 #define RK3288_GRF_GPIO0_A_IOMUX 0x0084 111 #define RK3288_GRF_GPIO0_B_IOMUX 0x0088 112 #define RK3288_GRF_GPIO0_C_IOMUX 0x008c 113 114 #define RK3288_GRF_GPIO1D_IOMUX 0x000c 115 #define RK3288_GRF_GPIO2A_IOMUX 0x0010 116 #define RK3288_GRF_GPIO2B_IOMUX 0x0014 117 #define RK3288_GRF_GPIO2C_IOMUX 0x0018 118 119 #define RK3288_GRF_GPIO3A_IOMUX 0x0020 120 #define RK3288_GRF_GPIO3B_IOMUX 0x0024 121 #define RK3288_GRF_GPIO3C_IOMUX 0x0028 122 #define RK3288_GRF_GPIO3DL_IOMUX 0x002c 123 #define RK3288_GRF_GPIO3DH_IOMUX 0x0030 124 #define RK3288_GRF_GPIO4AL_IOMUX 0x0034 125 #define RK3288_GRF_GPIO4AH_IOMUX 0x0038 126 #define RK3288_GRF_GPIO4BL_IOMUX 0x003c 127 128 #define RK3288_GRF_GPIO4C_IOMUX 0x0044 129 #define RK3288_GRF_GPIO4D_IOMUX 0x0048 130 131 #define RK3288_GRF_GPIO5B_IOMUX 0x0050 132 #define RK3288_GRF_GPIO5C_IOMUX 0x0054 133 134 #define RK3288_GRF_GPIO6A_IOMUX 0x005c 135 #define RK3288_GRF_GPIO6B_IOMUX 0x0060 136 #define RK3288_GRF_GPIO6C_IOMUX 0x0064 137 138 #define RK3288_GRF_GPIO7A_IOMUX 0x006c 139 #define RK3288_GRF_GPIO7B_IOMUX 0x0070 140 #define RK3288_GRF_GPIO7CL_IOMUX 0x0074 141 #define RK3288_GRF_GPIO7CH_IOMUX 0x0078 142 143 #define RK3288_GRF_GPIO8A_IOMUX 0x0080 144 #define RK3288_GRF_GPIO8B_IOMUX 0x0084 145 146 #define RK3288_GRF_GPIO1H_SR 0x0104 147 #define RK3288_GRF_GPIO2L_SR 0x0108 148 #define RK3288_GRF_GPIO2H_SR 0x010c 149 #define RK3288_GRF_GPIO3L_SR 0x0110 150 #define RK3288_GRF_GPIO3H_SR 0x0114 151 #define RK3288_GRF_GPIO4L_SR 0x0118 152 #define RK3288_GRF_GPIO4H_SR 0x011c 153 #define RK3288_GRF_GPIO5L_SR 0x0120 154 #define RK3288_GRF_GPIO5H_SR 0x0124 155 #define RK3288_GRF_GPIO6L_SR 0x0128 156 #define RK3288_GRF_GPIO6H_SR 0x012c 157 #define RK3288_GRF_GPIO7L_SR 0x0130 158 #define RK3288_GRF_GPIO7H_SR 0x0134 159 #define RK3288_GRF_GPIO8L_SR 0x0138 160 161 #define RK3288_GRF_GPIO1D_P 0x014c 162 #define RK3288_GRF_GPIO2A_P 0x0150 163 #define RK3288_GRF_GPIO2B_P 0x0154 164 #define RK3288_GRF_GPIO2C_P 0x0158 165 166 #define RK3288_GRF_GPIO3A_P 0x0160 167 #define RK3288_GRF_GPIO3B_P 0x0164 168 #define RK3288_GRF_GPIO3C_P 0x0168 169 #define RK3288_GRF_GPIO3D_P 0x016c 170 #define RK3288_GRF_GPIO4A_P 0x0170 171 #define RK3288_GRF_GPIO4B_P 0x0174 172 #define RK3288_GRF_GPIO4C_P 0x0178 173 #define RK3288_GRF_GPIO4D_P 0x017c 174 175 #define RK3288_GRF_GPIO5B_P 0x0184 176 #define RK3288_GRF_GPIO5C_P 0x0188 177 178 #define RK3288_GRF_GPIO6A_P 0x0190 179 #define RK3288_GRF_GPIO6B_P 0x0194 180 #define RK3288_GRF_GPIO6C_P 0x0198 181 182 #define RK3288_GRF_GPIO7A_P 0x01a0 183 #define RK3288_GRF_GPIO7B_P 0x01a4 184 #define RK3288_GRF_GPIO7C_P 0x01a8 185 186 #define RK3288_GRF_GPIO8A_P 0x01b0 187 #define RK3288_GRF_GPIO8B_P 0x01b4 188 189 #define RK3288_GRF_GPIO1D_E 0x01cc 190 #define RK3288_GRF_GPIO2A_E 0x01d0 191 #define RK3288_GRF_GPIO2B_E 0x01d4 192 #define RK3288_GRF_GPIO2C_E 0x01d8 193 194 #define RK3288_GRF_GPIO3A_E 0x01e0 195 #define RK3288_GRF_GPIO3B_E 0x01e4 196 #define RK3288_GRF_GPIO3C_E 0x01e8 197 #define RK3288_GRF_GPIO3D_E 0x01ec 198 #define RK3288_GRF_GPIO4A_E 0x01f0 199 #define RK3288_GRF_GPIO4B_E 0x01f4 200 #define RK3288_GRF_GPIO4C_E 0x01f8 201 #define RK3288_GRF_GPIO4D_E 0x01fc 202 203 #define RK3288_GRF_GPIO5B_E 0x0204 204 #define RK3288_GRF_GPIO5C_E 0x0208 205 206 #define RK3288_GRF_GPIO6A_E 0x0210 207 #define RK3288_GRF_GPIO6B_E 0x0214 208 #define RK3288_GRF_GPIO6C_E 0x0218 209 210 #define RK3288_GRF_GPIO7A_E 0x0220 211 #define RK3288_GRF_GPIO7B_E 0x0224 212 #define RK3288_GRF_GPIO7C_E 0x0228 213 214 #define RK3288_GRF_GPIO8A_E 0x0230 215 #define RK3288_GRF_GPIO8B_E 0x0234 216 217 #define RK3288_GRF_GPIO_SMT 0x0240 218 #define RK3288_GRF_SOC_CON0 0x0244 219 #define RK3288_GRF_SOC_CON1 0x0248 220 #define RK3288_GRF_SOC_CON2 0x024c 221 #define RK3288_GRF_SOC_CON3 0x0250 222 #define RK3288_GRF_SOC_CON4 0x0254 223 #define RK3288_GRF_SOC_CON5 0x0258 224 #define RK3288_GRF_SOC_CON6 0x025c 225 #define RK3288_GRF_SOC_CON7 0x0260 226 #define RK3288_GRF_SOC_CON8 0x0264 227 #define RK3288_GRF_SOC_CON9 0x0268 228 #define RK3288_GRF_SOC_CON10 0x026c 229 #define RK3288_GRF_SOC_CON11 0x0270 230 #define RK3288_GRF_SOC_CON12 0x0274 231 #define RK3288_GRF_SOC_CON13 0x0278 232 #define RK3288_GRF_SOC_CON14 0x027c 233 #define RK3288_GRF_SOC_STATUS0 0x0280 234 #define RK3288_GRF_SOC_STATUS1 0x0284 235 #define RK3288_GRF_SOC_STATUS2 0x0288 236 #define RK3288_GRF_SOC_STATUS3 0x028c 237 #define RK3288_GRF_SOC_STATUS4 0x0290 238 #define RK3288_GRF_SOC_STATUS5 0x0294 239 #define RK3288_GRF_SOC_STATUS6 0x0298 240 #define RK3288_GRF_SOC_STATUS7 0x029c 241 #define RK3288_GRF_SOC_STATUS8 0x02a0 242 #define RK3288_GRF_SOC_STATUS9 0x02a4 243 #define RK3288_GRF_SOC_STATUS10 0x02a8 244 #define RK3288_GRF_SOC_STATUS11 0x02ac 245 #define RK3288_GRF_SOC_STATUS12 0x02b0 246 #define RK3288_GRF_SOC_STATUS13 0x02b4 247 #define RK3288_GRF_SOC_STATUS14 0x02b8 248 #define RK3288_GRF_SOC_STATUS15 0x02bc 249 #define RK3288_GRF_SOC_STATUS16 0x02c0 250 #define RK3288_GRF_SOC_STATUS17 0x02c4 251 #define RK3288_GRF_SOC_STATUS18 0x02c8 252 #define RK3288_GRF_SOC_STATUS19 0x02cc 253 #define RK3288_GRF_SOC_STATUS20 0x02d0 254 #define RK3288_GRF_SOC_STATUS21 0x02d4 255 256 #define RK3288_GRF_PERIDMAC_CON0 0x02e0 257 #define RK3288_GRF_PERIDMAC_CON1 0x02e4 258 #define RK3288_GRF_PERIDMAC_CON2 0x02e8 259 #define RK3288_GRF_PERIDMAC_CON3 0x02ec 260 #define RK3288_GRF_DDRC0_CON0 0x02f0 261 #define RK3288_GRF_DDRC1_CON0 0x02f4 262 #define RK3288_GRF_CPU_CON0 0x02f8 263 #define RK3288_GRF_CPU_CON1 0x02fc 264 #define RK3288_GRF_CPU_CON2 0x0300 265 #define RK3288_GRF_CPU_CON3 0x0304 266 #define RK3288_GRF_CPU_CON4 0x0308 267 268 #define RK3288_GRF_CPU_STATUS0 0x0318 269 270 #define RK3288_GRF_UOC0_CON0 0x0320 271 #define RK3288_GRF_UOC0_CON1 0x0324 272 #define RK3288_GRF_UOC0_CON2 0x0328 273 #define RK3288_GRF_UOC0_CON3 0x032c 274 #define RK3288_GRF_UOC0_CON4 0x0330 275 #define RK3288_GRF_UOC1_CON0 0x0334 276 #define RK3288_GRF_UOC1_CON1 0x0338 277 #define RK3288_GRF_UOC1_CON2 0x033c 278 #define RK3288_GRF_UOC1_CON3 0x0340 279 #define RK3288_GRF_UOC1_CON4 0x0344 280 #define RK3288_GRF_UOC2_CON0 0x0348 281 #define RK3288_GRF_UOC2_CON1 0x034c 282 #define RK3288_GRF_UOC2_CON2 0x0350 283 #define RK3288_GRF_UOC2_CON3 0x0354 284 #define RK3288_GRF_UOC3_CON0 0x0358 285 #define RK3288_GRF_UOC3_CON1 0x035c 286 #define RK3288_GRF_UOC4_CON0 0x0360 287 #define RK3288_GRF_UOC4_CON1 0x0364 288 #define RK3288_GRF_PVTM_CON0 0x0368 289 #define RK3288_GRF_PVTM_CON1 0x036c 290 #define RK3288_GRF_PVTM_CON2 0x0370 291 #define RK3288_GRF_PVTM_STATUS0 0x0374 292 #define RK3288_GRF_PVTM_STATUS1 0x0378 293 #define RK3288_GRF_PVTM_STATUS2 0x037c 294 #define RK3288_GRF_IO_VSEL 0x0380 295 #define RK3288_GRF_SARADC_TESTBIT 0x0384 296 #define RK3288_GRF_TSADC_TESTBIT_L 0x0388 297 #define RK3288_GRF_TSADC_TESTBIT_H 0x038c 298 #define RK3288_GRF_OS_REG0 0x0390 299 #define RK3288_GRF_OS_REG1 0x0394 300 #define RK3288_GRF_OS_REG2 0x0398 301 #define RK3288_GRF_OS_REG3 0x039c 302 303 #define RK3288_GRF_SOC_CON15 0x03a4 304 #define RK3288_GRF_SOC_CON16 0x03a8 305 306 #define RK3288_SGRF_SOC_CON0 0x0000 307 #define RK3288_SGRF_SOC_CON1 0x0004 308 #define RK3288_SGRF_SOC_CON2 0x0008 309 #define RK3288_SGRF_SOC_CON3 0x000c 310 #define RK3288_SGRF_SOC_CON4 0x0010 311 #define RK3288_SGRF_SOC_CON5 0x0014 312 313 #define RK3288_SGRF_BUSDMAC_CON0 0x0020 314 #define RK3288_SGRF_BUSDMAC_CON1 0x0024 315 316 #define RK3288_SGRF_CPU_CON0 0x0040 317 #define RK3288_SGRF_CPU_CON1 0x0044 318 #define RK3288_SGRF_CPU_CON2 0x0048 319 320 #define RK3288_SGRF_SOC_CON6 0x0050 321 #define RK3288_SGRF_SOC_CON7 0x0054 322 #define RK3288_SGRF_SOC_CON8 0x0058 323 #define RK3288_SGRF_SOC_CON9 0x005c 324 #define RK3288_SGRF_SOC_CON10 0x0060 325 #define RK3288_SGRF_SOC_CON11 0x0064 326 #define RK3288_SGRF_SOC_CON12 0x0068 327 #define RK3288_SGRF_SOC_CON13 0x006c 328 #define RK3288_SGRF_SOC_CON14 0x0070 329 #define RK3288_SGRF_SOC_CON15 0x0074 330 #define RK3288_SGRF_SOC_CON16 0x0078 331 #define RK3288_SGRF_SOC_CON17 0x007c 332 #define RK3288_SGRF_SOC_CON18 0x0080 333 #define RK3288_SGRF_SOC_CON19 0x0084 334 #define RK3288_SGRF_SOC_CON20 0x0088 335 #define RK3288_SGRF_SOC_CON21 0x008c 336 337 #define RK3288_SGRF_SOC_STATUS0 0x0100 338 #define RK3288_SGRF_SOC_STATUS1 0x0104 339 340 #define RK3288_SGRF_FAST_BOOT_ADDR 0x0120 341 342 #define RK3036_GRF_GPIO0A_IOMUX 0x000a8 343 #define RK3036_GRF_GPIO0B_IOMUX 0x000ac 344 #define RK3036_GRF_GPIO0C_IOMUX 0x000b0 345 #define RK3036_GRF_GPIO0D_IOMUX 0x000b4 346 #define RK3036_GRF_GPIO1A_IOMUX 0x000b8 347 #define RK3036_GRF_GPIO1B_IOMUX 0x000bc 348 #define RK3036_GRF_GPIO1C_IOMUX 0x000c0 349 #define RK3036_GRF_GPIO1D_IOMUX 0x000c4 350 #define RK3036_GRF_GPIO2A_IOMUX 0x000c8 351 #define RK3036_GRF_GPIO2B_IOMUX 0x000cc 352 #define RK3036_GRF_GPIO2C_IOMUX 0x000d0 353 #define RK3036_GRF_GPIO2D_IOMUX 0x000d4 354 #define RK3036_GRF_GPIO_DS 0x00100 355 #define RK3036_GRF_GPIO0L_PULL 0x00118 356 #define RK3036_GRF_GPIO0H_PULL 0x0011c 357 #define RK3036_GRF_GPIO1L_PULL 0x00120 358 #define RK3036_GRF_GPIO1H_PULL 0x00124 359 360 #define RK3036_GRF_GPIO2L_PULL 0x00128 361 #define RK3036_GRF_GPIO2H_PULL 0x0012c 362 #define RK3036_GRF_SOC_CON0 0x00140 363 #define RK3036_GRF_SOC_CON1 0x00144 364 #define RK3036_GRF_SOC_CON2 0x00148 365 #define RK3036_GRF_SOC_STATUS0 0x0014c 366 #define RK3036_GRF_SOC_CON3 0x00154 367 #define RK3036_GRF_DMAC_CON0 0x0015c 368 #define RK3036_GRF_DMAC_CON1 0x00160 369 #define RK3036_GRF_DMAC_CON2 0x00164 370 #define RK3036_GRF_UOC0_CON5 0x0017c 371 #define RK3036_GRF_UOC1_CON4 0x00190 372 #define RK3036_GRF_UOC1_CON5 0x00194 373 #define RK3036_GRF_DDRC_STAT 0x0019c 374 #define RK3036_GRF_UOC_CON6 0x001a0 375 #define RK3036_GRF_SOC_STATUS1 0x001a4 376 #define RK3036_GRF_CPU_CON0 0x001a8 377 #define RK3036_GRF_CPU_CON1 0x001ac 378 #define RK3036_GRF_CPU_CON2 0x001b0 379 #define RK3036_GRF_CPU_CON3 0x001b4 380 #define RK3036_GRF_CPU_STATUS0 0x001c0 381 #define RK3036_GRF_CPU_STATUS1 0x001c4 382 #define RK3036_GRF_OS_REG0 0x001c8 383 #define RK3036_GRF_OS_REG1 0x001cc 384 #define RK3036_GRF_OS_REG2 0x001d0 385 #define RK3036_GRF_OS_REG3 0x001d4 386 #define RK3036_GRF_OS_REG4 0x001d8 387 #define RK3036_GRF_OS_REG5 0x001dc 388 #define RK3036_GRF_OS_REG6 0x001e0 389 #define RK3036_GRF_OS_REG7 0x001e4 390 #define RK3036_GRF_DLL_CON0 0x00200 391 #define RK3036_GRF_DLL_CON1 0x00204 392 #define RK3036_GRF_DLL_CON2 0x00208 393 #define RK3036_GRF_DLL_CON3 0x0020c 394 #define RK3036_GRF_DLL_STATUS0 0x00210 395 #define RK3036_GRF_DLL_STATUS1 0x00214 396 397 #define RK3036_GRF_DLL_STATUS2 0x00218 398 #define RK3036_GRF_DLL_STATUS3 0x0021c 399 #define RK3036_GRF_DFI_WRNUM 0x00220 400 #define RK3036_GRF_DFI_RDNUM 0x00224 401 #define RK3036_GRF_DFI_ACTNUM 0x00228 402 #define RK3036_GRF_DFI_TIMERVAL 0x0022c 403 #define RK3036_GRF_NIF_FIFO0 0x00230 404 #define RK3036_GRF_NIF_FIFO1 0x00234 405 #define RK3036_GRF_NIF_FIFO2 0x00238 406 #define RK3036_GRF_NIF_FIFO3 0x0023c 407 #define RK3036_GRF_USBPHY0_CON0 0x00280 408 #define RK3036_GRF_USBPHY0_CON1 0x00284 409 #define RK3036_GRF_USBPHY0_CON2 0x00288 410 #define RK3036_GRF_USBPHY0_CON3 0x0028c 411 #define RK3036_GRF_USBPHY0_CON4 0x00290 412 #define RK3036_GRF_USBPHY0_CON5 0x00294 413 #define RK3036_GRF_USBPHY0_CON6 0x00298 414 #define RK3036_GRF_USBPHY0_CON7 0x0029c 415 #define RK3036_GRF_USBPHY1_CON0 0x002a0 416 #define RK3036_GRF_USBPHY1_CON1 0x002a4 417 #define RK3036_GRF_USBPHY1_CON2 0x002a8 418 #define RK3036_GRF_USBPHY1_CON3 0x002ac 419 #define RK3036_GRF_USBPHY1_CON4 0x002b0 420 #define RK3036_GRF_USBPHY1_CON5 0x002b4 421 #define RK3036_GRF_USBPHY1_CON6 0x002b8 422 423 #define RK3036_GRF_USBPHY1_CON7 0x002bc 424 #define RK3036_GRF_CHIP_TAG 0x00300 425 #define RK3036_GRF_SDMMC_DET_CNT 0x00304 426 427 #define RK312X_GRF_GPIO0A_IOMUX 0x000a8 428 #define RK312X_GRF_GPIO0B_IOMUX 0x000ac 429 #define RK312X_GRF_GPIO0C_IOMUX 0x000b0 430 #define RK312X_GRF_GPIO0D_IOMUX 0x000b4 431 #define RK312X_GRF_GPIO1A_IOMUX 0x000b8 432 #define RK312X_GRF_GPIO1B_IOMUX 0x000bc 433 #define RK312X_GRF_GPIO1C_IOMUX 0x000c0 434 #define RK312X_GRF_GPIO1D_IOMUX 0x000c4 435 #define RK312X_GRF_GPIO2A_IOMUX 0x000c8 436 #define RK312X_GRF_GPIO2B_IOMUX 0x000cc 437 #define RK312X_GRF_GPIO2C_IOMUX 0x000d0 438 #define RK312X_GRF_GPIO2D_IOMUX 0x000d4 439 #define RK312X_GRF_GPIO3A_IOMUX 0x000d8 440 #define RK312X_GRF_GPIO3B_IOMUX 0x000dc 441 #define RK312X_GRF_GPIO3C_IOMUX 0x000e0 442 #define RK312X_GRF_GPIO3D_IOMUX 0x000e4 443 #define RK312X_GRF_CIF_IOMUX 0x000ec 444 #define RK312X_GRF_CIF_IOMUX1 0x000f0 445 #define RK312X_GRF_GPIO_DS 0x00100 446 #define RK312X_GRF_GPIO0L_PULL 0x00118 447 #define RK312X_GRF_GPIO0H_PULL 0x0011c 448 #define RK312X_GRF_GPIO1L_PULL 0x00120 449 #define RK312X_GRF_GPIO1H_PULL 0x00124 450 #define RK312X_GRF_GPIO2L_PULL 0x00128 451 #define RK312X_GRF_GPIO2H_PULL 0x0012c 452 #define RK312X_GRF_GPIO3L_PULL 0x00130 453 #define RK312X_GRF_GPIO3H_PULL 0x00134 454 #define RK312X_GRF_ACODEC_CON 0x0013c 455 456 #define RK312X_GRF_SOC_CON0 0x00140 457 #define RK312X_GRF_SOC_CON1 0x00144 458 #define RK312X_GRF_SOC_CON2 0x00148 459 #define RK312X_GRF_SOC_STATUS0 0x0014c 460 #define RK312X_GRF_LVDS_CON0 0x00150 461 #define RK312X_GRF_SOC_CON3 0x00154 462 #define RK312X_GRF_DMAC_CON0 0x0015c 463 #define RK312X_GRF_DMAC_CON1 0x00160 464 #define RK312X_GRF_DMAC_CON2 0x00164 465 #define RK312X_GRF_MAC_CON0 0x00168 466 #define RK312X_GRF_MAC_CON1 0x0016c 467 #define RK312X_GRF_TVE_CON 0x00170 468 #define RK312X_GRF_UOC0_CON0 0x0017c 469 #define RK312X_GRF_UOC1_CON1 0x00184 470 #define RK312X_GRF_UOC1_CON2 0x00188 471 #define RK312X_GRF_UOC1_CON3 0x0018c 472 #define RK312X_GRF_UOC1_CON4 0x00190 473 #define RK312X_GRF_UOC1_CON5 0x00194 474 #define RK312X_GRF_DDRC_STAT 0x0019c 475 #define RK312X_GRF_SOC_STATUS1 0x001a4 476 #define RK312X_GRF_CPU_CON0 0x001a8 477 #define RK312X_GRF_CPU_CON1 0x001ac 478 #define RK312X_GRF_CPU_CON2 0x001b0 479 #define RK312X_GRF_CPU_CON3 0x001b4 480 #define RK312X_GRF_CPU_STATUS0 0x001c0 481 #define RK312X_GRF_CPU_STATUS1 0x001c4 482 #define RK312X_GRF_OS_REG0 0x001c8 483 #define RK312X_GRF_OS_REG1 0x001cc 484 #define RK312X_GRF_OS_REG2 0x001d0 485 #define RK312X_GRF_OS_REG3 0x001d4 486 #define RK312X_GRF_OS_REG4 0x001d8 487 #define RK312X_GRF_OS_REG5 0x001dc 488 #define RK312X_GRF_OS_REG6 0x001e0 489 #define RK312X_GRF_OS_REG7 0x001e4 490 #define RK312X_GRF_PVTM_CON0 0x00200 491 #define RK312X_GRF_PVTM_CON1 0x00204 492 #define RK312X_GRF_PVTM_CON2 0x00208 493 #define RK312X_GRF_PVTM_CON3 0x0020c 494 #define RK312X_GRF_PVTM_STATUS0 0x00210 495 #define RK312X_GRF_PVTM_STATUS1 0x00214 496 #define RK312X_GRF_PVTM_STATUS2 0x00218 497 #define RK312X_GRF_PVTM_STATUS3 0x0021c 498 #define RK312X_GRF_DFI_WRNUM 0x00220 499 #define RK312X_GRF_DFI_RDNUM 0x00224 500 #define RK312X_GRF_DFI_ACTNUM 0x00228 501 #define RK312X_GRF_DFI_TIMERVAL 0x0022c 502 #define RK312X_GRF_NIF_FIFO0 0x00230 503 #define RK312X_GRF_NIF_FIFO1 0x00234 504 #define RK312X_GRF_NIF_FIFO2 0x00238 505 #define RK312X_GRF_NIF_FIFO3 0x0023c 506 #define RK312X_GRF_USBPHY0_CON0 0x00280 507 #define RK312X_GRF_USBPHY0_CON1 0x00284 508 #define RK312X_GRF_USBPHY0_CON2 0x00288 509 #define RK312X_GRF_USBPHY0_CON3 0x0028c 510 #define RK312X_GRF_USBPHY0_CON4 0x00290 511 #define RK312X_GRF_USBPHY0_CON5 0x00294 512 #define RK312X_GRF_USBPHY0_CON6 0x00298 513 #define RK312X_GRF_USBPHY0_CON7 0x0029c 514 #define RK312X_GRF_USBPHY1_CON0 0x002a0 515 #define RK312X_GRF_USBPHY1_CON1 0x002a4 516 #define RK312X_GRF_USBPHY1_CON2 0x002a8 517 #define RK312X_GRF_USBPHY1_CON3 0x002ac 518 #define RK312X_GRF_USBPHY1_CON4 0x002b0 519 #define RK312X_GRF_USBPHY1_CON5 0x002b4 520 #define RK312X_GRF_USBPHY1_CON6 0x002b8 521 #define RK312X_GRF_USBPHY1_CON7 0x002bc 522 #define RK312X_GRF_UOC_STATUS0 0x002c0 523 #define RK312X_GRF_CHIP_TAG 0x00300 524 #define RK312X_GRF_SDMMC_DET_CNT 0x00304 525 #define RK312X_GRF_EFUSE_PRG_EN 0x0037c 526 527 #define RK3228_GRF_GPIO0A_IOMUX 0x0000 528 #define RK3228_GRF_GPIO0B_IOMUX 0x0004 529 #define RK3228_GRF_GPIO0C_IOMUX 0x0008 530 #define RK3228_GRF_GPIO0D_IOMUX 0x000c 531 #define RK3228_GRF_GPIO1A_IOMUX 0x0010 532 #define RK3228_GRF_GPIO1B_IOMUX 0x0014 533 #define RK3228_GRF_GPIO1C_IOMUX 0x0018 534 #define RK3228_GRF_GPIO1D_IOMUX 0x001c 535 #define RK3228_GRF_GPIO2A_IOMUX 0x0020 536 #define RK3228_GRF_GPIO2B_IOMUX 0x0024 537 #define RK3228_GRF_GPIO2C_IOMUX 0x0028 538 #define RK3228_GRF_GPIO2D_IOMUX 0x002c 539 #define RK3228_GRF_GPIO3A_IOMUX 0x0030 540 #define RK3228_GRF_GPIO3B_IOMUX 0x0034 541 #define RK3228_GRF_GPIO3C_IOMUX 0x0038 542 #define RK3228_GRF_GPIO3D_IOMUX 0x003c 543 #define RK3228_GRF_COM_IOMUX 0x0050 544 #define RK3228_GRF_GPIO0A_P 0x0100 545 #define RK3228_GRF_GPIO0B_P 0x0104 546 #define RK3228_GRF_GPIO0C_P 0x0108 547 #define RK3228_GRF_GPIO0D_P 0x010c 548 #define RK3228_GRF_GPIO1A_P 0x0110 549 #define RK3228_GRF_GPIO1B_P 0x0114 550 #define RK3228_GRF_GPIO1C_P 0x0118 551 #define RK3228_GRF_GPIO1D_P 0x011c 552 #define RK3228_GRF_GPIO2A_P 0x0120 553 #define RK3228_GRF_GPIO2B_P 0x0124 554 #define RK3228_GRF_GPIO2C_P 0x0128 555 #define RK3228_GRF_GPIO2D_P 0x012c 556 #define RK3228_GRF_GPIO3A_P 0x0130 557 #define RK3228_GRF_GPIO3B_P 0x0134 558 #define RK3228_GRF_GPIO3C_P 0x0138 559 #define RK3228_GRF_GPIO3D_P 0x013c 560 #define RK3228_GRF_GPIO0A_E 0x0200 561 #define RK3228_GRF_GPIO0B_E 0x0204 562 #define RK3228_GRF_GPIO0C_E 0x0208 563 #define RK3228_GRF_GPIO0D_E 0x020c 564 #define RK3228_GRF_GPIO1A_E 0x0210 565 #define RK3228_GRF_GPIO1B_E 0x0214 566 #define RK3228_GRF_GPIO1C_E 0x0218 567 #define RK3228_GRF_GPIO1D_E 0x021c 568 #define RK3228_GRF_GPIO2A_E 0x0220 569 #define RK3228_GRF_GPIO2B_E 0x0224 570 #define RK3228_GRF_GPIO2C_E 0x0228 571 #define RK3228_GRF_GPIO2D_E 0x022c 572 #define RK3228_GRF_GPIO3A_E 0x0230 573 #define RK3228_GRF_GPIO3B_E 0x0234 574 #define RK3228_GRF_GPIO3C_E 0x0238 575 #define RK3228_GRF_GPIO3D_E 0x023c 576 #define RK3228_GRF_GPIO0L_SR 0x0300 577 #define RK3228_GRF_GPIO0H_SR 0x0304 578 #define RK3228_GRF_GPIO1L_SR 0x0308 579 #define RK3228_GRF_GPIO1H_SR 0x030c 580 #define RK3228_GRF_GPIO2L_SR 0x0310 581 #define RK3228_GRF_GPIO2H_SR 0x0314 582 #define RK3228_GRF_GPIO3L_SR 0x0318 583 #define RK3228_GRF_GPIO3H_SR 0x031c 584 #define RK3228_GRF_GPIO0L_SMT 0x0380 585 #define RK3228_GRF_GPIO0H_SMT 0x0384 586 #define RK3228_GRF_GPIO1L_SMT 0x0388 587 #define RK3228_GRF_GPIO1H_SMT 0x038c 588 #define RK3228_GRF_GPIO2L_SMT 0x0390 589 #define RK3228_GRF_GPIO2H_SMT 0x0394 590 #define RK3228_GRF_GPIO3L_SMT 0x0398 591 #define RK3228_GRF_GPIO3H_SMT 0x039c 592 #define RK3228_GRF_SOC_CON0 0x0400 593 #define RK3228_GRF_SOC_CON1 0x0404 594 #define RK3228_GRF_SOC_CON2 0x0408 595 #define RK3228_GRF_SOC_CON3 0x040c 596 #define RK3228_GRF_SOC_CON4 0x0410 597 #define RK3228_GRF_SOC_CON5 0x0414 598 #define RK3228_GRF_SOC_CON6 0x0418 599 #define RK3228_GRF_SOC_STATUS0 0x0480 600 #define RK3228_GRF_SOC_STATUS1 0x0484 601 #define RK3228_GRF_SOC_STATUS2 0x0488 602 #define RK3228_GRF_CHIP_ID 0x048c 603 #define RK3228_GRF_CPU_CON0 0x0500 604 #define RK3228_GRF_CPU_CON1 0x0504 605 #define RK3228_GRF_CPU_CON2 0x0508 606 #define RK3228_GRF_CPU_CON3 0x050c 607 #define RK3228_GRF_CPU_STATUS0 0x0520 608 #define RK3228_GRF_CPU_STATUS1 0x0524 609 #define RK3228_GRF_OS_REG0 0x05c8 610 #define RK3228_GRF_OS_REG1 0x05cc 611 #define RK3228_GRF_OS_REG2 0x05d0 612 #define RK3228_GRF_OS_REG3 0x05d4 613 #define RK3228_GRF_OS_REG4 0x05d8 614 #define RK3228_GRF_OS_REG5 0x05dc 615 #define RK3228_GRF_OS_REG6 0x05e0 616 #define RK3228_GRF_OS_REG7 0x05e4 617 #define RK3228_GRF_DDRC_STAT 0x0604 618 #define RK3228_GRF_SIG_DETECT_CON 0x0680 619 #define RK3228_GRF_SIG_DETECT_CON1 0x0684 620 #define RK3228_GRF_SIG_DETECT_STATUS 0x0690 621 #define RK3228_GRF_SIG_DETECT_STATUS1 0x0694 622 #define RK3228_GRF_SIG_DETECT_CLR 0x06a0 623 #define RK3228_GRF_SIG_DETECT_CLR1 0x06a4 624 #define RK3228_GRF_EMMC_DET 0x06b0 625 #define RK3228_GRF_HOST0_CON0 0x0700 626 #define RK3228_GRF_HOST0_CON1 0x0704 627 #define RK3228_GRF_HOST0_CON2 0x0708 628 #define RK3228_GRF_HOST1_CON0 0x0710 629 #define RK3228_GRF_HOST1_CON1 0x0714 630 #define RK3228_GRF_HOST1_CON2 0x0718 631 #define RK3228_GRF_HOST2_CON0 0x0720 632 #define RK3228_GRF_HOST2_CON1 0x0724 633 #define RK3228_GRF_HOST2_CON2 0x0728 634 #define RK3228_GRF_USBPHY0_CON0 0x0760 635 #define RK3228_GRF_USBPHY0_CON1 0x0764 636 #define RK3228_GRF_USBPHY0_CON2 0x0768 637 #define RK3228_GRF_USBPHY0_CON3 0x076c 638 #define RK3228_GRF_USBPHY0_CON4 0x0770 639 #define RK3228_GRF_USBPHY0_CON5 0x0774 640 #define RK3228_GRF_USBPHY0_CON6 0x0778 641 #define RK3228_GRF_USBPHY0_CON7 0x077c 642 #define RK3228_GRF_USBPHY0_CON8 0x0780 643 #define RK3228_GRF_USBPHY0_CON9 0x0784 644 #define RK3228_GRF_USBPHY0_CON10 0x0788 645 #define RK3228_GRF_USBPHY0_CON11 0x078c 646 #define RK3228_GRF_USBPHY0_CON12 0x0790 647 #define RK3228_GRF_USBPHY0_CON13 0x0794 648 #define RK3228_GRF_USBPHY0_CON14 0x0798 649 #define RK3228_GRF_USBPHY0_CON15 0x079c 650 #define RK3228_GRF_USBPHY0_CON16 0x07a0 651 #define RK3228_GRF_USBPHY0_CON17 0x07a4 652 #define RK3228_GRF_USBPHY0_CON18 0x07a8 653 #define RK3228_GRF_USBPHY0_CON19 0x07ac 654 #define RK3228_GRF_USBPHY0_CON20 0x07b0 655 #define RK3228_GRF_USBPHY0_CON21 0x07b4 656 #define RK3228_GRF_USBPHY0_CON22 0x07b8 657 #define RK3228_GRF_USBPHY0_CON23 0x07bc 658 #define RK3228_GRF_USBPHY0_CON24 0x07c0 659 #define RK3228_GRF_USBPHY0_CON25 0x07c4 660 #define RK3228_GRF_USBPHY0_CON26 0x07c8 661 #define RK3228_GRF_USBPHY1_CON0 0x0800 662 #define RK3228_GRF_USBPHY1_CON1 0x0804 663 #define RK3228_GRF_USBPHY1_CON2 0x0808 664 #define RK3228_GRF_USBPHY1_CON3 0x080c 665 #define RK3228_GRF_USBPHY1_CON4 0x0810 666 #define RK3228_GRF_USBPHY1_CON5 0x0814 667 #define RK3228_GRF_USBPHY1_CON6 0x0818 668 #define RK3228_GRF_USBPHY1_CON7 0x081c 669 #define RK3228_GRF_USBPHY1_CON8 0x0820 670 #define RK3228_GRF_USBPHY1_CON9 0x0824 671 #define RK3228_GRF_USBPHY1_CON10 0x0828 672 #define RK3228_GRF_USBPHY1_CON11 0x082c 673 #define RK3228_GRF_USBPHY1_CON12 0x0830 674 #define RK3228_GRF_USBPHY1_CON13 0x0834 675 #define RK3228_GRF_USBPHY1_CON14 0x0838 676 #define RK3228_GRF_USBPHY1_CON15 0x083c 677 #define RK3228_GRF_USBPHY1_CON16 0x0840 678 #define RK3228_GRF_USBPHY1_CON17 0x0844 679 #define RK3228_GRF_USBPHY1_CON18 0x0848 680 #define RK3228_GRF_USBPHY1_CON19 0x084c 681 #define RK3228_GRF_USBPHY1_CON20 0x0850 682 #define RK3228_GRF_USBPHY1_CON21 0x0854 683 #define RK3228_GRF_USBPHY1_CON22 0x0858 684 #define RK3228_GRF_USBPHY1_CON23 0x085c 685 #define RK3228_GRF_USBPHY1_CON24 0x0860 686 #define RK3228_GRF_USBPHY1_CON25 0x0864 687 #define RK3228_GRF_USBPHY1_CON26 0x0868 688 #define RK3228_GRF_OTG_CON0 0x0880 689 #define RK3228_GRF_UOC_CON0 0x0884 690 #define RK3228_GRF_MAC_CON0 0x0900 691 #define RK3228_GRF_MAC_CON1 0x0904 692 #define RK3228_GRF_MACPHY_CON0 0x0b00 693 #define RK3228_GRF_MACPHY_CON1 0x0b04 694 #define RK3228_GRF_MACPHY_CON2 0x0b08 695 #define RK3228_GRF_MACPHY_CON3 0x0b0c 696 #define RK3228_GRF_MACPHY_STATUS 0x0b10 697 698 #endif 699