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1 // SPDX-License-Identifier: GPL-2.0-only
2 /*
3  *  linux/arch/arm/kernel/swp_emulate.c
4  *
5  *  Copyright (C) 2009 ARM Limited
6  *  __user_* functions adapted from include/asm/uaccess.h
7  *
8  *  Implements emulation of the SWP/SWPB instructions using load-exclusive and
9  *  store-exclusive for processors that have them disabled (or future ones that
10  *  might not implement them).
11  *
12  *  Syntax of SWP{B} instruction: SWP{B}<c> <Rt>, <Rt2>, [<Rn>]
13  *  Where: Rt  = destination
14  *	   Rt2 = source
15  *	   Rn  = address
16  */
17 
18 #include <linux/init.h>
19 #include <linux/kernel.h>
20 #include <linux/proc_fs.h>
21 #include <linux/seq_file.h>
22 #include <linux/sched.h>
23 #include <linux/sched/mm.h>
24 #include <linux/syscalls.h>
25 #include <linux/perf_event.h>
26 
27 #include <asm/extable.h>
28 #include <asm/opcodes.h>
29 #include <asm/system_info.h>
30 #include <asm/traps.h>
31 #include <linux/uaccess.h>
32 
33 /*
34  * Error-checking SWP macros implemented using ldrex{b}/strex{b}
35  */
36 #define __user_swpX_asm(data, addr, res, temp, B)		\
37 	__asm__ __volatile__(					\
38 	"0:	ldrex"B"	%2, [%3]\n"			\
39 	"1:	strex"B"	%0, %1, [%3]\n"			\
40 	"	cmp		%0, #0\n"			\
41 	"	moveq		%1, %2\n"			\
42 	"	movne		%0, %4\n"			\
43 	"2:\n"							\
44 	"	.section	 .text.fixup,\"ax\"\n"		\
45 	"	.align		2\n"				\
46 	"3:	mov		%0, %5\n"			\
47 	"	b		2b\n"				\
48 	"	.previous\n"					\
49 	"	ex_entry	0b, 3b\n"			\
50 	"	ex_entry	1b, 3b\n"			\
51 	: "=&r" (res), "+r" (data), "=&r" (temp)		\
52 	: "r" (addr), "i" (-EAGAIN), "i" (-EFAULT)		\
53 	: "cc", "memory")
54 
55 #define __user_swp_asm(data, addr, res, temp) \
56 	__user_swpX_asm(data, addr, res, temp, "")
57 #define __user_swpb_asm(data, addr, res, temp) \
58 	__user_swpX_asm(data, addr, res, temp, "b")
59 
60 /*
61  * Macros/defines for extracting register numbers from instruction.
62  */
63 #define EXTRACT_REG_NUM(instruction, offset) \
64 	(((instruction) & (0xf << (offset))) >> (offset))
65 #define RN_OFFSET  16
66 #define RT_OFFSET  12
67 #define RT2_OFFSET  0
68 /*
69  * Bit 22 of the instruction encoding distinguishes between
70  * the SWP and SWPB variants (bit set means SWPB).
71  */
72 #define TYPE_SWPB (1 << 22)
73 
74 static unsigned long swpcounter;
75 static unsigned long swpbcounter;
76 static unsigned long abtcounter;
77 static pid_t         previous_pid;
78 
79 #ifdef CONFIG_PROC_FS
proc_status_show(struct seq_file * m,void * v)80 static int proc_status_show(struct seq_file *m, void *v)
81 {
82 	seq_printf(m, "Emulated SWP:\t\t%lu\n", swpcounter);
83 	seq_printf(m, "Emulated SWPB:\t\t%lu\n", swpbcounter);
84 	seq_printf(m, "Aborted SWP{B}:\t\t%lu\n", abtcounter);
85 	if (previous_pid != 0)
86 		seq_printf(m, "Last process:\t\t%d\n", previous_pid);
87 	return 0;
88 }
89 #endif
90 
91 /*
92  * Set up process info to signal segmentation fault - called on access error.
93  */
set_segfault(struct pt_regs * regs,unsigned long addr)94 static void set_segfault(struct pt_regs *regs, unsigned long addr)
95 {
96 	int si_code;
97 
98 	mmap_read_lock(current->mm);
99 	if (find_vma(current->mm, addr) == NULL)
100 		si_code = SEGV_MAPERR;
101 	else
102 		si_code = SEGV_ACCERR;
103 	mmap_read_unlock(current->mm);
104 
105 	pr_debug("SWP{B} emulation: access caused memory abort!\n");
106 	arm_notify_die("Illegal memory access", regs,
107 		       SIGSEGV, si_code,
108 		       (void __user *)instruction_pointer(regs),
109 		       0, 0);
110 
111 	abtcounter++;
112 }
113 
emulate_swpX(unsigned int address,unsigned int * data,unsigned int type)114 static int emulate_swpX(unsigned int address, unsigned int *data,
115 			unsigned int type)
116 {
117 	unsigned int res = 0;
118 
119 	if ((type != TYPE_SWPB) && (address & 0x3)) {
120 		/* SWP to unaligned address not permitted */
121 		pr_debug("SWP instruction on unaligned pointer!\n");
122 		return -EFAULT;
123 	}
124 
125 	while (1) {
126 		unsigned long temp;
127 		unsigned int __ua_flags;
128 
129 		__ua_flags = uaccess_save_and_enable();
130 		if (type == TYPE_SWPB)
131 			__user_swpb_asm(*data, address, res, temp);
132 		else
133 			__user_swp_asm(*data, address, res, temp);
134 		uaccess_restore(__ua_flags);
135 
136 		if (likely(res != -EAGAIN) || signal_pending(current))
137 			break;
138 
139 		cond_resched();
140 	}
141 
142 	if (res == 0) {
143 		if (type == TYPE_SWPB)
144 			swpbcounter++;
145 		else
146 			swpcounter++;
147 	}
148 
149 	return res;
150 }
151 
152 /*
153  * swp_handler logs the id of calling process, dissects the instruction, sanity
154  * checks the memory location, calls emulate_swpX for the actual operation and
155  * deals with fixup/error handling before returning
156  */
swp_handler(struct pt_regs * regs,unsigned int instr)157 static int swp_handler(struct pt_regs *regs, unsigned int instr)
158 {
159 	unsigned int address, destreg, data, type;
160 	unsigned int res = 0;
161 
162 	perf_sw_event(PERF_COUNT_SW_EMULATION_FAULTS, 1, regs, regs->ARM_pc);
163 
164 	res = arm_check_condition(instr, regs->ARM_cpsr);
165 	switch (res) {
166 	case ARM_OPCODE_CONDTEST_PASS:
167 		break;
168 	case ARM_OPCODE_CONDTEST_FAIL:
169 		/* Condition failed - return to next instruction */
170 		regs->ARM_pc += 4;
171 		return 0;
172 	case ARM_OPCODE_CONDTEST_UNCOND:
173 		/* If unconditional encoding - not a SWP, undef */
174 		return -EFAULT;
175 	default:
176 		return -EINVAL;
177 	}
178 
179 	if (current->pid != previous_pid) {
180 		pr_debug("\"%s\" (%ld) uses deprecated SWP{B} instruction\n",
181 			 current->comm, (unsigned long)current->pid);
182 		previous_pid = current->pid;
183 	}
184 
185 	address = regs->uregs[EXTRACT_REG_NUM(instr, RN_OFFSET)];
186 	data	= regs->uregs[EXTRACT_REG_NUM(instr, RT2_OFFSET)];
187 	destreg = EXTRACT_REG_NUM(instr, RT_OFFSET);
188 
189 	type = instr & TYPE_SWPB;
190 
191 	pr_debug("addr in r%d->0x%08x, dest is r%d, source in r%d->0x%08x)\n",
192 		 EXTRACT_REG_NUM(instr, RN_OFFSET), address,
193 		 destreg, EXTRACT_REG_NUM(instr, RT2_OFFSET), data);
194 
195 	/* Check access in reasonable access range for both SWP and SWPB */
196 	if (!access_ok((void __user *)(address & ~3), 4)) {
197 		pr_debug("SWP{B} emulation: access to %p not allowed!\n",
198 			 (void *)address);
199 		res = -EFAULT;
200 	} else {
201 		res = emulate_swpX(address, &data, type);
202 	}
203 
204 	if (res == 0) {
205 		/*
206 		 * On successful emulation, revert the adjustment to the PC
207 		 * made in kernel/traps.c in order to resume execution at the
208 		 * instruction following the SWP{B}.
209 		 */
210 		regs->ARM_pc += 4;
211 		regs->uregs[destreg] = data;
212 	} else if (res == -EFAULT) {
213 		/*
214 		 * Memory errors do not mean emulation failed.
215 		 * Set up signal info to return SEGV, then return OK
216 		 */
217 		set_segfault(regs, address);
218 	}
219 
220 	return 0;
221 }
222 
223 /*
224  * Only emulate SWP/SWPB executed in ARM state/User mode.
225  * The kernel must be SWP free and SWP{B} does not exist in Thumb/ThumbEE.
226  */
227 static struct undef_hook swp_hook = {
228 	.instr_mask = 0x0fb00ff0,
229 	.instr_val  = 0x01000090,
230 	.cpsr_mask  = MODE_MASK | PSR_T_BIT | PSR_J_BIT,
231 	.cpsr_val   = USR_MODE,
232 	.fn	    = swp_handler
233 };
234 
235 /*
236  * Register handler and create status file in /proc/cpu
237  * Invoked as late_initcall, since not needed before init spawned.
238  */
swp_emulation_init(void)239 static int __init swp_emulation_init(void)
240 {
241 	if (cpu_architecture() < CPU_ARCH_ARMv7)
242 		return 0;
243 
244 #ifdef CONFIG_PROC_FS
245 	if (!proc_create_single("cpu/swp_emulation", S_IRUGO, NULL,
246 			proc_status_show))
247 		return -ENOMEM;
248 #endif /* CONFIG_PROC_FS */
249 
250 	pr_notice("Registering SWP/SWPB emulation handler\n");
251 	register_undef_hook(&swp_hook);
252 
253 	return 0;
254 }
255 
256 late_initcall(swp_emulation_init);
257