1 /* 2 * This header was generated from the Linux kernel headers by update_headers.py, 3 * to provide necessary information from kernel to userspace, such as constants, 4 * structures, and macros, and thus, contains no copyrightable information. 5 */ 6 #ifndef _UAPI__LINUX_MDIO_H__ 7 #define _UAPI__LINUX_MDIO_H__ 8 #include <linux/types.h> 9 #include <linux/mii.h> 10 #define MDIO_MMD_PMAPMD 1 11 #define MDIO_MMD_WIS 2 12 #define MDIO_MMD_PCS 3 13 #define MDIO_MMD_PHYXS 4 14 #define MDIO_MMD_DTEXS 5 15 #define MDIO_MMD_TC 6 16 #define MDIO_MMD_AN 7 17 #define MDIO_MMD_C22EXT 29 18 #define MDIO_MMD_VEND1 30 19 #define MDIO_MMD_VEND2 31 20 #define MDIO_CTRL1 MII_BMCR 21 #define MDIO_STAT1 MII_BMSR 22 #define MDIO_DEVID1 MII_PHYSID1 23 #define MDIO_DEVID2 MII_PHYSID2 24 #define MDIO_SPEED 4 25 #define MDIO_DEVS1 5 26 #define MDIO_DEVS2 6 27 #define MDIO_CTRL2 7 28 #define MDIO_STAT2 8 29 #define MDIO_PMA_TXDIS 9 30 #define MDIO_PMA_RXDET 10 31 #define MDIO_PMA_EXTABLE 11 32 #define MDIO_PKGID1 14 33 #define MDIO_PKGID2 15 34 #define MDIO_AN_ADVERTISE 16 35 #define MDIO_AN_LPA 19 36 #define MDIO_PCS_EEE_ABLE 20 37 #define MDIO_PCS_EEE_WK_ERR 22 38 #define MDIO_PHYXS_LNSTAT 24 39 #define MDIO_AN_EEE_ADV 60 40 #define MDIO_AN_EEE_LPABLE 61 41 #define MDIO_PMA_10GBT_SWAPPOL 130 42 #define MDIO_PMA_10GBT_TXPWR 131 43 #define MDIO_PMA_10GBT_SNR 133 44 #define MDIO_PMA_10GBR_FECABLE 170 45 #define MDIO_PCS_10GBX_STAT1 24 46 #define MDIO_PCS_10GBRT_STAT1 32 47 #define MDIO_PCS_10GBRT_STAT2 33 48 #define MDIO_AN_10GBT_CTRL 32 49 #define MDIO_AN_10GBT_STAT 33 50 #define MDIO_PMA_LASI_RXCTRL 0x9000 51 #define MDIO_PMA_LASI_TXCTRL 0x9001 52 #define MDIO_PMA_LASI_CTRL 0x9002 53 #define MDIO_PMA_LASI_RXSTAT 0x9003 54 #define MDIO_PMA_LASI_TXSTAT 0x9004 55 #define MDIO_PMA_LASI_STAT 0x9005 56 #define MDIO_CTRL1_SPEEDSELEXT (BMCR_SPEED1000 | BMCR_SPEED100) 57 #define MDIO_CTRL1_SPEEDSEL (MDIO_CTRL1_SPEEDSELEXT | 0x003c) 58 #define MDIO_CTRL1_FULLDPLX BMCR_FULLDPLX 59 #define MDIO_CTRL1_LPOWER BMCR_PDOWN 60 #define MDIO_CTRL1_RESET BMCR_RESET 61 #define MDIO_PMA_CTRL1_LOOPBACK 0x0001 62 #define MDIO_PMA_CTRL1_SPEED1000 BMCR_SPEED1000 63 #define MDIO_PMA_CTRL1_SPEED100 BMCR_SPEED100 64 #define MDIO_PCS_CTRL1_LOOPBACK BMCR_LOOPBACK 65 #define MDIO_PHYXS_CTRL1_LOOPBACK BMCR_LOOPBACK 66 #define MDIO_AN_CTRL1_RESTART BMCR_ANRESTART 67 #define MDIO_AN_CTRL1_ENABLE BMCR_ANENABLE 68 #define MDIO_AN_CTRL1_XNP 0x2000 69 #define MDIO_PCS_CTRL1_CLKSTOP_EN 0x400 70 #define MDIO_CTRL1_SPEED10G (MDIO_CTRL1_SPEEDSELEXT | 0x00) 71 #define MDIO_CTRL1_SPEED10P2B (MDIO_CTRL1_SPEEDSELEXT | 0x04) 72 #define MDIO_STAT1_LPOWERABLE 0x0002 73 #define MDIO_STAT1_LSTATUS BMSR_LSTATUS 74 #define MDIO_STAT1_FAULT 0x0080 75 #define MDIO_AN_STAT1_LPABLE 0x0001 76 #define MDIO_AN_STAT1_ABLE BMSR_ANEGCAPABLE 77 #define MDIO_AN_STAT1_RFAULT BMSR_RFAULT 78 #define MDIO_AN_STAT1_COMPLETE BMSR_ANEGCOMPLETE 79 #define MDIO_AN_STAT1_PAGE 0x0040 80 #define MDIO_AN_STAT1_XNP 0x0080 81 #define MDIO_SPEED_10G 0x0001 82 #define MDIO_PMA_SPEED_2B 0x0002 83 #define MDIO_PMA_SPEED_10P 0x0004 84 #define MDIO_PMA_SPEED_1000 0x0010 85 #define MDIO_PMA_SPEED_100 0x0020 86 #define MDIO_PMA_SPEED_10 0x0040 87 #define MDIO_PCS_SPEED_10P2B 0x0002 88 #define MDIO_DEVS_PRESENT(devad) (1 << (devad)) 89 #define MDIO_DEVS_PMAPMD MDIO_DEVS_PRESENT(MDIO_MMD_PMAPMD) 90 #define MDIO_DEVS_WIS MDIO_DEVS_PRESENT(MDIO_MMD_WIS) 91 #define MDIO_DEVS_PCS MDIO_DEVS_PRESENT(MDIO_MMD_PCS) 92 #define MDIO_DEVS_PHYXS MDIO_DEVS_PRESENT(MDIO_MMD_PHYXS) 93 #define MDIO_DEVS_DTEXS MDIO_DEVS_PRESENT(MDIO_MMD_DTEXS) 94 #define MDIO_DEVS_TC MDIO_DEVS_PRESENT(MDIO_MMD_TC) 95 #define MDIO_DEVS_AN MDIO_DEVS_PRESENT(MDIO_MMD_AN) 96 #define MDIO_DEVS_C22EXT MDIO_DEVS_PRESENT(MDIO_MMD_C22EXT) 97 #define MDIO_PMA_CTRL2_TYPE 0x000f 98 #define MDIO_PMA_CTRL2_10GBCX4 0x0000 99 #define MDIO_PMA_CTRL2_10GBEW 0x0001 100 #define MDIO_PMA_CTRL2_10GBLW 0x0002 101 #define MDIO_PMA_CTRL2_10GBSW 0x0003 102 #define MDIO_PMA_CTRL2_10GBLX4 0x0004 103 #define MDIO_PMA_CTRL2_10GBER 0x0005 104 #define MDIO_PMA_CTRL2_10GBLR 0x0006 105 #define MDIO_PMA_CTRL2_10GBSR 0x0007 106 #define MDIO_PMA_CTRL2_10GBLRM 0x0008 107 #define MDIO_PMA_CTRL2_10GBT 0x0009 108 #define MDIO_PMA_CTRL2_10GBKX4 0x000a 109 #define MDIO_PMA_CTRL2_10GBKR 0x000b 110 #define MDIO_PMA_CTRL2_1000BT 0x000c 111 #define MDIO_PMA_CTRL2_1000BKX 0x000d 112 #define MDIO_PMA_CTRL2_100BTX 0x000e 113 #define MDIO_PMA_CTRL2_10BT 0x000f 114 #define MDIO_PCS_CTRL2_TYPE 0x0003 115 #define MDIO_PCS_CTRL2_10GBR 0x0000 116 #define MDIO_PCS_CTRL2_10GBX 0x0001 117 #define MDIO_PCS_CTRL2_10GBW 0x0002 118 #define MDIO_PCS_CTRL2_10GBT 0x0003 119 #define MDIO_STAT2_RXFAULT 0x0400 120 #define MDIO_STAT2_TXFAULT 0x0800 121 #define MDIO_STAT2_DEVPRST 0xc000 122 #define MDIO_STAT2_DEVPRST_VAL 0x8000 123 #define MDIO_PMA_STAT2_LBABLE 0x0001 124 #define MDIO_PMA_STAT2_10GBEW 0x0002 125 #define MDIO_PMA_STAT2_10GBLW 0x0004 126 #define MDIO_PMA_STAT2_10GBSW 0x0008 127 #define MDIO_PMA_STAT2_10GBLX4 0x0010 128 #define MDIO_PMA_STAT2_10GBER 0x0020 129 #define MDIO_PMA_STAT2_10GBLR 0x0040 130 #define MDIO_PMA_STAT2_10GBSR 0x0080 131 #define MDIO_PMD_STAT2_TXDISAB 0x0100 132 #define MDIO_PMA_STAT2_EXTABLE 0x0200 133 #define MDIO_PMA_STAT2_RXFLTABLE 0x1000 134 #define MDIO_PMA_STAT2_TXFLTABLE 0x2000 135 #define MDIO_PCS_STAT2_10GBR 0x0001 136 #define MDIO_PCS_STAT2_10GBX 0x0002 137 #define MDIO_PCS_STAT2_10GBW 0x0004 138 #define MDIO_PCS_STAT2_RXFLTABLE 0x1000 139 #define MDIO_PCS_STAT2_TXFLTABLE 0x2000 140 #define MDIO_PMD_TXDIS_GLOBAL 0x0001 141 #define MDIO_PMD_TXDIS_0 0x0002 142 #define MDIO_PMD_TXDIS_1 0x0004 143 #define MDIO_PMD_TXDIS_2 0x0008 144 #define MDIO_PMD_TXDIS_3 0x0010 145 #define MDIO_PMD_RXDET_GLOBAL 0x0001 146 #define MDIO_PMD_RXDET_0 0x0002 147 #define MDIO_PMD_RXDET_1 0x0004 148 #define MDIO_PMD_RXDET_2 0x0008 149 #define MDIO_PMD_RXDET_3 0x0010 150 #define MDIO_PMA_EXTABLE_10GCX4 0x0001 151 #define MDIO_PMA_EXTABLE_10GBLRM 0x0002 152 #define MDIO_PMA_EXTABLE_10GBT 0x0004 153 #define MDIO_PMA_EXTABLE_10GBKX4 0x0008 154 #define MDIO_PMA_EXTABLE_10GBKR 0x0010 155 #define MDIO_PMA_EXTABLE_1000BT 0x0020 156 #define MDIO_PMA_EXTABLE_1000BKX 0x0040 157 #define MDIO_PMA_EXTABLE_100BTX 0x0080 158 #define MDIO_PMA_EXTABLE_10BT 0x0100 159 #define MDIO_PHYXS_LNSTAT_SYNC0 0x0001 160 #define MDIO_PHYXS_LNSTAT_SYNC1 0x0002 161 #define MDIO_PHYXS_LNSTAT_SYNC2 0x0004 162 #define MDIO_PHYXS_LNSTAT_SYNC3 0x0008 163 #define MDIO_PHYXS_LNSTAT_ALIGN 0x1000 164 #define MDIO_PMA_10GBT_SWAPPOL_ABNX 0x0001 165 #define MDIO_PMA_10GBT_SWAPPOL_CDNX 0x0002 166 #define MDIO_PMA_10GBT_SWAPPOL_AREV 0x0100 167 #define MDIO_PMA_10GBT_SWAPPOL_BREV 0x0200 168 #define MDIO_PMA_10GBT_SWAPPOL_CREV 0x0400 169 #define MDIO_PMA_10GBT_SWAPPOL_DREV 0x0800 170 #define MDIO_PMA_10GBT_TXPWR_SHORT 0x0001 171 #define MDIO_PMA_10GBT_SNR_BIAS 0x8000 172 #define MDIO_PMA_10GBT_SNR_MAX 127 173 #define MDIO_PMA_10GBR_FECABLE_ABLE 0x0001 174 #define MDIO_PMA_10GBR_FECABLE_ERRABLE 0x0002 175 #define MDIO_PCS_10GBRT_STAT1_BLKLK 0x0001 176 #define MDIO_PCS_10GBRT_STAT2_ERR 0x00ff 177 #define MDIO_PCS_10GBRT_STAT2_BER 0x3f00 178 #define MDIO_AN_10GBT_CTRL_ADV10G 0x1000 179 #define MDIO_AN_10GBT_STAT_LPTRR 0x0200 180 #define MDIO_AN_10GBT_STAT_LPLTABLE 0x0400 181 #define MDIO_AN_10GBT_STAT_LP10G 0x0800 182 #define MDIO_AN_10GBT_STAT_REMOK 0x1000 183 #define MDIO_AN_10GBT_STAT_LOCOK 0x2000 184 #define MDIO_AN_10GBT_STAT_MS 0x4000 185 #define MDIO_AN_10GBT_STAT_MSFLT 0x8000 186 #define MDIO_AN_EEE_ADV_100TX 0x0002 187 #define MDIO_AN_EEE_ADV_1000T 0x0004 188 #define MDIO_EEE_100TX MDIO_AN_EEE_ADV_100TX 189 #define MDIO_EEE_1000T MDIO_AN_EEE_ADV_1000T 190 #define MDIO_EEE_10GT 0x0008 191 #define MDIO_EEE_1000KX 0x0010 192 #define MDIO_EEE_10GKX4 0x0020 193 #define MDIO_EEE_10GKR 0x0040 194 #define MDIO_PMA_LASI_RX_PHYXSLFLT 0x0001 195 #define MDIO_PMA_LASI_RX_PCSLFLT 0x0008 196 #define MDIO_PMA_LASI_RX_PMALFLT 0x0010 197 #define MDIO_PMA_LASI_RX_OPTICPOWERFLT 0x0020 198 #define MDIO_PMA_LASI_RX_WISLFLT 0x0200 199 #define MDIO_PMA_LASI_TX_PHYXSLFLT 0x0001 200 #define MDIO_PMA_LASI_TX_PCSLFLT 0x0008 201 #define MDIO_PMA_LASI_TX_PMALFLT 0x0010 202 #define MDIO_PMA_LASI_TX_LASERPOWERFLT 0x0080 203 #define MDIO_PMA_LASI_TX_LASERTEMPFLT 0x0100 204 #define MDIO_PMA_LASI_TX_LASERBICURRFLT 0x0200 205 #define MDIO_PMA_LASI_LSALARM 0x0001 206 #define MDIO_PMA_LASI_TXALARM 0x0002 207 #define MDIO_PMA_LASI_RXALARM 0x0004 208 #define MDIO_PHY_ID_C45 0x8000 209 #define MDIO_PHY_ID_PRTAD 0x03e0 210 #define MDIO_PHY_ID_DEVAD 0x001f 211 #define MDIO_PHY_ID_C45_MASK \ 212 (MDIO_PHY_ID_C45 | MDIO_PHY_ID_PRTAD | MDIO_PHY_ID_DEVAD) mdio_phy_id_c45(int prtad,int devad)213static inline __u16 mdio_phy_id_c45(int prtad, int devad) 214 { 215 return MDIO_PHY_ID_C45 | (prtad << 5) | devad; 216 } 217 #endif 218