1 /* 2 * This header was generated from the Linux kernel headers by update_headers.py, 3 * to provide necessary information from kernel to userspace, such as constants, 4 * structures, and macros, and thus, contains no copyrightable information. 5 */ 6 #ifndef __LINUX_PKT_SCHED_H 7 #define __LINUX_PKT_SCHED_H 8 #include <linux/types.h> 9 #define TC_PRIO_BESTEFFORT 0 10 #define TC_PRIO_FILLER 1 11 #define TC_PRIO_BULK 2 12 #define TC_PRIO_INTERACTIVE_BULK 4 13 #define TC_PRIO_INTERACTIVE 6 14 #define TC_PRIO_CONTROL 7 15 #define TC_PRIO_MAX 15 16 struct tc_stats { 17 __u64 bytes; 18 __u32 packets; 19 __u32 drops; 20 __u32 overlimits; 21 __u32 bps; 22 __u32 pps; 23 __u32 qlen; 24 __u32 backlog; 25 }; 26 struct tc_estimator { 27 signed char interval; 28 unsigned char ewma_log; 29 }; 30 #define TC_H_MAJ_MASK (0xFFFF0000U) 31 #define TC_H_MIN_MASK (0x0000FFFFU) 32 #define TC_H_MAJ(h) ((h)&TC_H_MAJ_MASK) 33 #define TC_H_MIN(h) ((h)&TC_H_MIN_MASK) 34 #define TC_H_MAKE(maj,min) (((maj)&TC_H_MAJ_MASK)|((min)&TC_H_MIN_MASK)) 35 #define TC_H_UNSPEC (0U) 36 #define TC_H_ROOT (0xFFFFFFFFU) 37 #define TC_H_INGRESS (0xFFFFFFF1U) 38 #define TC_H_CLSACT TC_H_INGRESS 39 #define TC_H_MIN_PRIORITY 0xFFE0U 40 #define TC_H_MIN_INGRESS 0xFFF2U 41 #define TC_H_MIN_EGRESS 0xFFF3U 42 enum tc_link_layer { 43 TC_LINKLAYER_UNAWARE, 44 TC_LINKLAYER_ETHERNET, 45 TC_LINKLAYER_ATM, 46 }; 47 #define TC_LINKLAYER_MASK 0x0F 48 struct tc_ratespec { 49 unsigned char cell_log; 50 __u8 linklayer; 51 unsigned short overhead; 52 short cell_align; 53 unsigned short mpu; 54 __u32 rate; 55 }; 56 #define TC_RTAB_SIZE 1024 57 struct tc_sizespec { 58 unsigned char cell_log; 59 unsigned char size_log; 60 short cell_align; 61 int overhead; 62 unsigned int linklayer; 63 unsigned int mpu; 64 unsigned int mtu; 65 unsigned int tsize; 66 }; 67 enum { 68 TCA_STAB_UNSPEC, 69 TCA_STAB_BASE, 70 TCA_STAB_DATA, 71 __TCA_STAB_MAX 72 }; 73 #define TCA_STAB_MAX (__TCA_STAB_MAX - 1) 74 struct tc_fifo_qopt { 75 __u32 limit; 76 }; 77 #define SKBPRIO_MAX_PRIORITY 64 78 struct tc_skbprio_qopt { 79 __u32 limit; 80 }; 81 #define TCQ_PRIO_BANDS 16 82 #define TCQ_MIN_PRIO_BANDS 2 83 struct tc_prio_qopt { 84 int bands; 85 __u8 priomap[TC_PRIO_MAX+1]; 86 }; 87 struct tc_multiq_qopt { 88 __u16 bands; 89 __u16 max_bands; 90 }; 91 #define TCQ_PLUG_BUFFER 0 92 #define TCQ_PLUG_RELEASE_ONE 1 93 #define TCQ_PLUG_RELEASE_INDEFINITE 2 94 #define TCQ_PLUG_LIMIT 3 95 struct tc_plug_qopt { 96 97 int action; 98 __u32 limit; 99 }; 100 struct tc_tbf_qopt { 101 struct tc_ratespec rate; 102 struct tc_ratespec peakrate; 103 __u32 limit; 104 __u32 buffer; 105 __u32 mtu; 106 }; 107 enum { 108 TCA_TBF_UNSPEC, 109 TCA_TBF_PARMS, 110 TCA_TBF_RTAB, 111 TCA_TBF_PTAB, 112 TCA_TBF_RATE64, 113 TCA_TBF_PRATE64, 114 TCA_TBF_BURST, 115 TCA_TBF_PBURST, 116 TCA_TBF_PAD, 117 __TCA_TBF_MAX, 118 }; 119 #define TCA_TBF_MAX (__TCA_TBF_MAX - 1) 120 struct tc_sfq_qopt { 121 unsigned quantum; 122 int perturb_period; 123 __u32 limit; 124 unsigned divisor; 125 unsigned flows; 126 }; 127 struct tc_sfqred_stats { 128 __u32 prob_drop; 129 __u32 forced_drop; 130 __u32 prob_mark; 131 __u32 forced_mark; 132 __u32 prob_mark_head; 133 __u32 forced_mark_head; 134 }; 135 struct tc_sfq_qopt_v1 { 136 struct tc_sfq_qopt v0; 137 unsigned int depth; 138 unsigned int headdrop; 139 __u32 limit; 140 __u32 qth_min; 141 __u32 qth_max; 142 unsigned char Wlog; 143 unsigned char Plog; 144 unsigned char Scell_log; 145 unsigned char flags; 146 __u32 max_P; 147 struct tc_sfqred_stats stats; 148 }; 149 struct tc_sfq_xstats { 150 __s32 allot; 151 }; 152 enum { 153 TCA_RED_UNSPEC, 154 TCA_RED_PARMS, 155 TCA_RED_STAB, 156 TCA_RED_MAX_P, 157 __TCA_RED_MAX, 158 }; 159 #define TCA_RED_MAX (__TCA_RED_MAX - 1) 160 struct tc_red_qopt { 161 __u32 limit; 162 __u32 qth_min; 163 __u32 qth_max; 164 unsigned char Wlog; 165 unsigned char Plog; 166 unsigned char Scell_log; 167 unsigned char flags; 168 #define TC_RED_ECN 1 169 #define TC_RED_HARDDROP 2 170 #define TC_RED_ADAPTATIVE 4 171 }; 172 struct tc_red_xstats { 173 __u32 early; 174 __u32 pdrop; 175 __u32 other; 176 __u32 marked; 177 }; 178 #define MAX_DPs 16 179 enum { 180 TCA_GRED_UNSPEC, 181 TCA_GRED_PARMS, 182 TCA_GRED_STAB, 183 TCA_GRED_DPS, 184 TCA_GRED_MAX_P, 185 TCA_GRED_LIMIT, 186 __TCA_GRED_MAX, 187 }; 188 #define TCA_GRED_MAX (__TCA_GRED_MAX - 1) 189 struct tc_gred_qopt { 190 __u32 limit; 191 __u32 qth_min; 192 __u32 qth_max; 193 __u32 DP; 194 __u32 backlog; 195 __u32 qave; 196 __u32 forced; 197 __u32 early; 198 __u32 other; 199 __u32 pdrop; 200 __u8 Wlog; 201 __u8 Plog; 202 __u8 Scell_log; 203 __u8 prio; 204 __u32 packets; 205 __u32 bytesin; 206 }; 207 struct tc_gred_sopt { 208 __u32 DPs; 209 __u32 def_DP; 210 __u8 grio; 211 __u8 flags; 212 __u16 pad1; 213 }; 214 enum { 215 TCA_CHOKE_UNSPEC, 216 TCA_CHOKE_PARMS, 217 TCA_CHOKE_STAB, 218 TCA_CHOKE_MAX_P, 219 __TCA_CHOKE_MAX, 220 }; 221 #define TCA_CHOKE_MAX (__TCA_CHOKE_MAX - 1) 222 struct tc_choke_qopt { 223 __u32 limit; 224 __u32 qth_min; 225 __u32 qth_max; 226 unsigned char Wlog; 227 unsigned char Plog; 228 unsigned char Scell_log; 229 unsigned char flags; 230 }; 231 struct tc_choke_xstats { 232 __u32 early; 233 __u32 pdrop; 234 __u32 other; 235 __u32 marked; 236 __u32 matched; 237 }; 238 #define TC_HTB_NUMPRIO 8 239 #define TC_HTB_MAXDEPTH 8 240 #define TC_HTB_PROTOVER 3 241 struct tc_htb_opt { 242 struct tc_ratespec rate; 243 struct tc_ratespec ceil; 244 __u32 buffer; 245 __u32 cbuffer; 246 __u32 quantum; 247 __u32 level; 248 __u32 prio; 249 }; 250 struct tc_htb_glob { 251 __u32 version; 252 __u32 rate2quantum; 253 __u32 defcls; 254 __u32 debug; 255 256 __u32 direct_pkts; 257 }; 258 enum { 259 TCA_HTB_UNSPEC, 260 TCA_HTB_PARMS, 261 TCA_HTB_INIT, 262 TCA_HTB_CTAB, 263 TCA_HTB_RTAB, 264 TCA_HTB_DIRECT_QLEN, 265 TCA_HTB_RATE64, 266 TCA_HTB_CEIL64, 267 TCA_HTB_PAD, 268 __TCA_HTB_MAX, 269 }; 270 #define TCA_HTB_MAX (__TCA_HTB_MAX - 1) 271 struct tc_htb_xstats { 272 __u32 lends; 273 __u32 borrows; 274 __u32 giants; 275 __u32 tokens; 276 __u32 ctokens; 277 }; 278 struct tc_hfsc_qopt { 279 __u16 defcls; 280 }; 281 struct tc_service_curve { 282 __u32 m1; 283 __u32 d; 284 __u32 m2; 285 }; 286 struct tc_hfsc_stats { 287 __u64 work; 288 __u64 rtwork; 289 __u32 period; 290 __u32 level; 291 }; 292 enum { 293 TCA_HFSC_UNSPEC, 294 TCA_HFSC_RSC, 295 TCA_HFSC_FSC, 296 TCA_HFSC_USC, 297 __TCA_HFSC_MAX, 298 }; 299 #define TCA_HFSC_MAX (__TCA_HFSC_MAX - 1) 300 #define TC_CBQ_MAXPRIO 8 301 #define TC_CBQ_MAXLEVEL 8 302 #define TC_CBQ_DEF_EWMA 5 303 struct tc_cbq_lssopt { 304 unsigned char change; 305 unsigned char flags; 306 #define TCF_CBQ_LSS_BOUNDED 1 307 #define TCF_CBQ_LSS_ISOLATED 2 308 unsigned char ewma_log; 309 unsigned char level; 310 #define TCF_CBQ_LSS_FLAGS 1 311 #define TCF_CBQ_LSS_EWMA 2 312 #define TCF_CBQ_LSS_MAXIDLE 4 313 #define TCF_CBQ_LSS_MINIDLE 8 314 #define TCF_CBQ_LSS_OFFTIME 0x10 315 #define TCF_CBQ_LSS_AVPKT 0x20 316 __u32 maxidle; 317 __u32 minidle; 318 __u32 offtime; 319 __u32 avpkt; 320 }; 321 struct tc_cbq_wrropt { 322 unsigned char flags; 323 unsigned char priority; 324 unsigned char cpriority; 325 unsigned char __reserved; 326 __u32 allot; 327 __u32 weight; 328 }; 329 struct tc_cbq_ovl { 330 unsigned char strategy; 331 #define TC_CBQ_OVL_CLASSIC 0 332 #define TC_CBQ_OVL_DELAY 1 333 #define TC_CBQ_OVL_LOWPRIO 2 334 #define TC_CBQ_OVL_DROP 3 335 #define TC_CBQ_OVL_RCLASSIC 4 336 unsigned char priority2; 337 __u16 pad; 338 __u32 penalty; 339 }; 340 struct tc_cbq_police { 341 unsigned char police; 342 unsigned char __res1; 343 unsigned short __res2; 344 }; 345 struct tc_cbq_fopt { 346 __u32 split; 347 __u32 defmap; 348 __u32 defchange; 349 }; 350 struct tc_cbq_xstats { 351 __u32 borrows; 352 __u32 overactions; 353 __s32 avgidle; 354 __s32 undertime; 355 }; 356 enum { 357 TCA_CBQ_UNSPEC, 358 TCA_CBQ_LSSOPT, 359 TCA_CBQ_WRROPT, 360 TCA_CBQ_FOPT, 361 TCA_CBQ_OVL_STRATEGY, 362 TCA_CBQ_RATE, 363 TCA_CBQ_RTAB, 364 TCA_CBQ_POLICE, 365 __TCA_CBQ_MAX, 366 }; 367 #define TCA_CBQ_MAX (__TCA_CBQ_MAX - 1) 368 enum { 369 TCA_DSMARK_UNSPEC, 370 TCA_DSMARK_INDICES, 371 TCA_DSMARK_DEFAULT_INDEX, 372 TCA_DSMARK_SET_TC_INDEX, 373 TCA_DSMARK_MASK, 374 TCA_DSMARK_VALUE, 375 __TCA_DSMARK_MAX, 376 }; 377 #define TCA_DSMARK_MAX (__TCA_DSMARK_MAX - 1) 378 enum { 379 TCA_ATM_UNSPEC, 380 TCA_ATM_FD, 381 TCA_ATM_PTR, 382 TCA_ATM_HDR, 383 TCA_ATM_EXCESS, 384 TCA_ATM_ADDR, 385 TCA_ATM_STATE, 386 __TCA_ATM_MAX, 387 }; 388 #define TCA_ATM_MAX (__TCA_ATM_MAX - 1) 389 enum { 390 TCA_NETEM_UNSPEC, 391 TCA_NETEM_CORR, 392 TCA_NETEM_DELAY_DIST, 393 TCA_NETEM_REORDER, 394 TCA_NETEM_CORRUPT, 395 TCA_NETEM_LOSS, 396 TCA_NETEM_RATE, 397 TCA_NETEM_ECN, 398 TCA_NETEM_RATE64, 399 TCA_NETEM_PAD, 400 TCA_NETEM_LATENCY64, 401 TCA_NETEM_JITTER64, 402 TCA_NETEM_SLOT, 403 TCA_NETEM_SLOT_DIST, 404 __TCA_NETEM_MAX, 405 }; 406 #define TCA_NETEM_MAX (__TCA_NETEM_MAX - 1) 407 struct tc_netem_qopt { 408 __u32 latency; 409 __u32 limit; 410 __u32 loss; 411 __u32 gap; 412 __u32 duplicate; 413 __u32 jitter; 414 }; 415 struct tc_netem_corr { 416 __u32 delay_corr; 417 __u32 loss_corr; 418 __u32 dup_corr; 419 }; 420 struct tc_netem_reorder { 421 __u32 probability; 422 __u32 correlation; 423 }; 424 struct tc_netem_corrupt { 425 __u32 probability; 426 __u32 correlation; 427 }; 428 struct tc_netem_rate { 429 __u32 rate; 430 __s32 packet_overhead; 431 __u32 cell_size; 432 __s32 cell_overhead; 433 }; 434 struct tc_netem_slot { 435 __s64 min_delay; 436 __s64 max_delay; 437 __s32 max_packets; 438 __s32 max_bytes; 439 __s64 dist_delay; 440 __s64 dist_jitter; 441 }; 442 enum { 443 NETEM_LOSS_UNSPEC, 444 NETEM_LOSS_GI, 445 NETEM_LOSS_GE, 446 __NETEM_LOSS_MAX 447 }; 448 #define NETEM_LOSS_MAX (__NETEM_LOSS_MAX - 1) 449 struct tc_netem_gimodel { 450 __u32 p13; 451 __u32 p31; 452 __u32 p32; 453 __u32 p14; 454 __u32 p23; 455 }; 456 struct tc_netem_gemodel { 457 __u32 p; 458 __u32 r; 459 __u32 h; 460 __u32 k1; 461 }; 462 #define NETEM_DIST_SCALE 8192 463 #define NETEM_DIST_MAX 16384 464 enum { 465 TCA_DRR_UNSPEC, 466 TCA_DRR_QUANTUM, 467 __TCA_DRR_MAX 468 }; 469 #define TCA_DRR_MAX (__TCA_DRR_MAX - 1) 470 struct tc_drr_stats { 471 __u32 deficit; 472 }; 473 #define TC_QOPT_BITMASK 15 474 #define TC_QOPT_MAX_QUEUE 16 475 enum { 476 TC_MQPRIO_HW_OFFLOAD_NONE, 477 TC_MQPRIO_HW_OFFLOAD_TCS, 478 __TC_MQPRIO_HW_OFFLOAD_MAX 479 }; 480 #define TC_MQPRIO_HW_OFFLOAD_MAX (__TC_MQPRIO_HW_OFFLOAD_MAX - 1) 481 enum { 482 TC_MQPRIO_MODE_DCB, 483 TC_MQPRIO_MODE_CHANNEL, 484 __TC_MQPRIO_MODE_MAX 485 }; 486 #define __TC_MQPRIO_MODE_MAX (__TC_MQPRIO_MODE_MAX - 1) 487 enum { 488 TC_MQPRIO_SHAPER_DCB, 489 TC_MQPRIO_SHAPER_BW_RATE, 490 __TC_MQPRIO_SHAPER_MAX 491 }; 492 #define __TC_MQPRIO_SHAPER_MAX (__TC_MQPRIO_SHAPER_MAX - 1) 493 struct tc_mqprio_qopt { 494 __u8 num_tc; 495 __u8 prio_tc_map[TC_QOPT_BITMASK + 1]; 496 __u8 hw; 497 __u16 count[TC_QOPT_MAX_QUEUE]; 498 __u16 offset[TC_QOPT_MAX_QUEUE]; 499 }; 500 #define TC_MQPRIO_F_MODE 0x1 501 #define TC_MQPRIO_F_SHAPER 0x2 502 #define TC_MQPRIO_F_MIN_RATE 0x4 503 #define TC_MQPRIO_F_MAX_RATE 0x8 504 enum { 505 TCA_MQPRIO_UNSPEC, 506 TCA_MQPRIO_MODE, 507 TCA_MQPRIO_SHAPER, 508 TCA_MQPRIO_MIN_RATE64, 509 TCA_MQPRIO_MAX_RATE64, 510 __TCA_MQPRIO_MAX, 511 }; 512 #define TCA_MQPRIO_MAX (__TCA_MQPRIO_MAX - 1) 513 enum { 514 TCA_SFB_UNSPEC, 515 TCA_SFB_PARMS, 516 __TCA_SFB_MAX, 517 }; 518 #define TCA_SFB_MAX (__TCA_SFB_MAX - 1) 519 struct tc_sfb_qopt { 520 __u32 rehash_interval; 521 __u32 warmup_time; 522 __u32 max; 523 __u32 bin_size; 524 __u32 increment; 525 __u32 decrement; 526 __u32 limit; 527 __u32 penalty_rate; 528 __u32 penalty_burst; 529 }; 530 struct tc_sfb_xstats { 531 __u32 earlydrop; 532 __u32 penaltydrop; 533 __u32 bucketdrop; 534 __u32 queuedrop; 535 __u32 childdrop; 536 __u32 marked; 537 __u32 maxqlen; 538 __u32 maxprob; 539 __u32 avgprob; 540 }; 541 #define SFB_MAX_PROB 0xFFFF 542 enum { 543 TCA_QFQ_UNSPEC, 544 TCA_QFQ_WEIGHT, 545 TCA_QFQ_LMAX, 546 __TCA_QFQ_MAX 547 }; 548 #define TCA_QFQ_MAX (__TCA_QFQ_MAX - 1) 549 struct tc_qfq_stats { 550 __u32 weight; 551 __u32 lmax; 552 }; 553 enum { 554 TCA_CODEL_UNSPEC, 555 TCA_CODEL_TARGET, 556 TCA_CODEL_LIMIT, 557 TCA_CODEL_INTERVAL, 558 TCA_CODEL_ECN, 559 TCA_CODEL_CE_THRESHOLD, 560 __TCA_CODEL_MAX 561 }; 562 #define TCA_CODEL_MAX (__TCA_CODEL_MAX - 1) 563 struct tc_codel_xstats { 564 __u32 maxpacket; 565 __u32 count; 566 __u32 lastcount; 567 __u32 ldelay; 568 __s32 drop_next; 569 __u32 drop_overlimit; 570 __u32 ecn_mark; 571 __u32 dropping; 572 __u32 ce_mark; 573 }; 574 enum { 575 TCA_FQ_CODEL_UNSPEC, 576 TCA_FQ_CODEL_TARGET, 577 TCA_FQ_CODEL_LIMIT, 578 TCA_FQ_CODEL_INTERVAL, 579 TCA_FQ_CODEL_ECN, 580 TCA_FQ_CODEL_FLOWS, 581 TCA_FQ_CODEL_QUANTUM, 582 TCA_FQ_CODEL_CE_THRESHOLD, 583 TCA_FQ_CODEL_DROP_BATCH_SIZE, 584 TCA_FQ_CODEL_MEMORY_LIMIT, 585 __TCA_FQ_CODEL_MAX 586 }; 587 #define TCA_FQ_CODEL_MAX (__TCA_FQ_CODEL_MAX - 1) 588 enum { 589 TCA_FQ_CODEL_XSTATS_QDISC, 590 TCA_FQ_CODEL_XSTATS_CLASS, 591 }; 592 struct tc_fq_codel_qd_stats { 593 __u32 maxpacket; 594 __u32 drop_overlimit; 595 __u32 ecn_mark; 596 __u32 new_flow_count; 597 __u32 new_flows_len; 598 __u32 old_flows_len; 599 __u32 ce_mark; 600 __u32 memory_usage; 601 __u32 drop_overmemory; 602 }; 603 struct tc_fq_codel_cl_stats { 604 __s32 deficit; 605 __u32 ldelay; 606 __u32 count; 607 __u32 lastcount; 608 __u32 dropping; 609 __s32 drop_next; 610 }; 611 struct tc_fq_codel_xstats { 612 __u32 type; 613 union { 614 struct tc_fq_codel_qd_stats qdisc_stats; 615 struct tc_fq_codel_cl_stats class_stats; 616 }; 617 }; 618 enum { 619 TCA_FQ_UNSPEC, 620 TCA_FQ_PLIMIT, 621 TCA_FQ_FLOW_PLIMIT, 622 TCA_FQ_QUANTUM, 623 TCA_FQ_INITIAL_QUANTUM, 624 TCA_FQ_RATE_ENABLE, 625 TCA_FQ_FLOW_DEFAULT_RATE, 626 TCA_FQ_FLOW_MAX_RATE, 627 TCA_FQ_BUCKETS_LOG, 628 TCA_FQ_FLOW_REFILL_DELAY, 629 TCA_FQ_ORPHAN_MASK, 630 TCA_FQ_LOW_RATE_THRESHOLD, 631 __TCA_FQ_MAX 632 }; 633 #define TCA_FQ_MAX (__TCA_FQ_MAX - 1) 634 struct tc_fq_qd_stats { 635 __u64 gc_flows; 636 __u64 highprio_packets; 637 __u64 tcp_retrans; 638 __u64 throttled; 639 __u64 flows_plimit; 640 __u64 pkts_too_long; 641 __u64 allocation_errors; 642 __s64 time_next_delayed_flow; 643 __u32 flows; 644 __u32 inactive_flows; 645 __u32 throttled_flows; 646 __u32 unthrottle_latency_ns; 647 }; 648 enum { 649 TCA_HHF_UNSPEC, 650 TCA_HHF_BACKLOG_LIMIT, 651 TCA_HHF_QUANTUM, 652 TCA_HHF_HH_FLOWS_LIMIT, 653 TCA_HHF_RESET_TIMEOUT, 654 TCA_HHF_ADMIT_BYTES, 655 TCA_HHF_EVICT_TIMEOUT, 656 TCA_HHF_NON_HH_WEIGHT, 657 __TCA_HHF_MAX 658 }; 659 #define TCA_HHF_MAX (__TCA_HHF_MAX - 1) 660 struct tc_hhf_xstats { 661 __u32 drop_overlimit; 662 __u32 hh_overlimit; 663 __u32 hh_tot_count; 664 __u32 hh_cur_count; 665 }; 666 enum { 667 TCA_PIE_UNSPEC, 668 TCA_PIE_TARGET, 669 TCA_PIE_LIMIT, 670 TCA_PIE_TUPDATE, 671 TCA_PIE_ALPHA, 672 TCA_PIE_BETA, 673 TCA_PIE_ECN, 674 TCA_PIE_BYTEMODE, 675 __TCA_PIE_MAX 676 }; 677 #define TCA_PIE_MAX (__TCA_PIE_MAX - 1) 678 struct tc_pie_xstats { 679 __u32 prob; 680 __u32 delay; 681 __u32 avg_dq_rate; 682 __u32 packets_in; 683 __u32 dropped; 684 __u32 overlimit; 685 __u32 maxq; 686 __u32 ecn_mark; 687 }; 688 struct tc_cbs_qopt { 689 __u8 offload; 690 __u8 _pad[3]; 691 __s32 hicredit; 692 __s32 locredit; 693 __s32 idleslope; 694 __s32 sendslope; 695 }; 696 enum { 697 TCA_CBS_UNSPEC, 698 TCA_CBS_PARMS, 699 __TCA_CBS_MAX, 700 }; 701 #define TCA_CBS_MAX (__TCA_CBS_MAX - 1) 702 struct tc_etf_qopt { 703 __s32 delta; 704 __s32 clockid; 705 __u32 flags; 706 #define TC_ETF_DEADLINE_MODE_ON BIT(0) 707 #define TC_ETF_OFFLOAD_ON BIT(1) 708 }; 709 enum { 710 TCA_ETF_UNSPEC, 711 TCA_ETF_PARMS, 712 __TCA_ETF_MAX, 713 }; 714 #define TCA_ETF_MAX (__TCA_ETF_MAX - 1) 715 enum { 716 TCA_CAKE_UNSPEC, 717 TCA_CAKE_PAD, 718 TCA_CAKE_BASE_RATE64, 719 TCA_CAKE_DIFFSERV_MODE, 720 TCA_CAKE_ATM, 721 TCA_CAKE_FLOW_MODE, 722 TCA_CAKE_OVERHEAD, 723 TCA_CAKE_RTT, 724 TCA_CAKE_TARGET, 725 TCA_CAKE_AUTORATE, 726 TCA_CAKE_MEMORY, 727 TCA_CAKE_NAT, 728 TCA_CAKE_RAW, 729 TCA_CAKE_WASH, 730 TCA_CAKE_MPU, 731 TCA_CAKE_INGRESS, 732 TCA_CAKE_ACK_FILTER, 733 TCA_CAKE_SPLIT_GSO, 734 __TCA_CAKE_MAX 735 }; 736 #define TCA_CAKE_MAX (__TCA_CAKE_MAX - 1) 737 enum { 738 __TCA_CAKE_STATS_INVALID, 739 TCA_CAKE_STATS_PAD, 740 TCA_CAKE_STATS_CAPACITY_ESTIMATE64, 741 TCA_CAKE_STATS_MEMORY_LIMIT, 742 TCA_CAKE_STATS_MEMORY_USED, 743 TCA_CAKE_STATS_AVG_NETOFF, 744 TCA_CAKE_STATS_MIN_NETLEN, 745 TCA_CAKE_STATS_MAX_NETLEN, 746 TCA_CAKE_STATS_MIN_ADJLEN, 747 TCA_CAKE_STATS_MAX_ADJLEN, 748 TCA_CAKE_STATS_TIN_STATS, 749 TCA_CAKE_STATS_DEFICIT, 750 TCA_CAKE_STATS_COBALT_COUNT, 751 TCA_CAKE_STATS_DROPPING, 752 TCA_CAKE_STATS_DROP_NEXT_US, 753 TCA_CAKE_STATS_P_DROP, 754 TCA_CAKE_STATS_BLUE_TIMER_US, 755 __TCA_CAKE_STATS_MAX 756 }; 757 #define TCA_CAKE_STATS_MAX (__TCA_CAKE_STATS_MAX - 1) 758 enum { 759 __TCA_CAKE_TIN_STATS_INVALID, 760 TCA_CAKE_TIN_STATS_PAD, 761 TCA_CAKE_TIN_STATS_SENT_PACKETS, 762 TCA_CAKE_TIN_STATS_SENT_BYTES64, 763 TCA_CAKE_TIN_STATS_DROPPED_PACKETS, 764 TCA_CAKE_TIN_STATS_DROPPED_BYTES64, 765 TCA_CAKE_TIN_STATS_ACKS_DROPPED_PACKETS, 766 TCA_CAKE_TIN_STATS_ACKS_DROPPED_BYTES64, 767 TCA_CAKE_TIN_STATS_ECN_MARKED_PACKETS, 768 TCA_CAKE_TIN_STATS_ECN_MARKED_BYTES64, 769 TCA_CAKE_TIN_STATS_BACKLOG_PACKETS, 770 TCA_CAKE_TIN_STATS_BACKLOG_BYTES, 771 TCA_CAKE_TIN_STATS_THRESHOLD_RATE64, 772 TCA_CAKE_TIN_STATS_TARGET_US, 773 TCA_CAKE_TIN_STATS_INTERVAL_US, 774 TCA_CAKE_TIN_STATS_WAY_INDIRECT_HITS, 775 TCA_CAKE_TIN_STATS_WAY_MISSES, 776 TCA_CAKE_TIN_STATS_WAY_COLLISIONS, 777 TCA_CAKE_TIN_STATS_PEAK_DELAY_US, 778 TCA_CAKE_TIN_STATS_AVG_DELAY_US, 779 TCA_CAKE_TIN_STATS_BASE_DELAY_US, 780 TCA_CAKE_TIN_STATS_SPARSE_FLOWS, 781 TCA_CAKE_TIN_STATS_BULK_FLOWS, 782 TCA_CAKE_TIN_STATS_UNRESPONSIVE_FLOWS, 783 TCA_CAKE_TIN_STATS_MAX_SKBLEN, 784 TCA_CAKE_TIN_STATS_FLOW_QUANTUM, 785 __TCA_CAKE_TIN_STATS_MAX 786 }; 787 #define TCA_CAKE_TIN_STATS_MAX (__TCA_CAKE_TIN_STATS_MAX - 1) 788 #define TC_CAKE_MAX_TINS (8) 789 enum { 790 CAKE_FLOW_NONE = 0, 791 CAKE_FLOW_SRC_IP, 792 CAKE_FLOW_DST_IP, 793 CAKE_FLOW_HOSTS, 794 CAKE_FLOW_FLOWS, 795 CAKE_FLOW_DUAL_SRC, 796 CAKE_FLOW_DUAL_DST, 797 CAKE_FLOW_TRIPLE, 798 CAKE_FLOW_MAX, 799 }; 800 enum { 801 CAKE_DIFFSERV_DIFFSERV3 = 0, 802 CAKE_DIFFSERV_DIFFSERV4, 803 CAKE_DIFFSERV_DIFFSERV8, 804 CAKE_DIFFSERV_BESTEFFORT, 805 CAKE_DIFFSERV_PRECEDENCE, 806 CAKE_DIFFSERV_MAX 807 }; 808 enum { 809 CAKE_ACK_NONE = 0, 810 CAKE_ACK_FILTER, 811 CAKE_ACK_AGGRESSIVE, 812 CAKE_ACK_MAX 813 }; 814 enum { 815 CAKE_ATM_NONE = 0, 816 CAKE_ATM_ATM, 817 CAKE_ATM_PTM, 818 CAKE_ATM_MAX 819 }; 820 #endif 821