1 // SPDX-License-Identifier: GPL-2.0-only
2 /*
3 * Dynamic DMA mapping support.
4 *
5 * This implementation is a fallback for platforms that do not support
6 * I/O TLBs (aka DMA address translation hardware).
7 * Copyright (C) 2000 Asit Mallick <Asit.K.Mallick@intel.com>
8 * Copyright (C) 2000 Goutham Rao <goutham.rao@intel.com>
9 * Copyright (C) 2000, 2003 Hewlett-Packard Co
10 * David Mosberger-Tang <davidm@hpl.hp.com>
11 *
12 * 03/05/07 davidm Switch from PCI-DMA to generic device DMA API.
13 * 00/12/13 davidm Rename to swiotlb.c and add mark_clean() to avoid
14 * unnecessary i-cache flushing.
15 * 04/07/.. ak Better overflow handling. Assorted fixes.
16 * 05/09/10 linville Add support for syncing ranges, support syncing for
17 * DMA_BIDIRECTIONAL mappings, miscellaneous cleanup.
18 * 08/12/11 beckyb Add highmem support
19 */
20
21 #define pr_fmt(fmt) "software IO TLB: " fmt
22
23 #include <linux/cache.h>
24 #include <linux/cc_platform.h>
25 #include <linux/ctype.h>
26 #include <linux/debugfs.h>
27 #include <linux/dma-direct.h>
28 #include <linux/dma-map-ops.h>
29 #include <linux/export.h>
30 #include <linux/gfp.h>
31 #include <linux/highmem.h>
32 #include <linux/io.h>
33 #include <linux/iommu-helper.h>
34 #include <linux/init.h>
35 #include <linux/memblock.h>
36 #include <linux/mm.h>
37 #include <linux/pfn.h>
38 #include <linux/rculist.h>
39 #include <linux/scatterlist.h>
40 #include <linux/set_memory.h>
41 #include <linux/spinlock.h>
42 #include <linux/string.h>
43 #include <linux/swiotlb.h>
44 #include <linux/types.h>
45 #ifdef CONFIG_DMA_RESTRICTED_POOL
46 #include <linux/of.h>
47 #include <linux/of_fdt.h>
48 #include <linux/of_reserved_mem.h>
49 #include <linux/slab.h>
50 #endif
51
52 #define CREATE_TRACE_POINTS
53 #include <trace/events/swiotlb.h>
54
55 #define SLABS_PER_PAGE (1 << (PAGE_SHIFT - IO_TLB_SHIFT))
56
57 /*
58 * Minimum IO TLB size to bother booting with. Systems with mainly
59 * 64bit capable cards will only lightly use the swiotlb. If we can't
60 * allocate a contiguous 1MB, we're probably in trouble anyway.
61 */
62 #define IO_TLB_MIN_SLABS ((1<<20) >> IO_TLB_SHIFT)
63
64 #define INVALID_PHYS_ADDR (~(phys_addr_t)0)
65
66 /**
67 * struct io_tlb_slot - IO TLB slot descriptor
68 * @orig_addr: The original address corresponding to a mapped entry.
69 * @alloc_size: Size of the allocated buffer.
70 * @list: The free list describing the number of free entries available
71 * from each index.
72 * @pad_slots: Number of preceding padding slots. Valid only in the first
73 * allocated non-padding slot.
74 */
75 struct io_tlb_slot {
76 phys_addr_t orig_addr;
77 size_t alloc_size;
78 unsigned short list;
79 unsigned short pad_slots;
80 };
81
82 static bool swiotlb_force_bounce;
83 static bool swiotlb_force_disable;
84
85 #ifdef CONFIG_SWIOTLB_DYNAMIC
86
87 static void swiotlb_dyn_alloc(struct work_struct *work);
88
89 static struct io_tlb_mem io_tlb_default_mem = {
90 .lock = __SPIN_LOCK_UNLOCKED(io_tlb_default_mem.lock),
91 .pools = LIST_HEAD_INIT(io_tlb_default_mem.pools),
92 .dyn_alloc = __WORK_INITIALIZER(io_tlb_default_mem.dyn_alloc,
93 swiotlb_dyn_alloc),
94 };
95
96 #else /* !CONFIG_SWIOTLB_DYNAMIC */
97
98 static struct io_tlb_mem io_tlb_default_mem;
99
100 #endif /* CONFIG_SWIOTLB_DYNAMIC */
101
102 static unsigned long default_nslabs = IO_TLB_DEFAULT_SIZE >> IO_TLB_SHIFT;
103 static unsigned long default_nareas;
104
105 /**
106 * struct io_tlb_area - IO TLB memory area descriptor
107 *
108 * This is a single area with a single lock.
109 *
110 * @used: The number of used IO TLB block.
111 * @index: The slot index to start searching in this area for next round.
112 * @lock: The lock to protect the above data structures in the map and
113 * unmap calls.
114 */
115 struct io_tlb_area {
116 unsigned long used;
117 unsigned int index;
118 spinlock_t lock;
119 };
120
121 /*
122 * Round up number of slabs to the next power of 2. The last area is going
123 * be smaller than the rest if default_nslabs is not power of two.
124 * The number of slot in an area should be a multiple of IO_TLB_SEGSIZE,
125 * otherwise a segment may span two or more areas. It conflicts with free
126 * contiguous slots tracking: free slots are treated contiguous no matter
127 * whether they cross an area boundary.
128 *
129 * Return true if default_nslabs is rounded up.
130 */
round_up_default_nslabs(void)131 static bool round_up_default_nslabs(void)
132 {
133 if (!default_nareas)
134 return false;
135
136 if (default_nslabs < IO_TLB_SEGSIZE * default_nareas)
137 default_nslabs = IO_TLB_SEGSIZE * default_nareas;
138 else if (is_power_of_2(default_nslabs))
139 return false;
140 default_nslabs = roundup_pow_of_two(default_nslabs);
141 return true;
142 }
143
144 /**
145 * swiotlb_adjust_nareas() - adjust the number of areas and slots
146 * @nareas: Desired number of areas. Zero is treated as 1.
147 *
148 * Adjust the default number of areas in a memory pool.
149 * The default size of the memory pool may also change to meet minimum area
150 * size requirements.
151 */
swiotlb_adjust_nareas(unsigned int nareas)152 static void swiotlb_adjust_nareas(unsigned int nareas)
153 {
154 if (!nareas)
155 nareas = 1;
156 else if (!is_power_of_2(nareas))
157 nareas = roundup_pow_of_two(nareas);
158
159 default_nareas = nareas;
160
161 pr_info("area num %d.\n", nareas);
162 if (round_up_default_nslabs())
163 pr_info("SWIOTLB bounce buffer size roundup to %luMB",
164 (default_nslabs << IO_TLB_SHIFT) >> 20);
165 }
166
167 /**
168 * limit_nareas() - get the maximum number of areas for a given memory pool size
169 * @nareas: Desired number of areas.
170 * @nslots: Total number of slots in the memory pool.
171 *
172 * Limit the number of areas to the maximum possible number of areas in
173 * a memory pool of the given size.
174 *
175 * Return: Maximum possible number of areas.
176 */
limit_nareas(unsigned int nareas,unsigned long nslots)177 static unsigned int limit_nareas(unsigned int nareas, unsigned long nslots)
178 {
179 if (nslots < nareas * IO_TLB_SEGSIZE)
180 return nslots / IO_TLB_SEGSIZE;
181 return nareas;
182 }
183
184 static int __init
setup_io_tlb_npages(char * str)185 setup_io_tlb_npages(char *str)
186 {
187 if (isdigit(*str)) {
188 /* avoid tail segment of size < IO_TLB_SEGSIZE */
189 default_nslabs =
190 ALIGN(simple_strtoul(str, &str, 0), IO_TLB_SEGSIZE);
191 }
192 if (*str == ',')
193 ++str;
194 if (isdigit(*str))
195 swiotlb_adjust_nareas(simple_strtoul(str, &str, 0));
196 if (*str == ',')
197 ++str;
198 if (!strcmp(str, "force"))
199 swiotlb_force_bounce = true;
200 else if (!strcmp(str, "noforce"))
201 swiotlb_force_disable = true;
202
203 return 0;
204 }
205 early_param("swiotlb", setup_io_tlb_npages);
206
swiotlb_size_or_default(void)207 unsigned long swiotlb_size_or_default(void)
208 {
209 return default_nslabs << IO_TLB_SHIFT;
210 }
211
swiotlb_adjust_size(unsigned long size)212 void __init swiotlb_adjust_size(unsigned long size)
213 {
214 /*
215 * If swiotlb parameter has not been specified, give a chance to
216 * architectures such as those supporting memory encryption to
217 * adjust/expand SWIOTLB size for their use.
218 */
219 if (default_nslabs != IO_TLB_DEFAULT_SIZE >> IO_TLB_SHIFT)
220 return;
221
222 size = ALIGN(size, IO_TLB_SIZE);
223 default_nslabs = ALIGN(size >> IO_TLB_SHIFT, IO_TLB_SEGSIZE);
224 if (round_up_default_nslabs())
225 size = default_nslabs << IO_TLB_SHIFT;
226 pr_info("SWIOTLB bounce buffer size adjusted to %luMB", size >> 20);
227 }
228
swiotlb_print_info(void)229 void swiotlb_print_info(void)
230 {
231 struct io_tlb_pool *mem = &io_tlb_default_mem.defpool;
232
233 if (!mem->nslabs) {
234 pr_warn("No low mem\n");
235 return;
236 }
237
238 pr_info("mapped [mem %pa-%pa] (%luMB)\n", &mem->start, &mem->end,
239 (mem->nslabs << IO_TLB_SHIFT) >> 20);
240 }
241
io_tlb_offset(unsigned long val)242 static inline unsigned long io_tlb_offset(unsigned long val)
243 {
244 return val & (IO_TLB_SEGSIZE - 1);
245 }
246
nr_slots(u64 val)247 static inline unsigned long nr_slots(u64 val)
248 {
249 return DIV_ROUND_UP(val, IO_TLB_SIZE);
250 }
251
252 /*
253 * Early SWIOTLB allocation may be too early to allow an architecture to
254 * perform the desired operations. This function allows the architecture to
255 * call SWIOTLB when the operations are possible. It needs to be called
256 * before the SWIOTLB memory is used.
257 */
swiotlb_update_mem_attributes(void)258 void __init swiotlb_update_mem_attributes(void)
259 {
260 struct io_tlb_pool *mem = &io_tlb_default_mem.defpool;
261 unsigned long bytes;
262
263 if (!mem->nslabs || mem->late_alloc)
264 return;
265 bytes = PAGE_ALIGN(mem->nslabs << IO_TLB_SHIFT);
266 set_memory_decrypted((unsigned long)mem->vaddr, bytes >> PAGE_SHIFT);
267 }
268
swiotlb_init_io_tlb_pool(struct io_tlb_pool * mem,phys_addr_t start,unsigned long nslabs,bool late_alloc,unsigned int nareas)269 static void swiotlb_init_io_tlb_pool(struct io_tlb_pool *mem, phys_addr_t start,
270 unsigned long nslabs, bool late_alloc, unsigned int nareas)
271 {
272 void *vaddr = phys_to_virt(start);
273 unsigned long bytes = nslabs << IO_TLB_SHIFT, i;
274
275 mem->nslabs = nslabs;
276 mem->start = start;
277 mem->end = mem->start + bytes;
278 mem->late_alloc = late_alloc;
279 mem->nareas = nareas;
280 mem->area_nslabs = nslabs / mem->nareas;
281
282 for (i = 0; i < mem->nareas; i++) {
283 spin_lock_init(&mem->areas[i].lock);
284 mem->areas[i].index = 0;
285 mem->areas[i].used = 0;
286 }
287
288 for (i = 0; i < mem->nslabs; i++) {
289 mem->slots[i].list = min(IO_TLB_SEGSIZE - io_tlb_offset(i),
290 mem->nslabs - i);
291 mem->slots[i].orig_addr = INVALID_PHYS_ADDR;
292 mem->slots[i].alloc_size = 0;
293 mem->slots[i].pad_slots = 0;
294 }
295
296 memset(vaddr, 0, bytes);
297 mem->vaddr = vaddr;
298 return;
299 }
300
301 /**
302 * add_mem_pool() - add a memory pool to the allocator
303 * @mem: Software IO TLB allocator.
304 * @pool: Memory pool to be added.
305 */
add_mem_pool(struct io_tlb_mem * mem,struct io_tlb_pool * pool)306 static void add_mem_pool(struct io_tlb_mem *mem, struct io_tlb_pool *pool)
307 {
308 #ifdef CONFIG_SWIOTLB_DYNAMIC
309 spin_lock(&mem->lock);
310 list_add_rcu(&pool->node, &mem->pools);
311 mem->nslabs += pool->nslabs;
312 spin_unlock(&mem->lock);
313 #else
314 mem->nslabs = pool->nslabs;
315 #endif
316 }
317
swiotlb_memblock_alloc(unsigned long nslabs,unsigned int flags,int (* remap)(void * tlb,unsigned long nslabs))318 static void __init *swiotlb_memblock_alloc(unsigned long nslabs,
319 unsigned int flags,
320 int (*remap)(void *tlb, unsigned long nslabs))
321 {
322 size_t bytes = PAGE_ALIGN(nslabs << IO_TLB_SHIFT);
323 void *tlb;
324
325 /*
326 * By default allocate the bounce buffer memory from low memory, but
327 * allow to pick a location everywhere for hypervisors with guest
328 * memory encryption.
329 */
330 if (flags & SWIOTLB_ANY)
331 tlb = memblock_alloc(bytes, PAGE_SIZE);
332 else
333 tlb = memblock_alloc_low(bytes, PAGE_SIZE);
334
335 if (!tlb) {
336 pr_warn("%s: Failed to allocate %zu bytes tlb structure\n",
337 __func__, bytes);
338 return NULL;
339 }
340
341 if (remap && remap(tlb, nslabs) < 0) {
342 memblock_free(tlb, PAGE_ALIGN(bytes));
343 pr_warn("%s: Failed to remap %zu bytes\n", __func__, bytes);
344 return NULL;
345 }
346
347 return tlb;
348 }
349
350 /*
351 * Statically reserve bounce buffer space and initialize bounce buffer data
352 * structures for the software IO TLB used to implement the DMA API.
353 */
swiotlb_init_remap(bool addressing_limit,unsigned int flags,int (* remap)(void * tlb,unsigned long nslabs))354 void __init swiotlb_init_remap(bool addressing_limit, unsigned int flags,
355 int (*remap)(void *tlb, unsigned long nslabs))
356 {
357 struct io_tlb_pool *mem = &io_tlb_default_mem.defpool;
358 unsigned long nslabs;
359 unsigned int nareas;
360 size_t alloc_size;
361 void *tlb;
362
363 if (!addressing_limit && !swiotlb_force_bounce)
364 return;
365 if (swiotlb_force_disable)
366 return;
367
368 io_tlb_default_mem.force_bounce =
369 swiotlb_force_bounce || (flags & SWIOTLB_FORCE);
370
371 #ifdef CONFIG_SWIOTLB_DYNAMIC
372 if (!remap)
373 io_tlb_default_mem.can_grow = true;
374 if (flags & SWIOTLB_ANY)
375 io_tlb_default_mem.phys_limit = virt_to_phys(high_memory - 1);
376 else
377 io_tlb_default_mem.phys_limit = ARCH_LOW_ADDRESS_LIMIT;
378 #endif
379
380 if (!default_nareas)
381 swiotlb_adjust_nareas(num_possible_cpus());
382
383 nslabs = default_nslabs;
384 nareas = limit_nareas(default_nareas, nslabs);
385 while ((tlb = swiotlb_memblock_alloc(nslabs, flags, remap)) == NULL) {
386 if (nslabs <= IO_TLB_MIN_SLABS)
387 return;
388 nslabs = ALIGN(nslabs >> 1, IO_TLB_SEGSIZE);
389 nareas = limit_nareas(nareas, nslabs);
390 }
391
392 if (default_nslabs != nslabs) {
393 pr_info("SWIOTLB bounce buffer size adjusted %lu -> %lu slabs",
394 default_nslabs, nslabs);
395 default_nslabs = nslabs;
396 }
397
398 alloc_size = PAGE_ALIGN(array_size(sizeof(*mem->slots), nslabs));
399 mem->slots = memblock_alloc(alloc_size, PAGE_SIZE);
400 if (!mem->slots) {
401 pr_warn("%s: Failed to allocate %zu bytes align=0x%lx\n",
402 __func__, alloc_size, PAGE_SIZE);
403 return;
404 }
405
406 mem->areas = memblock_alloc(array_size(sizeof(struct io_tlb_area),
407 nareas), SMP_CACHE_BYTES);
408 if (!mem->areas) {
409 pr_warn("%s: Failed to allocate mem->areas.\n", __func__);
410 return;
411 }
412
413 swiotlb_init_io_tlb_pool(mem, __pa(tlb), nslabs, false, nareas);
414 add_mem_pool(&io_tlb_default_mem, mem);
415
416 if (flags & SWIOTLB_VERBOSE)
417 swiotlb_print_info();
418 }
419
swiotlb_init(bool addressing_limit,unsigned int flags)420 void __init swiotlb_init(bool addressing_limit, unsigned int flags)
421 {
422 swiotlb_init_remap(addressing_limit, flags, NULL);
423 }
424
425 /*
426 * Systems with larger DMA zones (those that don't support ISA) can
427 * initialize the swiotlb later using the slab allocator if needed.
428 * This should be just like above, but with some error catching.
429 */
swiotlb_init_late(size_t size,gfp_t gfp_mask,int (* remap)(void * tlb,unsigned long nslabs))430 int swiotlb_init_late(size_t size, gfp_t gfp_mask,
431 int (*remap)(void *tlb, unsigned long nslabs))
432 {
433 struct io_tlb_pool *mem = &io_tlb_default_mem.defpool;
434 unsigned long nslabs = ALIGN(size >> IO_TLB_SHIFT, IO_TLB_SEGSIZE);
435 unsigned int nareas;
436 unsigned char *vstart = NULL;
437 unsigned int order, area_order;
438 bool retried = false;
439 int rc = 0;
440
441 if (io_tlb_default_mem.nslabs)
442 return 0;
443
444 if (swiotlb_force_disable)
445 return 0;
446
447 io_tlb_default_mem.force_bounce = swiotlb_force_bounce;
448
449 #ifdef CONFIG_SWIOTLB_DYNAMIC
450 if (!remap)
451 io_tlb_default_mem.can_grow = true;
452 if (IS_ENABLED(CONFIG_ZONE_DMA) && (gfp_mask & __GFP_DMA))
453 io_tlb_default_mem.phys_limit = zone_dma_limit;
454 else if (IS_ENABLED(CONFIG_ZONE_DMA32) && (gfp_mask & __GFP_DMA32))
455 io_tlb_default_mem.phys_limit = max(DMA_BIT_MASK(32), zone_dma_limit);
456 else
457 io_tlb_default_mem.phys_limit = virt_to_phys(high_memory - 1);
458 #endif
459
460 if (!default_nareas)
461 swiotlb_adjust_nareas(num_possible_cpus());
462
463 retry:
464 order = get_order(nslabs << IO_TLB_SHIFT);
465 nslabs = SLABS_PER_PAGE << order;
466
467 while ((SLABS_PER_PAGE << order) > IO_TLB_MIN_SLABS) {
468 vstart = (void *)__get_free_pages(gfp_mask | __GFP_NOWARN,
469 order);
470 if (vstart)
471 break;
472 order--;
473 nslabs = SLABS_PER_PAGE << order;
474 retried = true;
475 }
476
477 if (!vstart)
478 return -ENOMEM;
479
480 if (remap)
481 rc = remap(vstart, nslabs);
482 if (rc) {
483 free_pages((unsigned long)vstart, order);
484
485 nslabs = ALIGN(nslabs >> 1, IO_TLB_SEGSIZE);
486 if (nslabs < IO_TLB_MIN_SLABS)
487 return rc;
488 retried = true;
489 goto retry;
490 }
491
492 if (retried) {
493 pr_warn("only able to allocate %ld MB\n",
494 (PAGE_SIZE << order) >> 20);
495 }
496
497 nareas = limit_nareas(default_nareas, nslabs);
498 area_order = get_order(array_size(sizeof(*mem->areas), nareas));
499 mem->areas = (struct io_tlb_area *)
500 __get_free_pages(GFP_KERNEL | __GFP_ZERO, area_order);
501 if (!mem->areas)
502 goto error_area;
503
504 mem->slots = (void *)__get_free_pages(GFP_KERNEL | __GFP_ZERO,
505 get_order(array_size(sizeof(*mem->slots), nslabs)));
506 if (!mem->slots)
507 goto error_slots;
508
509 set_memory_decrypted((unsigned long)vstart,
510 (nslabs << IO_TLB_SHIFT) >> PAGE_SHIFT);
511 swiotlb_init_io_tlb_pool(mem, virt_to_phys(vstart), nslabs, true,
512 nareas);
513 add_mem_pool(&io_tlb_default_mem, mem);
514
515 swiotlb_print_info();
516 return 0;
517
518 error_slots:
519 free_pages((unsigned long)mem->areas, area_order);
520 error_area:
521 free_pages((unsigned long)vstart, order);
522 return -ENOMEM;
523 }
524
swiotlb_exit(void)525 void __init swiotlb_exit(void)
526 {
527 struct io_tlb_pool *mem = &io_tlb_default_mem.defpool;
528 unsigned long tbl_vaddr;
529 size_t tbl_size, slots_size;
530 unsigned int area_order;
531
532 if (swiotlb_force_bounce)
533 return;
534
535 if (!mem->nslabs)
536 return;
537
538 pr_info("tearing down default memory pool\n");
539 tbl_vaddr = (unsigned long)phys_to_virt(mem->start);
540 tbl_size = PAGE_ALIGN(mem->end - mem->start);
541 slots_size = PAGE_ALIGN(array_size(sizeof(*mem->slots), mem->nslabs));
542
543 set_memory_encrypted(tbl_vaddr, tbl_size >> PAGE_SHIFT);
544 if (mem->late_alloc) {
545 area_order = get_order(array_size(sizeof(*mem->areas),
546 mem->nareas));
547 free_pages((unsigned long)mem->areas, area_order);
548 free_pages(tbl_vaddr, get_order(tbl_size));
549 free_pages((unsigned long)mem->slots, get_order(slots_size));
550 } else {
551 memblock_free_late(__pa(mem->areas),
552 array_size(sizeof(*mem->areas), mem->nareas));
553 memblock_free_late(mem->start, tbl_size);
554 memblock_free_late(__pa(mem->slots), slots_size);
555 }
556
557 memset(mem, 0, sizeof(*mem));
558 }
559
560 #ifdef CONFIG_SWIOTLB_DYNAMIC
561
562 /**
563 * alloc_dma_pages() - allocate pages to be used for DMA
564 * @gfp: GFP flags for the allocation.
565 * @bytes: Size of the buffer.
566 * @phys_limit: Maximum allowed physical address of the buffer.
567 *
568 * Allocate pages from the buddy allocator. If successful, make the allocated
569 * pages decrypted that they can be used for DMA.
570 *
571 * Return: Decrypted pages, %NULL on allocation failure, or ERR_PTR(-EAGAIN)
572 * if the allocated physical address was above @phys_limit.
573 */
alloc_dma_pages(gfp_t gfp,size_t bytes,u64 phys_limit)574 static struct page *alloc_dma_pages(gfp_t gfp, size_t bytes, u64 phys_limit)
575 {
576 unsigned int order = get_order(bytes);
577 struct page *page;
578 phys_addr_t paddr;
579 void *vaddr;
580
581 page = alloc_pages(gfp, order);
582 if (!page)
583 return NULL;
584
585 paddr = page_to_phys(page);
586 if (paddr + bytes - 1 > phys_limit) {
587 __free_pages(page, order);
588 return ERR_PTR(-EAGAIN);
589 }
590
591 vaddr = phys_to_virt(paddr);
592 if (set_memory_decrypted((unsigned long)vaddr, PFN_UP(bytes)))
593 goto error;
594 return page;
595
596 error:
597 /* Intentional leak if pages cannot be encrypted again. */
598 if (!set_memory_encrypted((unsigned long)vaddr, PFN_UP(bytes)))
599 __free_pages(page, order);
600 return NULL;
601 }
602
603 /**
604 * swiotlb_alloc_tlb() - allocate a dynamic IO TLB buffer
605 * @dev: Device for which a memory pool is allocated.
606 * @bytes: Size of the buffer.
607 * @phys_limit: Maximum allowed physical address of the buffer.
608 * @gfp: GFP flags for the allocation.
609 *
610 * Return: Allocated pages, or %NULL on allocation failure.
611 */
swiotlb_alloc_tlb(struct device * dev,size_t bytes,u64 phys_limit,gfp_t gfp)612 static struct page *swiotlb_alloc_tlb(struct device *dev, size_t bytes,
613 u64 phys_limit, gfp_t gfp)
614 {
615 struct page *page;
616
617 /*
618 * Allocate from the atomic pools if memory is encrypted and
619 * the allocation is atomic, because decrypting may block.
620 */
621 if (!gfpflags_allow_blocking(gfp) && dev && force_dma_unencrypted(dev)) {
622 void *vaddr;
623
624 if (!IS_ENABLED(CONFIG_DMA_COHERENT_POOL))
625 return NULL;
626
627 return dma_alloc_from_pool(dev, bytes, &vaddr, gfp,
628 dma_coherent_ok);
629 }
630
631 gfp &= ~GFP_ZONEMASK;
632 if (phys_limit <= zone_dma_limit)
633 gfp |= __GFP_DMA;
634 else if (phys_limit <= DMA_BIT_MASK(32))
635 gfp |= __GFP_DMA32;
636
637 while (IS_ERR(page = alloc_dma_pages(gfp, bytes, phys_limit))) {
638 if (IS_ENABLED(CONFIG_ZONE_DMA32) &&
639 phys_limit < DMA_BIT_MASK(64) &&
640 !(gfp & (__GFP_DMA32 | __GFP_DMA)))
641 gfp |= __GFP_DMA32;
642 else if (IS_ENABLED(CONFIG_ZONE_DMA) &&
643 !(gfp & __GFP_DMA))
644 gfp = (gfp & ~__GFP_DMA32) | __GFP_DMA;
645 else
646 return NULL;
647 }
648
649 return page;
650 }
651
652 /**
653 * swiotlb_free_tlb() - free a dynamically allocated IO TLB buffer
654 * @vaddr: Virtual address of the buffer.
655 * @bytes: Size of the buffer.
656 */
swiotlb_free_tlb(void * vaddr,size_t bytes)657 static void swiotlb_free_tlb(void *vaddr, size_t bytes)
658 {
659 if (IS_ENABLED(CONFIG_DMA_COHERENT_POOL) &&
660 dma_free_from_pool(NULL, vaddr, bytes))
661 return;
662
663 /* Intentional leak if pages cannot be encrypted again. */
664 if (!set_memory_encrypted((unsigned long)vaddr, PFN_UP(bytes)))
665 __free_pages(virt_to_page(vaddr), get_order(bytes));
666 }
667
668 /**
669 * swiotlb_alloc_pool() - allocate a new IO TLB memory pool
670 * @dev: Device for which a memory pool is allocated.
671 * @minslabs: Minimum number of slabs.
672 * @nslabs: Desired (maximum) number of slabs.
673 * @nareas: Number of areas.
674 * @phys_limit: Maximum DMA buffer physical address.
675 * @gfp: GFP flags for the allocations.
676 *
677 * Allocate and initialize a new IO TLB memory pool. The actual number of
678 * slabs may be reduced if allocation of @nslabs fails. If even
679 * @minslabs cannot be allocated, this function fails.
680 *
681 * Return: New memory pool, or %NULL on allocation failure.
682 */
swiotlb_alloc_pool(struct device * dev,unsigned long minslabs,unsigned long nslabs,unsigned int nareas,u64 phys_limit,gfp_t gfp)683 static struct io_tlb_pool *swiotlb_alloc_pool(struct device *dev,
684 unsigned long minslabs, unsigned long nslabs,
685 unsigned int nareas, u64 phys_limit, gfp_t gfp)
686 {
687 struct io_tlb_pool *pool;
688 unsigned int slot_order;
689 struct page *tlb;
690 size_t pool_size;
691 size_t tlb_size;
692
693 if (nslabs > SLABS_PER_PAGE << MAX_PAGE_ORDER) {
694 nslabs = SLABS_PER_PAGE << MAX_PAGE_ORDER;
695 nareas = limit_nareas(nareas, nslabs);
696 }
697
698 pool_size = sizeof(*pool) + array_size(sizeof(*pool->areas), nareas);
699 pool = kzalloc(pool_size, gfp);
700 if (!pool)
701 goto error;
702 pool->areas = (void *)pool + sizeof(*pool);
703
704 tlb_size = nslabs << IO_TLB_SHIFT;
705 while (!(tlb = swiotlb_alloc_tlb(dev, tlb_size, phys_limit, gfp))) {
706 if (nslabs <= minslabs)
707 goto error_tlb;
708 nslabs = ALIGN(nslabs >> 1, IO_TLB_SEGSIZE);
709 nareas = limit_nareas(nareas, nslabs);
710 tlb_size = nslabs << IO_TLB_SHIFT;
711 }
712
713 slot_order = get_order(array_size(sizeof(*pool->slots), nslabs));
714 pool->slots = (struct io_tlb_slot *)
715 __get_free_pages(gfp, slot_order);
716 if (!pool->slots)
717 goto error_slots;
718
719 swiotlb_init_io_tlb_pool(pool, page_to_phys(tlb), nslabs, true, nareas);
720 return pool;
721
722 error_slots:
723 swiotlb_free_tlb(page_address(tlb), tlb_size);
724 error_tlb:
725 kfree(pool);
726 error:
727 return NULL;
728 }
729
730 /**
731 * swiotlb_dyn_alloc() - dynamic memory pool allocation worker
732 * @work: Pointer to dyn_alloc in struct io_tlb_mem.
733 */
swiotlb_dyn_alloc(struct work_struct * work)734 static void swiotlb_dyn_alloc(struct work_struct *work)
735 {
736 struct io_tlb_mem *mem =
737 container_of(work, struct io_tlb_mem, dyn_alloc);
738 struct io_tlb_pool *pool;
739
740 pool = swiotlb_alloc_pool(NULL, IO_TLB_MIN_SLABS, default_nslabs,
741 default_nareas, mem->phys_limit, GFP_KERNEL);
742 if (!pool) {
743 pr_warn_ratelimited("Failed to allocate new pool");
744 return;
745 }
746
747 add_mem_pool(mem, pool);
748 }
749
750 /**
751 * swiotlb_dyn_free() - RCU callback to free a memory pool
752 * @rcu: RCU head in the corresponding struct io_tlb_pool.
753 */
swiotlb_dyn_free(struct rcu_head * rcu)754 static void swiotlb_dyn_free(struct rcu_head *rcu)
755 {
756 struct io_tlb_pool *pool = container_of(rcu, struct io_tlb_pool, rcu);
757 size_t slots_size = array_size(sizeof(*pool->slots), pool->nslabs);
758 size_t tlb_size = pool->end - pool->start;
759
760 free_pages((unsigned long)pool->slots, get_order(slots_size));
761 swiotlb_free_tlb(pool->vaddr, tlb_size);
762 kfree(pool);
763 }
764
765 /**
766 * __swiotlb_find_pool() - find the IO TLB pool for a physical address
767 * @dev: Device which has mapped the DMA buffer.
768 * @paddr: Physical address within the DMA buffer.
769 *
770 * Find the IO TLB memory pool descriptor which contains the given physical
771 * address, if any. This function is for use only when the dev is known to
772 * be using swiotlb. Use swiotlb_find_pool() for the more general case
773 * when this condition is not met.
774 *
775 * Return: Memory pool which contains @paddr, or %NULL if none.
776 */
__swiotlb_find_pool(struct device * dev,phys_addr_t paddr)777 struct io_tlb_pool *__swiotlb_find_pool(struct device *dev, phys_addr_t paddr)
778 {
779 struct io_tlb_mem *mem = dev->dma_io_tlb_mem;
780 struct io_tlb_pool *pool;
781
782 rcu_read_lock();
783 list_for_each_entry_rcu(pool, &mem->pools, node) {
784 if (paddr >= pool->start && paddr < pool->end)
785 goto out;
786 }
787
788 list_for_each_entry_rcu(pool, &dev->dma_io_tlb_pools, node) {
789 if (paddr >= pool->start && paddr < pool->end)
790 goto out;
791 }
792 pool = NULL;
793 out:
794 rcu_read_unlock();
795 return pool;
796 }
797 EXPORT_SYMBOL_GPL(__swiotlb_find_pool);
798
799 /**
800 * swiotlb_del_pool() - remove an IO TLB pool from a device
801 * @dev: Owning device.
802 * @pool: Memory pool to be removed.
803 */
swiotlb_del_pool(struct device * dev,struct io_tlb_pool * pool)804 static void swiotlb_del_pool(struct device *dev, struct io_tlb_pool *pool)
805 {
806 unsigned long flags;
807
808 spin_lock_irqsave(&dev->dma_io_tlb_lock, flags);
809 list_del_rcu(&pool->node);
810 spin_unlock_irqrestore(&dev->dma_io_tlb_lock, flags);
811
812 call_rcu(&pool->rcu, swiotlb_dyn_free);
813 }
814
815 #endif /* CONFIG_SWIOTLB_DYNAMIC */
816
817 /**
818 * swiotlb_dev_init() - initialize swiotlb fields in &struct device
819 * @dev: Device to be initialized.
820 */
swiotlb_dev_init(struct device * dev)821 void swiotlb_dev_init(struct device *dev)
822 {
823 dev->dma_io_tlb_mem = &io_tlb_default_mem;
824 #ifdef CONFIG_SWIOTLB_DYNAMIC
825 INIT_LIST_HEAD(&dev->dma_io_tlb_pools);
826 spin_lock_init(&dev->dma_io_tlb_lock);
827 dev->dma_uses_io_tlb = false;
828 #endif
829 }
830
831 /**
832 * swiotlb_align_offset() - Get required offset into an IO TLB allocation.
833 * @dev: Owning device.
834 * @align_mask: Allocation alignment mask.
835 * @addr: DMA address.
836 *
837 * Return the minimum offset from the start of an IO TLB allocation which is
838 * required for a given buffer address and allocation alignment to keep the
839 * device happy.
840 *
841 * First, the address bits covered by min_align_mask must be identical in the
842 * original address and the bounce buffer address. High bits are preserved by
843 * choosing a suitable IO TLB slot, but bits below IO_TLB_SHIFT require extra
844 * padding bytes before the bounce buffer.
845 *
846 * Second, @align_mask specifies which bits of the first allocated slot must
847 * be zero. This may require allocating additional padding slots, and then the
848 * offset (in bytes) from the first such padding slot is returned.
849 */
swiotlb_align_offset(struct device * dev,unsigned int align_mask,u64 addr)850 static unsigned int swiotlb_align_offset(struct device *dev,
851 unsigned int align_mask, u64 addr)
852 {
853 return addr & dma_get_min_align_mask(dev) &
854 (align_mask | (IO_TLB_SIZE - 1));
855 }
856
857 /*
858 * Bounce: copy the swiotlb buffer from or back to the original dma location
859 */
swiotlb_bounce(struct device * dev,phys_addr_t tlb_addr,size_t size,enum dma_data_direction dir,struct io_tlb_pool * mem)860 static void swiotlb_bounce(struct device *dev, phys_addr_t tlb_addr, size_t size,
861 enum dma_data_direction dir, struct io_tlb_pool *mem)
862 {
863 int index = (tlb_addr - mem->start) >> IO_TLB_SHIFT;
864 phys_addr_t orig_addr = mem->slots[index].orig_addr;
865 size_t alloc_size = mem->slots[index].alloc_size;
866 unsigned long pfn = PFN_DOWN(orig_addr);
867 unsigned char *vaddr = mem->vaddr + tlb_addr - mem->start;
868 int tlb_offset;
869
870 if (orig_addr == INVALID_PHYS_ADDR)
871 return;
872
873 /*
874 * It's valid for tlb_offset to be negative. This can happen when the
875 * "offset" returned by swiotlb_align_offset() is non-zero, and the
876 * tlb_addr is pointing within the first "offset" bytes of the second
877 * or subsequent slots of the allocated swiotlb area. While it's not
878 * valid for tlb_addr to be pointing within the first "offset" bytes
879 * of the first slot, there's no way to check for such an error since
880 * this function can't distinguish the first slot from the second and
881 * subsequent slots.
882 */
883 tlb_offset = (tlb_addr & (IO_TLB_SIZE - 1)) -
884 swiotlb_align_offset(dev, 0, orig_addr);
885
886 orig_addr += tlb_offset;
887 alloc_size -= tlb_offset;
888
889 if (size > alloc_size) {
890 dev_WARN_ONCE(dev, 1,
891 "Buffer overflow detected. Allocation size: %zu. Mapping size: %zu.\n",
892 alloc_size, size);
893 size = alloc_size;
894 }
895
896 if (PageHighMem(pfn_to_page(pfn))) {
897 unsigned int offset = orig_addr & ~PAGE_MASK;
898 struct page *page;
899 unsigned int sz = 0;
900 unsigned long flags;
901
902 while (size) {
903 sz = min_t(size_t, PAGE_SIZE - offset, size);
904
905 local_irq_save(flags);
906 page = pfn_to_page(pfn);
907 if (dir == DMA_TO_DEVICE)
908 memcpy_from_page(vaddr, page, offset, sz);
909 else
910 memcpy_to_page(page, offset, vaddr, sz);
911 local_irq_restore(flags);
912
913 size -= sz;
914 pfn++;
915 vaddr += sz;
916 offset = 0;
917 }
918 } else if (dir == DMA_TO_DEVICE) {
919 memcpy(vaddr, phys_to_virt(orig_addr), size);
920 } else {
921 memcpy(phys_to_virt(orig_addr), vaddr, size);
922 }
923 }
924
slot_addr(phys_addr_t start,phys_addr_t idx)925 static inline phys_addr_t slot_addr(phys_addr_t start, phys_addr_t idx)
926 {
927 return start + (idx << IO_TLB_SHIFT);
928 }
929
930 /*
931 * Carefully handle integer overflow which can occur when boundary_mask == ~0UL.
932 */
get_max_slots(unsigned long boundary_mask)933 static inline unsigned long get_max_slots(unsigned long boundary_mask)
934 {
935 return (boundary_mask >> IO_TLB_SHIFT) + 1;
936 }
937
wrap_area_index(struct io_tlb_pool * mem,unsigned int index)938 static unsigned int wrap_area_index(struct io_tlb_pool *mem, unsigned int index)
939 {
940 if (index >= mem->area_nslabs)
941 return 0;
942 return index;
943 }
944
945 /*
946 * Track the total used slots with a global atomic value in order to have
947 * correct information to determine the high water mark. The mem_used()
948 * function gives imprecise results because there's no locking across
949 * multiple areas.
950 */
951 #ifdef CONFIG_DEBUG_FS
inc_used_and_hiwater(struct io_tlb_mem * mem,unsigned int nslots)952 static void inc_used_and_hiwater(struct io_tlb_mem *mem, unsigned int nslots)
953 {
954 unsigned long old_hiwater, new_used;
955
956 new_used = atomic_long_add_return(nslots, &mem->total_used);
957 old_hiwater = atomic_long_read(&mem->used_hiwater);
958 do {
959 if (new_used <= old_hiwater)
960 break;
961 } while (!atomic_long_try_cmpxchg(&mem->used_hiwater,
962 &old_hiwater, new_used));
963 }
964
dec_used(struct io_tlb_mem * mem,unsigned int nslots)965 static void dec_used(struct io_tlb_mem *mem, unsigned int nslots)
966 {
967 atomic_long_sub(nslots, &mem->total_used);
968 }
969
970 #else /* !CONFIG_DEBUG_FS */
inc_used_and_hiwater(struct io_tlb_mem * mem,unsigned int nslots)971 static void inc_used_and_hiwater(struct io_tlb_mem *mem, unsigned int nslots)
972 {
973 }
dec_used(struct io_tlb_mem * mem,unsigned int nslots)974 static void dec_used(struct io_tlb_mem *mem, unsigned int nslots)
975 {
976 }
977 #endif /* CONFIG_DEBUG_FS */
978
979 #ifdef CONFIG_SWIOTLB_DYNAMIC
980 #ifdef CONFIG_DEBUG_FS
inc_transient_used(struct io_tlb_mem * mem,unsigned int nslots)981 static void inc_transient_used(struct io_tlb_mem *mem, unsigned int nslots)
982 {
983 atomic_long_add(nslots, &mem->transient_nslabs);
984 }
985
dec_transient_used(struct io_tlb_mem * mem,unsigned int nslots)986 static void dec_transient_used(struct io_tlb_mem *mem, unsigned int nslots)
987 {
988 atomic_long_sub(nslots, &mem->transient_nslabs);
989 }
990
991 #else /* !CONFIG_DEBUG_FS */
inc_transient_used(struct io_tlb_mem * mem,unsigned int nslots)992 static void inc_transient_used(struct io_tlb_mem *mem, unsigned int nslots)
993 {
994 }
dec_transient_used(struct io_tlb_mem * mem,unsigned int nslots)995 static void dec_transient_used(struct io_tlb_mem *mem, unsigned int nslots)
996 {
997 }
998 #endif /* CONFIG_DEBUG_FS */
999 #endif /* CONFIG_SWIOTLB_DYNAMIC */
1000
1001 /**
1002 * swiotlb_search_pool_area() - search one memory area in one pool
1003 * @dev: Device which maps the buffer.
1004 * @pool: Memory pool to be searched.
1005 * @area_index: Index of the IO TLB memory area to be searched.
1006 * @orig_addr: Original (non-bounced) IO buffer address.
1007 * @alloc_size: Total requested size of the bounce buffer,
1008 * including initial alignment padding.
1009 * @alloc_align_mask: Required alignment of the allocated buffer.
1010 *
1011 * Find a suitable sequence of IO TLB entries for the request and allocate
1012 * a buffer from the given IO TLB memory area.
1013 * This function takes care of locking.
1014 *
1015 * Return: Index of the first allocated slot, or -1 on error.
1016 */
swiotlb_search_pool_area(struct device * dev,struct io_tlb_pool * pool,int area_index,phys_addr_t orig_addr,size_t alloc_size,unsigned int alloc_align_mask)1017 static int swiotlb_search_pool_area(struct device *dev, struct io_tlb_pool *pool,
1018 int area_index, phys_addr_t orig_addr, size_t alloc_size,
1019 unsigned int alloc_align_mask)
1020 {
1021 struct io_tlb_area *area = pool->areas + area_index;
1022 unsigned long boundary_mask = dma_get_seg_boundary(dev);
1023 dma_addr_t tbl_dma_addr =
1024 phys_to_dma_unencrypted(dev, pool->start) & boundary_mask;
1025 unsigned long max_slots = get_max_slots(boundary_mask);
1026 unsigned int iotlb_align_mask = dma_get_min_align_mask(dev);
1027 unsigned int nslots = nr_slots(alloc_size), stride;
1028 unsigned int offset = swiotlb_align_offset(dev, 0, orig_addr);
1029 unsigned int index, slots_checked, count = 0, i;
1030 unsigned long flags;
1031 unsigned int slot_base;
1032 unsigned int slot_index;
1033
1034 BUG_ON(!nslots);
1035 BUG_ON(area_index >= pool->nareas);
1036
1037 /*
1038 * Historically, swiotlb allocations >= PAGE_SIZE were guaranteed to be
1039 * page-aligned in the absence of any other alignment requirements.
1040 * 'alloc_align_mask' was later introduced to specify the alignment
1041 * explicitly, however this is passed as zero for streaming mappings
1042 * and so we preserve the old behaviour there in case any drivers are
1043 * relying on it.
1044 */
1045 if (!alloc_align_mask && !iotlb_align_mask && alloc_size >= PAGE_SIZE)
1046 alloc_align_mask = PAGE_SIZE - 1;
1047
1048 /*
1049 * Ensure that the allocation is at least slot-aligned and update
1050 * 'iotlb_align_mask' to ignore bits that will be preserved when
1051 * offsetting into the allocation.
1052 */
1053 alloc_align_mask |= (IO_TLB_SIZE - 1);
1054 iotlb_align_mask &= ~alloc_align_mask;
1055
1056 /*
1057 * For mappings with an alignment requirement don't bother looping to
1058 * unaligned slots once we found an aligned one.
1059 */
1060 stride = get_max_slots(max(alloc_align_mask, iotlb_align_mask));
1061
1062 spin_lock_irqsave(&area->lock, flags);
1063 if (unlikely(nslots > pool->area_nslabs - area->used))
1064 goto not_found;
1065
1066 slot_base = area_index * pool->area_nslabs;
1067 index = area->index;
1068
1069 for (slots_checked = 0; slots_checked < pool->area_nslabs; ) {
1070 phys_addr_t tlb_addr;
1071
1072 slot_index = slot_base + index;
1073 tlb_addr = slot_addr(tbl_dma_addr, slot_index);
1074
1075 if ((tlb_addr & alloc_align_mask) ||
1076 (orig_addr && (tlb_addr & iotlb_align_mask) !=
1077 (orig_addr & iotlb_align_mask))) {
1078 index = wrap_area_index(pool, index + 1);
1079 slots_checked++;
1080 continue;
1081 }
1082
1083 if (!iommu_is_span_boundary(slot_index, nslots,
1084 nr_slots(tbl_dma_addr),
1085 max_slots)) {
1086 if (pool->slots[slot_index].list >= nslots)
1087 goto found;
1088 }
1089 index = wrap_area_index(pool, index + stride);
1090 slots_checked += stride;
1091 }
1092
1093 not_found:
1094 spin_unlock_irqrestore(&area->lock, flags);
1095 return -1;
1096
1097 found:
1098 /*
1099 * If we find a slot that indicates we have 'nslots' number of
1100 * contiguous buffers, we allocate the buffers from that slot onwards
1101 * and set the list of free entries to '0' indicating unavailable.
1102 */
1103 for (i = slot_index; i < slot_index + nslots; i++) {
1104 pool->slots[i].list = 0;
1105 pool->slots[i].alloc_size = alloc_size - (offset +
1106 ((i - slot_index) << IO_TLB_SHIFT));
1107 }
1108 for (i = slot_index - 1;
1109 io_tlb_offset(i) != IO_TLB_SEGSIZE - 1 &&
1110 pool->slots[i].list; i--)
1111 pool->slots[i].list = ++count;
1112
1113 /*
1114 * Update the indices to avoid searching in the next round.
1115 */
1116 area->index = wrap_area_index(pool, index + nslots);
1117 area->used += nslots;
1118 spin_unlock_irqrestore(&area->lock, flags);
1119
1120 inc_used_and_hiwater(dev->dma_io_tlb_mem, nslots);
1121 return slot_index;
1122 }
1123
1124 #ifdef CONFIG_SWIOTLB_DYNAMIC
1125
1126 /**
1127 * swiotlb_search_area() - search one memory area in all pools
1128 * @dev: Device which maps the buffer.
1129 * @start_cpu: Start CPU number.
1130 * @cpu_offset: Offset from @start_cpu.
1131 * @orig_addr: Original (non-bounced) IO buffer address.
1132 * @alloc_size: Total requested size of the bounce buffer,
1133 * including initial alignment padding.
1134 * @alloc_align_mask: Required alignment of the allocated buffer.
1135 * @retpool: Used memory pool, updated on return.
1136 *
1137 * Search one memory area in all pools for a sequence of slots that match the
1138 * allocation constraints.
1139 *
1140 * Return: Index of the first allocated slot, or -1 on error.
1141 */
swiotlb_search_area(struct device * dev,int start_cpu,int cpu_offset,phys_addr_t orig_addr,size_t alloc_size,unsigned int alloc_align_mask,struct io_tlb_pool ** retpool)1142 static int swiotlb_search_area(struct device *dev, int start_cpu,
1143 int cpu_offset, phys_addr_t orig_addr, size_t alloc_size,
1144 unsigned int alloc_align_mask, struct io_tlb_pool **retpool)
1145 {
1146 struct io_tlb_mem *mem = dev->dma_io_tlb_mem;
1147 struct io_tlb_pool *pool;
1148 int area_index;
1149 int index = -1;
1150
1151 rcu_read_lock();
1152 list_for_each_entry_rcu(pool, &mem->pools, node) {
1153 if (cpu_offset >= pool->nareas)
1154 continue;
1155 area_index = (start_cpu + cpu_offset) & (pool->nareas - 1);
1156 index = swiotlb_search_pool_area(dev, pool, area_index,
1157 orig_addr, alloc_size,
1158 alloc_align_mask);
1159 if (index >= 0) {
1160 *retpool = pool;
1161 break;
1162 }
1163 }
1164 rcu_read_unlock();
1165 return index;
1166 }
1167
1168 /**
1169 * swiotlb_find_slots() - search for slots in the whole swiotlb
1170 * @dev: Device which maps the buffer.
1171 * @orig_addr: Original (non-bounced) IO buffer address.
1172 * @alloc_size: Total requested size of the bounce buffer,
1173 * including initial alignment padding.
1174 * @alloc_align_mask: Required alignment of the allocated buffer.
1175 * @retpool: Used memory pool, updated on return.
1176 *
1177 * Search through the whole software IO TLB to find a sequence of slots that
1178 * match the allocation constraints.
1179 *
1180 * Return: Index of the first allocated slot, or -1 on error.
1181 */
swiotlb_find_slots(struct device * dev,phys_addr_t orig_addr,size_t alloc_size,unsigned int alloc_align_mask,struct io_tlb_pool ** retpool)1182 static int swiotlb_find_slots(struct device *dev, phys_addr_t orig_addr,
1183 size_t alloc_size, unsigned int alloc_align_mask,
1184 struct io_tlb_pool **retpool)
1185 {
1186 struct io_tlb_mem *mem = dev->dma_io_tlb_mem;
1187 struct io_tlb_pool *pool;
1188 unsigned long nslabs;
1189 unsigned long flags;
1190 u64 phys_limit;
1191 int cpu, i;
1192 int index;
1193
1194 if (alloc_size > IO_TLB_SEGSIZE * IO_TLB_SIZE)
1195 return -1;
1196
1197 cpu = raw_smp_processor_id();
1198 for (i = 0; i < default_nareas; ++i) {
1199 index = swiotlb_search_area(dev, cpu, i, orig_addr, alloc_size,
1200 alloc_align_mask, &pool);
1201 if (index >= 0)
1202 goto found;
1203 }
1204
1205 if (!mem->can_grow)
1206 return -1;
1207
1208 schedule_work(&mem->dyn_alloc);
1209
1210 nslabs = nr_slots(alloc_size);
1211 phys_limit = min_not_zero(*dev->dma_mask, dev->bus_dma_limit);
1212 pool = swiotlb_alloc_pool(dev, nslabs, nslabs, 1, phys_limit,
1213 GFP_NOWAIT | __GFP_NOWARN);
1214 if (!pool)
1215 return -1;
1216
1217 index = swiotlb_search_pool_area(dev, pool, 0, orig_addr,
1218 alloc_size, alloc_align_mask);
1219 if (index < 0) {
1220 swiotlb_dyn_free(&pool->rcu);
1221 return -1;
1222 }
1223
1224 pool->transient = true;
1225 spin_lock_irqsave(&dev->dma_io_tlb_lock, flags);
1226 list_add_rcu(&pool->node, &dev->dma_io_tlb_pools);
1227 spin_unlock_irqrestore(&dev->dma_io_tlb_lock, flags);
1228 inc_transient_used(mem, pool->nslabs);
1229
1230 found:
1231 WRITE_ONCE(dev->dma_uses_io_tlb, true);
1232
1233 /*
1234 * The general barrier orders reads and writes against a presumed store
1235 * of the SWIOTLB buffer address by a device driver (to a driver private
1236 * data structure). It serves two purposes.
1237 *
1238 * First, the store to dev->dma_uses_io_tlb must be ordered before the
1239 * presumed store. This guarantees that the returned buffer address
1240 * cannot be passed to another CPU before updating dev->dma_uses_io_tlb.
1241 *
1242 * Second, the load from mem->pools must be ordered before the same
1243 * presumed store. This guarantees that the returned buffer address
1244 * cannot be observed by another CPU before an update of the RCU list
1245 * that was made by swiotlb_dyn_alloc() on a third CPU (cf. multicopy
1246 * atomicity).
1247 *
1248 * See also the comment in swiotlb_find_pool().
1249 */
1250 smp_mb();
1251
1252 *retpool = pool;
1253 return index;
1254 }
1255
1256 #else /* !CONFIG_SWIOTLB_DYNAMIC */
1257
swiotlb_find_slots(struct device * dev,phys_addr_t orig_addr,size_t alloc_size,unsigned int alloc_align_mask,struct io_tlb_pool ** retpool)1258 static int swiotlb_find_slots(struct device *dev, phys_addr_t orig_addr,
1259 size_t alloc_size, unsigned int alloc_align_mask,
1260 struct io_tlb_pool **retpool)
1261 {
1262 struct io_tlb_pool *pool;
1263 int start, i;
1264 int index;
1265
1266 *retpool = pool = &dev->dma_io_tlb_mem->defpool;
1267 i = start = raw_smp_processor_id() & (pool->nareas - 1);
1268 do {
1269 index = swiotlb_search_pool_area(dev, pool, i, orig_addr,
1270 alloc_size, alloc_align_mask);
1271 if (index >= 0)
1272 return index;
1273 if (++i >= pool->nareas)
1274 i = 0;
1275 } while (i != start);
1276 return -1;
1277 }
1278
1279 #endif /* CONFIG_SWIOTLB_DYNAMIC */
1280
1281 #ifdef CONFIG_DEBUG_FS
1282
1283 /**
1284 * mem_used() - get number of used slots in an allocator
1285 * @mem: Software IO TLB allocator.
1286 *
1287 * The result is accurate in this version of the function, because an atomic
1288 * counter is available if CONFIG_DEBUG_FS is set.
1289 *
1290 * Return: Number of used slots.
1291 */
mem_used(struct io_tlb_mem * mem)1292 static unsigned long mem_used(struct io_tlb_mem *mem)
1293 {
1294 return atomic_long_read(&mem->total_used);
1295 }
1296
1297 #else /* !CONFIG_DEBUG_FS */
1298
1299 /**
1300 * mem_pool_used() - get number of used slots in a memory pool
1301 * @pool: Software IO TLB memory pool.
1302 *
1303 * The result is not accurate, see mem_used().
1304 *
1305 * Return: Approximate number of used slots.
1306 */
mem_pool_used(struct io_tlb_pool * pool)1307 static unsigned long mem_pool_used(struct io_tlb_pool *pool)
1308 {
1309 int i;
1310 unsigned long used = 0;
1311
1312 for (i = 0; i < pool->nareas; i++)
1313 used += pool->areas[i].used;
1314 return used;
1315 }
1316
1317 /**
1318 * mem_used() - get number of used slots in an allocator
1319 * @mem: Software IO TLB allocator.
1320 *
1321 * The result is not accurate, because there is no locking of individual
1322 * areas.
1323 *
1324 * Return: Approximate number of used slots.
1325 */
mem_used(struct io_tlb_mem * mem)1326 static unsigned long mem_used(struct io_tlb_mem *mem)
1327 {
1328 #ifdef CONFIG_SWIOTLB_DYNAMIC
1329 struct io_tlb_pool *pool;
1330 unsigned long used = 0;
1331
1332 rcu_read_lock();
1333 list_for_each_entry_rcu(pool, &mem->pools, node)
1334 used += mem_pool_used(pool);
1335 rcu_read_unlock();
1336
1337 return used;
1338 #else
1339 return mem_pool_used(&mem->defpool);
1340 #endif
1341 }
1342
1343 #endif /* CONFIG_DEBUG_FS */
1344
1345 /**
1346 * swiotlb_tbl_map_single() - bounce buffer map a single contiguous physical area
1347 * @dev: Device which maps the buffer.
1348 * @orig_addr: Original (non-bounced) physical IO buffer address
1349 * @mapping_size: Requested size of the actual bounce buffer, excluding
1350 * any pre- or post-padding for alignment
1351 * @alloc_align_mask: Required start and end alignment of the allocated buffer
1352 * @dir: DMA direction
1353 * @attrs: Optional DMA attributes for the map operation
1354 *
1355 * Find and allocate a suitable sequence of IO TLB slots for the request.
1356 * The allocated space starts at an alignment specified by alloc_align_mask,
1357 * and the size of the allocated space is rounded up so that the total amount
1358 * of allocated space is a multiple of (alloc_align_mask + 1). If
1359 * alloc_align_mask is zero, the allocated space may be at any alignment and
1360 * the size is not rounded up.
1361 *
1362 * The returned address is within the allocated space and matches the bits
1363 * of orig_addr that are specified in the DMA min_align_mask for the device. As
1364 * such, this returned address may be offset from the beginning of the allocated
1365 * space. The bounce buffer space starting at the returned address for
1366 * mapping_size bytes is initialized to the contents of the original IO buffer
1367 * area. Any pre-padding (due to an offset) and any post-padding (due to
1368 * rounding-up the size) is not initialized.
1369 */
swiotlb_tbl_map_single(struct device * dev,phys_addr_t orig_addr,size_t mapping_size,unsigned int alloc_align_mask,enum dma_data_direction dir,unsigned long attrs)1370 phys_addr_t swiotlb_tbl_map_single(struct device *dev, phys_addr_t orig_addr,
1371 size_t mapping_size, unsigned int alloc_align_mask,
1372 enum dma_data_direction dir, unsigned long attrs)
1373 {
1374 struct io_tlb_mem *mem = dev->dma_io_tlb_mem;
1375 unsigned int offset;
1376 struct io_tlb_pool *pool;
1377 unsigned int i;
1378 size_t size;
1379 int index;
1380 phys_addr_t tlb_addr;
1381 unsigned short pad_slots;
1382
1383 if (!mem || !mem->nslabs) {
1384 dev_warn_ratelimited(dev,
1385 "Can not allocate SWIOTLB buffer earlier and can't now provide you with the DMA bounce buffer");
1386 return (phys_addr_t)DMA_MAPPING_ERROR;
1387 }
1388
1389 if (cc_platform_has(CC_ATTR_MEM_ENCRYPT))
1390 pr_warn_once("Memory encryption is active and system is using DMA bounce buffers\n");
1391
1392 /*
1393 * The default swiotlb memory pool is allocated with PAGE_SIZE
1394 * alignment. If a mapping is requested with larger alignment,
1395 * the mapping may be unable to use the initial slot(s) in all
1396 * sets of IO_TLB_SEGSIZE slots. In such case, a mapping request
1397 * of or near the maximum mapping size would always fail.
1398 */
1399 dev_WARN_ONCE(dev, alloc_align_mask > ~PAGE_MASK,
1400 "Alloc alignment may prevent fulfilling requests with max mapping_size\n");
1401
1402 offset = swiotlb_align_offset(dev, alloc_align_mask, orig_addr);
1403 size = ALIGN(mapping_size + offset, alloc_align_mask + 1);
1404 index = swiotlb_find_slots(dev, orig_addr, size, alloc_align_mask, &pool);
1405 if (index == -1) {
1406 if (!(attrs & DMA_ATTR_NO_WARN))
1407 dev_warn_ratelimited(dev,
1408 "swiotlb buffer is full (sz: %zd bytes), total %lu (slots), used %lu (slots)\n",
1409 size, mem->nslabs, mem_used(mem));
1410 return (phys_addr_t)DMA_MAPPING_ERROR;
1411 }
1412
1413 /*
1414 * If dma_skip_sync was set, reset it on first SWIOTLB buffer
1415 * mapping to always sync SWIOTLB buffers.
1416 */
1417 dma_reset_need_sync(dev);
1418
1419 /*
1420 * Save away the mapping from the original address to the DMA address.
1421 * This is needed when we sync the memory. Then we sync the buffer if
1422 * needed.
1423 */
1424 pad_slots = offset >> IO_TLB_SHIFT;
1425 offset &= (IO_TLB_SIZE - 1);
1426 index += pad_slots;
1427 pool->slots[index].pad_slots = pad_slots;
1428 for (i = 0; i < (nr_slots(size) - pad_slots); i++)
1429 pool->slots[index + i].orig_addr = slot_addr(orig_addr, i);
1430 tlb_addr = slot_addr(pool->start, index) + offset;
1431 /*
1432 * When the device is writing memory, i.e. dir == DMA_FROM_DEVICE, copy
1433 * the original buffer to the TLB buffer before initiating DMA in order
1434 * to preserve the original's data if the device does a partial write,
1435 * i.e. if the device doesn't overwrite the entire buffer. Preserving
1436 * the original data, even if it's garbage, is necessary to match
1437 * hardware behavior. Use of swiotlb is supposed to be transparent,
1438 * i.e. swiotlb must not corrupt memory by clobbering unwritten bytes.
1439 */
1440 swiotlb_bounce(dev, tlb_addr, mapping_size, DMA_TO_DEVICE, pool);
1441 return tlb_addr;
1442 }
1443
swiotlb_release_slots(struct device * dev,phys_addr_t tlb_addr,struct io_tlb_pool * mem)1444 static void swiotlb_release_slots(struct device *dev, phys_addr_t tlb_addr,
1445 struct io_tlb_pool *mem)
1446 {
1447 unsigned long flags;
1448 unsigned int offset = swiotlb_align_offset(dev, 0, tlb_addr);
1449 int index, nslots, aindex;
1450 struct io_tlb_area *area;
1451 int count, i;
1452
1453 index = (tlb_addr - offset - mem->start) >> IO_TLB_SHIFT;
1454 index -= mem->slots[index].pad_slots;
1455 nslots = nr_slots(mem->slots[index].alloc_size + offset);
1456 aindex = index / mem->area_nslabs;
1457 area = &mem->areas[aindex];
1458
1459 /*
1460 * Return the buffer to the free list by setting the corresponding
1461 * entries to indicate the number of contiguous entries available.
1462 * While returning the entries to the free list, we merge the entries
1463 * with slots below and above the pool being returned.
1464 */
1465 BUG_ON(aindex >= mem->nareas);
1466
1467 spin_lock_irqsave(&area->lock, flags);
1468 if (index + nslots < ALIGN(index + 1, IO_TLB_SEGSIZE))
1469 count = mem->slots[index + nslots].list;
1470 else
1471 count = 0;
1472
1473 /*
1474 * Step 1: return the slots to the free list, merging the slots with
1475 * superceeding slots
1476 */
1477 for (i = index + nslots - 1; i >= index; i--) {
1478 mem->slots[i].list = ++count;
1479 mem->slots[i].orig_addr = INVALID_PHYS_ADDR;
1480 mem->slots[i].alloc_size = 0;
1481 mem->slots[i].pad_slots = 0;
1482 }
1483
1484 /*
1485 * Step 2: merge the returned slots with the preceding slots, if
1486 * available (non zero)
1487 */
1488 for (i = index - 1;
1489 io_tlb_offset(i) != IO_TLB_SEGSIZE - 1 && mem->slots[i].list;
1490 i--)
1491 mem->slots[i].list = ++count;
1492 area->used -= nslots;
1493 spin_unlock_irqrestore(&area->lock, flags);
1494
1495 dec_used(dev->dma_io_tlb_mem, nslots);
1496 }
1497
1498 #ifdef CONFIG_SWIOTLB_DYNAMIC
1499
1500 /**
1501 * swiotlb_del_transient() - delete a transient memory pool
1502 * @dev: Device which mapped the buffer.
1503 * @tlb_addr: Physical address within a bounce buffer.
1504 * @pool: Pointer to the transient memory pool to be checked and deleted.
1505 *
1506 * Check whether the address belongs to a transient SWIOTLB memory pool.
1507 * If yes, then delete the pool.
1508 *
1509 * Return: %true if @tlb_addr belonged to a transient pool that was released.
1510 */
swiotlb_del_transient(struct device * dev,phys_addr_t tlb_addr,struct io_tlb_pool * pool)1511 static bool swiotlb_del_transient(struct device *dev, phys_addr_t tlb_addr,
1512 struct io_tlb_pool *pool)
1513 {
1514 if (!pool->transient)
1515 return false;
1516
1517 dec_used(dev->dma_io_tlb_mem, pool->nslabs);
1518 swiotlb_del_pool(dev, pool);
1519 dec_transient_used(dev->dma_io_tlb_mem, pool->nslabs);
1520 return true;
1521 }
1522
1523 #else /* !CONFIG_SWIOTLB_DYNAMIC */
1524
swiotlb_del_transient(struct device * dev,phys_addr_t tlb_addr,struct io_tlb_pool * pool)1525 static inline bool swiotlb_del_transient(struct device *dev,
1526 phys_addr_t tlb_addr, struct io_tlb_pool *pool)
1527 {
1528 return false;
1529 }
1530
1531 #endif /* CONFIG_SWIOTLB_DYNAMIC */
1532
1533 /*
1534 * tlb_addr is the physical address of the bounce buffer to unmap.
1535 */
__swiotlb_tbl_unmap_single(struct device * dev,phys_addr_t tlb_addr,size_t mapping_size,enum dma_data_direction dir,unsigned long attrs,struct io_tlb_pool * pool)1536 void __swiotlb_tbl_unmap_single(struct device *dev, phys_addr_t tlb_addr,
1537 size_t mapping_size, enum dma_data_direction dir,
1538 unsigned long attrs, struct io_tlb_pool *pool)
1539 {
1540 /*
1541 * First, sync the memory before unmapping the entry
1542 */
1543 if (!(attrs & DMA_ATTR_SKIP_CPU_SYNC) &&
1544 (dir == DMA_FROM_DEVICE || dir == DMA_BIDIRECTIONAL))
1545 swiotlb_bounce(dev, tlb_addr, mapping_size,
1546 DMA_FROM_DEVICE, pool);
1547
1548 if (swiotlb_del_transient(dev, tlb_addr, pool))
1549 return;
1550 swiotlb_release_slots(dev, tlb_addr, pool);
1551 }
1552
__swiotlb_sync_single_for_device(struct device * dev,phys_addr_t tlb_addr,size_t size,enum dma_data_direction dir,struct io_tlb_pool * pool)1553 void __swiotlb_sync_single_for_device(struct device *dev, phys_addr_t tlb_addr,
1554 size_t size, enum dma_data_direction dir,
1555 struct io_tlb_pool *pool)
1556 {
1557 if (dir == DMA_TO_DEVICE || dir == DMA_BIDIRECTIONAL)
1558 swiotlb_bounce(dev, tlb_addr, size, DMA_TO_DEVICE, pool);
1559 else
1560 BUG_ON(dir != DMA_FROM_DEVICE);
1561 }
1562
__swiotlb_sync_single_for_cpu(struct device * dev,phys_addr_t tlb_addr,size_t size,enum dma_data_direction dir,struct io_tlb_pool * pool)1563 void __swiotlb_sync_single_for_cpu(struct device *dev, phys_addr_t tlb_addr,
1564 size_t size, enum dma_data_direction dir,
1565 struct io_tlb_pool *pool)
1566 {
1567 if (dir == DMA_FROM_DEVICE || dir == DMA_BIDIRECTIONAL)
1568 swiotlb_bounce(dev, tlb_addr, size, DMA_FROM_DEVICE, pool);
1569 else
1570 BUG_ON(dir != DMA_TO_DEVICE);
1571 }
1572
1573 /*
1574 * Create a swiotlb mapping for the buffer at @paddr, and in case of DMAing
1575 * to the device copy the data into it as well.
1576 */
swiotlb_map(struct device * dev,phys_addr_t paddr,size_t size,enum dma_data_direction dir,unsigned long attrs)1577 dma_addr_t swiotlb_map(struct device *dev, phys_addr_t paddr, size_t size,
1578 enum dma_data_direction dir, unsigned long attrs)
1579 {
1580 phys_addr_t swiotlb_addr;
1581 dma_addr_t dma_addr;
1582
1583 trace_swiotlb_bounced(dev, phys_to_dma(dev, paddr), size);
1584
1585 swiotlb_addr = swiotlb_tbl_map_single(dev, paddr, size, 0, dir, attrs);
1586 if (swiotlb_addr == (phys_addr_t)DMA_MAPPING_ERROR)
1587 return DMA_MAPPING_ERROR;
1588
1589 /* Ensure that the address returned is DMA'ble */
1590 dma_addr = phys_to_dma_unencrypted(dev, swiotlb_addr);
1591 if (unlikely(!dma_capable(dev, dma_addr, size, true))) {
1592 __swiotlb_tbl_unmap_single(dev, swiotlb_addr, size, dir,
1593 attrs | DMA_ATTR_SKIP_CPU_SYNC,
1594 swiotlb_find_pool(dev, swiotlb_addr));
1595 dev_WARN_ONCE(dev, 1,
1596 "swiotlb addr %pad+%zu overflow (mask %llx, bus limit %llx).\n",
1597 &dma_addr, size, *dev->dma_mask, dev->bus_dma_limit);
1598 return DMA_MAPPING_ERROR;
1599 }
1600
1601 if (!dev_is_dma_coherent(dev) && !(attrs & DMA_ATTR_SKIP_CPU_SYNC))
1602 arch_sync_dma_for_device(swiotlb_addr, size, dir);
1603 return dma_addr;
1604 }
1605
swiotlb_max_mapping_size(struct device * dev)1606 size_t swiotlb_max_mapping_size(struct device *dev)
1607 {
1608 int min_align_mask = dma_get_min_align_mask(dev);
1609 int min_align = 0;
1610
1611 /*
1612 * swiotlb_find_slots() skips slots according to
1613 * min align mask. This affects max mapping size.
1614 * Take it into acount here.
1615 */
1616 if (min_align_mask)
1617 min_align = roundup(min_align_mask, IO_TLB_SIZE);
1618
1619 return ((size_t)IO_TLB_SIZE) * IO_TLB_SEGSIZE - min_align;
1620 }
1621
1622 /**
1623 * is_swiotlb_allocated() - check if the default software IO TLB is initialized
1624 */
is_swiotlb_allocated(void)1625 bool is_swiotlb_allocated(void)
1626 {
1627 return io_tlb_default_mem.nslabs;
1628 }
1629
is_swiotlb_active(struct device * dev)1630 bool is_swiotlb_active(struct device *dev)
1631 {
1632 struct io_tlb_mem *mem = dev->dma_io_tlb_mem;
1633
1634 return mem && mem->nslabs;
1635 }
1636
1637 /**
1638 * default_swiotlb_base() - get the base address of the default SWIOTLB
1639 *
1640 * Get the lowest physical address used by the default software IO TLB pool.
1641 */
default_swiotlb_base(void)1642 phys_addr_t default_swiotlb_base(void)
1643 {
1644 #ifdef CONFIG_SWIOTLB_DYNAMIC
1645 io_tlb_default_mem.can_grow = false;
1646 #endif
1647 return io_tlb_default_mem.defpool.start;
1648 }
1649
1650 /**
1651 * default_swiotlb_limit() - get the address limit of the default SWIOTLB
1652 *
1653 * Get the highest physical address used by the default software IO TLB pool.
1654 */
default_swiotlb_limit(void)1655 phys_addr_t default_swiotlb_limit(void)
1656 {
1657 #ifdef CONFIG_SWIOTLB_DYNAMIC
1658 return io_tlb_default_mem.phys_limit;
1659 #else
1660 return io_tlb_default_mem.defpool.end - 1;
1661 #endif
1662 }
1663
1664 #ifdef CONFIG_DEBUG_FS
1665 #ifdef CONFIG_SWIOTLB_DYNAMIC
mem_transient_used(struct io_tlb_mem * mem)1666 static unsigned long mem_transient_used(struct io_tlb_mem *mem)
1667 {
1668 return atomic_long_read(&mem->transient_nslabs);
1669 }
1670
io_tlb_transient_used_get(void * data,u64 * val)1671 static int io_tlb_transient_used_get(void *data, u64 *val)
1672 {
1673 struct io_tlb_mem *mem = data;
1674
1675 *val = mem_transient_used(mem);
1676 return 0;
1677 }
1678
1679 DEFINE_DEBUGFS_ATTRIBUTE(fops_io_tlb_transient_used, io_tlb_transient_used_get,
1680 NULL, "%llu\n");
1681 #endif /* CONFIG_SWIOTLB_DYNAMIC */
1682
io_tlb_used_get(void * data,u64 * val)1683 static int io_tlb_used_get(void *data, u64 *val)
1684 {
1685 struct io_tlb_mem *mem = data;
1686
1687 *val = mem_used(mem);
1688 return 0;
1689 }
1690
io_tlb_hiwater_get(void * data,u64 * val)1691 static int io_tlb_hiwater_get(void *data, u64 *val)
1692 {
1693 struct io_tlb_mem *mem = data;
1694
1695 *val = atomic_long_read(&mem->used_hiwater);
1696 return 0;
1697 }
1698
io_tlb_hiwater_set(void * data,u64 val)1699 static int io_tlb_hiwater_set(void *data, u64 val)
1700 {
1701 struct io_tlb_mem *mem = data;
1702
1703 /* Only allow setting to zero */
1704 if (val != 0)
1705 return -EINVAL;
1706
1707 atomic_long_set(&mem->used_hiwater, val);
1708 return 0;
1709 }
1710
1711 DEFINE_DEBUGFS_ATTRIBUTE(fops_io_tlb_used, io_tlb_used_get, NULL, "%llu\n");
1712 DEFINE_DEBUGFS_ATTRIBUTE(fops_io_tlb_hiwater, io_tlb_hiwater_get,
1713 io_tlb_hiwater_set, "%llu\n");
1714
swiotlb_create_debugfs_files(struct io_tlb_mem * mem,const char * dirname)1715 static void swiotlb_create_debugfs_files(struct io_tlb_mem *mem,
1716 const char *dirname)
1717 {
1718 mem->debugfs = debugfs_create_dir(dirname, io_tlb_default_mem.debugfs);
1719 if (!mem->nslabs)
1720 return;
1721
1722 debugfs_create_ulong("io_tlb_nslabs", 0400, mem->debugfs, &mem->nslabs);
1723 debugfs_create_file("io_tlb_used", 0400, mem->debugfs, mem,
1724 &fops_io_tlb_used);
1725 debugfs_create_file("io_tlb_used_hiwater", 0600, mem->debugfs, mem,
1726 &fops_io_tlb_hiwater);
1727 #ifdef CONFIG_SWIOTLB_DYNAMIC
1728 debugfs_create_file("io_tlb_transient_nslabs", 0400, mem->debugfs,
1729 mem, &fops_io_tlb_transient_used);
1730 #endif
1731 }
1732
swiotlb_create_default_debugfs(void)1733 static int __init swiotlb_create_default_debugfs(void)
1734 {
1735 swiotlb_create_debugfs_files(&io_tlb_default_mem, "swiotlb");
1736 return 0;
1737 }
1738
1739 late_initcall(swiotlb_create_default_debugfs);
1740
1741 #else /* !CONFIG_DEBUG_FS */
1742
swiotlb_create_debugfs_files(struct io_tlb_mem * mem,const char * dirname)1743 static inline void swiotlb_create_debugfs_files(struct io_tlb_mem *mem,
1744 const char *dirname)
1745 {
1746 }
1747
1748 #endif /* CONFIG_DEBUG_FS */
1749
1750 #ifdef CONFIG_DMA_RESTRICTED_POOL
1751
swiotlb_alloc(struct device * dev,size_t size)1752 struct page *swiotlb_alloc(struct device *dev, size_t size)
1753 {
1754 struct io_tlb_mem *mem = dev->dma_io_tlb_mem;
1755 struct io_tlb_pool *pool;
1756 phys_addr_t tlb_addr;
1757 unsigned int align;
1758 int index;
1759
1760 if (!mem)
1761 return NULL;
1762
1763 align = (1 << (get_order(size) + PAGE_SHIFT)) - 1;
1764 index = swiotlb_find_slots(dev, 0, size, align, &pool);
1765 if (index == -1)
1766 return NULL;
1767
1768 tlb_addr = slot_addr(pool->start, index);
1769 if (unlikely(!PAGE_ALIGNED(tlb_addr))) {
1770 dev_WARN_ONCE(dev, 1, "Cannot allocate pages from non page-aligned swiotlb addr 0x%pa.\n",
1771 &tlb_addr);
1772 swiotlb_release_slots(dev, tlb_addr, pool);
1773 return NULL;
1774 }
1775
1776 return pfn_to_page(PFN_DOWN(tlb_addr));
1777 }
1778
swiotlb_free(struct device * dev,struct page * page,size_t size)1779 bool swiotlb_free(struct device *dev, struct page *page, size_t size)
1780 {
1781 phys_addr_t tlb_addr = page_to_phys(page);
1782 struct io_tlb_pool *pool;
1783
1784 pool = swiotlb_find_pool(dev, tlb_addr);
1785 if (!pool)
1786 return false;
1787
1788 swiotlb_release_slots(dev, tlb_addr, pool);
1789
1790 return true;
1791 }
1792
rmem_swiotlb_device_init(struct reserved_mem * rmem,struct device * dev)1793 static int rmem_swiotlb_device_init(struct reserved_mem *rmem,
1794 struct device *dev)
1795 {
1796 struct io_tlb_mem *mem = rmem->priv;
1797 unsigned long nslabs = rmem->size >> IO_TLB_SHIFT;
1798
1799 /* Set Per-device io tlb area to one */
1800 unsigned int nareas = 1;
1801
1802 if (PageHighMem(pfn_to_page(PHYS_PFN(rmem->base)))) {
1803 dev_err(dev, "Restricted DMA pool must be accessible within the linear mapping.");
1804 return -EINVAL;
1805 }
1806
1807 /*
1808 * Since multiple devices can share the same pool, the private data,
1809 * io_tlb_mem struct, will be initialized by the first device attached
1810 * to it.
1811 */
1812 if (!mem) {
1813 struct io_tlb_pool *pool;
1814
1815 mem = kzalloc(sizeof(*mem), GFP_KERNEL);
1816 if (!mem)
1817 return -ENOMEM;
1818 pool = &mem->defpool;
1819
1820 pool->slots = kcalloc(nslabs, sizeof(*pool->slots), GFP_KERNEL);
1821 if (!pool->slots) {
1822 kfree(mem);
1823 return -ENOMEM;
1824 }
1825
1826 pool->areas = kcalloc(nareas, sizeof(*pool->areas),
1827 GFP_KERNEL);
1828 if (!pool->areas) {
1829 kfree(pool->slots);
1830 kfree(mem);
1831 return -ENOMEM;
1832 }
1833
1834 set_memory_decrypted((unsigned long)phys_to_virt(rmem->base),
1835 rmem->size >> PAGE_SHIFT);
1836 swiotlb_init_io_tlb_pool(pool, rmem->base, nslabs,
1837 false, nareas);
1838 mem->force_bounce = true;
1839 mem->for_alloc = true;
1840 #ifdef CONFIG_SWIOTLB_DYNAMIC
1841 spin_lock_init(&mem->lock);
1842 INIT_LIST_HEAD_RCU(&mem->pools);
1843 #endif
1844 add_mem_pool(mem, pool);
1845
1846 rmem->priv = mem;
1847
1848 swiotlb_create_debugfs_files(mem, rmem->name);
1849 }
1850
1851 dev->dma_io_tlb_mem = mem;
1852
1853 return 0;
1854 }
1855
rmem_swiotlb_device_release(struct reserved_mem * rmem,struct device * dev)1856 static void rmem_swiotlb_device_release(struct reserved_mem *rmem,
1857 struct device *dev)
1858 {
1859 dev->dma_io_tlb_mem = &io_tlb_default_mem;
1860 }
1861
1862 static const struct reserved_mem_ops rmem_swiotlb_ops = {
1863 .device_init = rmem_swiotlb_device_init,
1864 .device_release = rmem_swiotlb_device_release,
1865 };
1866
rmem_swiotlb_setup(struct reserved_mem * rmem)1867 static int __init rmem_swiotlb_setup(struct reserved_mem *rmem)
1868 {
1869 unsigned long node = rmem->fdt_node;
1870
1871 if (of_get_flat_dt_prop(node, "reusable", NULL) ||
1872 of_get_flat_dt_prop(node, "linux,cma-default", NULL) ||
1873 of_get_flat_dt_prop(node, "linux,dma-default", NULL) ||
1874 of_get_flat_dt_prop(node, "no-map", NULL))
1875 return -EINVAL;
1876
1877 rmem->ops = &rmem_swiotlb_ops;
1878 pr_info("Reserved memory: created restricted DMA pool at %pa, size %ld MiB\n",
1879 &rmem->base, (unsigned long)rmem->size / SZ_1M);
1880 return 0;
1881 }
1882
1883 RESERVEDMEM_OF_DECLARE(dma, "restricted-dma-pool", rmem_swiotlb_setup);
1884 #endif /* CONFIG_DMA_RESTRICTED_POOL */
1885