Searched +full:hw +full:- +full:device +full:- +full:address (Results 1 – 25 of 93) sorted by relevance
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| /Documentation/driver-api/ |
| D | ntb.rst | 5 NTB (Non-Transparent Bridge) is a type of PCI-Express bridge chip that connects
6 the separate memory systems of two or more computers to the same PCI-Express
9 scratchpad and message registers. Scratchpad registers are read-and-writable
10 registers that are accessible from either side of the device, so that peers can
11 exchange a small amount of information at a fixed address. Message registers can
32 registration uses the Linux Device framework, so it should feel familiar to
36 ----------------------------------------
39 systems. So the NTB device features like Scratchpad/Message registers are
50 | dma-mapped |-ntb_mw_set_trans(addr) |
52 | (addr) |<======| MW xlat addr |<====| MW base addr |<== memory-mapped IO
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| /Documentation/networking/ |
| D | ieee802154.rst | 11 - ZigBee - proprietary protocol from the ZigBee Alliance
12 - 6LoWPAN - IPv6 networking over low rate personal area networks
14 The goal of the Linux-wpan is to provide a complete implementation
16 of protocols for organizing Low-Rate Wireless Personal Area Networks.
20 - IEEE 802.15.4 layer; We have chosen to use plain Berkeley socket API,
23 - MAC - provides access to shared channel and reliable data delivery
24 - PHY - represents device drivers
33 The address family, socket addresses etc. are defined in the
35 in the userspace package (see either https://linux-wpan.org/wpan-tools.html
36 or the git tree at https://github.com/linux-wpan/wpan-tools).
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| D | generic-hdlc.rst | 1 .. SPDX-License-Identifier: GPL-2.0
14 - Normal (routed) and Ethernet-bridged (Ethernet device emulation)
16 - ARP support (no InARP support in the kernel - there is an
17 experimental InARP user-space daemon available on:
20 2. raw HDLC - either IP (IPv4) interface or Ethernet device emulation
25 Generic HDLC is a protocol driver only - it needs a low-level driver
28 Ethernet device emulation (using HDLC or Frame-Relay PVC) is compatible
40 gcc -O2 -Wall -o sethdlc sethdlc.c
59 In Frame Relay mode, ifconfig master hdlc device up (without assigning
60 any IP address to it) before using pvc devices.
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| D | pktgen.rst | 1 .. SPDX-License-Identifier: GPL-2.0
7 Enable CONFIG_NET_PKTGEN to compile and build pktgen either in-kernel
31 overload type of benchmarking, as this could hurt the normal use-case.
35 # ethtool -G ethX tx 1024
40 NIC HW layer (which is bad for bufferbloat).
42 One should hesitate to conclude that packets/descriptors in the HW
44 ring-buffers for various performance reasons, and packets stalling
49 and the cleanup interval is affected by the ethtool --coalesce setting
50 of parameter "rx-usecs".
54 # ethtool -C ethX rx-usecs 30
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| /Documentation/devicetree/bindings/mtd/ |
| D | davinci-nand.txt | 1 Device tree bindings for Texas instruments Davinci/Keystone NAND controller
3 This file provides information, what the device node for the davinci/keystone
7 Davinci DM646x - https://www.ti.com/lit/ug/sprueq7c/sprueq7c.pdf
8 Kestone - https://www.ti.com/lit/ug/sprugz3a/sprugz3a.pdf
12 - compatible: "ti,davinci-nand"
13 "ti,keystone-nand"
15 - reg: Contains 2 offset/length values:
16 - offset and length for the access window.
17 - offset and length for accessing the AEMIF
20 - ti,davinci-chipselect: number of chipselect. Indicates on the
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| D | mediatek,mtk-nfc.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/mtd/mediatek,mtk-nfc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Xiangsheng Hou <xiangsheng.hou@mediatek.com>
15 - mediatek,mt2701-nfc
16 - mediatek,mt2712-nfc
17 - mediatek,mt7622-nfc
21 - description: Base physical address and size of NFI.
25 - description: NFI interrupt
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| /Documentation/devicetree/bindings/net/ |
| D | snps,dwc-qos-ethernet.txt | 9 entries in properties are marked as optional, or only required in specific HW
13 - compatible: One of:
14 - "axis,artpec6-eqos", "snps,dwc-qos-ethernet-4.10"
15 Represents the IP core when integrated into the Axis ARTPEC-6 SoC.
16 - "nvidia,tegra186-eqos", "snps,dwc-qos-ethernet-4.10"
18 - "snps,dwc-qos-ethernet-4.10"
20 "axis,artpec6-eqos", "snps,dwc-qos-ethernet-4.10". It is supported to be
22 - reg: Address and length of the register set for the device
23 - clocks: Phandle and clock specifiers for each entry in clock-names, in the
24 same order. See ../clock/clock-bindings.txt.
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| /Documentation/virt/kvm/devices/ |
| D | xive.rst | 1 .. SPDX-License-Identifier: GPL-2.0
7 Device types supported:
8 - KVM_DEV_TYPE_XIVE POWER9 XIVE Interrupt Controller generation 1
10 This device acts as a VM interrupt controller. It provides the KVM
14 Only one XIVE instance may be instantiated. A guest XIVE device
19 * Device Mappings
21 The KVM device exposes different MMIO ranges of the XIVE HW which
32 - Interrupt Pending Buffer (IPB)
33 - Current Processor Priority (CPPR)
34 - Notification Source Register (NSR)
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| /Documentation/devicetree/bindings/iio/adc/ |
| D | microchip,mcp3564.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Marius Cristea <marius.cristea@microchip.com>
13 Bindings for the Microchip family of 153.6 ksps, Low-Noise 16/24-Bit
14 Delta-Sigma ADCs with an SPI interface. Datasheet can be found here:
16 …s/aemDocuments/documents/MSLD/ProductDocuments/DataSheets/MCP3561-2-4-Family-Data-Sheet-DS20006181…
18 …ds/aemDocuments/documents/APID/ProductDocuments/DataSheets/MCP3561_2_4R-Data-Sheet-DS200006391C.pdf
20 …ProductDocuments/DataSheets/MCP3461-2-4-Two-Four-Eight-Channel-153.6-ksps-Low-Noise-16-Bit-Delta-S…
22 …/aemDocuments/documents/APID/ProductDocuments/DataSheets/MCP3461-2-4R-Family-Data-Sheet-DS20006404…
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| /Documentation/devicetree/bindings/media/ |
| D | mediatek,mt8195-jpegenc.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/media/mediatek,mt8195-jpegenc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - kyrie wu <kyrie.wu@mediatek.corp-partner.google.com>
17 const: mediatek,mt8195-jpgenc
19 power-domains:
27 Ports are according to the HW.
29 "#address-cells":
32 "#size-cells":
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| D | mediatek,mt8195-jpegdec.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/media/mediatek,mt8195-jpegdec.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - kyrie wu <kyrie.wu@mediatek.corp-partner.google.com>
17 const: mediatek,mt8195-jpgdec
19 power-domains:
27 Ports are according to the HW.
29 "#address-cells":
32 "#size-cells":
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| D | mediatek,vcodec-subdev-decoder.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
4 ---
5 $id: http://devicetree.org/schemas/media/mediatek,vcodec-subdev-decoder.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 - Yunfei Dong <yunfei.dong@mediatek.com>
16 parent and child device node.
20 +------------------------------------------------+-------------------------------------+
22 | input -> lat soc HW -> lat HW -> lat buffer --|--> lat buffer -> core HW -> output |
24 +------------||-------------||-------------------+---------------------||--------------+
26 -------------||-------------||-------------------|---------------------||---------------
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| /Documentation/admin-guide/ |
| D | kernel-parameters.txt | 12 acpi= [HW,ACPI,X86,ARM64,RISCV64,EARLY]
16 force -- enable ACPI if default was off
17 on -- enable ACPI but allow fallback to DT [arm64,riscv64]
18 off -- disable ACPI if default was on
19 noirq -- do not use ACPI for IRQ routing
20 strict -- Be less tolerant of platforms that are not
22 rsdt -- prefer RSDT over (default) XSDT
23 copy_dsdt -- copy DSDT to memory
24 nospcr -- disable console in ACPI SPCR table as
39 acpi_backlight= [HW,ACPI]
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| /Documentation/ABI/testing/ |
| D | sysfs-bus-coresight-devices-etm4x | 28 Description: (Read) Indicates the number of address comparator pairs that are
76 Description: (Read) Indicates the number of single-shot comparator controls that
155 Description: (RW) In non-secure state, each bit controls whether instruction
162 Description: (RW) Select which address comparator or pair (of comparators) to
175 Description: (RW) Used to setup single address comparator values.
181 Description: (RW) Used to setup address range comparator values.
290 non-secure exception levels.
303 Description: (Read) Print the current settings for the selected address
337 The value it taken directly from the HW.
344 (0x310). The value is taken directly from the HW.
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| /Documentation/sound/cards/ |
| D | cmipci.rst | 2 Brief Notes on C-Media 8338/8738/8768/8770 Driver
8 Front/Rear Multi-channel Playback
9 ---------------------------------
13 DACs, both streams are handled independently unlike the 4/6ch multi-
16 As default, ALSA driver assigns the first PCM device (i.e. hw:0,0 for
17 card#0) for front and 4/6ch playbacks, while the second PCM device
18 (hw:0,1) is assigned to the second DAC for rear playback.
22 - The first DAC supports U8 and S16LE formats, while the second DAC
24 - The second DAC supports only two channel stereo.
51 control switch in the driver "Line-In As Rear", which you can change
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| /Documentation/networking/device_drivers/ethernet/stmicro/ |
| D | stmmac.rst | 1 .. SPDX-License-Identifier: GPL-2.0+
13 - In This Release
14 - Feature List
15 - Kernel Configuration
16 - Command Line Parameters
17 - Driver Information and Notes
18 - Debug Information
19 - Support
27 Currently, this network device driver is for all STi embedded MAC/GMAC
33 (and older) and DesignWare(R) Cores Ethernet Quality-of-Service version 4.0
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| /Documentation/devicetree/bindings/crypto/ |
| D | fsl,sec-v4.0.yaml | 1 # SPDX-License-Identifier: GPL-2.0
2 # Copyright (C) 2008-2011 Freescale Semiconductor Inc.
4 ---
5 $id: http://devicetree.org/schemas/crypto/fsl,sec-v4.0.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 - '"Horia Geantă" <horia.geanta@nxp.com>'
12 - Pankaj Gupta <pankaj.gupta@nxp.com>
13 - Gaurav Jain <gaurav.jain@nxp.com>
20 1. DPAA Queue Interface (HW interface between Queue Manager & SEC 4).
21 2. Job Rings (HW interface between cores & SEC 4 registers).
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| /Documentation/devicetree/bindings/powerpc/fsl/ |
| D | srio.txt | 5 - compatible
11 Optionally, a compatible string of "fsl,srio-vX.Y" where X is Major
15 - reg
17 Value type: <prop-encoded-array>
18 Definition: A standard property. Specifies the physical address and
22 - interrupts
24 Value type: <prop_encoded-array>
25 Definition: Specifies the interrupts generated by this device. The
31 property. (Typically shared with port-write).
33 - fsl,srio-rmu-handle:
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| /Documentation/networking/device_drivers/ethernet/intel/ |
| D | iavf.rst | 1 .. SPDX-License-Identifier: GPL-2.0+
8 Copyright(c) 2013-2018 Intel Corporation.
13 - Overview
14 - Identifying Your Adapter
15 - Additional Configurations
16 - Known Issues/Troubleshooting
17 - Support
30 The guest OS loading the iavf driver must support MSI-X interrupts.
42 device.
53 ---------------------
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| /Documentation/devicetree/bindings/usb/ |
| D | omap-usb.txt | 4 - compatible : Should be "ti,omap4-musb" or "ti,omap3-musb"
5 - ti,hwmods : must be "usb_otg_hs"
6 - multipoint : Should be "1" indicating the musb controller supports
7 multipoint. This is a MUSB configuration-specific setting.
8 - num-eps : Specifies the number of endpoints. This is also a
9 MUSB configuration-specific setting. Should be set to "16"
10 - ram-bits : Specifies the ram address size. Should be set to "12"
11 - interface-type : This is a board specific setting to describe the type of
14 - mode : Should be "3" to represent OTG. "1" signifies HOST and "2"
16 - power : Should be "50". This signifies the controller can supply up to
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| /Documentation/arch/powerpc/ |
| D | pci_iov_resource_on_powernv.rst | 23 associated with a device or a set of devices to provide isolation between
25 to freeze a device that is causing errors in order to limit the possibility
28 There is thus, in HW, a table of PE states that contains a pair of "frozen"
42 is a completely separate HW entity that replicates the entire logic, so has
53 memory but accessed in HW by the chip) that provides a direct
57 - For DMA we then provide an entire address space for each PE that can
58 contain two "windows", depending on the value of PCI address bit 59.
63 - For MSIs, we have two windows in the address space (one at the top of
64 the 32-bit space and one much higher) which, via a combination of the
65 address and MSI value, will result in one of the 2048 interrupts per
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| /Documentation/devicetree/bindings/interrupt-controller/ |
| D | apple,aic2.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/interrupt-controller/apple,aic2.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Hector Martin <marcan@marcan.st>
18 - Level-triggered hardware IRQs wired to SoC blocks
19 - Single mask bit per IRQ
20 - Automatic masking on event delivery (auto-ack)
21 - Software triggering (ORed with hw line)
22 - Automatic prioritization (single event/ack register per CPU, lower IRQs =
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| D | apple,aic.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/interrupt-controller/apple,aic.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Hector Martin <marcan@marcan.st>
19 - Level-triggered hardware IRQs wired to SoC blocks
20 - Single mask bit per IRQ
21 - Per-IRQ affinity setting
22 - Automatic masking on event delivery (auto-ack)
23 - Software triggering (ORed with hw line)
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| /Documentation/devicetree/bindings/spi/ |
| D | brcm,spi-bcm-qspi.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/spi/brcm,spi-bcm-qspi.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Kamal Dasu <kdasu.kdev@gmail.com>
11 - Rafał Miłecki <rafal@milecki.pl>
15 BRCMSTB (BCM7XXX), Cygnus, NSP and NS2. The Broadcom Master SPI hw IP consists
17 MSPI : SPI master controller can read and write to a SPI slave device
18 BSPI : Broadcom SPI in combination with the MSPI hw IP provides acceleration
20 io with 3-byte and 4-byte addressing support.
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| /Documentation/devicetree/bindings/dvfs/ |
| D | performance-domain.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/dvfs/performance-domain.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Sudeep Holla <sudeep.holla@arm.com>
19 an individual device in the domain independently from other devices in
24 This device tree binding can be used to bind performance domain consumer
27 the device tree and can provide one or more performance domains. A consumer
30 \#performance-domain-cells property in the performance domain provider node.
35 "#performance-domain-cells":
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