Searched +full:memory +full:- +full:region (Results 1 – 25 of 382) sorted by relevance
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| /Documentation/devicetree/bindings/firmware/ |
| D | gunyah-cma-mem.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/firmware/gunyah-cma-mem.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Contiguous memory allocator for Virtual Machines
10 - Prakruthi Deepak Heragu <quic_pheragu@quicinc.com>
11 - Elliot Berman <quic_eberman@quicinc.com>
14 gunyah-cma-mem is a CMA memory manager that allows VMMs to use
15 contiguous memory to backup Virtual Machines running on Gunyah. These
16 regions are pre-defined by the firmware to have special attributes
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| /Documentation/devicetree/bindings/pmem/ |
| D | pmem-region.txt | 1 Device-tree bindings for persistent memory regions
2 -----------------------------------------------------
4 Persistent memory refers to a class of memory devices that are:
6 a) Usable as main system memory (i.e. cacheable), and
9 Given b) it is best to think of persistent memory as a kind of memory mapped
11 persistent regions separately to the normal memory pool. To aid with that this
13 memory regions exist inside the physical address space.
15 Bindings for the region nodes:
16 -----------------------------
19 - compatible = "pmem-region"
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| /Documentation/devicetree/bindings/reserved-memory/ |
| D | xen,shared-memory.txt | 1 * Xen hypervisor reserved-memory binding
3 Expose one or more memory regions as reserved-memory to the guest
4 virtual machine. Typically, a region is configured at VM creation time
5 to be a shared memory area across multiple virtual machines for
8 For each of these pre-shared memory regions, a range is exposed under
9 the /reserved-memory node as a child node. Each range sub-node is named
10 xen-shmem@<address> and has the following properties:
12 - compatible:
13 compatible = "xen,shared-memory-v1"
15 - reg:
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| D | qcom,rmtfs-mem.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/reserved-memory/qcom,rmtfs-mem.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Qualcomm Remote File System Memory
10 This binding describes the Qualcomm remote filesystem memory, which serves the
11 purpose of describing the shared memory region used for remote processors to
15 - Bjorn Andersson <bjorn.andersson@linaro.org>
18 - $ref: reserved-memory.yaml
22 const: qcom,rmtfs-mem
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| D | nvidia,tegra264-bpmp-shmem.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/reserved-memory/nvidia,tegra264-bpmp-shmem.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Tegra CPU-NS - BPMP IPC reserved memory
10 - Peter De Schrijver <pdeschrijver@nvidia.com>
13 Define a memory region used for communication between CPU-NS and BPMP.
15 has to be known to both CPU-NS and BPMP for correct IPC operation.
16 The memory region is defined using a child node under /reserved-memory.
17 The sub-node is named shmem@<address>.
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| /Documentation/devicetree/bindings/arm/mediatek/ |
| D | mediatek,mt7622-wed.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/arm/mediatek/mediatek,mt7622-wed.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Lorenzo Bianconi <lorenzo@kernel.org>
11 - Felix Fietkau <nbd@nbd.name>
21 - enum:
22 - mediatek,mt7622-wed
23 - mediatek,mt7981-wed
24 - mediatek,mt7986-wed
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| /Documentation/devicetree/bindings/remoteproc/ |
| D | qcom,sm8550-pas.yaml | 1 # SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/remoteproc/qcom,sm8550-pas.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
19 - qcom,sdx75-mpss-pas
20 - qcom,sm8550-adsp-pas
21 - qcom,sm8550-cdsp-pas
22 - qcom,sm8550-mpss-pas
23 - qcom,sm8650-adsp-pas
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| D | ti,k3-dsp-rproc.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/remoteproc/ti,k3-dsp-rproc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Suman Anna <s-anna@ti.com>
13 The TI K3 family of SoCs usually have one or more TI DSP Core sub-systems
14 that are used to offload some of the processor-intensive tasks or algorithms,
17 These processor sub-systems usually contain additional sub-modules like
18 L1 and/or L2 caches/SRAMs, an Interrupt Controller, an external memory
23 Each DSP Core sub-system is represented as a single DT node. Each node has a
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| D | ti,davinci-rproc.txt | 4 The TI Davinci family of SoCs usually contains a TI DSP Core sub-system that
5 is used to offload some of the processor-intensive tasks or algorithms, for
8 The processor cores in the sub-system usually contain additional sub-modules
9 like L1 and/or L2 caches/SRAMs, an Interrupt Controller, an external memory
15 Each DSP Core sub-system is represented as a single DT node.
18 --------------------
21 - compatible: Should be one of the following,
22 "ti,da850-dsp" for DSPs on OMAP-L138 SoCs
24 - reg: Should contain an entry for each value in 'reg-names'.
25 Each entry should have the memory region's start address
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| D | qcom,msm8916-mss-pil.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/remoteproc/qcom,msm8916-mss-pil.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Stephan Gerhold <stephan@gerhold.net>
19 - enum:
20 - qcom,msm8909-mss-pil
21 - qcom,msm8916-mss-pil
22 - qcom,msm8953-mss-pil
23 - qcom,msm8974-mss-pil
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| D | qcom,msm8996-mss-pil.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/remoteproc/qcom,msm8996-mss-pil.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Bjorn Andersson <andersson@kernel.org>
11 - Sibi Sankar <quic_sibis@quicinc.com>
20 - qcom,msm8996-mss-pil
21 - qcom,msm8998-mss-pil
22 - qcom,sdm660-mss-pil
23 - qcom,sdm845-mss-pil
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| /Documentation/devicetree/bindings/soc/qcom/ |
| D | qcom,smem.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Qualcomm Shared Memory Manager
10 - Andy Gross <agross@kernel.org>
11 - Bjorn Andersson <bjorn.andersson@linaro.org>
14 This binding describes the Qualcomm Shared Memory Manager, a region of
15 reserved-memory used to share data between various subsystems and OSes in
25 memory-region:
27 description: handle to memory reservation for main SMEM memory region.
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| /Documentation/devicetree/bindings/media/ |
| D | aspeed-video.txt | 7 - compatible: "aspeed,ast2400-video-engine" or
8 "aspeed,ast2500-video-engine" or
9 "aspeed,ast2600-video-engine"
10 - reg: contains the offset and length of the VE memory region
11 - clocks: clock specifiers for the syscon clocks associated with
12 the VE (ordering must match the clock-names property)
13 - clock-names: "vclk" and "eclk"
14 - resets: reset specifier for the syscon reset associated with
16 - interrupts: the interrupt associated with the VE on this platform
19 - memory-region:
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| D | amphion,vpu.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
4 ---
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 - Ming Qian <ming.qian@nxp.com>
12 - Shijie Qin <shijie.qin@nxp.com>
14 description: |-
20 pattern: "^vpu@[0-9a-f]+$"
24 - enum:
25 - nxp,imx8qm-vpu
26 - nxp,imx8qxp-vpu
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| /Documentation/PCI/endpoint/ |
| D | pci-ntb-function.rst | 1 .. SPDX-License-Identifier: GPL-2.0
9 PCI Non-Transparent Bridges (NTB) allow two host systems to communicate
12 machine, expose memory ranges as BARs, and perform DMA. They also support
13 scratchpads, which are areas of memory within the NTB that are accessible
26 .. code-block:: text
28 +-------------+ +-------------+
32 +------^------+ +------^------+
35 +---------|-------------------------------------------------|---------+
36 | +------v------+ +------v------+ |
40 | | <-----------------------------------> | |
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| /Documentation/arch/arm64/ |
| D | kdump.rst | 2 crashkernel memory reservation on arm64
9 reserved memory is needed to pre-load the kdump kernel and boot such
12 That reserved memory for kdump is adapted to be able to minimally
19 Through the kernel parameters below, memory can be reserved accordingly
21 large chunk of memomy can be found. The low memory reservation needs to
22 be considered if the crashkernel is reserved from the high memory area.
24 - crashkernel=size@offset
25 - crashkernel=size
26 - crashkernel=size,high crashkernel=size,low
28 Low memory and high memory
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| /Documentation/devicetree/bindings/memory-controllers/ |
| D | arm,pl35x-smc.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/memory-controllers/arm,pl35x-smc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Arm PL35x Series Static Memory Controller (SMC)
10 - Miquel Raynal <miquel.raynal@bootlin.com>
13 The PL35x Static Memory Controller is a bus where you can connect two kinds
14 of memory interfaces, which are NAND and memory mapped interfaces (such as
18 https://documentation-service.arm.com/static/5e8e2524fd977155116a58aa
26 - arm,pl353-smc-r2p1
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| D | nvidia,tegra210-emc.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/memory-controllers/nvidia,tegra210-emc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: NVIDIA Tegra210 SoC External Memory Controller
10 - Thierry Reding <thierry.reding@gmail.com>
11 - Jon Hunter <jonathanh@nvidia.com>
14 The EMC interfaces with the off-chip SDRAM to service the request stream
15 sent from the memory controller.
19 const: nvidia,tegra210-emc
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| /Documentation/devicetree/bindings/gpu/ |
| D | aspeed-gfx.txt | 4 - compatible
6 + aspeed,ast2500-gfx
7 + aspeed,ast2400-gfx
11 - reg: Physical base address and length of the GFX registers
13 - interrupts: interrupt number for the GFX device
15 - clocks: clock number used to generate the pixel clock
17 - resets: reset line that must be released to use the GFX device
19 - memory-region:
20 Phandle to a memory region to allocate from, as defined in
21 Documentation/devicetree/bindings/reserved-memory/reserved-memory.txt
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| /Documentation/devicetree/bindings/sound/ |
| D | google,cros-ec-codec.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only
3 ---
4 $id: http://devicetree.org/schemas/sound/google,cros-ec-codec.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Cheng-Yi Chiang <cychiang@chromium.org>
11 - Tzung-Bi Shih <tzungbi@kernel.org>
15 Embedded Controller (EC) and is controlled via a host-command
17 subnode of a cros-ec node.
18 (see Documentation/devicetree/bindings/mfd/google,cros-ec.yaml).
21 - $ref: dai-common.yaml#
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| /Documentation/devicetree/bindings/tpm/ |
| D | tpm-common.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/tpm/tpm-common.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Lukas Wunner <lukas@wunner.de>
14 pattern: '^tpm(@[0-9a-f]+)?$'
23 linux,sml-base:
25 base address of reserved memory allocated for firmware event log
28 linux,sml-size:
30 size of reserved memory allocated for firmware event log
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| /Documentation/ABI/testing/ |
| D | sysfs-bus-cxl | 4 Contact: linux-cxl@vger.kernel.org
14 Contact: linux-cxl@vger.kernel.org
17 Memory Device Output Payload in the CXL-2.0
24 Contact: linux-cxl@vger.kernel.org
27 identically named field in the Identify Memory Device Output
28 Payload in the CXL-2.0 specification.
34 Contact: linux-cxl@vger.kernel.org
40 class-ids can be compared against a similar "qos_class"
42 that the endpoints map their local memory-class to a
45 side-effects that may result. First class-id is displayed.
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| /Documentation/admin-guide/mm/damon/ |
| D | reclaim.rst | 1 .. SPDX-License-Identifier: GPL-2.0
4 DAMON-based Reclamation
7 DAMON-based Reclamation (DAMON_RECLAIM) is a static kernel module that aimed to
8 be used for proactive and lightweight reclamation under light memory pressure.
9 It doesn't aim to replace the LRU-list based page_granularity reclamation, but
10 to be selectively used for different level of memory pressure and requirements.
15 On general memory over-committed systems, proactively reclaiming cold pages
16 helps saving memory and reducing latency spikes that incurred by the direct
20 Free Pages Reporting [3]_ based memory over-commit virtualization systems are
22 memory to host, and the host reallocates the reported memory to other guests.
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| /Documentation/devicetree/bindings/mtd/ |
| D | arm,pl353-nand-r2p1.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/mtd/arm,pl353-nand-r2p1.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - $ref: nand-controller.yaml
13 - Miquel Raynal <miquel.raynal@bootlin.com>
18 - const: arm,pl353-nand-r2p1
22 - items:
23 - description: CS with regard to the parent ranges property
24 - description: Offset of the memory region requested by the device
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| /Documentation/devicetree/bindings/cache/ |
| D | qcom,llcc.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Bjorn Andersson <andersson@kernel.org>
13 LLCC (Last Level Cache Controller) provides last level of cache memory in SoC,
16 common pool of memory. Cache memory is divided into partitions called slices
23 - qcom,qdu1000-llcc
24 - qcom,sa8775p-llcc
25 - qcom,sc7180-llcc
26 - qcom,sc7280-llcc
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