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/drivers/gpu/drm/ci/
Dgitlab-ci.yml2 DRM_CI_PROJECT_PATH: &drm-ci-project-path mesa/mesa
3 DRM_CI_COMMIT_SHA: &drm-ci-commit-sha d9849ac46623797a9f56fb9d46dc52460ac477de
6 TARGET_BRANCH: drm-next
10 DEQP_RUNNER_GIT_URL: https://gitlab.freedesktop.org/mesa/deqp-runner.git
13 FDO_UPSTREAM_REPO: helen.fornazier/linux # The repo where the git-archive daily runs
14 MESA_TEMPLATES_COMMIT: &ci-templates-commit d5aa3941aa03c2f716595116354fb81eb8012acb
16 CI_PRE_CLONE_SCRIPT: |-
17 set -o xtrace
18-L --retry 4 -f --retry-all-errors --retry-delay 60 -s ${DRM_CI_PROJECT_URL}/-/raw/${DRM_CI_COMMIT…
19 bash download-git-cache.sh
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Dtest.yml1 .test-rules:
2 rules:
3 - if: '$FD_FARM == "offline" && $RUNNER_TAG =~ /^google-freedreno-/'
5 - if: '$COLLABORA_FARM == "offline" && $RUNNER_TAG =~ /^mesa-ci-x86-64-lava-/'
7 - !reference [.no_scheduled_pipelines-rules, rules]
8 - when: on_success
10 .lava-test:
12 - .test-rules
16 - rm -rf install
17 - tar -xf artifacts/install.tar
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Dcontainer.yml3 …_REPOSITORY_URL: ${DRM_CI_PROJECT_URL}.git # So ci-templates clones drm-ci instead of the repo to
6 debian/x86_64_build-base:
8 …airo-dev libdw-dev libjson-c-dev libkmod2 libkmod-dev libpciaccess-dev libproc2-dev libudev-dev li…
10 debian/x86_64_test-gl:
12 …CKAGES: "jq libasound2 libcairo2 libdw1 libglib2.0-0 libjson-c5 libkmod-dev libkmod2 libgles2 libp…
16-dev libdw-dev libjson-c-dev libproc2-dev libkmod2 libkmod-dev libpciaccess-dev libudev-dev libunw…
20 EXTRA_LOCAL_PACKAGES: "jq libasound2 libcairo2 libdw1 libglib2.0-0 libjson-c5"
24 rules:
25 - when: never
27 debian/x86_64_test-vk:
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/drivers/gpu/drm/xe/tests/
Dxe_rtp_test.c1 // SPDX-License-Identifier: GPL-2.0
12 #include <kunit/test.h>
63 .name = "coalesce-same-reg",
71 { XE_RTP_NAME("basic-1"),
75 { XE_RTP_NAME("basic-2"),
83 .name = "no-match-no-add",
89 /* Don't coalesce second entry since rules don't match */
91 { XE_RTP_NAME("basic-1"),
95 { XE_RTP_NAME("basic-2"),
103 .name = "match-or",
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/drivers/gpu/drm/xe/
Dxe_rtp.h1 /* SPDX-License-Identifier: MIT */
28 * Macros to encode rules to match against platform, IP version, stepping, etc.
29 * Shouldn't be used directly - see XE_RTP_RULES()
51 * XE_RTP_RULE_PLATFORM - Create rule matching platform
60 * XE_RTP_RULE_SUBPLATFORM - Create rule matching platform and sub-platform
62 * @sub_: sub-platform to match
70 * XE_RTP_RULE_GRAPHICS_STEP - Create rule matching graphics stepping
83 * XE_RTP_RULE_MEDIA_STEP - Create rule matching media stepping
96 * XE_RTP_RULE_ENGINE_CLASS - Create rule matching an engine class
105 * XE_RTP_RULE_FUNC - Create rule using callback function for match
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DMakefile1 # SPDX-License-Identifier: GPL-2.0
7 subdir-ccflags-y += $(call cc-option, -Wformat-truncation)
9 # Enable -Werror in CI and development
10 subdir-ccflags-$(CONFIG_DRM_XE_WERROR) += -Werror
12 subdir-ccflags-y += -I$(obj) -I$(src)
19 cmd_wa_oob = mkdir -p $(@D); $^ $(generated_oob)
21 $(src)/xe_wa_oob.rules
28 xe-y += xe_bb.o \
116 xe-$(CONFIG_HMM_MIRROR) += xe_hmm.o
119 xe-$(CONFIG_HWMON) += xe_hwmon.o
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/drivers/net/ethernet/microchip/vcap/
Dvcap_api_kunit.c1 // SPDX-License-Identifier: BSD-3-Clause
3 * Microchip VCAP API kunit test suite
6 #include <kunit/test.h>
11 /* First we have the test infrastructure that emulates the platform
39 if (kslist->cnt > 0) { in test_val_keyset()
40 switch (admin->vtype) { in test_val_keyset()
42 for (idx = 0; idx < kslist->cnt; idx++) { in test_val_keyset()
43 if (kslist->keysets[idx] == VCAP_KFS_ETAG) in test_val_keyset()
44 return kslist->keysets[idx]; in test_val_keyset()
45 if (kslist->keysets[idx] == VCAP_KFS_PURE_5TUPLE_IP4) in test_val_keyset()
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DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
9 bool "VCAP (Versatile Content-Aware Processor) library"
13 A VCAP is essentially a TCAM with rules consisting of
15 - Programmable key fields
16 - Programmable action fields
17 - A counter (which may be only one bit wide)
21 - A number of lookups
22 - A keyset configuration per port per lookup
24 The VCAP implementation provides switchcore independent handling of rules
27 - Creating and deleting rules
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Dvcap_api_debugfs_kunit.c1 // SPDX-License-Identifier: BSD-3-Clause
3 * Microchip VCAP API kunit test suite
6 #include <kunit/test.h>
12 /* First we have the test infrastructure that emulates the platform
43 if (kslist->cnt > 0) { in test_val_keyset()
44 switch (admin->vtype) { in test_val_keyset()
46 for (idx = 0; idx < kslist->cnt; idx++) { in test_val_keyset()
47 if (kslist->keysets[idx] == VCAP_KFS_ETAG) in test_val_keyset()
48 return kslist->keysets[idx]; in test_val_keyset()
49 if (kslist->keysets[idx] == in test_val_keyset()
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/drivers/hid/bpf/progs/
DREADME1 # HID-BPF programs
9 They should be loaded in the kernel by `udev-hid-bpf`:
11 https://gitlab.freedesktop.org/libevdev/udev-hid-bpf
14 "upstream" them, but also this way we can test them thanks to the HID
17 Once a .bpf.c file is accepted here, it is duplicated in `udev-hid-bpf`
20 land in distributions when they update `udev-hid-bpf`
30 Just run `sudo udev-hid-bpf install ./my-awesome-fix.bpf.o`
34 - copy the `.bpf.o` you want in `/etc/udev-hid-bpf/`
35 - create a new udev rule to automatically load it
37 The following should do the trick (assuming udev-hid-bpf is available in
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/drivers/net/phy/qcom/
Dqca808x.c1 // SPDX-License-Identifier: GPL-2.0+
70 #define QCA808X_MMD7_LED_CTRL(x) (0x8078 - ((x) * 2))
73 #define QCA808X_MMD7_LED_FORCE_CTRL(x) (0x8079 - ((x) * 2))
150 return (phydev->master_slave_get == MASTER_SLAVE_CFG_MASTER_FORCE) || in qca808x_is_prefer_master()
151 (phydev->master_slave_get == MASTER_SLAVE_CFG_MASTER_PREFERRED); in qca808x_is_prefer_master()
156 return linkmode_test_bit(ETHTOOL_LINK_MODE_2500baseT_Full_BIT, phydev->supported); in qca808x_has_fast_retrain_or_slave_seed()
172 unsigned long *possible = phydev->possible_interfaces; in qca808x_fill_possible_interfaces()
182 struct device *dev = &phydev->mdio.dev; in qca808x_probe()
187 return -ENOMEM; in qca808x_probe()
189 /* Init LED polarity mode to -1 */ in qca808x_probe()
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Dqca807x.c1 // SPDX-License-Identifier: GPL-2.0-or-later
40 * - With both FULL amplitude and FULL bias current: bias current
42 * - With only DSP amplitude: bias current is set to half and
44 * - With DSP bias current (included both DSP amplitude and
134 static int qca807x_led_parse_netdev(struct phy_device *phydev, unsigned long rules, in qca807x_led_parse_netdev() argument
138 switch (phydev->port) { in qca807x_led_parse_netdev()
140 if (test_bit(TRIGGER_NETDEV_TX, &rules)) in qca807x_led_parse_netdev()
142 if (test_bit(TRIGGER_NETDEV_RX, &rules)) in qca807x_led_parse_netdev()
144 if (test_bit(TRIGGER_NETDEV_LINK_10, &rules)) in qca807x_led_parse_netdev()
146 if (test_bit(TRIGGER_NETDEV_LINK_100, &rules)) in qca807x_led_parse_netdev()
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/drivers/gpu/drm/msm/dp/
Ddp_link.h1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * Copyright (c) 2012-2020, The Linux Foundation. All rights reserved.
74 * mdss_dp_test_bit_depth_to_bpp() - convert test bit depth to bpp
75 * @tbd: test bit depth
84 * Few simplistic rules and assumptions made here: in dp_link_bit_depth_to_bpp()
113 * dp_link_get() - get the functionalities of dp test module
/drivers/net/ethernet/sfc/siena/
Dmcdi_pcol.h1 /* SPDX-License-Identifier: GPL-2.0-only */
4 * Copyright 2009-2018 Solarflare Communications Inc.
5 * Copyright 2019-2020 Xilinx Inc.
13 /* Power-on reset state */
35 /* The 'doorbell' addresses are hard-wired to alert the MC when written */
38 /* The rest of these are firmware-defined */
46 /* Values to be written to the per-port status dword in shared
71 * | | \--- Response
72 * | \------- Error
73 * \------------------------------ Resync (always set)
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/drivers/net/ethernet/sfc/
Dmcdi_pcol.h1 /* SPDX-License-Identifier: GPL-2.0-only */
4 * Copyright 2009-2018 Solarflare Communications Inc.
5 * Copyright 2019-2020 Xilinx Inc.
13 /* Power-on reset state */
35 /* The 'doorbell' addresses are hard-wired to alert the MC when written */
38 /* The rest of these are firmware-defined */
46 /* Values to be written to the per-port status dword in shared
71 * | | \--- Response
72 * | \------- Error
73 * \------------------------------ Resync (always set)
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/drivers/ata/
Dpata_artop.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * pata_artop.c - ARTOP ATA controller driver
9 * Copyright (C) 1999-2002 Andre Hedrick <andre@linux-ide.org>
11 * driver by Thibaut VARENE <varenet@parisc-linux.org>
37 * test stuff.
43 * artop62x0_pre_reset - probe begin
57 struct ata_port *ap = link->ap; in artop62x0_pre_reset()
58 struct pci_dev *pdev = to_pci_dev(ap->host->dev); in artop62x0_pre_reset()
61 if ((pdev->device & 1) && in artop62x0_pre_reset()
62 !pci_test_config_bits(pdev, &artop_enable_bits[ap->port_no])) in artop62x0_pre_reset()
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Dpata_sl82c105.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * pata_sl82c105.c - SL82C105 PATA for new ATA layer
45 * sl82c105_pre_reset - probe begin
58 struct ata_port *ap = link->ap; in sl82c105_pre_reset()
59 struct pci_dev *pdev = to_pci_dev(ap->host->dev); in sl82c105_pre_reset()
61 if (ap->port_no && !pci_test_config_bits(pdev, &sl82c105_enable_bits[ap->port_no])) in sl82c105_pre_reset()
62 return -ENOENT; in sl82c105_pre_reset()
68 * sl82c105_configure_piomode - set chip PIO timing
80 struct pci_dev *pdev = to_pci_dev(ap->host->dev); in sl82c105_configure_piomode()
85 int timing = 0x44 + (8 * ap->port_no) + (4 * adev->devno); in sl82c105_configure_piomode()
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/drivers/net/phy/
Drealtek.c1 // SPDX-License-Identifier: GPL-2.0+
76 /* RTL822X_VND2_XXXXX registers are only accessible when phydev->is_c45
77 * is set, they cannot be accessed by C45-over-C22.
125 struct device *dev = &phydev->mdio.dev; in rtl821x_probe()
127 u32 phy_id = phydev->drv->phy_id; in rtl821x_probe()
132 return -ENOMEM; in rtl821x_probe()
134 priv->clk = devm_clk_get_optional_enabled(dev, NULL); in rtl821x_probe()
135 if (IS_ERR(priv->clk)) in rtl821x_probe()
136 return dev_err_probe(dev, PTR_ERR(priv->clk), in rtl821x_probe()
143 priv->phycr1 = ret & (RTL8211F_ALDPS_PLL_OFF | RTL8211F_ALDPS_ENABLE | RTL8211F_ALDPS_XTAL_OFF); in rtl821x_probe()
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Dmarvell.c1 // SPDX-License-Identifier: GPL-2.0+
188 /* RGMII to 1000BASE-X */
190 /* RGMII to 100BASE-FX */
390 if (phydev->interrupts == PHY_INTERRUPT_ENABLED) { in marvell_config_intr()
454 err = marvell_set_polarity(phydev, phydev->mdix_ctrl); in marvell_config_aneg()
469 if (phydev->autoneg != AUTONEG_ENABLE || changed) { in marvell_config_aneg()
519 * marvell,reg-init property stored in the of_node for the phydev.
521 * marvell,reg-init = <reg-page reg mask value>,...;
523 * There may be one or more sets of <reg-page reg mask value>:
525 * reg-page: which register bank to use.
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Dmediatek-ge-soc.c1 // SPDX-License-Identifier: GPL-2.0+
6 #include <linux/nvmem-consumer.h>
421 switch (phydev->drv->phy_id) { in tx_amp_fill_result()
500 if (phydev->drv->phy_id == MTK_GPHY_ID_MT7988) in tx_r50_fill_result()
501 bias = -1; in tx_r50_fill_result()
519 return -EINVAL; in tx_r50_fill_result()
546 return -EINVAL; in tx_r50_cal_efuse()
612 ret = -EINVAL; in tx_vcm_cal_sw()
619 phydev_dbg(phydev, "Start TX-VCM SW cal.\n"); in tx_vcm_cal_sw()
620 while ((upper_idx - lower_idx) > 1) { in tx_vcm_cal_sw()
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/drivers/net/arcnet/
Darcdevice.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
38 * necessary transmits - don't set this too high.
54 #define D_EXTRA 2 /* useful, but non-vital information */
58 #define D_PROTO 64 /* debug auto-protocol support */
108 name, bytes, _y - _x, \
109 100000000 / 1024 * bytes / (_y - _x + 1)); \
116 * Time needed to reset the card - in ms (milliseconds). This works on my
128 * In non-RFC1201 protocols, we have to just tack some extra bytes on the
139 #define TESTflag 0x08 /* test flag */
141 #define RESETflag 0x10 /* power-on-reset */
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/drivers/net/ethernet/intel/ixgbevf/
Dethtool.c1 // SPDX-License-Identifier: GPL-2.0
2 /* Copyright(c) 1999 - 2018 Intel Corporation. */
61 (((struct ixgbevf_adapter *)netdev_priv(netdev))->num_tx_queues + \
62 ((struct ixgbevf_adapter *)netdev_priv(netdev))->num_xdp_queues + \
63 ((struct ixgbevf_adapter *)netdev_priv(netdev))->num_rx_queues) * \
69 "Register test (offline)",
70 "Link test (on/offline)"
77 "legacy-rx",
89 cmd->base.autoneg = AUTONEG_DISABLE; in ixgbevf_get_link_ksettings()
90 cmd->base.port = -1; in ixgbevf_get_link_ksettings()
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/drivers/dma-buf/
Ddma-fence.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Fence mechanism for dma-buf and to allow for asynchronous dma access
16 #include <linux/dma-fence.h>
50 * Since the purposes of fences is to facilitate cross-device and
51 * cross-application synchronization, there's multiple ways to use one:
53 * - Individual fences can be exposed as a &sync_file, accessed as a file
58 * - Some subsystems also have their own explicit fencing primitives, like
62 * - Then there's also implicit fencing, where the synchronization points are
69 * DOC: fence cross-driver contract
72 * same rules:
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/drivers/net/ethernet/intel/ixgbe/
Dixgbe_dcb.c1 // SPDX-License-Identifier: GPL-2.0
2 /* Copyright(c) 1999 - 2018 Intel Corporation. */
11 * ixgbe_ieee_credits - This calculates the ieee traffic class
28 min_credit = ((max_frame / 2) + DCB_CREDIT_QUANTUM - 1) / in ixgbe_ieee_credits()
52 * ixgbe_dcb_calculate_tc_credits - Calculates traffic class credits
59 * It should be called only after the rules are checked by
80 min_credit = ((max_frame / 2) + DCB_CREDIT_QUANTUM - 1) / in ixgbe_dcb_calculate_tc_credits()
85 p = &dcb_config->tc_config[i].path[direction]; in ixgbe_dcb_calculate_tc_credits()
86 bw_percent = dcb_config->bw_percentage[direction][p->bwg_id]; in ixgbe_dcb_calculate_tc_credits()
87 link_percentage = p->bwg_percent; in ixgbe_dcb_calculate_tc_credits()
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/drivers/net/ethernet/intel/i40e/
Di40e_ethtool.c1 // SPDX-License-Identifier: GPL-2.0
2 /* Copyright(c) 2013 - 2018 Intel Corporation. */
14 * struct i40e_stats - definition for an ethtool statistic
15 * @stat_string: statistic name to display in ethtool -S output
63 I40E_QUEUE_STAT("%s-%u.packets", stats.packets),
64 I40E_QUEUE_STAT("%s-%u.bytes", stats.bytes),
68 * i40e_add_one_ethtool_stat - copy the stat into the supplied buffer
91 p = (char *)pointer + stat->stat_offset; in i40e_add_one_ethtool_stat()
92 switch (stat->sizeof_stat) { in i40e_add_one_ethtool_stat()
107 stat->stat_string); in i40e_add_one_ethtool_stat()
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