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Searched refs:block_offset (Results 1 – 22 of 22) sorted by relevance

/drivers/gpu/drm/radeon/
Ddce6_afmt.c35 u32 block_offset, u32 reg) in dce6_endpoint_rreg() argument
41 WREG32(AZ_F0_CODEC_ENDPOINT_INDEX + block_offset, reg); in dce6_endpoint_rreg()
42 r = RREG32(AZ_F0_CODEC_ENDPOINT_DATA + block_offset); in dce6_endpoint_rreg()
49 u32 block_offset, u32 reg, u32 v) in dce6_endpoint_wreg() argument
55 WREG32(AZ_F0_CODEC_ENDPOINT_INDEX + block_offset, reg); in dce6_endpoint_wreg()
57 WREG32(AZ_F0_CODEC_ENDPOINT_INDEX + block_offset, in dce6_endpoint_wreg()
59 WREG32(AZ_F0_CODEC_ENDPOINT_DATA + block_offset, v); in dce6_endpoint_wreg()
/drivers/phy/cadence/
Dphy-cadence-sierra.c66 #define SIERRA_LANE_CDB_OFFSET(ln, block_offset, reg_offset) \ argument
67 ((0x4000 << (block_offset)) + \
205 #define SIERRA_PHY_PCS_COMMON_OFFSET(block_offset) \ argument
206 (0xc000 << (block_offset))
211 #define SIERRA_PHY_PCS_LANE_CDB_OFFSET(ln, block_offset, reg_offset) \ argument
212 ((0xD000 << (block_offset)) + \
218 #define SIERRA_PHY_PMA_COMMON_OFFSET(block_offset) \ argument
219 (0xE000 << (block_offset))
223 #define SIERRA_PHY_PMA_LANE_CDB_OFFSET(ln, block_offset, reg_offset) \ argument
224 ((0xF000 << (block_offset)) + \
[all …]
Dphy-cadence-torrent.c41 #define TORRENT_TX_LANE_CDB_OFFSET(ln, block_offset, reg_offset) \ argument
42 ((0x4000 << (block_offset)) + \
45 #define TORRENT_RX_LANE_CDB_OFFSET(ln, block_offset, reg_offset) \ argument
46 ((0x8000 << (block_offset)) + \
49 #define TORRENT_PHY_PCS_COMMON_OFFSET(block_offset) \ argument
50 (0xC000 << (block_offset))
52 #define TORRENT_PHY_PCS_LANE_CDB_OFFSET(ln, block_offset, reg_offset) \ argument
53 ((0xD000 << (block_offset)) + \
56 #define TORRENT_PHY_PMA_COMMON_OFFSET(block_offset) \ argument
57 (0xE000 << (block_offset))
[all …]
/drivers/md/
Ddm-verity-fec.c131 unsigned int block_offset, int neras) in fec_decode_bufs() argument
139 par = fec_read_parity(v, rsb, block_offset, &offset, in fec_decode_bufs()
158 fio->output[block_offset] = block[byte_index]; in fec_decode_bufs()
160 block_offset++; in fec_decode_bufs()
161 if (block_offset >= 1 << v->data_dev_block_bits) in fec_decode_bufs()
177 par = fec_read_parity(v, rsb, block_offset, &offset, in fec_decode_bufs()
216 u64 rsb, u64 target, unsigned int block_offset, in fec_read_bufs() argument
303 k = fec_buffer_rs_index(n, j) + block_offset; in fec_read_bufs()
/drivers/soundwire/
Dgeneric_bandwidth_allocation.c42 port_bo = t_data->block_offset; in sdw_compute_slave_ports()
78 port_bo = t_data->block_offset; in sdw_compute_slave_ports()
129 t_data.block_offset = *port_bo; in sdw_compute_master_ports()
Dbus.h150 int block_offset; member
Damd_manager.c421 t_data.block_offset = port_bo; in amd_sdw_compute_params()
/drivers/accel/habanalabs/common/
Dsecurity.c226 const u32 pb_blocks[], u32 block_offset, int array_size) in hl_ack_pb_security_violations() argument
232 block_base = pb_blocks[i] + block_offset; in hl_ack_pb_security_violations()
254 struct hl_block_glbl_sec sgs_array[], u32 block_offset, in hl_config_glbl_sec() argument
264 sgs_base = block_offset + pb_blocks[i] + in hl_config_glbl_sec()
Dhabanalabs.h4198 struct hl_block_glbl_sec sgs_array[], u32 block_offset,
/drivers/md/dm-vdo/indexer/
Dio-factory.h37 int __must_check uds_make_bufio(struct io_factory *factory, off_t block_offset,
Dio-factory.c97 int uds_make_bufio(struct io_factory *factory, off_t block_offset, size_t block_size, in uds_make_bufio() argument
107 dm_bufio_set_sector_offset(client, block_offset * SECTORS_PER_BLOCK); in uds_make_bufio()
/drivers/net/ethernet/mellanox/mlx5/core/lib/
Dhv_vhca.c340 int block_offset = 0; in mlx5_hv_vhca_agent_write() local
350 len, &block_offset); in mlx5_hv_vhca_agent_write()
/drivers/input/rmi4/
Drmi_f34.h134 __le16 block_offset; member
/drivers/media/platform/rockchip/rkisp1/
Drkisp1-params.c2127 size_t block_offset = 0; in rkisp1_ext_params_config() local
2133 while (block_offset < cfg->data_size) { in rkisp1_ext_params_config()
2138 &cfg->data[block_offset]; in rkisp1_ext_params_config()
2139 block_offset += block->header.size; in rkisp1_ext_params_config()
2561 size_t block_offset = 0; in rkisp1_params_prepare_ext_params() local
2612 &cfg->data[block_offset]; in rkisp1_params_prepare_ext_params()
2642 block_offset += block->size; in rkisp1_params_prepare_ext_params()
/drivers/dma/
Dfsl-qdma.c137 (((fsl_qdma_engine)->block_offset) * (x))
228 int block_offset; member
1176 fsl_qdma->block_offset = blk_off; in fsl_qdma_probe()
/drivers/gpu/drm/amd/amdgpu/
Ddce_v6_0.c129 u32 block_offset, u32 reg) in dce_v6_0_audio_endpt_rreg() argument
135 WREG32(mmAZALIA_F0_CODEC_ENDPOINT_INDEX + block_offset, reg); in dce_v6_0_audio_endpt_rreg()
136 r = RREG32(mmAZALIA_F0_CODEC_ENDPOINT_DATA + block_offset); in dce_v6_0_audio_endpt_rreg()
143 u32 block_offset, u32 reg, u32 v) in dce_v6_0_audio_endpt_wreg() argument
148 WREG32(mmAZALIA_F0_CODEC_ENDPOINT_INDEX + block_offset, in dce_v6_0_audio_endpt_wreg()
150 WREG32(mmAZALIA_F0_CODEC_ENDPOINT_DATA + block_offset, v); in dce_v6_0_audio_endpt_wreg()
Ddce_v8_0.c124 u32 block_offset, u32 reg) in dce_v8_0_audio_endpt_rreg() argument
130 WREG32(mmAZALIA_F0_CODEC_ENDPOINT_INDEX + block_offset, reg); in dce_v8_0_audio_endpt_rreg()
131 r = RREG32(mmAZALIA_F0_CODEC_ENDPOINT_DATA + block_offset); in dce_v8_0_audio_endpt_rreg()
138 u32 block_offset, u32 reg, u32 v) in dce_v8_0_audio_endpt_wreg() argument
143 WREG32(mmAZALIA_F0_CODEC_ENDPOINT_INDEX + block_offset, reg); in dce_v8_0_audio_endpt_wreg()
144 WREG32(mmAZALIA_F0_CODEC_ENDPOINT_DATA + block_offset, v); in dce_v8_0_audio_endpt_wreg()
Ddce_v10_0.c173 u32 block_offset, u32 reg) in dce_v10_0_audio_endpt_rreg() argument
179 WREG32(mmAZALIA_F0_CODEC_ENDPOINT_INDEX + block_offset, reg); in dce_v10_0_audio_endpt_rreg()
180 r = RREG32(mmAZALIA_F0_CODEC_ENDPOINT_DATA + block_offset); in dce_v10_0_audio_endpt_rreg()
187 u32 block_offset, u32 reg, u32 v) in dce_v10_0_audio_endpt_wreg() argument
192 WREG32(mmAZALIA_F0_CODEC_ENDPOINT_INDEX + block_offset, reg); in dce_v10_0_audio_endpt_wreg()
193 WREG32(mmAZALIA_F0_CODEC_ENDPOINT_DATA + block_offset, v); in dce_v10_0_audio_endpt_wreg()
Ddce_v11_0.c197 u32 block_offset, u32 reg) in dce_v11_0_audio_endpt_rreg() argument
203 WREG32(mmAZALIA_F0_CODEC_ENDPOINT_INDEX + block_offset, reg); in dce_v11_0_audio_endpt_rreg()
204 r = RREG32(mmAZALIA_F0_CODEC_ENDPOINT_DATA + block_offset); in dce_v11_0_audio_endpt_rreg()
211 u32 block_offset, u32 reg, u32 v) in dce_v11_0_audio_endpt_wreg() argument
216 WREG32(mmAZALIA_F0_CODEC_ENDPOINT_INDEX + block_offset, reg); in dce_v11_0_audio_endpt_wreg()
217 WREG32(mmAZALIA_F0_CODEC_ENDPOINT_DATA + block_offset, v); in dce_v11_0_audio_endpt_wreg()
/drivers/md/dm-vdo/
Dslab-depot.c1187 size_t block_offset; in write_reference_block() local
1195 block_offset = (block - block->slab->reference_blocks); in write_reference_block()
1196 pbn = (block->slab->ref_counts_origin + block_offset); in write_reference_block()
2275 size_t block_offset = (block - block->slab->reference_blocks); in load_reference_block() local
2278 vdo_submit_metadata_vio(vio, block->slab->ref_counts_origin + block_offset, in load_reference_block()
/drivers/infiniband/core/
Dverbs.c3111 unsigned int block_offset; in __rdma_block_iter_next() local
3118 block_offset = biter->__dma_addr & (BIT_ULL(biter->__pg_bit) - 1); in __rdma_block_iter_next()
3119 delta = BIT_ULL(biter->__pg_bit) - block_offset; in __rdma_block_iter_next()
/drivers/net/ethernet/intel/i40e/
Di40e_main.c10842 u16 block_offset = 0xffff; in i40e_get_oem_version() local
10857 i40e_read_nvm_word(hw, I40E_SR_NVM_OEM_VERSION_PTR, &block_offset); in i40e_get_oem_version()
10858 if (block_offset == 0xffff) in i40e_get_oem_version()
10862 i40e_read_nvm_word(hw, block_offset + I40E_NVM_OEM_LENGTH_OFFSET, in i40e_get_oem_version()
10868 i40e_read_nvm_word(hw, block_offset + I40E_NVM_OEM_CAPABILITIES_OFFSET, in i40e_get_oem_version()
10873 i40e_read_nvm_word(hw, block_offset + I40E_NVM_OEM_GEN_OFFSET, in i40e_get_oem_version()
10875 i40e_read_nvm_word(hw, block_offset + I40E_NVM_OEM_RELEASE_OFFSET, in i40e_get_oem_version()