• Home
  • Line#
  • Scopes#
  • Navigate#
  • Raw
  • Download
1 // SPDX-License-Identifier: GPL-2.0-only
2 /*
3  *  linux/arch/arm/kernel/smp.c
4  *
5  *  Copyright (C) 2002 ARM Limited, All Rights Reserved.
6  */
7 #include <linux/module.h>
8 #include <linux/delay.h>
9 #include <linux/init.h>
10 #include <linux/spinlock.h>
11 #include <linux/sched/mm.h>
12 #include <linux/sched/hotplug.h>
13 #include <linux/sched/task_stack.h>
14 #include <linux/interrupt.h>
15 #include <linux/cache.h>
16 #include <linux/profile.h>
17 #include <linux/errno.h>
18 #include <linux/mm.h>
19 #include <linux/err.h>
20 #include <linux/cpu.h>
21 #include <linux/seq_file.h>
22 #include <linux/irq.h>
23 #include <linux/nmi.h>
24 #include <linux/percpu.h>
25 #include <linux/clockchips.h>
26 #include <linux/completion.h>
27 #include <linux/cpufreq.h>
28 #include <linux/irq_work.h>
29 #include <linux/kernel_stat.h>
30 
31 #include <linux/atomic.h>
32 #include <asm/bugs.h>
33 #include <asm/smp.h>
34 #include <asm/cacheflush.h>
35 #include <asm/cpu.h>
36 #include <asm/cputype.h>
37 #include <asm/exception.h>
38 #include <asm/idmap.h>
39 #include <asm/topology.h>
40 #include <asm/mmu_context.h>
41 #include <asm/procinfo.h>
42 #include <asm/processor.h>
43 #include <asm/sections.h>
44 #include <asm/tlbflush.h>
45 #include <asm/ptrace.h>
46 #include <asm/smp_plat.h>
47 #include <asm/virt.h>
48 #include <asm/mach/arch.h>
49 #include <asm/mpu.h>
50 
51 #include <trace/events/ipi.h>
52 
53 EXPORT_TRACEPOINT_SYMBOL_GPL(ipi_raise);
54 EXPORT_TRACEPOINT_SYMBOL_GPL(ipi_entry);
55 EXPORT_TRACEPOINT_SYMBOL_GPL(ipi_exit);
56 
57 /*
58  * as from 2.5, kernels no longer have an init_tasks structure
59  * so we need some other way of telling a new secondary core
60  * where to place its SVC stack
61  */
62 struct secondary_data secondary_data;
63 
64 enum ipi_msg_type {
65 	IPI_WAKEUP,
66 	IPI_TIMER,
67 	IPI_RESCHEDULE,
68 	IPI_CALL_FUNC,
69 	IPI_CPU_STOP,
70 	IPI_IRQ_WORK,
71 	IPI_COMPLETION,
72 	NR_IPI,
73 	/*
74 	 * CPU_BACKTRACE is special and not included in NR_IPI
75 	 * or tracable with trace_ipi_*
76 	 */
77 	IPI_CPU_BACKTRACE = NR_IPI,
78 	/*
79 	 * SGI8-15 can be reserved by secure firmware, and thus may
80 	 * not be usable by the kernel. Please keep the above limited
81 	 * to at most 8 entries.
82 	 */
83 	MAX_IPI
84 };
85 
86 static int ipi_irq_base __read_mostly;
87 static int nr_ipi __read_mostly = NR_IPI;
88 static struct irq_desc *ipi_desc[MAX_IPI] __read_mostly;
89 
90 static void ipi_setup(int cpu);
91 
92 static DECLARE_COMPLETION(cpu_running);
93 
94 static struct smp_operations smp_ops __ro_after_init;
95 
smp_set_ops(const struct smp_operations * ops)96 void __init smp_set_ops(const struct smp_operations *ops)
97 {
98 	if (ops)
99 		smp_ops = *ops;
100 };
101 
get_arch_pgd(pgd_t * pgd)102 static unsigned long get_arch_pgd(pgd_t *pgd)
103 {
104 #ifdef CONFIG_ARM_LPAE
105 	return __phys_to_pfn(virt_to_phys(pgd));
106 #else
107 	return virt_to_phys(pgd);
108 #endif
109 }
110 
111 #if defined(CONFIG_BIG_LITTLE) && defined(CONFIG_HARDEN_BRANCH_PREDICTOR)
secondary_biglittle_prepare(unsigned int cpu)112 static int secondary_biglittle_prepare(unsigned int cpu)
113 {
114 	if (!cpu_vtable[cpu])
115 		cpu_vtable[cpu] = kzalloc(sizeof(*cpu_vtable[cpu]), GFP_KERNEL);
116 
117 	return cpu_vtable[cpu] ? 0 : -ENOMEM;
118 }
119 
secondary_biglittle_init(void)120 static void secondary_biglittle_init(void)
121 {
122 	init_proc_vtable(lookup_processor(read_cpuid_id())->proc);
123 }
124 #else
secondary_biglittle_prepare(unsigned int cpu)125 static int secondary_biglittle_prepare(unsigned int cpu)
126 {
127 	return 0;
128 }
129 
secondary_biglittle_init(void)130 static void secondary_biglittle_init(void)
131 {
132 }
133 #endif
134 
__cpu_up(unsigned int cpu,struct task_struct * idle)135 int __cpu_up(unsigned int cpu, struct task_struct *idle)
136 {
137 	int ret;
138 
139 	if (!smp_ops.smp_boot_secondary)
140 		return -ENOSYS;
141 
142 	ret = secondary_biglittle_prepare(cpu);
143 	if (ret)
144 		return ret;
145 
146 	/*
147 	 * We need to tell the secondary core where to find
148 	 * its stack and the page tables.
149 	 */
150 	secondary_data.stack = task_stack_page(idle) + THREAD_START_SP;
151 #ifdef CONFIG_ARM_MPU
152 	secondary_data.mpu_rgn_info = &mpu_rgn_info;
153 #endif
154 
155 #ifdef CONFIG_MMU
156 	secondary_data.pgdir = virt_to_phys(idmap_pgd);
157 	secondary_data.swapper_pg_dir = get_arch_pgd(swapper_pg_dir);
158 #endif
159 	secondary_data.task = idle;
160 	sync_cache_w(&secondary_data);
161 
162 	/*
163 	 * Now bring the CPU into our world.
164 	 */
165 	ret = smp_ops.smp_boot_secondary(cpu, idle);
166 	if (ret == 0) {
167 		/*
168 		 * CPU was successfully started, wait for it
169 		 * to come online or time out.
170 		 */
171 		wait_for_completion_timeout(&cpu_running,
172 						 msecs_to_jiffies(1000));
173 
174 		if (!cpu_online(cpu)) {
175 			pr_crit("CPU%u: failed to come online\n", cpu);
176 			ret = -EIO;
177 		}
178 	} else {
179 		pr_err("CPU%u: failed to boot: %d\n", cpu, ret);
180 	}
181 
182 
183 	memset(&secondary_data, 0, sizeof(secondary_data));
184 	return ret;
185 }
186 
187 /* platform specific SMP operations */
smp_init_cpus(void)188 void __init smp_init_cpus(void)
189 {
190 	if (smp_ops.smp_init_cpus)
191 		smp_ops.smp_init_cpus();
192 }
193 
platform_can_secondary_boot(void)194 int platform_can_secondary_boot(void)
195 {
196 	return !!smp_ops.smp_boot_secondary;
197 }
198 
platform_can_cpu_hotplug(void)199 int platform_can_cpu_hotplug(void)
200 {
201 #ifdef CONFIG_HOTPLUG_CPU
202 	if (smp_ops.cpu_kill)
203 		return 1;
204 #endif
205 
206 	return 0;
207 }
208 
209 #ifdef CONFIG_HOTPLUG_CPU
platform_cpu_kill(unsigned int cpu)210 static int platform_cpu_kill(unsigned int cpu)
211 {
212 	if (smp_ops.cpu_kill)
213 		return smp_ops.cpu_kill(cpu);
214 	return 1;
215 }
216 
platform_cpu_disable(unsigned int cpu)217 static int platform_cpu_disable(unsigned int cpu)
218 {
219 	if (smp_ops.cpu_disable)
220 		return smp_ops.cpu_disable(cpu);
221 
222 	return 0;
223 }
224 
platform_can_hotplug_cpu(unsigned int cpu)225 int platform_can_hotplug_cpu(unsigned int cpu)
226 {
227 	/* cpu_die must be specified to support hotplug */
228 	if (!smp_ops.cpu_die)
229 		return 0;
230 
231 	if (smp_ops.cpu_can_disable)
232 		return smp_ops.cpu_can_disable(cpu);
233 
234 	/*
235 	 * By default, allow disabling all CPUs except the first one,
236 	 * since this is special on a lot of platforms, e.g. because
237 	 * of clock tick interrupts.
238 	 */
239 	return cpu != 0;
240 }
241 
ipi_teardown(int cpu)242 static void ipi_teardown(int cpu)
243 {
244 	int i;
245 
246 	if (WARN_ON_ONCE(!ipi_irq_base))
247 		return;
248 
249 	for (i = 0; i < nr_ipi; i++)
250 		disable_percpu_irq(ipi_irq_base + i);
251 }
252 
253 /*
254  * __cpu_disable runs on the processor to be shutdown.
255  */
__cpu_disable(void)256 int __cpu_disable(void)
257 {
258 	unsigned int cpu = smp_processor_id();
259 	int ret;
260 
261 	ret = platform_cpu_disable(cpu);
262 	if (ret)
263 		return ret;
264 
265 #ifdef CONFIG_GENERIC_ARCH_TOPOLOGY
266 	remove_cpu_topology(cpu);
267 #endif
268 
269 	/*
270 	 * Take this CPU offline.  Once we clear this, we can't return,
271 	 * and we must not schedule until we're ready to give up the cpu.
272 	 */
273 	set_cpu_online(cpu, false);
274 	ipi_teardown(cpu);
275 
276 	/*
277 	 * OK - migrate IRQs away from this CPU
278 	 */
279 	irq_migrate_all_off_this_cpu();
280 
281 	/*
282 	 * Flush user cache and TLB mappings, and then remove this CPU
283 	 * from the vm mask set of all processes.
284 	 *
285 	 * Caches are flushed to the Level of Unification Inner Shareable
286 	 * to write-back dirty lines to unified caches shared by all CPUs.
287 	 */
288 	flush_cache_louis();
289 	local_flush_tlb_all();
290 
291 	return 0;
292 }
293 
294 /*
295  * called on the thread which is asking for a CPU to be shutdown after the
296  * shutdown completed.
297  */
arch_cpuhp_cleanup_dead_cpu(unsigned int cpu)298 void arch_cpuhp_cleanup_dead_cpu(unsigned int cpu)
299 {
300 	pr_debug("CPU%u: shutdown\n", cpu);
301 
302 	clear_tasks_mm_cpumask(cpu);
303 	/*
304 	 * platform_cpu_kill() is generally expected to do the powering off
305 	 * and/or cutting of clocks to the dying CPU.  Optionally, this may
306 	 * be done by the CPU which is dying in preference to supporting
307 	 * this call, but that means there is _no_ synchronisation between
308 	 * the requesting CPU and the dying CPU actually losing power.
309 	 */
310 	if (!platform_cpu_kill(cpu))
311 		pr_err("CPU%u: unable to kill\n", cpu);
312 }
313 
314 /*
315  * Called from the idle thread for the CPU which has been shutdown.
316  *
317  * Note that we disable IRQs here, but do not re-enable them
318  * before returning to the caller. This is also the behaviour
319  * of the other hotplug-cpu capable cores, so presumably coming
320  * out of idle fixes this.
321  */
arch_cpu_idle_dead(void)322 void __noreturn arch_cpu_idle_dead(void)
323 {
324 	unsigned int cpu = smp_processor_id();
325 
326 	idle_task_exit();
327 
328 	local_irq_disable();
329 
330 	/*
331 	 * Flush the data out of the L1 cache for this CPU.  This must be
332 	 * before the completion to ensure that data is safely written out
333 	 * before platform_cpu_kill() gets called - which may disable
334 	 * *this* CPU and power down its cache.
335 	 */
336 	flush_cache_louis();
337 
338 	/*
339 	 * Tell cpuhp_bp_sync_dead() that this CPU is now safe to dispose
340 	 * of. Once this returns, power and/or clocks can be removed at
341 	 * any point from this CPU and its cache by platform_cpu_kill().
342 	 */
343 	cpuhp_ap_report_dead();
344 
345 	/*
346 	 * Ensure that the cache lines associated with that completion are
347 	 * written out.  This covers the case where _this_ CPU is doing the
348 	 * powering down, to ensure that the completion is visible to the
349 	 * CPU waiting for this one.
350 	 */
351 	flush_cache_louis();
352 
353 	/*
354 	 * The actual CPU shutdown procedure is at least platform (if not
355 	 * CPU) specific.  This may remove power, or it may simply spin.
356 	 *
357 	 * Platforms are generally expected *NOT* to return from this call,
358 	 * although there are some which do because they have no way to
359 	 * power down the CPU.  These platforms are the _only_ reason we
360 	 * have a return path which uses the fragment of assembly below.
361 	 *
362 	 * The return path should not be used for platforms which can
363 	 * power off the CPU.
364 	 */
365 	if (smp_ops.cpu_die)
366 		smp_ops.cpu_die(cpu);
367 
368 	pr_warn("CPU%u: smp_ops.cpu_die() returned, trying to resuscitate\n",
369 		cpu);
370 
371 	/*
372 	 * Do not return to the idle loop - jump back to the secondary
373 	 * cpu initialisation.  There's some initialisation which needs
374 	 * to be repeated to undo the effects of taking the CPU offline.
375 	 */
376 	__asm__("mov	sp, %0\n"
377 	"	mov	fp, #0\n"
378 	"	mov	r0, %1\n"
379 	"	b	secondary_start_kernel"
380 		:
381 		: "r" (task_stack_page(current) + THREAD_SIZE - 8),
382 		  "r" (current)
383 		: "r0");
384 
385 	unreachable();
386 }
387 #endif /* CONFIG_HOTPLUG_CPU */
388 
389 /*
390  * Called by both boot and secondaries to move global data into
391  * per-processor storage.
392  */
smp_store_cpu_info(unsigned int cpuid)393 static void smp_store_cpu_info(unsigned int cpuid)
394 {
395 	struct cpuinfo_arm *cpu_info = &per_cpu(cpu_data, cpuid);
396 
397 	cpu_info->loops_per_jiffy = loops_per_jiffy;
398 	cpu_info->cpuid = read_cpuid_id();
399 
400 	store_cpu_topology(cpuid);
401 	check_cpu_icache_size(cpuid);
402 }
403 
set_current(struct task_struct * cur)404 static void set_current(struct task_struct *cur)
405 {
406 	/* Set TPIDRURO */
407 	asm("mcr p15, 0, %0, c13, c0, 3" :: "r"(cur) : "memory");
408 }
409 
410 /*
411  * This is the secondary CPU boot entry.  We're using this CPUs
412  * idle thread stack, but a set of temporary page tables.
413  */
secondary_start_kernel(struct task_struct * task)414 asmlinkage void secondary_start_kernel(struct task_struct *task)
415 {
416 	struct mm_struct *mm = &init_mm;
417 	unsigned int cpu;
418 
419 	set_current(task);
420 
421 	secondary_biglittle_init();
422 
423 	/*
424 	 * The identity mapping is uncached (strongly ordered), so
425 	 * switch away from it before attempting any exclusive accesses.
426 	 */
427 	cpu_switch_mm(mm->pgd, mm);
428 	local_flush_bp_all();
429 	enter_lazy_tlb(mm, current);
430 	local_flush_tlb_all();
431 
432 	/*
433 	 * All kernel threads share the same mm context; grab a
434 	 * reference and switch to it.
435 	 */
436 	cpu = smp_processor_id();
437 	mmgrab(mm);
438 	current->active_mm = mm;
439 	cpumask_set_cpu(cpu, mm_cpumask(mm));
440 
441 	cpu_init();
442 
443 #ifndef CONFIG_MMU
444 	setup_vectors_base();
445 #endif
446 	pr_debug("CPU%u: Booted secondary processor\n", cpu);
447 
448 	trace_hardirqs_off();
449 
450 	/*
451 	 * Give the platform a chance to do its own initialisation.
452 	 */
453 	if (smp_ops.smp_secondary_init)
454 		smp_ops.smp_secondary_init(cpu);
455 
456 	notify_cpu_starting(cpu);
457 
458 	ipi_setup(cpu);
459 
460 	calibrate_delay();
461 
462 	smp_store_cpu_info(cpu);
463 
464 	/*
465 	 * OK, now it's safe to let the boot CPU continue.  Wait for
466 	 * the CPU migration code to notice that the CPU is online
467 	 * before we continue - which happens after __cpu_up returns.
468 	 */
469 	set_cpu_online(cpu, true);
470 
471 	check_other_bugs();
472 
473 	complete(&cpu_running);
474 
475 	local_irq_enable();
476 	local_fiq_enable();
477 	local_abt_enable();
478 
479 	/*
480 	 * OK, it's off to the idle thread for us
481 	 */
482 	cpu_startup_entry(CPUHP_AP_ONLINE_IDLE);
483 }
484 
smp_cpus_done(unsigned int max_cpus)485 void __init smp_cpus_done(unsigned int max_cpus)
486 {
487 	int cpu;
488 	unsigned long bogosum = 0;
489 
490 	for_each_online_cpu(cpu)
491 		bogosum += per_cpu(cpu_data, cpu).loops_per_jiffy;
492 
493 	printk(KERN_INFO "SMP: Total of %d processors activated "
494 	       "(%lu.%02lu BogoMIPS).\n",
495 	       num_online_cpus(),
496 	       bogosum / (500000/HZ),
497 	       (bogosum / (5000/HZ)) % 100);
498 
499 	hyp_mode_check();
500 }
501 
smp_prepare_boot_cpu(void)502 void __init smp_prepare_boot_cpu(void)
503 {
504 	set_my_cpu_offset(per_cpu_offset(smp_processor_id()));
505 }
506 
smp_prepare_cpus(unsigned int max_cpus)507 void __init smp_prepare_cpus(unsigned int max_cpus)
508 {
509 	unsigned int ncores = num_possible_cpus();
510 
511 	init_cpu_topology();
512 
513 	smp_store_cpu_info(smp_processor_id());
514 
515 	/*
516 	 * are we trying to boot more cores than exist?
517 	 */
518 	if (max_cpus > ncores)
519 		max_cpus = ncores;
520 	if (ncores > 1 && max_cpus) {
521 		/*
522 		 * Initialise the present map, which describes the set of CPUs
523 		 * actually populated at the present time. A platform should
524 		 * re-initialize the map in the platforms smp_prepare_cpus()
525 		 * if present != possible (e.g. physical hotplug).
526 		 */
527 		init_cpu_present(cpu_possible_mask);
528 
529 		/*
530 		 * Initialise the SCU if there are more than one CPU
531 		 * and let them know where to start.
532 		 */
533 		if (smp_ops.smp_prepare_cpus)
534 			smp_ops.smp_prepare_cpus(max_cpus);
535 	}
536 }
537 
538 static const char *ipi_types[NR_IPI] __tracepoint_string = {
539 	[IPI_WAKEUP]		= "CPU wakeup interrupts",
540 	[IPI_TIMER]		= "Timer broadcast interrupts",
541 	[IPI_RESCHEDULE]	= "Rescheduling interrupts",
542 	[IPI_CALL_FUNC]		= "Function call interrupts",
543 	[IPI_CPU_STOP]		= "CPU stop interrupts",
544 	[IPI_IRQ_WORK]		= "IRQ work interrupts",
545 	[IPI_COMPLETION]	= "completion interrupts",
546 };
547 
548 static void smp_cross_call(const struct cpumask *target, unsigned int ipinr);
549 
show_ipi_list(struct seq_file * p,int prec)550 void show_ipi_list(struct seq_file *p, int prec)
551 {
552 	unsigned int cpu, i;
553 
554 	for (i = 0; i < NR_IPI; i++) {
555 		if (!ipi_desc[i])
556 			continue;
557 
558 		seq_printf(p, "%*s%u: ", prec - 1, "IPI", i);
559 
560 		for_each_online_cpu(cpu)
561 			seq_printf(p, "%10u ", irq_desc_kstat_cpu(ipi_desc[i], cpu));
562 
563 		seq_printf(p, " %s\n", ipi_types[i]);
564 	}
565 }
566 
arch_send_call_function_ipi_mask(const struct cpumask * mask)567 void arch_send_call_function_ipi_mask(const struct cpumask *mask)
568 {
569 	smp_cross_call(mask, IPI_CALL_FUNC);
570 }
571 
arch_send_wakeup_ipi_mask(const struct cpumask * mask)572 void arch_send_wakeup_ipi_mask(const struct cpumask *mask)
573 {
574 	smp_cross_call(mask, IPI_WAKEUP);
575 }
576 
arch_send_call_function_single_ipi(int cpu)577 void arch_send_call_function_single_ipi(int cpu)
578 {
579 	smp_cross_call(cpumask_of(cpu), IPI_CALL_FUNC);
580 }
581 
582 #ifdef CONFIG_IRQ_WORK
arch_irq_work_raise(void)583 void arch_irq_work_raise(void)
584 {
585 	if (arch_irq_work_has_interrupt())
586 		smp_cross_call(cpumask_of(smp_processor_id()), IPI_IRQ_WORK);
587 }
588 #endif
589 
590 #ifdef CONFIG_GENERIC_CLOCKEVENTS_BROADCAST
tick_broadcast(const struct cpumask * mask)591 void tick_broadcast(const struct cpumask *mask)
592 {
593 	smp_cross_call(mask, IPI_TIMER);
594 }
595 #endif
596 
597 static DEFINE_RAW_SPINLOCK(stop_lock);
598 
599 /*
600  * ipi_cpu_stop - handle IPI from smp_send_stop()
601  */
ipi_cpu_stop(unsigned int cpu)602 static void ipi_cpu_stop(unsigned int cpu)
603 {
604 	local_fiq_disable();
605 
606 	if (system_state <= SYSTEM_RUNNING) {
607 		raw_spin_lock(&stop_lock);
608 		pr_crit("CPU%u: stopping\n", cpu);
609 		dump_stack();
610 		raw_spin_unlock(&stop_lock);
611 	}
612 
613 	set_cpu_online(cpu, false);
614 
615 	while (1) {
616 		cpu_relax();
617 		wfe();
618 	}
619 }
620 
621 static DEFINE_PER_CPU(struct completion *, cpu_completion);
622 
register_ipi_completion(struct completion * completion,int cpu)623 int register_ipi_completion(struct completion *completion, int cpu)
624 {
625 	per_cpu(cpu_completion, cpu) = completion;
626 	return IPI_COMPLETION;
627 }
628 
ipi_complete(unsigned int cpu)629 static void ipi_complete(unsigned int cpu)
630 {
631 	complete(per_cpu(cpu_completion, cpu));
632 }
633 
634 /*
635  * Main handler for inter-processor interrupts
636  */
do_handle_IPI(int ipinr)637 static void do_handle_IPI(int ipinr)
638 {
639 	unsigned int cpu = smp_processor_id();
640 
641 	if ((unsigned)ipinr < NR_IPI)
642 		trace_ipi_entry(ipi_types[ipinr]);
643 
644 	switch (ipinr) {
645 	case IPI_WAKEUP:
646 		break;
647 
648 #ifdef CONFIG_GENERIC_CLOCKEVENTS_BROADCAST
649 	case IPI_TIMER:
650 		tick_receive_broadcast();
651 		break;
652 #endif
653 
654 	case IPI_RESCHEDULE:
655 		scheduler_ipi();
656 		break;
657 
658 	case IPI_CALL_FUNC:
659 		generic_smp_call_function_interrupt();
660 		break;
661 
662 	case IPI_CPU_STOP:
663 		ipi_cpu_stop(cpu);
664 		break;
665 
666 #ifdef CONFIG_IRQ_WORK
667 	case IPI_IRQ_WORK:
668 		irq_work_run();
669 		break;
670 #endif
671 
672 	case IPI_COMPLETION:
673 		ipi_complete(cpu);
674 		break;
675 
676 	case IPI_CPU_BACKTRACE:
677 		printk_deferred_enter();
678 		nmi_cpu_backtrace(get_irq_regs());
679 		printk_deferred_exit();
680 		break;
681 
682 	default:
683 		pr_crit("CPU%u: Unknown IPI message 0x%x\n",
684 		        cpu, ipinr);
685 		break;
686 	}
687 
688 	if ((unsigned)ipinr < NR_IPI)
689 		trace_ipi_exit(ipi_types[ipinr]);
690 }
691 
692 /* Legacy version, should go away once all irqchips have been converted */
handle_IPI(int ipinr,struct pt_regs * regs)693 void handle_IPI(int ipinr, struct pt_regs *regs)
694 {
695 	struct pt_regs *old_regs = set_irq_regs(regs);
696 
697 	irq_enter();
698 	do_handle_IPI(ipinr);
699 	irq_exit();
700 
701 	set_irq_regs(old_regs);
702 }
703 
ipi_handler(int irq,void * data)704 static irqreturn_t ipi_handler(int irq, void *data)
705 {
706 	do_handle_IPI(irq - ipi_irq_base);
707 	return IRQ_HANDLED;
708 }
709 
smp_cross_call(const struct cpumask * target,unsigned int ipinr)710 static void smp_cross_call(const struct cpumask *target, unsigned int ipinr)
711 {
712 	trace_ipi_raise(target, ipi_types[ipinr]);
713 	__ipi_send_mask(ipi_desc[ipinr], target);
714 }
715 
ipi_setup(int cpu)716 static void ipi_setup(int cpu)
717 {
718 	int i;
719 
720 	if (WARN_ON_ONCE(!ipi_irq_base))
721 		return;
722 
723 	for (i = 0; i < nr_ipi; i++)
724 		enable_percpu_irq(ipi_irq_base + i, 0);
725 }
726 
set_smp_ipi_range(int ipi_base,int n)727 void __init set_smp_ipi_range(int ipi_base, int n)
728 {
729 	int i;
730 
731 	WARN_ON(n < MAX_IPI);
732 	nr_ipi = min(n, MAX_IPI);
733 
734 	for (i = 0; i < nr_ipi; i++) {
735 		int err;
736 
737 		err = request_percpu_irq(ipi_base + i, ipi_handler,
738 					 "IPI", &irq_stat);
739 		WARN_ON(err);
740 
741 		ipi_desc[i] = irq_to_desc(ipi_base + i);
742 		irq_set_status_flags(ipi_base + i, IRQ_HIDDEN);
743 	}
744 
745 	ipi_irq_base = ipi_base;
746 
747 	/* Setup the boot CPU immediately */
748 	ipi_setup(smp_processor_id());
749 }
750 
arch_smp_send_reschedule(int cpu)751 void arch_smp_send_reschedule(int cpu)
752 {
753 	smp_cross_call(cpumask_of(cpu), IPI_RESCHEDULE);
754 }
755 
smp_send_stop(void)756 void smp_send_stop(void)
757 {
758 	unsigned long timeout;
759 	struct cpumask mask;
760 
761 	cpumask_copy(&mask, cpu_online_mask);
762 	cpumask_clear_cpu(smp_processor_id(), &mask);
763 	if (!cpumask_empty(&mask))
764 		smp_cross_call(&mask, IPI_CPU_STOP);
765 
766 	/* Wait up to one second for other CPUs to stop */
767 	timeout = USEC_PER_SEC;
768 	while (num_online_cpus() > 1 && timeout--)
769 		udelay(1);
770 
771 	if (num_online_cpus() > 1)
772 		pr_warn("SMP: failed to stop secondary CPUs\n");
773 }
774 
775 /* In case panic() and panic() called at the same time on CPU1 and CPU2,
776  * and CPU 1 calls panic_smp_self_stop() before crash_smp_send_stop()
777  * CPU1 can't receive the ipi irqs from CPU2, CPU1 will be always online,
778  * kdump fails. So split out the panic_smp_self_stop() and add
779  * set_cpu_online(smp_processor_id(), false).
780  */
panic_smp_self_stop(void)781 void __noreturn panic_smp_self_stop(void)
782 {
783 	pr_debug("CPU %u will stop doing anything useful since another CPU has paniced\n",
784 	         smp_processor_id());
785 	set_cpu_online(smp_processor_id(), false);
786 	while (1)
787 		cpu_relax();
788 }
789 
790 #ifdef CONFIG_CPU_FREQ
791 
792 static DEFINE_PER_CPU(unsigned long, l_p_j_ref);
793 static DEFINE_PER_CPU(unsigned long, l_p_j_ref_freq);
794 static unsigned long global_l_p_j_ref;
795 static unsigned long global_l_p_j_ref_freq;
796 
cpufreq_callback(struct notifier_block * nb,unsigned long val,void * data)797 static int cpufreq_callback(struct notifier_block *nb,
798 					unsigned long val, void *data)
799 {
800 	struct cpufreq_freqs *freq = data;
801 	struct cpumask *cpus = freq->policy->cpus;
802 	int cpu, first = cpumask_first(cpus);
803 	unsigned int lpj;
804 
805 	if (freq->flags & CPUFREQ_CONST_LOOPS)
806 		return NOTIFY_OK;
807 
808 	if (!per_cpu(l_p_j_ref, first)) {
809 		for_each_cpu(cpu, cpus) {
810 			per_cpu(l_p_j_ref, cpu) =
811 				per_cpu(cpu_data, cpu).loops_per_jiffy;
812 			per_cpu(l_p_j_ref_freq, cpu) = freq->old;
813 		}
814 
815 		if (!global_l_p_j_ref) {
816 			global_l_p_j_ref = loops_per_jiffy;
817 			global_l_p_j_ref_freq = freq->old;
818 		}
819 	}
820 
821 	if ((val == CPUFREQ_PRECHANGE  && freq->old < freq->new) ||
822 	    (val == CPUFREQ_POSTCHANGE && freq->old > freq->new)) {
823 		loops_per_jiffy = cpufreq_scale(global_l_p_j_ref,
824 						global_l_p_j_ref_freq,
825 						freq->new);
826 
827 		lpj = cpufreq_scale(per_cpu(l_p_j_ref, first),
828 				    per_cpu(l_p_j_ref_freq, first), freq->new);
829 		for_each_cpu(cpu, cpus)
830 			per_cpu(cpu_data, cpu).loops_per_jiffy = lpj;
831 	}
832 	return NOTIFY_OK;
833 }
834 
835 static struct notifier_block cpufreq_notifier = {
836 	.notifier_call  = cpufreq_callback,
837 };
838 
register_cpufreq_notifier(void)839 static int __init register_cpufreq_notifier(void)
840 {
841 	return cpufreq_register_notifier(&cpufreq_notifier,
842 						CPUFREQ_TRANSITION_NOTIFIER);
843 }
844 core_initcall(register_cpufreq_notifier);
845 
846 #endif
847 
raise_nmi(cpumask_t * mask)848 static void raise_nmi(cpumask_t *mask)
849 {
850 	__ipi_send_mask(ipi_desc[IPI_CPU_BACKTRACE], mask);
851 }
852 
arch_trigger_cpumask_backtrace(const cpumask_t * mask,int exclude_cpu)853 void arch_trigger_cpumask_backtrace(const cpumask_t *mask, int exclude_cpu)
854 {
855 	nmi_trigger_cpumask_backtrace(mask, exclude_cpu, raise_nmi);
856 }
857