1// SPDX-License-Identifier: GPL-2.0 2#include <dt-bindings/mfd/max77620.h> 3 4#include "tegra210.dtsi" 5 6/ { 7 model = "NVIDIA Jetson TX1"; 8 compatible = "nvidia,p2180", "nvidia,tegra210"; 9 10 aliases { 11 rtc0 = "/i2c@7000d000/pmic@3c"; 12 rtc1 = "/rtc@7000e000"; 13 serial0 = &uarta; 14 serial3 = &uartd; 15 }; 16 17 chosen { 18 stdout-path = "serial0:115200n8"; 19 }; 20 21 memory@80000000 { 22 device_type = "memory"; 23 reg = <0x0 0x80000000 0x1 0x0>; 24 }; 25 26 gpu@57000000 { 27 vdd-supply = <&vdd_gpu>; 28 }; 29 30 /* debug port */ 31 serial@70006000 { 32 /delete-property/ dmas; 33 /delete-property/ dma-names; 34 status = "okay"; 35 }; 36 37 serial@70006300 { 38 /delete-property/ reg-shift; 39 status = "okay"; 40 compatible = "nvidia,tegra30-hsuart"; 41 reset-names = "serial"; 42 43 bluetooth { 44 compatible = "brcm,bcm43540-bt"; 45 device-wakeup-gpios = <&gpio TEGRA_GPIO(H, 3) GPIO_ACTIVE_HIGH>; 46 shutdown-gpios = <&gpio TEGRA_GPIO(H, 4) GPIO_ACTIVE_HIGH>; 47 interrupt-parent = <&gpio>; 48 interrupts = <TEGRA_GPIO(H, 5) IRQ_TYPE_LEVEL_LOW>; 49 interrupt-names = "host-wakeup"; 50 }; 51 }; 52 53 i2c@7000c400 { 54 status = "okay"; 55 56 power-sensor@40 { 57 compatible = "ti,ina3221"; 58 reg = <0x40>; 59 #address-cells = <1>; 60 #size-cells = <0>; 61 62 input@0 { 63 reg = <0x0>; 64 label = "VDD_IN"; 65 shunt-resistor-micro-ohms = <20000>; 66 }; 67 68 input@1 { 69 reg = <0x1>; 70 label = "VDD_GPU"; 71 shunt-resistor-micro-ohms = <10000>; 72 }; 73 74 input@2 { 75 reg = <0x2>; 76 label = "VDD_CPU"; 77 shunt-resistor-micro-ohms = <10000>; 78 }; 79 }; 80 }; 81 82 i2c@7000c500 { 83 status = "okay"; 84 85 /* module ID EEPROM */ 86 eeprom@50 { 87 compatible = "atmel,24c02"; 88 reg = <0x50>; 89 90 label = "module"; 91 vcc-supply = <&vdd_1v8>; 92 address-width = <8>; 93 pagesize = <8>; 94 size = <256>; 95 read-only; 96 }; 97 }; 98 99 i2c@7000d000 { 100 status = "okay"; 101 clock-frequency = <400000>; 102 103 pmic: pmic@3c { 104 compatible = "maxim,max77620"; 105 reg = <0x3c>; 106 interrupt-parent = <&tegra_pmc>; 107 interrupts = <51 IRQ_TYPE_LEVEL_LOW>; 108 109 #interrupt-cells = <2>; 110 interrupt-controller; 111 112 #gpio-cells = <2>; 113 gpio-controller; 114 115 pinctrl-names = "default"; 116 pinctrl-0 = <&max77620_default>; 117 118 fps { 119 fps0 { 120 maxim,fps-event-source = <MAX77620_FPS_EVENT_SRC_EN0>; 121 maxim,suspend-fps-time-period-us = <1280>; 122 }; 123 124 fps1 { 125 maxim,fps-event-source = <MAX77620_FPS_EVENT_SRC_EN1>; 126 maxim,suspend-fps-time-period-us = <1280>; 127 }; 128 129 fps2 { 130 maxim,fps-event-source = <MAX77620_FPS_EVENT_SRC_EN0>; 131 }; 132 }; 133 134 max77620_default: pinmux { 135 gpio0 { 136 pins = "gpio0"; 137 function = "gpio"; 138 }; 139 140 gpio1 { 141 pins = "gpio1"; 142 function = "fps-out"; 143 drive-push-pull = <1>; 144 maxim,active-fps-source = <MAX77620_FPS_SRC_0>; 145 maxim,active-fps-power-up-slot = <7>; 146 maxim,active-fps-power-down-slot = <0>; 147 }; 148 149 gpio2_3 { 150 pins = "gpio2", "gpio3"; 151 function = "fps-out"; 152 drive-open-drain = <1>; 153 maxim,active-fps-source = <MAX77620_FPS_SRC_0>; 154 }; 155 156 gpio4 { 157 pins = "gpio4"; 158 function = "32k-out1"; 159 }; 160 161 gpio5_6_7 { 162 pins = "gpio5", "gpio6", "gpio7"; 163 function = "gpio"; 164 drive-push-pull = <1>; 165 }; 166 }; 167 168 regulators { 169 in-ldo0-1-supply = <&vdd_pre>; 170 in-ldo7-8-supply = <&vdd_pre>; 171 in-sd3-supply = <&vdd_5v0_sys>; 172 173 vdd_soc: sd0 { 174 regulator-name = "VDD_SOC"; 175 regulator-min-microvolt = <600000>; 176 regulator-max-microvolt = <1400000>; 177 regulator-always-on; 178 regulator-boot-on; 179 180 regulator-enable-ramp-delay = <146>; 181 regulator-ramp-delay = <27500>; 182 183 maxim,active-fps-source = <MAX77620_FPS_SRC_1>; 184 }; 185 186 vdd_ddr: sd1 { 187 regulator-name = "VDD_DDR_1V1_PMIC"; 188 regulator-always-on; 189 regulator-boot-on; 190 191 regulator-enable-ramp-delay = <130>; 192 regulator-ramp-delay = <27500>; 193 194 maxim,active-fps-source = <MAX77620_FPS_SRC_0>; 195 }; 196 197 vdd_pre: sd2 { 198 regulator-name = "VDD_PRE_REG_1V35"; 199 regulator-min-microvolt = <1350000>; 200 regulator-max-microvolt = <1350000>; 201 202 regulator-enable-ramp-delay = <176>; 203 regulator-ramp-delay = <27500>; 204 205 maxim,active-fps-source = <MAX77620_FPS_SRC_1>; 206 }; 207 208 vdd_1v8: sd3 { 209 regulator-name = "VDD_1V8"; 210 regulator-min-microvolt = <1800000>; 211 regulator-max-microvolt = <1800000>; 212 regulator-always-on; 213 regulator-boot-on; 214 215 regulator-enable-ramp-delay = <242>; 216 regulator-ramp-delay = <27500>; 217 218 maxim,active-fps-source = <MAX77620_FPS_SRC_0>; 219 }; 220 221 vdd_sys_1v2: ldo0 { 222 regulator-name = "AVDD_SYS_1V2"; 223 regulator-min-microvolt = <1200000>; 224 regulator-max-microvolt = <1200000>; 225 regulator-always-on; 226 regulator-boot-on; 227 228 regulator-enable-ramp-delay = <26>; 229 regulator-ramp-delay = <100000>; 230 231 maxim,active-fps-source = <MAX77620_FPS_SRC_NONE>; 232 }; 233 234 vdd_pex_1v05: ldo1 { 235 regulator-name = "VDD_PEX_1V05"; 236 regulator-min-microvolt = <1050000>; 237 regulator-max-microvolt = <1050000>; 238 239 regulator-enable-ramp-delay = <22>; 240 regulator-ramp-delay = <100000>; 241 242 maxim,active-fps-source = <MAX77620_FPS_SRC_1>; 243 }; 244 245 vddio_sdmmc: ldo2 { 246 regulator-name = "VDDIO_SDMMC"; 247 regulator-min-microvolt = <1800000>; 248 regulator-max-microvolt = <3300000>; 249 regulator-always-on; 250 regulator-boot-on; 251 252 regulator-enable-ramp-delay = <62>; 253 regulator-ramp-delay = <100000>; 254 255 maxim,active-fps-source = <MAX77620_FPS_SRC_NONE>; 256 }; 257 258 vdd_cam_hv: ldo3 { 259 regulator-name = "VDD_CAM_HV"; 260 regulator-min-microvolt = <2800000>; 261 regulator-max-microvolt = <2800000>; 262 263 regulator-enable-ramp-delay = <50>; 264 regulator-ramp-delay = <100000>; 265 266 maxim,active-fps-source = <MAX77620_FPS_SRC_NONE>; 267 }; 268 269 vdd_rtc: ldo4 { 270 regulator-name = "VDD_RTC"; 271 regulator-min-microvolt = <850000>; 272 regulator-max-microvolt = <850000>; 273 regulator-always-on; 274 regulator-boot-on; 275 276 regulator-enable-ramp-delay = <22>; 277 regulator-ramp-delay = <100000>; 278 279 maxim,active-fps-source = <MAX77620_FPS_SRC_0>; 280 }; 281 282 vdd_ts_hv: ldo5 { 283 regulator-name = "VDD_TS_HV"; 284 regulator-min-microvolt = <3300000>; 285 regulator-max-microvolt = <3300000>; 286 287 regulator-enable-ramp-delay = <62>; 288 regulator-ramp-delay = <100000>; 289 290 maxim,active-fps-source = <MAX77620_FPS_SRC_NONE>; 291 }; 292 293 vdd_ts: ldo6 { 294 regulator-name = "VDD_TS_1V8"; 295 regulator-min-microvolt = <1800000>; 296 regulator-max-microvolt = <1800000>; 297 298 regulator-enable-ramp-delay = <36>; 299 regulator-ramp-delay = <100000>; 300 301 maxim,active-fps-source = <MAX77620_FPS_SRC_0>; 302 maxim,active-fps-power-up-slot = <7>; 303 maxim,active-fps-power-down-slot = <0>; 304 }; 305 306 avdd_1v05_pll: ldo7 { 307 regulator-name = "AVDD_1V05_PLL"; 308 regulator-min-microvolt = <1050000>; 309 regulator-max-microvolt = <1050000>; 310 regulator-always-on; 311 regulator-boot-on; 312 313 regulator-enable-ramp-delay = <24>; 314 regulator-ramp-delay = <100000>; 315 316 maxim,active-fps-source = <MAX77620_FPS_SRC_1>; 317 }; 318 319 avdd_1v05: ldo8 { 320 regulator-name = "AVDD_SATA_HDMI_DP_1V05"; 321 regulator-min-microvolt = <1050000>; 322 regulator-max-microvolt = <1050000>; 323 324 regulator-enable-ramp-delay = <22>; 325 regulator-ramp-delay = <100000>; 326 327 maxim,active-fps-source = <MAX77620_FPS_SRC_1>; 328 }; 329 }; 330 }; 331 }; 332 333 pmc@7000e400 { 334 nvidia,invert-interrupt; 335 nvidia,suspend-mode = <0>; 336 nvidia,cpu-pwr-good-time = <0>; 337 nvidia,cpu-pwr-off-time = <0>; 338 nvidia,core-pwr-good-time = <4587 3876>; 339 nvidia,core-pwr-off-time = <39065>; 340 nvidia,core-power-req-active-high; 341 nvidia,sys-clock-req-active-high; 342 }; 343 344 mmc@700b0200 { 345 status = "okay"; 346 bus-width = <4>; 347 non-removable; 348 power-gpios = <&gpio TEGRA_GPIO(H, 0) GPIO_ACTIVE_HIGH>; 349 vqmmc-supply = <&vdd_1v8>; 350 vmmc-supply = <&vdd_3v3_sys>; 351 #address-cells = <1>; 352 #size-cells = <0>; 353 354 wifi@1 { 355 compatible = "brcm,bcm4354-fmac", "brcm,bcm4329-fmac"; 356 reg = <1>; 357 interrupt-parent = <&gpio>; 358 interrupts = <TEGRA_GPIO(H, 2) IRQ_TYPE_LEVEL_HIGH>; 359 interrupt-names = "host-wake"; 360 }; 361 }; 362 363 /* eMMC */ 364 mmc@700b0600 { 365 status = "okay"; 366 bus-width = <8>; 367 non-removable; 368 vqmmc-supply = <&vdd_1v8>; 369 }; 370 371 clk32k_in: clock-32k { 372 compatible = "fixed-clock"; 373 clock-frequency = <32768>; 374 #clock-cells = <0>; 375 }; 376 377 cpus { 378 cpu@0 { 379 enable-method = "psci"; 380 }; 381 382 cpu@1 { 383 enable-method = "psci"; 384 }; 385 386 cpu@2 { 387 enable-method = "psci"; 388 }; 389 390 cpu@3 { 391 enable-method = "psci"; 392 }; 393 394 idle-states { 395 cpu-sleep { 396 status = "okay"; 397 }; 398 }; 399 }; 400 401 psci { 402 compatible = "arm,psci-0.2"; 403 method = "smc"; 404 }; 405 406 vdd_gpu: regulator-vdd-gpu { 407 compatible = "pwm-regulator"; 408 pwms = <&pwm 1 8000>; 409 regulator-name = "VDD_GPU"; 410 regulator-min-microvolt = <710000>; 411 regulator-max-microvolt = <1320000>; 412 enable-gpios = <&pmic 6 GPIO_ACTIVE_HIGH>; 413 regulator-ramp-delay = <80>; 414 regulator-enable-ramp-delay = <2000>; 415 regulator-settling-time-us = <160>; 416 }; 417}; 418