1// SPDX-License-Identifier: BSD-3-Clause 2/* 3 * Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved. 4 */ 5 6/dts-v1/; 7 8#include <dt-bindings/gpio/gpio.h> 9#include <dt-bindings/regulator/qcom,rpmh-regulator.h> 10 11#include "x1e80100.dtsi" 12#include "x1e80100-pmics.dtsi" 13 14/ { 15 model = "Qualcomm Technologies, Inc. X1E80100 QCP"; 16 compatible = "qcom,x1e80100-qcp", "qcom,x1e80100"; 17 18 aliases { 19 serial0 = &uart21; 20 }; 21 22 wcd938x: audio-codec { 23 compatible = "qcom,wcd9385-codec"; 24 25 pinctrl-names = "default"; 26 pinctrl-0 = <&wcd_default>; 27 28 qcom,micbias1-microvolt = <1800000>; 29 qcom,micbias2-microvolt = <1800000>; 30 qcom,micbias3-microvolt = <1800000>; 31 qcom,micbias4-microvolt = <1800000>; 32 qcom,mbhc-buttons-vthreshold-microvolt = <75000 150000 237000 500000 500000 500000 500000 500000>; 33 qcom,mbhc-headset-vthreshold-microvolt = <1700000>; 34 qcom,mbhc-headphone-vthreshold-microvolt = <50000>; 35 qcom,rx-device = <&wcd_rx>; 36 qcom,tx-device = <&wcd_tx>; 37 38 reset-gpios = <&tlmm 191 GPIO_ACTIVE_LOW>; 39 40 vdd-buck-supply = <&vreg_l15b_1p8>; 41 vdd-rxtx-supply = <&vreg_l15b_1p8>; 42 vdd-io-supply = <&vreg_l15b_1p8>; 43 vdd-mic-bias-supply = <&vreg_bob1>; 44 45 #sound-dai-cells = <1>; 46 }; 47 48 chosen { 49 stdout-path = "serial0:115200n8"; 50 }; 51 52 pmic-glink { 53 compatible = "qcom,x1e80100-pmic-glink", 54 "qcom,sm8550-pmic-glink", 55 "qcom,pmic-glink"; 56 #address-cells = <1>; 57 #size-cells = <0>; 58 orientation-gpios = <&tlmm 121 GPIO_ACTIVE_HIGH>, 59 <&tlmm 123 GPIO_ACTIVE_HIGH>, 60 <&tlmm 125 GPIO_ACTIVE_HIGH>; 61 62 connector@0 { 63 compatible = "usb-c-connector"; 64 reg = <0>; 65 power-role = "dual"; 66 data-role = "dual"; 67 68 ports { 69 #address-cells = <1>; 70 #size-cells = <0>; 71 72 port@0 { 73 reg = <0>; 74 75 pmic_glink_ss0_hs_in: endpoint { 76 remote-endpoint = <&usb_1_ss0_dwc3_hs>; 77 }; 78 }; 79 80 port@1 { 81 reg = <1>; 82 83 pmic_glink_ss0_ss_in: endpoint { 84 remote-endpoint = <&usb_1_ss0_qmpphy_out>; 85 }; 86 }; 87 }; 88 }; 89 90 connector@1 { 91 compatible = "usb-c-connector"; 92 reg = <1>; 93 power-role = "dual"; 94 data-role = "dual"; 95 96 ports { 97 #address-cells = <1>; 98 #size-cells = <0>; 99 100 port@0 { 101 reg = <0>; 102 103 pmic_glink_ss1_hs_in: endpoint { 104 remote-endpoint = <&usb_1_ss1_dwc3_hs>; 105 }; 106 }; 107 108 port@1 { 109 reg = <1>; 110 111 pmic_glink_ss1_ss_in: endpoint { 112 remote-endpoint = <&usb_1_ss1_qmpphy_out>; 113 }; 114 }; 115 }; 116 }; 117 118 connector@2 { 119 compatible = "usb-c-connector"; 120 reg = <2>; 121 power-role = "dual"; 122 data-role = "dual"; 123 124 ports { 125 #address-cells = <1>; 126 #size-cells = <0>; 127 128 port@0 { 129 reg = <0>; 130 131 pmic_glink_ss2_hs_in: endpoint { 132 remote-endpoint = <&usb_1_ss2_dwc3_hs>; 133 }; 134 }; 135 136 port@1 { 137 reg = <1>; 138 139 pmic_glink_ss2_ss_in: endpoint { 140 remote-endpoint = <&usb_1_ss2_qmpphy_out>; 141 }; 142 }; 143 }; 144 }; 145 }; 146 147 reserved-memory { 148 linux,cma { 149 compatible = "shared-dma-pool"; 150 size = <0x0 0x8000000>; 151 reusable; 152 linux,cma-default; 153 }; 154 }; 155 156 sound { 157 compatible = "qcom,x1e80100-sndcard"; 158 model = "X1E80100-QCP"; 159 audio-routing = "SpkrLeft IN", "WSA WSA_SPK1 OUT", 160 "SpkrRight IN", "WSA WSA_SPK2 OUT", 161 "IN1_HPHL", "HPHL_OUT", 162 "IN2_HPHR", "HPHR_OUT", 163 "AMIC2", "MIC BIAS2", 164 "TX SWR_INPUT1", "ADC2_OUTPUT"; 165 166 wcd-playback-dai-link { 167 link-name = "WCD Playback"; 168 169 cpu { 170 sound-dai = <&q6apmbedai RX_CODEC_DMA_RX_0>; 171 }; 172 173 codec { 174 sound-dai = <&wcd938x 0>, <&swr1 0>, <&lpass_rxmacro 0>; 175 }; 176 177 platform { 178 sound-dai = <&q6apm>; 179 }; 180 }; 181 182 wcd-capture-dai-link { 183 link-name = "WCD Capture"; 184 185 cpu { 186 sound-dai = <&q6apmbedai TX_CODEC_DMA_TX_3>; 187 }; 188 189 codec { 190 sound-dai = <&wcd938x 1>, <&swr2 1>, <&lpass_txmacro 0>; 191 }; 192 193 platform { 194 sound-dai = <&q6apm>; 195 }; 196 }; 197 198 wsa-dai-link { 199 link-name = "WSA Playback"; 200 201 cpu { 202 sound-dai = <&q6apmbedai WSA_CODEC_DMA_RX_0>; 203 }; 204 205 codec { 206 sound-dai = <&left_spkr>, <&right_spkr>, 207 <&swr0 0>, <&lpass_wsamacro 0>; 208 }; 209 210 platform { 211 sound-dai = <&q6apm>; 212 }; 213 }; 214 }; 215 216 vph_pwr: vph-pwr-regulator { 217 compatible = "regulator-fixed"; 218 219 regulator-name = "vph_pwr"; 220 regulator-min-microvolt = <3700000>; 221 regulator-max-microvolt = <3700000>; 222 223 regulator-always-on; 224 regulator-boot-on; 225 }; 226 227 vreg_edp_3p3: regulator-edp-3p3 { 228 compatible = "regulator-fixed"; 229 230 regulator-name = "VREG_EDP_3P3"; 231 regulator-min-microvolt = <3300000>; 232 regulator-max-microvolt = <3300000>; 233 234 gpio = <&tlmm 70 GPIO_ACTIVE_HIGH>; 235 enable-active-high; 236 237 pinctrl-0 = <&edp_reg_en>; 238 pinctrl-names = "default"; 239 240 regulator-always-on; 241 regulator-boot-on; 242 }; 243 244 vreg_nvme: regulator-nvme { 245 compatible = "regulator-fixed"; 246 247 regulator-name = "VREG_NVME_3P3"; 248 regulator-min-microvolt = <3300000>; 249 regulator-max-microvolt = <3300000>; 250 251 gpio = <&tlmm 18 GPIO_ACTIVE_HIGH>; 252 enable-active-high; 253 254 pinctrl-names = "default"; 255 pinctrl-0 = <&nvme_reg_en>; 256 257 regulator-boot-on; 258 }; 259}; 260 261&apps_rsc { 262 regulators-0 { 263 compatible = "qcom,pm8550-rpmh-regulators"; 264 qcom,pmic-id = "b"; 265 266 vdd-bob1-supply = <&vph_pwr>; 267 vdd-bob2-supply = <&vph_pwr>; 268 vdd-l1-l4-l10-supply = <&vreg_s4c_1p8>; 269 vdd-l2-l13-l14-supply = <&vreg_bob1>; 270 vdd-l5-l16-supply = <&vreg_bob1>; 271 vdd-l6-l7-supply = <&vreg_bob2>; 272 vdd-l8-l9-supply = <&vreg_bob1>; 273 vdd-l12-supply = <&vreg_s5j_1p2>; 274 vdd-l15-supply = <&vreg_s4c_1p8>; 275 vdd-l17-supply = <&vreg_bob2>; 276 277 vreg_bob1: bob1 { 278 regulator-name = "vreg_bob1"; 279 regulator-min-microvolt = <3008000>; 280 regulator-max-microvolt = <3960000>; 281 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 282 }; 283 284 vreg_bob2: bob2 { 285 regulator-name = "vreg_bob2"; 286 regulator-min-microvolt = <2504000>; 287 regulator-max-microvolt = <3008000>; 288 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 289 }; 290 291 vreg_l1b_1p8: ldo1 { 292 regulator-name = "vreg_l1b_1p8"; 293 regulator-min-microvolt = <1800000>; 294 regulator-max-microvolt = <1800000>; 295 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 296 }; 297 298 vreg_l2b_3p0: ldo2 { 299 regulator-name = "vreg_l2b_3p0"; 300 regulator-min-microvolt = <3072000>; 301 regulator-max-microvolt = <3100000>; 302 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 303 }; 304 305 vreg_l4b_1p8: ldo4 { 306 regulator-name = "vreg_l4b_1p8"; 307 regulator-min-microvolt = <1800000>; 308 regulator-max-microvolt = <1800000>; 309 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 310 }; 311 312 vreg_l5b_3p0: ldo5 { 313 regulator-name = "vreg_l5b_3p0"; 314 regulator-min-microvolt = <3000000>; 315 regulator-max-microvolt = <3000000>; 316 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 317 }; 318 319 vreg_l6b_1p8: ldo6 { 320 regulator-name = "vreg_l6b_1p8"; 321 regulator-min-microvolt = <1800000>; 322 regulator-max-microvolt = <2960000>; 323 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 324 }; 325 326 vreg_l7b_2p8: ldo7 { 327 regulator-name = "vreg_l7b_2p8"; 328 regulator-min-microvolt = <2800000>; 329 regulator-max-microvolt = <2800000>; 330 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 331 }; 332 333 vreg_l8b_3p0: ldo8 { 334 regulator-name = "vreg_l8b_3p0"; 335 regulator-min-microvolt = <3072000>; 336 regulator-max-microvolt = <3072000>; 337 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 338 }; 339 340 vreg_l9b_2p9: ldo9 { 341 regulator-name = "vreg_l9b_2p9"; 342 regulator-min-microvolt = <2960000>; 343 regulator-max-microvolt = <2960000>; 344 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 345 }; 346 347 vreg_l10b_1p8: ldo10 { 348 regulator-name = "vreg_l10b_1p8"; 349 regulator-min-microvolt = <1800000>; 350 regulator-max-microvolt = <1800000>; 351 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 352 }; 353 354 vreg_l12b_1p2: ldo12 { 355 regulator-name = "vreg_l12b_1p2"; 356 regulator-min-microvolt = <1200000>; 357 regulator-max-microvolt = <1200000>; 358 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 359 regulator-always-on; 360 }; 361 362 vreg_l13b_3p0: ldo13 { 363 regulator-name = "vreg_l13b_3p0"; 364 regulator-min-microvolt = <3072000>; 365 regulator-max-microvolt = <3100000>; 366 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 367 }; 368 369 vreg_l14b_3p0: ldo14 { 370 regulator-name = "vreg_l14b_3p0"; 371 regulator-min-microvolt = <3072000>; 372 regulator-max-microvolt = <3072000>; 373 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 374 }; 375 376 vreg_l15b_1p8: ldo15 { 377 regulator-name = "vreg_l15b_1p8"; 378 regulator-min-microvolt = <1800000>; 379 regulator-max-microvolt = <1800000>; 380 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 381 regulator-always-on; 382 }; 383 384 vreg_l16b_2p9: ldo16 { 385 regulator-name = "vreg_l16b_2p9"; 386 regulator-min-microvolt = <2912000>; 387 regulator-max-microvolt = <2912000>; 388 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 389 }; 390 391 vreg_l17b_2p5: ldo17 { 392 regulator-name = "vreg_l17b_2p5"; 393 regulator-min-microvolt = <2504000>; 394 regulator-max-microvolt = <2504000>; 395 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 396 }; 397 }; 398 399 regulators-1 { 400 compatible = "qcom,pm8550ve-rpmh-regulators"; 401 qcom,pmic-id = "c"; 402 403 vdd-l1-supply = <&vreg_s5j_1p2>; 404 vdd-l2-supply = <&vreg_s1f_0p7>; 405 vdd-l3-supply = <&vreg_s1f_0p7>; 406 vdd-s4-supply = <&vph_pwr>; 407 408 vreg_s4c_1p8: smps4 { 409 regulator-name = "vreg_s4c_1p8"; 410 regulator-min-microvolt = <1856000>; 411 regulator-max-microvolt = <2000000>; 412 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 413 }; 414 415 vreg_l1c_1p2: ldo1 { 416 regulator-name = "vreg_l1c_1p2"; 417 regulator-min-microvolt = <1200000>; 418 regulator-max-microvolt = <1200000>; 419 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 420 }; 421 422 vreg_l2c_0p8: ldo2 { 423 regulator-name = "vreg_l2c_0p8"; 424 regulator-min-microvolt = <880000>; 425 regulator-max-microvolt = <920000>; 426 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 427 }; 428 429 vreg_l3c_0p8: ldo3 { 430 regulator-name = "vreg_l3c_0p8"; 431 regulator-min-microvolt = <880000>; 432 regulator-max-microvolt = <920000>; 433 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 434 }; 435 }; 436 437 regulators-2 { 438 compatible = "qcom,pmc8380-rpmh-regulators"; 439 qcom,pmic-id = "d"; 440 441 vdd-l1-supply = <&vreg_s1f_0p7>; 442 vdd-l2-supply = <&vreg_s1f_0p7>; 443 vdd-l3-supply = <&vreg_s4c_1p8>; 444 vdd-s1-supply = <&vph_pwr>; 445 446 vreg_l1d_0p8: ldo1 { 447 regulator-name = "vreg_l1d_0p8"; 448 regulator-min-microvolt = <880000>; 449 regulator-max-microvolt = <920000>; 450 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 451 }; 452 453 vreg_l2d_0p9: ldo2 { 454 regulator-name = "vreg_l2d_0p9"; 455 regulator-min-microvolt = <912000>; 456 regulator-max-microvolt = <920000>; 457 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 458 }; 459 460 vreg_l3d_1p8: ldo3 { 461 regulator-name = "vreg_l3d_1p8"; 462 regulator-min-microvolt = <1800000>; 463 regulator-max-microvolt = <1800000>; 464 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 465 }; 466 }; 467 468 regulators-3 { 469 compatible = "qcom,pmc8380-rpmh-regulators"; 470 qcom,pmic-id = "e"; 471 472 vdd-l2-supply = <&vreg_s1f_0p7>; 473 vdd-l3-supply = <&vreg_s5j_1p2>; 474 475 vreg_l2e_0p8: ldo2 { 476 regulator-name = "vreg_l2e_0p8"; 477 regulator-min-microvolt = <880000>; 478 regulator-max-microvolt = <920000>; 479 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 480 }; 481 482 vreg_l3e_1p2: ldo3 { 483 regulator-name = "vreg_l3e_1p2"; 484 regulator-min-microvolt = <1200000>; 485 regulator-max-microvolt = <1200000>; 486 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 487 }; 488 }; 489 490 regulators-4 { 491 compatible = "qcom,pmc8380-rpmh-regulators"; 492 qcom,pmic-id = "f"; 493 494 vdd-l1-supply = <&vreg_s5j_1p2>; 495 vdd-l2-supply = <&vreg_s5j_1p2>; 496 vdd-l3-supply = <&vreg_s5j_1p2>; 497 vdd-s1-supply = <&vph_pwr>; 498 499 vreg_s1f_0p7: smps1 { 500 regulator-name = "vreg_s1f_0p7"; 501 regulator-min-microvolt = <700000>; 502 regulator-max-microvolt = <1100000>; 503 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 504 }; 505 506 vreg_l1f_1p0: ldo1 { 507 regulator-name = "vreg_l1f_1p0"; 508 regulator-min-microvolt = <1024000>; 509 regulator-max-microvolt = <1024000>; 510 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 511 }; 512 513 vreg_l2f_1p0: ldo2 { 514 regulator-name = "vreg_l2f_1p0"; 515 regulator-min-microvolt = <1024000>; 516 regulator-max-microvolt = <1024000>; 517 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 518 }; 519 520 vreg_l3f_1p0: ldo3 { 521 regulator-name = "vreg_l3f_1p0"; 522 regulator-min-microvolt = <1024000>; 523 regulator-max-microvolt = <1024000>; 524 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 525 }; 526 }; 527 528 regulators-6 { 529 compatible = "qcom,pm8550ve-rpmh-regulators"; 530 qcom,pmic-id = "i"; 531 532 vdd-l1-supply = <&vreg_s4c_1p8>; 533 vdd-l2-supply = <&vreg_s5j_1p2>; 534 vdd-l3-supply = <&vreg_s1f_0p7>; 535 vdd-s1-supply = <&vph_pwr>; 536 vdd-s2-supply = <&vph_pwr>; 537 538 vreg_s1i_0p9: smps1 { 539 regulator-name = "vreg_s1i_0p9"; 540 regulator-min-microvolt = <900000>; 541 regulator-max-microvolt = <920000>; 542 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 543 }; 544 545 vreg_s2i_1p0: smps2 { 546 regulator-name = "vreg_s2i_1p0"; 547 regulator-min-microvolt = <1000000>; 548 regulator-max-microvolt = <1100000>; 549 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 550 }; 551 552 vreg_l1i_1p8: ldo1 { 553 regulator-name = "vreg_l1i_1p8"; 554 regulator-min-microvolt = <1800000>; 555 regulator-max-microvolt = <1800000>; 556 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 557 }; 558 559 vreg_l2i_1p2: ldo2 { 560 regulator-name = "vreg_l2i_1p2"; 561 regulator-min-microvolt = <1200000>; 562 regulator-max-microvolt = <1200000>; 563 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 564 }; 565 566 vreg_l3i_0p8: ldo3 { 567 regulator-name = "vreg_l3i_0p8"; 568 regulator-min-microvolt = <880000>; 569 regulator-max-microvolt = <920000>; 570 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 571 }; 572 }; 573 574 regulators-7 { 575 compatible = "qcom,pm8550ve-rpmh-regulators"; 576 qcom,pmic-id = "j"; 577 578 vdd-l1-supply = <&vreg_s1f_0p7>; 579 vdd-l2-supply = <&vreg_s5j_1p2>; 580 vdd-l3-supply = <&vreg_s1f_0p7>; 581 vdd-s5-supply = <&vph_pwr>; 582 583 vreg_s5j_1p2: smps5 { 584 regulator-name = "vreg_s5j_1p2"; 585 regulator-min-microvolt = <1256000>; 586 regulator-max-microvolt = <1304000>; 587 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 588 }; 589 590 vreg_l1j_0p8: ldo1 { 591 regulator-name = "vreg_l1j_0p8"; 592 regulator-min-microvolt = <880000>; 593 regulator-max-microvolt = <920000>; 594 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 595 }; 596 597 vreg_l2j_1p2: ldo2 { 598 regulator-name = "vreg_l2j_1p2"; 599 regulator-min-microvolt = <1256000>; 600 regulator-max-microvolt = <1256000>; 601 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 602 }; 603 604 vreg_l3j_0p8: ldo3 { 605 regulator-name = "vreg_l3j_0p8"; 606 regulator-min-microvolt = <880000>; 607 regulator-max-microvolt = <920000>; 608 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 609 }; 610 }; 611}; 612 613&gpu { 614 status = "okay"; 615 616 zap-shader { 617 firmware-name = "qcom/x1e80100/gen70500_zap.mbn"; 618 }; 619}; 620 621&lpass_tlmm { 622 spkr_01_sd_n_active: spkr-01-sd-n-active-state { 623 pins = "gpio12"; 624 function = "gpio"; 625 drive-strength = <16>; 626 bias-disable; 627 output-low; 628 }; 629}; 630 631&mdss { 632 status = "okay"; 633}; 634 635&mdss_dp3 { 636 compatible = "qcom,x1e80100-dp"; 637 /delete-property/ #sound-dai-cells; 638 639 status = "okay"; 640 641 aux-bus { 642 panel { 643 compatible = "edp-panel"; 644 power-supply = <&vreg_edp_3p3>; 645 646 port { 647 edp_panel_in: endpoint { 648 remote-endpoint = <&mdss_dp3_out>; 649 }; 650 }; 651 }; 652 }; 653 654 ports { 655 port@1 { 656 reg = <1>; 657 mdss_dp3_out: endpoint { 658 data-lanes = <0 1 2 3>; 659 link-frequencies = /bits/ 64 <1620000000 2700000000 5400000000 8100000000>; 660 661 remote-endpoint = <&edp_panel_in>; 662 }; 663 }; 664 }; 665}; 666 667&mdss_dp3_phy { 668 vdda-phy-supply = <&vreg_l3j_0p8>; 669 vdda-pll-supply = <&vreg_l2j_1p2>; 670 671 status = "okay"; 672}; 673 674&pcie4 { 675 perst-gpios = <&tlmm 146 GPIO_ACTIVE_LOW>; 676 wake-gpios = <&tlmm 148 GPIO_ACTIVE_LOW>; 677 678 pinctrl-0 = <&pcie4_default>; 679 pinctrl-names = "default"; 680 681 status = "okay"; 682}; 683 684&pcie4_phy { 685 vdda-phy-supply = <&vreg_l3i_0p8>; 686 vdda-pll-supply = <&vreg_l3e_1p2>; 687 688 status = "okay"; 689}; 690 691&pcie6a { 692 perst-gpios = <&tlmm 152 GPIO_ACTIVE_LOW>; 693 wake-gpios = <&tlmm 154 GPIO_ACTIVE_LOW>; 694 695 vddpe-3v3-supply = <&vreg_nvme>; 696 697 pinctrl-names = "default"; 698 pinctrl-0 = <&pcie6a_default>; 699 700 status = "okay"; 701}; 702 703&pcie6a_phy { 704 vdda-phy-supply = <&vreg_l1d_0p8>; 705 vdda-pll-supply = <&vreg_l2j_1p2>; 706 707 status = "okay"; 708}; 709 710&qupv3_0 { 711 status = "okay"; 712}; 713 714&qupv3_1 { 715 status = "okay"; 716}; 717 718&qupv3_2 { 719 status = "okay"; 720}; 721 722&remoteproc_adsp { 723 firmware-name = "qcom/x1e80100/adsp.mbn", 724 "qcom/x1e80100/adsp_dtb.mbn"; 725 726 status = "okay"; 727}; 728 729&remoteproc_cdsp { 730 firmware-name = "qcom/x1e80100/cdsp.mbn", 731 "qcom/x1e80100/cdsp_dtb.mbn"; 732 733 status = "okay"; 734}; 735 736&smb2360_0_eusb2_repeater { 737 vdd18-supply = <&vreg_l3d_1p8>; 738 vdd3-supply = <&vreg_l2b_3p0>; 739}; 740 741&smb2360_1_eusb2_repeater { 742 vdd18-supply = <&vreg_l3d_1p8>; 743 vdd3-supply = <&vreg_l14b_3p0>; 744}; 745 746&smb2360_2 { 747 status = "okay"; 748}; 749 750&smb2360_2_eusb2_repeater { 751 vdd18-supply = <&vreg_l3d_1p8>; 752 vdd3-supply = <&vreg_l8b_3p0>; 753}; 754 755&smb2360_3 { 756 status = "okay"; 757}; 758 759&swr0 { 760 pinctrl-0 = <&wsa_swr_active>, <&spkr_01_sd_n_active>; 761 pinctrl-names = "default"; 762 763 status = "okay"; 764 765 /* WSA8845, Left Speaker */ 766 left_spkr: speaker@0,0 { 767 compatible = "sdw20217020400"; 768 reg = <0 0>; 769 #sound-dai-cells = <0>; 770 reset-gpios = <&lpass_tlmm 12 GPIO_ACTIVE_LOW>; 771 sound-name-prefix = "SpkrLeft"; 772 vdd-1p8-supply = <&vreg_l15b_1p8>; 773 vdd-io-supply = <&vreg_l12b_1p2>; 774 qcom,port-mapping = <1 2 3 7 10 13>; 775 }; 776 777 /* WSA8845, Right Speaker */ 778 right_spkr: speaker@0,1 { 779 compatible = "sdw20217020400"; 780 reg = <0 1>; 781 #sound-dai-cells = <0>; 782 reset-gpios = <&lpass_tlmm 12 GPIO_ACTIVE_LOW>; 783 sound-name-prefix = "SpkrRight"; 784 vdd-1p8-supply = <&vreg_l15b_1p8>; 785 vdd-io-supply = <&vreg_l12b_1p2>; 786 qcom,port-mapping = <4 5 6 7 11 13>; 787 }; 788}; 789 790&swr1 { 791 status = "okay"; 792 793 /* WCD9385 RX */ 794 wcd_rx: codec@0,4 { 795 compatible = "sdw20217010d00"; 796 reg = <0 4>; 797 qcom,rx-port-mapping = <1 2 3 4 5>; 798 }; 799}; 800 801&swr2 { 802 status = "okay"; 803 804 /* WCD9385 TX */ 805 wcd_tx: codec@0,3 { 806 compatible = "sdw20217010d00"; 807 reg = <0 3>; 808 qcom,tx-port-mapping = <2 2 3 4>; 809 }; 810}; 811 812&tlmm { 813 gpio-reserved-ranges = <33 3>, /* Unused */ 814 <44 4>, /* SPI (TPM) */ 815 <238 1>; /* UFS Reset */ 816 817 edp_reg_en: edp-reg-en-state { 818 pins = "gpio70"; 819 function = "gpio"; 820 drive-strength = <16>; 821 bias-disable; 822 }; 823 824 nvme_reg_en: nvme-reg-en-state { 825 pins = "gpio18"; 826 function = "gpio"; 827 drive-strength = <2>; 828 bias-disable; 829 }; 830 831 pcie4_default: pcie4-default-state { 832 clkreq-n-pins { 833 pins = "gpio147"; 834 function = "pcie4_clk"; 835 drive-strength = <2>; 836 bias-pull-up; 837 }; 838 839 perst-n-pins { 840 pins = "gpio146"; 841 function = "gpio"; 842 drive-strength = <2>; 843 bias-disable; 844 }; 845 846 wake-n-pins { 847 pins = "gpio148"; 848 function = "gpio"; 849 drive-strength = <2>; 850 bias-pull-up; 851 }; 852 }; 853 854 pcie6a_default: pcie6a-default-state { 855 clkreq-n-pins { 856 pins = "gpio153"; 857 function = "pcie6a_clk"; 858 drive-strength = <2>; 859 bias-pull-up; 860 }; 861 862 perst-n-pins { 863 pins = "gpio152"; 864 function = "gpio"; 865 drive-strength = <2>; 866 bias-disable; 867 }; 868 869 wake-n-pins { 870 pins = "gpio154"; 871 function = "gpio"; 872 drive-strength = <2>; 873 bias-pull-up; 874 }; 875 }; 876 877 wcd_default: wcd-reset-n-active-state { 878 pins = "gpio191"; 879 function = "gpio"; 880 drive-strength = <16>; 881 bias-disable; 882 output-low; 883 }; 884}; 885 886&uart21 { 887 compatible = "qcom,geni-debug-uart"; 888 status = "okay"; 889}; 890 891&usb_1_ss0_hsphy { 892 vdd-supply = <&vreg_l3j_0p8>; 893 vdda12-supply = <&vreg_l2j_1p2>; 894 895 phys = <&smb2360_0_eusb2_repeater>; 896 897 status = "okay"; 898}; 899 900&usb_1_ss0_qmpphy { 901 vdda-phy-supply = <&vreg_l2j_1p2>; 902 vdda-pll-supply = <&vreg_l1j_0p8>; 903 904 status = "okay"; 905}; 906 907&usb_1_ss0 { 908 status = "okay"; 909}; 910 911&usb_1_ss0_dwc3 { 912 dr_mode = "host"; 913}; 914 915&usb_1_ss0_dwc3_hs { 916 remote-endpoint = <&pmic_glink_ss0_hs_in>; 917}; 918 919&usb_1_ss0_qmpphy_out { 920 remote-endpoint = <&pmic_glink_ss0_ss_in>; 921}; 922 923&usb_1_ss1_hsphy { 924 vdd-supply = <&vreg_l3j_0p8>; 925 vdda12-supply = <&vreg_l2j_1p2>; 926 927 phys = <&smb2360_1_eusb2_repeater>; 928 929 status = "okay"; 930}; 931 932&usb_1_ss1_qmpphy { 933 vdda-phy-supply = <&vreg_l2j_1p2>; 934 vdda-pll-supply = <&vreg_l2d_0p9>; 935 936 status = "okay"; 937}; 938 939&usb_1_ss1 { 940 status = "okay"; 941}; 942 943&usb_1_ss1_dwc3 { 944 dr_mode = "host"; 945}; 946 947&usb_1_ss1_dwc3_hs { 948 remote-endpoint = <&pmic_glink_ss1_hs_in>; 949}; 950 951&usb_1_ss1_qmpphy_out { 952 remote-endpoint = <&pmic_glink_ss1_ss_in>; 953}; 954 955&usb_1_ss2_hsphy { 956 vdd-supply = <&vreg_l3j_0p8>; 957 vdda12-supply = <&vreg_l2j_1p2>; 958 959 phys = <&smb2360_2_eusb2_repeater>; 960 961 status = "okay"; 962}; 963 964&usb_1_ss2_qmpphy { 965 vdda-phy-supply = <&vreg_l2j_1p2>; 966 vdda-pll-supply = <&vreg_l2d_0p9>; 967 968 status = "okay"; 969}; 970 971&usb_1_ss2 { 972 status = "okay"; 973}; 974 975&usb_1_ss2_dwc3 { 976 dr_mode = "host"; 977}; 978 979&usb_1_ss2_dwc3_hs { 980 remote-endpoint = <&pmic_glink_ss2_hs_in>; 981}; 982 983&usb_1_ss2_qmpphy_out { 984 remote-endpoint = <&pmic_glink_ss2_ss_in>; 985}; 986