1 /* SPDX-License-Identifier: GPL-2.0-only */ 2 /* 3 * Copyright (C) 2015 - ARM Ltd 4 * Author: Marc Zyngier <marc.zyngier@arm.com> 5 */ 6 7 #ifndef __ARM64_KVM_HYP_H__ 8 #define __ARM64_KVM_HYP_H__ 9 10 #include <linux/compiler.h> 11 #include <linux/kvm_host.h> 12 #include <asm/alternative.h> 13 #include <asm/sysreg.h> 14 15 DECLARE_PER_CPU(struct kvm_cpu_context, kvm_hyp_ctxt); 16 DECLARE_PER_CPU(unsigned long, kvm_hyp_vector); 17 DECLARE_PER_CPU(struct kvm_nvhe_init_params, kvm_init_params); 18 DECLARE_PER_CPU(int, hyp_cpu_number); 19 20 #define hyp_smp_processor_id() (__this_cpu_read(hyp_cpu_number)) 21 22 /* 23 * Unified accessors for registers that have a different encoding 24 * between VHE and non-VHE. They must be specified without their "ELx" 25 * encoding, but with the SYS_ prefix, as defined in asm/sysreg.h. 26 */ 27 28 #if defined(__KVM_VHE_HYPERVISOR__) 29 30 #define read_sysreg_el0(r) read_sysreg_s(r##_EL02) 31 #define write_sysreg_el0(v,r) write_sysreg_s(v, r##_EL02) 32 #define read_sysreg_el1(r) read_sysreg_s(r##_EL12) 33 #define write_sysreg_el1(v,r) write_sysreg_s(v, r##_EL12) 34 #define read_sysreg_el2(r) read_sysreg_s(r##_EL1) 35 #define write_sysreg_el2(v,r) write_sysreg_s(v, r##_EL1) 36 37 #else // !__KVM_VHE_HYPERVISOR__ 38 39 #if defined(__KVM_NVHE_HYPERVISOR__) 40 #define VHE_ALT_KEY ARM64_KVM_HVHE 41 #else 42 #define VHE_ALT_KEY ARM64_HAS_VIRT_HOST_EXTN 43 #endif 44 45 #define read_sysreg_elx(r,nvh,vh) \ 46 ({ \ 47 u64 reg; \ 48 asm volatile(ALTERNATIVE(__mrs_s("%0", r##nvh), \ 49 __mrs_s("%0", r##vh), \ 50 VHE_ALT_KEY) \ 51 : "=r" (reg)); \ 52 reg; \ 53 }) 54 55 #define write_sysreg_elx(v,r,nvh,vh) \ 56 do { \ 57 u64 __val = (u64)(v); \ 58 asm volatile(ALTERNATIVE(__msr_s(r##nvh, "%x0"), \ 59 __msr_s(r##vh, "%x0"), \ 60 VHE_ALT_KEY) \ 61 : : "rZ" (__val)); \ 62 } while (0) 63 64 #define read_sysreg_el0(r) read_sysreg_elx(r, _EL0, _EL02) 65 #define write_sysreg_el0(v,r) write_sysreg_elx(v, r, _EL0, _EL02) 66 #define read_sysreg_el1(r) read_sysreg_elx(r, _EL1, _EL12) 67 #define write_sysreg_el1(v,r) write_sysreg_elx(v, r, _EL1, _EL12) 68 #define read_sysreg_el2(r) read_sysreg_elx(r, _EL2, _EL1) 69 #define write_sysreg_el2(v,r) write_sysreg_elx(v, r, _EL2, _EL1) 70 71 #endif // __KVM_VHE_HYPERVISOR__ 72 73 /* 74 * Without an __arch_swab32(), we fall back to ___constant_swab32(), but the 75 * static inline can allow the compiler to out-of-line this. KVM always wants 76 * the macro version as it's always inlined. 77 */ 78 #define __kvm_swab32(x) ___constant_swab32(x) 79 80 int __vgic_v2_perform_cpuif_access(struct kvm_vcpu *vcpu); 81 82 void __vgic_v3_save_state(struct vgic_v3_cpu_if *cpu_if); 83 void __vgic_v3_restore_state(struct vgic_v3_cpu_if *cpu_if); 84 void __vgic_v3_activate_traps(struct vgic_v3_cpu_if *cpu_if); 85 void __vgic_v3_deactivate_traps(struct vgic_v3_cpu_if *cpu_if); 86 void __vgic_v3_save_vmcr_aprs(struct vgic_v3_cpu_if *cpu_if); 87 void __vgic_v3_restore_vmcr_aprs(struct vgic_v3_cpu_if *cpu_if); 88 int __vgic_v3_perform_cpuif_access(struct kvm_vcpu *vcpu); 89 90 #ifdef __KVM_NVHE_HYPERVISOR__ 91 void __timer_enable_traps(struct kvm_vcpu *vcpu); 92 void __timer_disable_traps(struct kvm_vcpu *vcpu); 93 #endif 94 95 #ifdef __KVM_NVHE_HYPERVISOR__ 96 void __sysreg_save_state_nvhe(struct kvm_cpu_context *ctxt); 97 void __sysreg_restore_state_nvhe(struct kvm_cpu_context *ctxt); 98 #else 99 void __vcpu_load_switch_sysregs(struct kvm_vcpu *vcpu); 100 void __vcpu_put_switch_sysregs(struct kvm_vcpu *vcpu); 101 void sysreg_save_host_state_vhe(struct kvm_cpu_context *ctxt); 102 void sysreg_restore_host_state_vhe(struct kvm_cpu_context *ctxt); 103 void sysreg_save_guest_state_vhe(struct kvm_cpu_context *ctxt); 104 void sysreg_restore_guest_state_vhe(struct kvm_cpu_context *ctxt); 105 #endif 106 107 void __debug_switch_to_guest(struct kvm_vcpu *vcpu); 108 void __debug_switch_to_host(struct kvm_vcpu *vcpu); 109 110 #ifdef __KVM_NVHE_HYPERVISOR__ 111 void __debug_save_host_buffers_nvhe(struct kvm_vcpu *vcpu); 112 void __debug_restore_host_buffers_nvhe(struct kvm_vcpu *vcpu); 113 #endif 114 115 void __fpsimd_save_state(struct user_fpsimd_state *fp_regs); 116 void __fpsimd_restore_state(struct user_fpsimd_state *fp_regs); 117 void __sve_save_state(void *sve_pffr, u32 *fpsr, int save_ffr); 118 void __sve_restore_state(void *sve_pffr, u32 *fpsr, int restore_ffr); 119 120 u64 __guest_enter(struct kvm_vcpu *vcpu); 121 122 123 bool kvm_host_psci_handler(struct kvm_cpu_context *host_ctxt, u32 func_id); 124 bool kvm_host_scmi_handler(struct kvm_cpu_context *host_ctxt); 125 126 #ifdef __KVM_NVHE_HYPERVISOR__ 127 void __noreturn __hyp_do_panic(struct kvm_cpu_context *host_ctxt, u64 spsr, 128 u64 elr, u64 par); 129 #endif 130 131 #ifdef __KVM_NVHE_HYPERVISOR__ 132 void __pkvm_init_switch_pgd(phys_addr_t pgd, unsigned long sp, 133 void (*fn)(void)); 134 int __pkvm_init(phys_addr_t phys, unsigned long size, unsigned long nr_cpus, 135 unsigned long *per_cpu_base, u32 hyp_va_bits); 136 void __noreturn __host_enter(struct kvm_cpu_context *host_ctxt); 137 void __hyp_enter(void); 138 void __hyp_exit(void); 139 #endif 140 141 extern u64 kvm_nvhe_sym(id_aa64pfr0_el1_sys_val); 142 extern u64 kvm_nvhe_sym(id_aa64pfr1_el1_sys_val); 143 extern u64 kvm_nvhe_sym(id_aa64zfr0_el1_sys_val); 144 extern u64 kvm_nvhe_sym(id_aa64isar0_el1_sys_val); 145 extern u64 kvm_nvhe_sym(id_aa64isar1_el1_sys_val); 146 extern u64 kvm_nvhe_sym(id_aa64isar2_el1_sys_val); 147 extern u64 kvm_nvhe_sym(id_aa64mmfr0_el1_sys_val); 148 extern u64 kvm_nvhe_sym(id_aa64mmfr1_el1_sys_val); 149 extern u64 kvm_nvhe_sym(id_aa64mmfr2_el1_sys_val); 150 extern u64 kvm_nvhe_sym(id_aa64smfr0_el1_sys_val); 151 152 extern unsigned long kvm_nvhe_sym(__icache_flags); 153 extern unsigned int kvm_nvhe_sym(kvm_arm_vmid_bits); 154 extern unsigned int kvm_nvhe_sym(kvm_sve_max_vl); 155 extern unsigned int kvm_nvhe_sym(kvm_host_sve_max_vl); 156 extern bool kvm_nvhe_sym(smccc_trng_available); 157 158 #endif /* __ARM64_KVM_HYP_H__ */ 159