1 /* SPDX-License-Identifier: GPL-2.0-only */
2 /*
3 * Copyright (C) 2012 ARM Ltd.
4 */
5 #ifndef __ASM_MODULE_H
6 #define __ASM_MODULE_H
7
8 #include <asm-generic/module.h>
9
10 #ifdef CONFIG_KVM
11 struct pkvm_module_section {
12 void *start;
13 void *end;
14 };
15
16 typedef s32 kvm_nvhe_reloc_t;
17 struct pkvm_module_ops;
18
19 struct pkvm_el2_sym {
20 char *name;
21 __le32 *rela_pos;
22 struct list_head node;
23 };
24
25 struct pkvm_el2_module {
26 struct pkvm_module_section text;
27 struct pkvm_module_section bss;
28 struct pkvm_module_section rodata;
29 struct pkvm_module_section data;
30 struct pkvm_module_section event_ids;
31 struct pkvm_module_section patchable_function_entries;
32 struct pkvm_module_section sections;
33 void *hyp_va;
34 struct hyp_event *hyp_events;
35 struct hyp_printk_fmt *hyp_printk_fmts;
36 unsigned int nr_hyp_events;
37 unsigned int nr_hyp_printk_fmts;
38 kvm_nvhe_reloc_t *relocs;
39 struct list_head node;
40 struct list_head ext_symbols;
41 unsigned int nr_relocs;
42 int (*init)(const struct pkvm_module_ops *ops);
43 };
44
45 void kvm_apply_hyp_module_relocations(struct pkvm_el2_module *mod,
46 kvm_nvhe_reloc_t *begin,
47 kvm_nvhe_reloc_t *end);
48
49 #define ARM64_MODULE_KVM_ARCHDATA \
50 /* For pKVM hypervisor modules */ \
51 struct pkvm_el2_module hyp;
52 #else
53 #define ARM64_MODULE_KVM_ARCHDATA
54 #endif
55
56 struct mod_plt_sec {
57 int plt_shndx;
58 int plt_num_entries;
59 int plt_max_entries;
60 };
61
62 struct mod_arch_specific {
63 struct mod_plt_sec core;
64 struct mod_plt_sec init;
65
66 /* for CONFIG_DYNAMIC_FTRACE */
67 struct plt_entry *ftrace_trampolines;
68
69 ARM64_MODULE_KVM_ARCHDATA
70 };
71
72 u64 module_emit_plt_entry(struct module *mod, Elf64_Shdr *sechdrs,
73 void *loc, const Elf64_Rela *rela,
74 Elf64_Sym *sym);
75
76 u64 module_emit_veneer_for_adrp(struct module *mod, Elf64_Shdr *sechdrs,
77 void *loc, u64 val);
78
79 struct plt_entry {
80 /*
81 * A program that conforms to the AArch64 Procedure Call Standard
82 * (AAPCS64) must assume that a veneer that alters IP0 (x16) and/or
83 * IP1 (x17) may be inserted at any branch instruction that is
84 * exposed to a relocation that supports long branches. Since that
85 * is exactly what we are dealing with here, we are free to use x16
86 * as a scratch register in the PLT veneers.
87 */
88 __le32 adrp; /* adrp x16, .... */
89 __le32 add; /* add x16, x16, #0x.... */
90 __le32 br; /* br x16 */
91 };
92
is_forbidden_offset_for_adrp(void * place)93 static inline bool is_forbidden_offset_for_adrp(void *place)
94 {
95 return cpus_have_final_cap(ARM64_WORKAROUND_843419) &&
96 ((u64)place & 0xfff) >= 0xff8;
97 }
98
99 struct plt_entry get_plt_entry(u64 dst, void *pc);
100
find_section(const Elf_Ehdr * hdr,const Elf_Shdr * sechdrs,const char * name)101 static inline const Elf_Shdr *find_section(const Elf_Ehdr *hdr,
102 const Elf_Shdr *sechdrs,
103 const char *name)
104 {
105 const Elf_Shdr *s, *se;
106 const char *secstrs = (void *)hdr + sechdrs[hdr->e_shstrndx].sh_offset;
107
108 for (s = sechdrs, se = sechdrs + hdr->e_shnum; s < se; s++) {
109 if (strcmp(name, secstrs + s->sh_name) == 0)
110 return s;
111 }
112
113 return NULL;
114 }
115
116 #endif /* __ASM_MODULE_H */
117