1 // SPDX-License-Identifier: GPL-2.0-only
2 /*
3 * Copyright (C) 2014-2017 Linaro Ltd. <ard.biesheuvel@linaro.org>
4 */
5
6 #include <linux/elf.h>
7 #include <linux/ftrace.h>
8 #include <linux/kernel.h>
9 #include <linux/module.h>
10 #include <linux/moduleloader.h>
11 #include <linux/sort.h>
12
13 #include <asm/kvm_pkvm_module.h>
14
__get_adrp_add_pair(u64 dst,u64 pc,enum aarch64_insn_register reg)15 static struct plt_entry __get_adrp_add_pair(u64 dst, u64 pc,
16 enum aarch64_insn_register reg)
17 {
18 u32 adrp, add;
19
20 adrp = aarch64_insn_gen_adr(pc, dst, reg, AARCH64_INSN_ADR_TYPE_ADRP);
21 add = aarch64_insn_gen_add_sub_imm(reg, reg, dst % SZ_4K,
22 AARCH64_INSN_VARIANT_64BIT,
23 AARCH64_INSN_ADSB_ADD);
24
25 return (struct plt_entry){ cpu_to_le32(adrp), cpu_to_le32(add) };
26 }
27
get_plt_entry(u64 dst,void * pc)28 struct plt_entry get_plt_entry(u64 dst, void *pc)
29 {
30 struct plt_entry plt;
31 static u32 br;
32
33 if (!br)
34 br = aarch64_insn_gen_branch_reg(AARCH64_INSN_REG_16,
35 AARCH64_INSN_BRANCH_NOLINK);
36
37 plt = __get_adrp_add_pair(dst, (u64)pc, AARCH64_INSN_REG_16);
38 plt.br = cpu_to_le32(br);
39
40 return plt;
41 }
42
plt_entries_equal(const struct plt_entry * a,const struct plt_entry * b)43 static bool plt_entries_equal(const struct plt_entry *a,
44 const struct plt_entry *b)
45 {
46 u64 p, q;
47
48 /*
49 * Check whether both entries refer to the same target:
50 * do the cheapest checks first.
51 * If the 'add' or 'br' opcodes are different, then the target
52 * cannot be the same.
53 */
54 if (a->add != b->add || a->br != b->br)
55 return false;
56
57 p = ALIGN_DOWN((u64)a, SZ_4K);
58 q = ALIGN_DOWN((u64)b, SZ_4K);
59
60 /*
61 * If the 'adrp' opcodes are the same then we just need to check
62 * that they refer to the same 4k region.
63 */
64 if (a->adrp == b->adrp && p == q)
65 return true;
66
67 return (p + aarch64_insn_adrp_get_offset(le32_to_cpu(a->adrp))) ==
68 (q + aarch64_insn_adrp_get_offset(le32_to_cpu(b->adrp)));
69 }
70
module_emit_plt_entry(struct module * mod,Elf64_Shdr * sechdrs,void * loc,const Elf64_Rela * rela,Elf64_Sym * sym)71 u64 module_emit_plt_entry(struct module *mod, Elf64_Shdr *sechdrs,
72 void *loc, const Elf64_Rela *rela,
73 Elf64_Sym *sym)
74 {
75 struct mod_plt_sec *pltsec = !within_module_init((unsigned long)loc, mod) ?
76 &mod->arch.core : &mod->arch.init;
77 struct plt_entry *plt = (struct plt_entry *)sechdrs[pltsec->plt_shndx].sh_addr;
78 int i = pltsec->plt_num_entries;
79 int j = i - 1;
80 u64 val = sym->st_value + rela->r_addend;
81
82 if (is_forbidden_offset_for_adrp(&plt[i].adrp))
83 i++;
84
85 plt[i] = get_plt_entry(val, &plt[i]);
86
87 /*
88 * Check if the entry we just created is a duplicate. Given that the
89 * relocations are sorted, this will be the last entry we allocated.
90 * (if one exists).
91 */
92 if (j >= 0 && plt_entries_equal(plt + i, plt + j))
93 return (u64)&plt[j];
94
95 pltsec->plt_num_entries += i - j;
96 if (WARN_ON(pltsec->plt_num_entries > pltsec->plt_max_entries))
97 return 0;
98
99 return (u64)&plt[i];
100 }
101
102 #ifdef CONFIG_ARM64_ERRATUM_843419
module_emit_veneer_for_adrp(struct module * mod,Elf64_Shdr * sechdrs,void * loc,u64 val)103 u64 module_emit_veneer_for_adrp(struct module *mod, Elf64_Shdr *sechdrs,
104 void *loc, u64 val)
105 {
106 struct mod_plt_sec *pltsec = !within_module_init((unsigned long)loc, mod) ?
107 &mod->arch.core : &mod->arch.init;
108 struct plt_entry *plt = (struct plt_entry *)sechdrs[pltsec->plt_shndx].sh_addr;
109 int i = pltsec->plt_num_entries++;
110 u32 br;
111 int rd;
112
113 if (WARN_ON(pltsec->plt_num_entries > pltsec->plt_max_entries))
114 return 0;
115
116 if (is_forbidden_offset_for_adrp(&plt[i].adrp))
117 i = pltsec->plt_num_entries++;
118
119 /* get the destination register of the ADRP instruction */
120 rd = aarch64_insn_decode_register(AARCH64_INSN_REGTYPE_RD,
121 le32_to_cpup((__le32 *)loc));
122
123 br = aarch64_insn_gen_branch_imm((u64)&plt[i].br, (u64)loc + 4,
124 AARCH64_INSN_BRANCH_NOLINK);
125
126 plt[i] = __get_adrp_add_pair(val, (u64)&plt[i], rd);
127 plt[i].br = cpu_to_le32(br);
128
129 return (u64)&plt[i];
130 }
131 #endif
132
133 #define cmp_3way(a, b) ((a) < (b) ? -1 : (a) > (b))
134
cmp_rela(const void * a,const void * b)135 static int cmp_rela(const void *a, const void *b)
136 {
137 const Elf64_Rela *x = a, *y = b;
138 int i;
139
140 /* sort by type, symbol index and addend */
141 i = cmp_3way(ELF64_R_TYPE(x->r_info), ELF64_R_TYPE(y->r_info));
142 if (i == 0)
143 i = cmp_3way(ELF64_R_SYM(x->r_info), ELF64_R_SYM(y->r_info));
144 if (i == 0)
145 i = cmp_3way(x->r_addend, y->r_addend);
146 return i;
147 }
148
duplicate_rel(const Elf64_Rela * rela,int num)149 static bool duplicate_rel(const Elf64_Rela *rela, int num)
150 {
151 /*
152 * Entries are sorted by type, symbol index and addend. That means
153 * that, if a duplicate entry exists, it must be in the preceding
154 * slot.
155 */
156 return num > 0 && cmp_rela(rela + num, rela + num - 1) == 0;
157 }
158
count_plts(Elf64_Sym * syms,Elf64_Rela * rela,int num,Elf64_Word dstidx,Elf_Shdr * dstsec)159 static unsigned int count_plts(Elf64_Sym *syms, Elf64_Rela *rela, int num,
160 Elf64_Word dstidx, Elf_Shdr *dstsec)
161 {
162 unsigned int ret = 0;
163 Elf64_Sym *s;
164 int i;
165
166 for (i = 0; i < num; i++) {
167 u64 min_align;
168
169 switch (ELF64_R_TYPE(rela[i].r_info)) {
170 case R_AARCH64_JUMP26:
171 case R_AARCH64_CALL26:
172 /*
173 * We only have to consider branch targets that resolve
174 * to symbols that are defined in a different section.
175 * This is not simply a heuristic, it is a fundamental
176 * limitation, since there is no guaranteed way to emit
177 * PLT entries sufficiently close to the branch if the
178 * section size exceeds the range of a branch
179 * instruction. So ignore relocations against defined
180 * symbols if they live in the same section as the
181 * relocation target.
182 */
183 s = syms + ELF64_R_SYM(rela[i].r_info);
184 if (s->st_shndx == dstidx)
185 break;
186
187 /*
188 * Jump relocations with non-zero addends against
189 * undefined symbols are supported by the ELF spec, but
190 * do not occur in practice (e.g., 'jump n bytes past
191 * the entry point of undefined function symbol f').
192 * So we need to support them, but there is no need to
193 * take them into consideration when trying to optimize
194 * this code. So let's only check for duplicates when
195 * the addend is zero: this allows us to record the PLT
196 * entry address in the symbol table itself, rather than
197 * having to search the list for duplicates each time we
198 * emit one.
199 */
200 if (rela[i].r_addend != 0 || !duplicate_rel(rela, i))
201 ret++;
202 break;
203 case R_AARCH64_ADR_PREL_PG_HI21_NC:
204 case R_AARCH64_ADR_PREL_PG_HI21:
205 if (!cpus_have_final_cap(ARM64_WORKAROUND_843419))
206 break;
207
208 /*
209 * Determine the minimal safe alignment for this ADRP
210 * instruction: the section alignment at which it is
211 * guaranteed not to appear at a vulnerable offset.
212 *
213 * This comes down to finding the least significant zero
214 * bit in bits [11:3] of the section offset, and
215 * increasing the section's alignment so that the
216 * resulting address of this instruction is guaranteed
217 * to equal the offset in that particular bit (as well
218 * as all less significant bits). This ensures that the
219 * address modulo 4 KB != 0xfff8 or 0xfffc (which would
220 * have all ones in bits [11:3])
221 */
222 min_align = 2ULL << ffz(rela[i].r_offset | 0x7);
223
224 /*
225 * Allocate veneer space for each ADRP that may appear
226 * at a vulnerable offset nonetheless. At relocation
227 * time, some of these will remain unused since some
228 * ADRP instructions can be patched to ADR instructions
229 * instead.
230 */
231 if (min_align > SZ_4K)
232 ret++;
233 else
234 dstsec->sh_addralign = max(dstsec->sh_addralign,
235 min_align);
236 break;
237 }
238 }
239
240 if (cpus_have_final_cap(ARM64_WORKAROUND_843419)) {
241 /*
242 * Add some slack so we can skip PLT slots that may trigger
243 * the erratum due to the placement of the ADRP instruction.
244 */
245 ret += DIV_ROUND_UP(ret, (SZ_4K / sizeof(struct plt_entry)));
246 }
247
248 return ret;
249 }
250
branch_rela_needs_plt(Elf64_Sym * syms,Elf64_Rela * rela,Elf64_Word dstidx)251 static bool branch_rela_needs_plt(Elf64_Sym *syms, Elf64_Rela *rela,
252 Elf64_Word dstidx)
253 {
254
255 Elf64_Sym *s = syms + ELF64_R_SYM(rela->r_info);
256
257 if (s->st_shndx == dstidx)
258 return false;
259
260 return ELF64_R_TYPE(rela->r_info) == R_AARCH64_JUMP26 ||
261 ELF64_R_TYPE(rela->r_info) == R_AARCH64_CALL26;
262 }
263
264 /* Group branch PLT relas at the front end of the array. */
partition_branch_plt_relas(Elf64_Sym * syms,Elf64_Rela * rela,int numrels,Elf64_Word dstidx)265 static int partition_branch_plt_relas(Elf64_Sym *syms, Elf64_Rela *rela,
266 int numrels, Elf64_Word dstidx)
267 {
268 int i = 0, j = numrels - 1;
269
270 while (i < j) {
271 if (branch_rela_needs_plt(syms, &rela[i], dstidx))
272 i++;
273 else if (branch_rela_needs_plt(syms, &rela[j], dstidx))
274 swap(rela[i], rela[j]);
275 else
276 j--;
277 }
278
279 return i;
280 }
281
module_frob_arch_sections(Elf_Ehdr * ehdr,Elf_Shdr * sechdrs,char * secstrings,struct module * mod)282 int module_frob_arch_sections(Elf_Ehdr *ehdr, Elf_Shdr *sechdrs,
283 char *secstrings, struct module *mod)
284 {
285 unsigned long core_plts = 0;
286 unsigned long init_plts = 0;
287 Elf64_Sym *syms = NULL;
288 Elf_Shdr *pltsec, *tramp = NULL;
289 int i;
290
291 /*
292 * Find the empty .plt section so we can expand it to store the PLT
293 * entries. Record the symtab address as well.
294 */
295 for (i = 0; i < ehdr->e_shnum; i++) {
296 if (!strcmp(secstrings + sechdrs[i].sh_name, ".plt"))
297 mod->arch.core.plt_shndx = i;
298 else if (!strcmp(secstrings + sechdrs[i].sh_name, ".init.plt"))
299 mod->arch.init.plt_shndx = i;
300 else if (!strcmp(secstrings + sechdrs[i].sh_name,
301 ".text.ftrace_trampoline"))
302 tramp = sechdrs + i;
303 else if (sechdrs[i].sh_type == SHT_SYMTAB)
304 syms = (Elf64_Sym *)sechdrs[i].sh_addr;
305 }
306
307 if (!mod->arch.core.plt_shndx || !mod->arch.init.plt_shndx) {
308 pr_err("%s: module PLT section(s) missing\n", mod->name);
309 return -ENOEXEC;
310 }
311 if (!syms) {
312 pr_err("%s: module symtab section missing\n", mod->name);
313 return -ENOEXEC;
314 }
315
316 for (i = 0; i < ehdr->e_shnum; i++) {
317 Elf64_Rela *rels = (void *)ehdr + sechdrs[i].sh_offset;
318 int nents, numrels = sechdrs[i].sh_size / sizeof(Elf64_Rela);
319 Elf64_Shdr *dstsec = sechdrs + sechdrs[i].sh_info;
320
321 if (sechdrs[i].sh_type != SHT_RELA)
322 continue;
323
324 /* ignore relocations that operate on non-exec sections */
325 if (!(dstsec->sh_flags & SHF_EXECINSTR))
326 continue;
327
328 /*
329 * sort branch relocations requiring a PLT by type, symbol index
330 * and addend
331 */
332 nents = partition_branch_plt_relas(syms, rels, numrels,
333 sechdrs[i].sh_info);
334 if (nents)
335 sort(rels, nents, sizeof(Elf64_Rela), cmp_rela, NULL);
336
337 if (!module_init_layout_section(secstrings + dstsec->sh_name))
338 core_plts += count_plts(syms, rels, numrels,
339 sechdrs[i].sh_info, dstsec);
340 else
341 init_plts += count_plts(syms, rels, numrels,
342 sechdrs[i].sh_info, dstsec);
343 }
344
345 pltsec = sechdrs + mod->arch.core.plt_shndx;
346 pltsec->sh_type = SHT_NOBITS;
347 pltsec->sh_flags = SHF_EXECINSTR | SHF_ALLOC;
348 pltsec->sh_addralign = L1_CACHE_BYTES;
349 pltsec->sh_size = (core_plts + 1) * sizeof(struct plt_entry);
350 mod->arch.core.plt_num_entries = 0;
351 mod->arch.core.plt_max_entries = core_plts;
352
353 pltsec = sechdrs + mod->arch.init.plt_shndx;
354 pltsec->sh_type = SHT_NOBITS;
355 pltsec->sh_flags = SHF_EXECINSTR | SHF_ALLOC;
356 pltsec->sh_addralign = L1_CACHE_BYTES;
357 pltsec->sh_size = (init_plts + 1) * sizeof(struct plt_entry);
358 mod->arch.init.plt_num_entries = 0;
359 mod->arch.init.plt_max_entries = init_plts;
360
361 if (tramp) {
362 tramp->sh_type = SHT_NOBITS;
363 tramp->sh_flags = SHF_EXECINSTR | SHF_ALLOC;
364 tramp->sh_addralign = __alignof__(struct plt_entry);
365 tramp->sh_size = NR_FTRACE_PLTS * sizeof(struct plt_entry);
366 }
367
368 #if IS_ENABLED(CONFIG_KVM)
369 pkvm_el2_mod_frob_sections(ehdr, sechdrs, secstrings);
370 #endif
371
372 return 0;
373 }
374