1 // SPDX-License-Identifier: GPL-2.0
2 /*
3 * Early cpufeature override framework
4 *
5 * Copyright (C) 2020 Google LLC
6 * Author: Marc Zyngier <maz@kernel.org>
7 */
8
9 #include <linux/ctype.h>
10 #include <linux/kernel.h>
11 #include <linux/libfdt.h>
12
13 #include <asm/cacheflush.h>
14 #include <asm/cpufeature.h>
15 #include <asm/setup.h>
16
17 #include "pi.h"
18
19 #define FTR_DESC_NAME_LEN 20
20 #define FTR_DESC_FIELD_LEN 10
21 #define FTR_ALIAS_NAME_LEN 30
22 #define FTR_ALIAS_OPTION_LEN 116
23
24 static u64 __boot_status __initdata;
25
26 typedef bool filter_t(u64 val);
27
28 struct ftr_set_desc {
29 char name[FTR_DESC_NAME_LEN];
30 PREL64(struct arm64_ftr_override, override);
31 struct {
32 char name[FTR_DESC_FIELD_LEN];
33 u8 shift;
34 u8 width;
35 PREL64(filter_t, filter);
36 } fields[];
37 };
38
39 #define FIELD(n, s, f) { .name = n, .shift = s, .width = 4, .filter = f }
40
mmfr1_vh_filter(u64 val)41 static bool __init mmfr1_vh_filter(u64 val)
42 {
43 /*
44 * If we ever reach this point while running VHE, we're
45 * guaranteed to be on one of these funky, VHE-stuck CPUs. If
46 * the user was trying to force nVHE on us, proceed with
47 * attitude adjustment.
48 */
49 return !(__boot_status == (BOOT_CPU_FLAG_E2H | BOOT_CPU_MODE_EL2) &&
50 val == 0);
51 }
52
53 static const struct ftr_set_desc mmfr1 __prel64_initconst = {
54 .name = "id_aa64mmfr1",
55 .override = &id_aa64mmfr1_override,
56 .fields = {
57 FIELD("vh", ID_AA64MMFR1_EL1_VH_SHIFT, mmfr1_vh_filter),
58 {}
59 },
60 };
61
62
mmfr2_varange_filter(u64 val)63 static bool __init mmfr2_varange_filter(u64 val)
64 {
65 int __maybe_unused feat;
66
67 if (val)
68 return false;
69
70 #ifdef CONFIG_ARM64_LPA2
71 feat = cpuid_feature_extract_signed_field(read_sysreg(id_aa64mmfr0_el1),
72 ID_AA64MMFR0_EL1_TGRAN_SHIFT);
73 if (feat >= ID_AA64MMFR0_EL1_TGRAN_LPA2) {
74 id_aa64mmfr0_override.val |=
75 (ID_AA64MMFR0_EL1_TGRAN_LPA2 - 1) << ID_AA64MMFR0_EL1_TGRAN_SHIFT;
76 id_aa64mmfr0_override.mask |= 0xfU << ID_AA64MMFR0_EL1_TGRAN_SHIFT;
77
78 /*
79 * Override PARange to 48 bits - the override will just be
80 * ignored if the actual PARange is smaller, but this is
81 * unlikely to be the case for LPA2 capable silicon.
82 */
83 id_aa64mmfr0_override.val |=
84 ID_AA64MMFR0_EL1_PARANGE_48 << ID_AA64MMFR0_EL1_PARANGE_SHIFT;
85 id_aa64mmfr0_override.mask |= 0xfU << ID_AA64MMFR0_EL1_PARANGE_SHIFT;
86 }
87 #endif
88 return true;
89 }
90
91 static const struct ftr_set_desc mmfr2 __prel64_initconst = {
92 .name = "id_aa64mmfr2",
93 .override = &id_aa64mmfr2_override,
94 .fields = {
95 FIELD("varange", ID_AA64MMFR2_EL1_VARange_SHIFT, mmfr2_varange_filter),
96 {}
97 },
98 };
99
pfr0_sve_filter(u64 val)100 static bool __init pfr0_sve_filter(u64 val)
101 {
102 /*
103 * Disabling SVE also means disabling all the features that
104 * are associated with it. The easiest way to do it is just to
105 * override id_aa64zfr0_el1 to be 0.
106 */
107 if (!val) {
108 id_aa64zfr0_override.val = 0;
109 id_aa64zfr0_override.mask = GENMASK(63, 0);
110 }
111
112 return true;
113 }
114
115 static const struct ftr_set_desc pfr0 __prel64_initconst = {
116 .name = "id_aa64pfr0",
117 .override = &id_aa64pfr0_override,
118 .fields = {
119 FIELD("sve", ID_AA64PFR0_EL1_SVE_SHIFT, pfr0_sve_filter),
120 FIELD("el0", ID_AA64PFR0_EL1_EL0_SHIFT, NULL),
121 FIELD("mpam", ID_AA64PFR0_EL1_MPAM_SHIFT, NULL),
122 {}
123 },
124 };
125
pfr1_sme_filter(u64 val)126 static bool __init pfr1_sme_filter(u64 val)
127 {
128 /*
129 * Similarly to SVE, disabling SME also means disabling all
130 * the features that are associated with it. Just set
131 * id_aa64smfr0_el1 to 0 and don't look back.
132 */
133 if (!val) {
134 id_aa64smfr0_override.val = 0;
135 id_aa64smfr0_override.mask = GENMASK(63, 0);
136 }
137
138 return true;
139 }
140
141 static const struct ftr_set_desc pfr1 __prel64_initconst = {
142 .name = "id_aa64pfr1",
143 .override = &id_aa64pfr1_override,
144 .fields = {
145 FIELD("bt", ID_AA64PFR1_EL1_BT_SHIFT, NULL ),
146 FIELD("mte", ID_AA64PFR1_EL1_MTE_SHIFT, NULL),
147 FIELD("sme", ID_AA64PFR1_EL1_SME_SHIFT, pfr1_sme_filter),
148 FIELD("mpam_frac", ID_AA64PFR1_EL1_MPAM_frac_SHIFT, NULL),
149 {}
150 },
151 };
152
153 static const struct ftr_set_desc isar1 __prel64_initconst = {
154 .name = "id_aa64isar1",
155 .override = &id_aa64isar1_override,
156 .fields = {
157 FIELD("gpi", ID_AA64ISAR1_EL1_GPI_SHIFT, NULL),
158 FIELD("gpa", ID_AA64ISAR1_EL1_GPA_SHIFT, NULL),
159 FIELD("api", ID_AA64ISAR1_EL1_API_SHIFT, NULL),
160 FIELD("apa", ID_AA64ISAR1_EL1_APA_SHIFT, NULL),
161 {}
162 },
163 };
164
165 static const struct ftr_set_desc isar2 __prel64_initconst = {
166 .name = "id_aa64isar2",
167 .override = &id_aa64isar2_override,
168 .fields = {
169 FIELD("gpa3", ID_AA64ISAR2_EL1_GPA3_SHIFT, NULL),
170 FIELD("apa3", ID_AA64ISAR2_EL1_APA3_SHIFT, NULL),
171 FIELD("mops", ID_AA64ISAR2_EL1_MOPS_SHIFT, NULL),
172 {}
173 },
174 };
175
176 static const struct ftr_set_desc smfr0 __prel64_initconst = {
177 .name = "id_aa64smfr0",
178 .override = &id_aa64smfr0_override,
179 .fields = {
180 FIELD("smever", ID_AA64SMFR0_EL1_SMEver_SHIFT, NULL),
181 /* FA64 is a one bit field... :-/ */
182 { "fa64", ID_AA64SMFR0_EL1_FA64_SHIFT, 1, },
183 {}
184 },
185 };
186
hvhe_filter(u64 val)187 static bool __init hvhe_filter(u64 val)
188 {
189 u64 mmfr1 = read_sysreg(id_aa64mmfr1_el1);
190
191 return (val == 1 &&
192 lower_32_bits(__boot_status) == BOOT_CPU_MODE_EL2 &&
193 cpuid_feature_extract_unsigned_field(mmfr1,
194 ID_AA64MMFR1_EL1_VH_SHIFT));
195 }
196
197 static const struct ftr_set_desc sw_features __prel64_initconst = {
198 .name = "arm64_sw",
199 .override = &arm64_sw_feature_override,
200 .fields = {
201 FIELD("nokaslr", ARM64_SW_FEATURE_OVERRIDE_NOKASLR, NULL),
202 FIELD("hvhe", ARM64_SW_FEATURE_OVERRIDE_HVHE, hvhe_filter),
203 FIELD("rodataoff", ARM64_SW_FEATURE_OVERRIDE_RODATA_OFF, NULL),
204 {}
205 },
206 };
207
208 static const
209 PREL64(const struct ftr_set_desc, reg) regs[] __prel64_initconst = {
210 { &mmfr1 },
211 { &mmfr2 },
212 { &pfr0 },
213 { &pfr1 },
214 { &isar1 },
215 { &isar2 },
216 { &smfr0 },
217 { &sw_features },
218 };
219
220 static const struct {
221 char alias[FTR_ALIAS_NAME_LEN];
222 char feature[FTR_ALIAS_OPTION_LEN];
223 } aliases[] __initconst = {
224 { "kvm_arm.mode=nvhe", "arm64_sw.hvhe=0 id_aa64mmfr1.vh=0" },
225 { "kvm_arm.mode=protected", "arm64_sw.hvhe=1" },
226 { "arm64.nosve", "id_aa64pfr0.sve=0" },
227 { "arm64.nosme", "id_aa64pfr1.sme=0" },
228 { "arm64.nobti", "id_aa64pfr1.bt=0" },
229 { "arm64.nopauth",
230 "id_aa64isar1.gpi=0 id_aa64isar1.gpa=0 "
231 "id_aa64isar1.api=0 id_aa64isar1.apa=0 "
232 "id_aa64isar2.gpa3=0 id_aa64isar2.apa3=0" },
233 { "arm64.nomops", "id_aa64isar2.mops=0" },
234 { "arm64.nomte", "id_aa64pfr1.mte=0" },
235 { "nokaslr", "arm64_sw.nokaslr=1" },
236 { "rodata=off", "arm64_sw.rodataoff=1" },
237 { "arm64.nolva", "id_aa64mmfr2.varange=0" },
238 { "arm64.no32bit_el0", "id_aa64pfr0.el0=1" },
239 { "arm64.nompam", "id_aa64pfr0.mpam=0 id_aa64pfr1.mpam_frac=0" },
240 };
241
parse_hexdigit(const char * p,u64 * v)242 static int __init parse_hexdigit(const char *p, u64 *v)
243 {
244 // skip "0x" if it comes next
245 if (p[0] == '0' && tolower(p[1]) == 'x')
246 p += 2;
247
248 // check whether the RHS is a single hex digit
249 if (!isxdigit(p[0]) || (p[1] && !isspace(p[1])))
250 return -EINVAL;
251
252 *v = tolower(*p) - (isdigit(*p) ? '0' : 'a' - 10);
253 return 0;
254 }
255
find_field(const char * cmdline,char * opt,int len,const struct ftr_set_desc * reg,int f,u64 * v)256 static int __init find_field(const char *cmdline, char *opt, int len,
257 const struct ftr_set_desc *reg, int f, u64 *v)
258 {
259 int flen = strlen(reg->fields[f].name);
260
261 // append '<fieldname>=' to obtain '<name>.<fieldname>='
262 memcpy(opt + len, reg->fields[f].name, flen);
263 len += flen;
264 opt[len++] = '=';
265
266 if (memcmp(cmdline, opt, len))
267 return -1;
268
269 return parse_hexdigit(cmdline + len, v);
270 }
271
match_options(const char * cmdline)272 static void __init match_options(const char *cmdline)
273 {
274 char opt[FTR_DESC_NAME_LEN + FTR_DESC_FIELD_LEN + 2];
275 int i;
276
277 for (i = 0; i < ARRAY_SIZE(regs); i++) {
278 const struct ftr_set_desc *reg = prel64_pointer(regs[i].reg);
279 struct arm64_ftr_override *override;
280 int len = strlen(reg->name);
281 int f;
282
283 override = prel64_pointer(reg->override);
284
285 // set opt[] to '<name>.'
286 memcpy(opt, reg->name, len);
287 opt[len++] = '.';
288
289 for (f = 0; reg->fields[f].name[0] != '\0'; f++) {
290 u64 shift = reg->fields[f].shift;
291 u64 width = reg->fields[f].width ?: 4;
292 u64 mask = GENMASK_ULL(shift + width - 1, shift);
293 bool (*filter)(u64 val);
294 u64 v;
295
296 if (find_field(cmdline, opt, len, reg, f, &v))
297 continue;
298
299 /*
300 * If an override gets filtered out, advertise
301 * it by setting the value to the all-ones while
302 * clearing the mask... Yes, this is fragile.
303 */
304 filter = prel64_pointer(reg->fields[f].filter);
305 if (filter && !filter(v)) {
306 override->val |= mask;
307 override->mask &= ~mask;
308 continue;
309 }
310
311 override->val &= ~mask;
312 override->val |= (v << shift) & mask;
313 override->mask |= mask;
314
315 return;
316 }
317 }
318 }
319
__parse_cmdline(const char * cmdline,bool parse_aliases)320 static __init void __parse_cmdline(const char *cmdline, bool parse_aliases)
321 {
322 do {
323 char buf[256];
324 size_t len;
325 int i;
326
327 cmdline = skip_spaces(cmdline);
328
329 /* terminate on "--" appearing on the command line by itself */
330 if (cmdline[0] == '-' && cmdline[1] == '-' && isspace(cmdline[2]))
331 return;
332
333 for (len = 0; cmdline[len] && !isspace(cmdline[len]); len++) {
334 if (len >= sizeof(buf) - 1)
335 break;
336 if (cmdline[len] == '-')
337 buf[len] = '_';
338 else
339 buf[len] = cmdline[len];
340 }
341 if (!len)
342 return;
343
344 buf[len] = 0;
345
346 cmdline += len;
347
348 match_options(buf);
349
350 for (i = 0; parse_aliases && i < ARRAY_SIZE(aliases); i++)
351 if (!memcmp(buf, aliases[i].alias, len + 1))
352 __parse_cmdline(aliases[i].feature, false);
353 } while (1);
354 }
355
get_bootargs_cmdline(const void * fdt,int node)356 static __init const u8 *get_bootargs_cmdline(const void *fdt, int node)
357 {
358 static char const bootargs[] __initconst = "bootargs";
359 const u8 *prop;
360
361 if (node < 0)
362 return NULL;
363
364 prop = fdt_getprop(fdt, node, bootargs, NULL);
365 if (!prop)
366 return NULL;
367
368 return strlen(prop) ? prop : NULL;
369 }
370
parse_cmdline(const void * fdt,int chosen)371 static __init void parse_cmdline(const void *fdt, int chosen)
372 {
373 static char const cmdline[] __initconst = CONFIG_CMDLINE;
374 const u8 *prop = get_bootargs_cmdline(fdt, chosen);
375
376 if (IS_ENABLED(CONFIG_CMDLINE_EXTEND) ||
377 IS_ENABLED(CONFIG_CMDLINE_FORCE) ||
378 !prop) {
379 __parse_cmdline(cmdline, true);
380 }
381
382 if (!IS_ENABLED(CONFIG_CMDLINE_FORCE) && prop)
383 __parse_cmdline(prop, true);
384 }
385
init_feature_override(u64 boot_status,const void * fdt,int chosen)386 void __init init_feature_override(u64 boot_status, const void *fdt,
387 int chosen)
388 {
389 struct arm64_ftr_override *override;
390 const struct ftr_set_desc *reg;
391 int i;
392
393 for (i = 0; i < ARRAY_SIZE(regs); i++) {
394 reg = prel64_pointer(regs[i].reg);
395 override = prel64_pointer(reg->override);
396
397 override->val = 0;
398 override->mask = 0;
399 }
400
401 __boot_status = boot_status;
402
403 parse_cmdline(fdt, chosen);
404
405 for (i = 0; i < ARRAY_SIZE(regs); i++) {
406 reg = prel64_pointer(regs[i].reg);
407 override = prel64_pointer(reg->override);
408 dcache_clean_inval_poc((unsigned long)override,
409 (unsigned long)(override + 1));
410 }
411 }
412
skip_spaces(const char * str)413 char * __init skip_spaces(const char *str)
414 {
415 while (isspace(*str))
416 ++str;
417 return (char *)str;
418 }
419